On Fri, Nov 09, 2012 at 07:40:51PM -0800, Eric Johnson wrote:
The call to gen_logic_imm for OPC_LUI passes -1 for rs. This
causes the MIPS_DEBUG statement to seg fault due to the deference
of regnames[rs]. This patch fixes that.
Signed-off-by: Eric Johnson er...@mips.com
---
target-mips/translate.c | 18 +++---
1 files changed, 11 insertions(+), 7 deletions(-)
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 8175da0..aba6327 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -2013,7 +2013,6 @@ static void gen_logic_imm(CPUMIPSState *env,
DisasContext *ctx, uint32_t opc,
int rt, int rs, int16_t imm)
{
target_ulong uimm;
-const char *opn = imm logic;
if (rt == 0) {
/* If no destination, treat it as a NOP. */
@@ -2027,29 +2026,34 @@ static void gen_logic_imm(CPUMIPSState *env,
DisasContext *ctx, uint32_t opc,
tcg_gen_andi_tl(cpu_gpr[rt], cpu_gpr[rs], uimm);
else
tcg_gen_movi_tl(cpu_gpr[rt], 0);
-opn = andi;
+MIPS_DEBUG(%s %s, %s, TARGET_FMT_lx, andi, regnames[rt],
+regnames[rs], uimm);
break;
case OPC_ORI:
if (rs != 0)
tcg_gen_ori_tl(cpu_gpr[rt], cpu_gpr[rs], uimm);
else
tcg_gen_movi_tl(cpu_gpr[rt], uimm);
-opn = ori;
+MIPS_DEBUG(%s %s, %s, TARGET_FMT_lx, ori, regnames[rt],
+regnames[rs], uimm);
break;
case OPC_XORI:
if (likely(rs != 0))
tcg_gen_xori_tl(cpu_gpr[rt], cpu_gpr[rs], uimm);
else
tcg_gen_movi_tl(cpu_gpr[rt], uimm);
-opn = xori;
+MIPS_DEBUG(%s %s, %s, TARGET_FMT_lx, xori, regnames[rt],
+regnames[rs], uimm);
break;
case OPC_LUI:
tcg_gen_movi_tl(cpu_gpr[rt], imm 16);
-opn = lui;
+MIPS_DEBUG(lui %s, TARGET_FMT_lx, regnames[rt], uimm);
+break;
+
+default:
+MIPS_DEBUG(Unknown logical immediate opcode %08x, opc);
break;
}
-(void)opn; /* avoid a compiler warning */
-MIPS_DEBUG(%s %s, %s, TARGET_FMT_lx, opn, regnames[rt], regnames[rs],
uimm);
}
/* Set on less than with immediate operand */
Thanks, I applied this patch, with minor tweak: instead of using printf
%s to format the opcode name, I moved it to the string like it was
%already the case for LUI.
--
Aurelien Jarno GPG: 1024D/F1BCDB73
aurel...@aurel32.net http://www.aurel32.net