Re: [Qemu-devel] [PATCH] target-ppc: Some support for dumping TLB_EMB TLBs

[Alexander Graf]

On 24.04.2012, at 18:48, François Revol wrote:

> Add mmubooke_dump_mmu().
> 
> TODO: Add printing of individual flags.
> 
> Signed-off-by: François Revol 

agraf@lychee:/home/agraf/release/qemu> git pw am 'target-ppc: Some support for 
dumping TLB_EMB TLBs'
WARNING: line over 80 characters
#42: FILE: target-ppc/helper.c:1481:
+cpu_fprintf(f, "Effective  Physical   Size PID   Prot 
Attr\n");

WARNING: braces {} are necessary for all arms of this statement
#64: FILE: target-ppc/helper.c:1503:
+if (size >= 1024)
[...]
+else
[...]

WARNING: line over 80 characters
#65: FILE: target-ppc/helper.c:1504:
+snprintf(size_buff, sizeof(size_buff), "%3" PRId64 "M", size / 
1024);

total: 0 errors, 3 warnings, 61 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
checkpatch failed, still apply? [y|N] 


I'll fix them up this time around, but please run checkpatch next time before 
submitting a patch ;). Also, please think of a nicer commit message next time.

Applied to ppc-next.


Alex

[Qemu-devel] [PATCH] target-ppc: Some support for dumping TLB_EMB TLBs

[François Revol]

Add mmubooke_dump_mmu().

TODO: Add printing of individual flags.

Signed-off-by: François Revol 
---
 target-ppc/helper.c |   49 +
 1 file changed, 49 insertions(+)

diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index c610ce3..c998efc 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -1466,6 +1466,52 @@ static const char *book3e_tsize_to_str[32] = {
 "1T", "2T"
 };
 
+static void mmubooke_dump_mmu(FILE *f, fprintf_function cpu_fprintf,
+ CPUPPCState *env)
+{
+ppcemb_tlb_t *entry;
+int i;
+
+if (kvm_enabled() && !env->kvm_sw_tlb) {
+cpu_fprintf(f, "Cannot access KVM TLB\n");
+return;
+}
+
+cpu_fprintf(f, "\nTLB:\n");
+cpu_fprintf(f, "Effective  Physical   Size PID   Prot 
Attr\n");
+
+entry = &env->tlb.tlbe[0];
+for (i = 0; i < env->nb_tlb; i++, entry++) {
+target_phys_addr_t ea, pa;
+target_ulong mask;
+uint64_t size = (uint64_t)entry->size;
+char size_buff[20];
+
+/* Check valid flag */
+if (!(entry->prot & PAGE_VALID)) {
+continue;
+}
+
+mask = ~(entry->size - 1);
+ea = entry->EPN & mask;
+pa = entry->RPN & mask;
+#if (TARGET_PHYS_ADDR_BITS >= 36)
+/* Extend the physical address to 36 bits */
+pa |= (target_phys_addr_t)(entry->RPN & 0xF) << 32;
+#endif
+size /= 1024;
+if (size >= 1024)
+snprintf(size_buff, sizeof(size_buff), "%3" PRId64 "M", size / 
1024);
+else
+snprintf(size_buff, sizeof(size_buff), "%3" PRId64 "k", size);
+cpu_fprintf(f, "0x%016" PRIx64 " 0x%016" PRIx64 " %s %-5u %08x %08x\n",
+(uint64_t)ea, (uint64_t)pa,
+size_buff, (uint32_t)entry->PID,
+entry->prot, entry->attr);
+}
+
+}
+
 static void mmubooke206_dump_one_tlb(FILE *f, fprintf_function cpu_fprintf,
  CPUPPCState *env, int tlbn, int offset,
  int tlbsize)
@@ -1561,6 +1607,9 @@ static void mmubooks_dump_mmu(FILE *f, fprintf_function 
cpu_fprintf,
 void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env)
 {
 switch (env->mmu_model) {
+case POWERPC_MMU_BOOKE:
+mmubooke_dump_mmu(f, cpu_fprintf, env);
+break;
 case POWERPC_MMU_BOOKE206:
 mmubooke206_dump_mmu(f, cpu_fprintf, env);
 break;
-- 
1.7.10