Hi Richard
Thanks for your patch! I have applied it to my tree, but i still get
SIGSEGV. I think that I might have found the problem. It seems to be
related to the bmi instruction blsr, which seems to be not properly
implemented.
On this example:
#include
int test_blsr(int val){
return (val & (val - 1));
}
int main(int argc, char *argv) {
volatile int val = 4096;
fprintf(stdout, "%d\n", test_blsr(val));
return 0;
}
When it is compiled with -march=bdver4 -static -O3 test_blsr , the
compiler produces:
00400af0 :
400af0: c4 e2 78 f3 cf blsr %edi,%eax
400af5: c3 retq
400af6: 66 2e 0f 1f 84 00 00nopw %cs:0x0(%rax,%rax,1)
400afd: 00 00 00
If I run the emulator: /tmp/qemu/x86_64-linux-user/qemu-x86_64 -cpu
Haswell ./a.out
The function prints 4096
A fast look in the code shows that
https://github.com/qemu/qemu/blob/master/target/i386/translate.c#L4028
does not really match
https://en.wikipedia.org/wiki/Bit_Manipulation_Instruction_Sets#BMI1_.28Bit_Manipulation_Instruction_Set_1.29
It appears that case 1 and case 3 are swapped. I tried to fix it, but
with no results :(. Anyway, the wiki could also be wrong.
What is sure is that the code produces different results on qemu than
on the target, which is not good
Thanks again for your help!
On Wed, Jul 12, 2017 at 6:04 AM, Richard Henderson wrote:
> On 07/11/2017 11:21 AM, Richard Henderson wrote:
>>
>> I am in the process of trying to run the gcc testsuite with -mtbm,
>> with and without the patchset, to see (1) if the new insns get used
>> and (2) that they run ok.
>
>
> FWIW, make check-gcc RUNTESTFLAGS='--target_board=unix/-mtbm execute.exp'
> shows 204 failures on a host that does not support TBM, so the extension is
> being used. A browse through exactly one of these used only bextr. Running
> the same tests with dejagnu using qemu-x86_64 -cpu qemu64,+tbm shows zero
> failures.
>
>
> r~
--
Ricardo Ribalda
