This patch adds the floating point subtraction instructions defined
by V2.06 of the PowerPC ISA: xssubdp, xvsubdp and xvsubsp.
Signed-off-by: Tom Musta tommu...@gmail.com
---
target-ppc/fpu_helper.c | 46 ++
target-ppc/helper.h |3 +++
target-ppc/translate.c |6 ++
3 files changed, 55 insertions(+), 0 deletions(-)
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index 8cbc905..c9997a3 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -1804,3 +1804,49 @@ void helper_##op(CPUPPCState *env, uint32_t opcode)
\
VSX_ADD(xsadddp, 1, float64, f64, 1)
VSX_ADD(xvadddp, 2, float64, f64, 0)
VSX_ADD(xvaddsp, 4, float32, f32, 0)
+
+/* VSX_SUB - VSX floating point subtract
+ * op- instruction mnemonic
+ * nels - number of elements (1, 2 or 4)
+ * tp- type (float32 or float64)
+ * fld - vsr_t field (f32 or f64)
+ * sfprf - set FPRF
+ */
+#define VSX_SUB(op, nels, tp, fld, sfprf) \
+void helper_##op(CPUPPCState *env, uint32_t opcode) \
+{ \
+ppc_vsr_t xt, xa, xb; \
+int i;\
+ \
+getVSR(xA(opcode), xa, env); \
+getVSR(xB(opcode), xb, env); \
+getVSR(xT(opcode), xt, env); \
+helper_reset_fpstatus(env); \
+ \
+for (i = 0; i nels; i++) { \
+if (unlikely(tp##_is_infinity(xa.fld[i])\
+ tp##_is_infinity(xb.fld[i])\
+ tp##_is_neg(xa.fld[i]) == tp##_is_neg(xb.fld[i]))) { \
+xt.fld[i] = float64_to_##tp( \
+fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXISI, \
+ sfprf), \
+env-fp_status); \
+} else { \
+if (unlikely(tp##_is_signaling_nan(xa.fld[i]) || \
+ tp##_is_signaling_nan(xb.fld[i]))) { \
+fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, sfprf);\
+} \
+xt.fld[i] = tp##_sub(xa.fld[i], xb.fld[i], env-fp_status); \
+if (sfprf) { \
+helper_compute_fprf(env, xt.fld[i], sfprf); \
+} \
+} \
+} \
+ \
+putVSR(xT(opcode), xt, env); \
+helper_float_check_status(env); \
+}
+
+VSX_SUB(xssubdp, 1, float64, f64, 1)
+VSX_SUB(xvsubdp, 2, float64, f64, 0)
+VSX_SUB(xvsubsp, 4, float32, f32, 0)
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 30e6aa4..98b0bc5 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -252,10 +252,13 @@ DEF_HELPER_4(vctuxs, void, env, avr, avr, i32)
DEF_HELPER_4(vctsxs, void, env, avr, avr, i32)
DEF_HELPER_2(xsadddp, void, env, i32)
+DEF_HELPER_2(xssubdp, void, env, i32)
DEF_HELPER_2(xvadddp, void, env, i32)
+DEF_HELPER_2(xvsubdp, void, env, i32)
DEF_HELPER_2(xvaddsp, void, env, i32)
+DEF_HELPER_2(xvsubsp, void, env, i32)
DEF_HELPER_2(efscfsi, i32, env, i32)
DEF_HELPER_2(efscfui, i32, env, i32)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 7aa17e1..d93bbf4 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -7294,10 +7294,13 @@ static void gen_##name(DisasContext * ctx)
\
}
GEN_VSX_HELPER_2(xsadddp, 0x00, 0x04, 0, PPC2_VSX)
+GEN_VSX_HELPER_2(xssubdp, 0x00, 0x05, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvadddp, 0x00, 0x0C, 0, PPC2_VSX)
+GEN_VSX_HELPER_2(xvsubdp, 0x00, 0x0D, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvaddsp, 0x00, 0x08, 0, PPC2_VSX)
+GEN_VSX_HELPER_2(xvsubsp, 0x00, 0x09, 0, PPC2_VSX)
#define VSX_LOGICAL(name, tcg_op)\
static void
