Re: [Qemu-devel] [PATCH 05/35] cpu: Define ArchCPU
On Sat, Mar 23, 2019 at 12:48 PM Richard Henderson wrote: > > For all targets, do this just before including exec/cpu-all.h. > > Signed-off-by: Richard Henderson Acked-by: Alistair Francis Alistair > --- > target/alpha/cpu.h | 1 + > target/arm/cpu.h| 1 + > target/cris/cpu.h | 1 + > target/hppa/cpu.h | 1 + > target/i386/cpu.h | 1 + > target/lm32/cpu.h | 1 + > target/m68k/cpu.h | 1 + > target/microblaze/cpu.h | 1 + > target/mips/cpu.h | 1 + > target/moxie/cpu.h | 1 + > target/nios2/cpu.h | 1 + > target/openrisc/cpu.h | 1 + > target/ppc/cpu.h| 1 + > target/riscv/cpu.h | 1 + > target/s390x/cpu.h | 1 + > target/sh4/cpu.h| 1 + > target/sparc/cpu.h | 1 + > target/tilegx/cpu.h | 1 + > target/tricore/cpu.h| 1 + > target/unicore32/cpu.h | 1 + > target/xtensa/cpu.h | 1 + > 21 files changed, 21 insertions(+) > > diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h > index fac622aa02..6629b869d2 100644 > --- a/target/alpha/cpu.h > +++ b/target/alpha/cpu.h > @@ -301,6 +301,7 @@ void alpha_cpu_do_unaligned_access(CPUState *cpu, vaddr > addr, > #define cpu_signal_handler cpu_alpha_signal_handler > > typedef CPUAlphaState CPUArchState; > +typedef AlphaCPU ArchCPU; > > #include "exec/cpu-all.h" > > diff --git a/target/arm/cpu.h b/target/arm/cpu.h > index 89fb92a032..5a8a3f7f7d 100644 > --- a/target/arm/cpu.h > +++ b/target/arm/cpu.h > @@ -3055,6 +3055,7 @@ static inline bool > arm_cpu_data_is_big_endian(CPUARMState *env) > } > > typedef CPUARMState CPUArchState; > +typedef ARMCPU ArchCPU; > > #include "exec/cpu-all.h" > > diff --git a/target/cris/cpu.h b/target/cris/cpu.h > index 95662c36b2..bcd17bf88b 100644 > --- a/target/cris/cpu.h > +++ b/target/cris/cpu.h > @@ -285,6 +285,7 @@ int cris_cpu_handle_mmu_fault(CPUState *cpu, vaddr > address, int size, int rw, > #define SFR_RW_MM_TLB_HI env->pregs[PR_SRS]][6 > > typedef CPUCRISState CPUArchState; > +typedef CRISCPU ArchCPU; > > #include "exec/cpu-all.h" > > diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h > index 7c1d1e0a0e..f90b11dd0b 100644 > --- a/target/hppa/cpu.h > +++ b/target/hppa/cpu.h > @@ -231,6 +231,7 @@ static inline HPPACPU *hppa_env_get_cpu(CPUHPPAState *env) > #define ENV_OFFSET offsetof(HPPACPU, env) > > typedef CPUHPPAState CPUArchState; > +typedef HPPACPU ArchCPU; > > #include "exec/cpu-all.h" > > diff --git a/target/i386/cpu.h b/target/i386/cpu.h > index 84ca69ea1a..bb1464d451 100644 > --- a/target/i386/cpu.h > +++ b/target/i386/cpu.h > @@ -1750,6 +1750,7 @@ static inline target_long lshift(target_long x, int n) > void tcg_x86_init(void); > > typedef CPUX86State CPUArchState; > +typedef X86CPU ArchCPU; > > #include "exec/cpu-all.h" > #include "svm.h" > diff --git a/target/lm32/cpu.h b/target/lm32/cpu.h > index 5b24cfcc1f..5eef4ccfc5 100644 > --- a/target/lm32/cpu.h > +++ b/target/lm32/cpu.h > @@ -257,6 +257,7 @@ int lm32_cpu_handle_mmu_fault(CPUState *cpu, vaddr > address, int size, int rw, >int mmu_idx); > > typedef CPULM32State CPUArchState; > +typedef LM32CPU ArchCPU; > > #include "exec/cpu-all.h" > > diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h > index 48c051c7d2..5db18909cc 100644 > --- a/target/m68k/cpu.h > +++ b/target/m68k/cpu.h > @@ -536,6 +536,7 @@ void m68k_cpu_unassigned_access(CPUState *cs, hwaddr addr, > unsigned size); > > typedef CPUM68KState CPUArchState; > +typedef M68kCPU ArchCPU; > > #include "exec/cpu-all.h" > > diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h > index 58e165..d7c1846e49 100644 > --- a/target/microblaze/cpu.h > +++ b/target/microblaze/cpu.h > @@ -366,6 +366,7 @@ int mb_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, > int size, int rw, > int mmu_idx); > > typedef CPUMBState CPUArchState; > +typedef MicroBlazeCPU ArchCPU; > > #include "exec/cpu-all.h" > > diff --git a/target/mips/cpu.h b/target/mips/cpu.h > index 608ae23289..8c5a40b5ad 100644 > --- a/target/mips/cpu.h > +++ b/target/mips/cpu.h > @@ -1091,6 +1091,7 @@ static inline int cpu_mmu_index (CPUMIPSState *env, > bool ifetch) > } > > typedef CPUMIPSState CPUArchState; > +typedef MIPSCPU ArchCPU; > > #include "exec/cpu-all.h" > > diff --git a/target/moxie/cpu.h b/target/moxie/cpu.h > index 10ba6aa7be..4bc5e07af9 100644 > --- a/target/moxie/cpu.h > +++ b/target/moxie/cpu.h > @@ -119,6 +119,7 @@ static inline int cpu_mmu_index(CPUMoxieState *env, bool > ifetch) > } > > typedef CPUMoxieState CPUArchState; > +typedef MoxieCPU ArchCPU; > > #include "exec/cpu-all.h" > > diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h > index 2b4bd25d65..272ab10e67 100644 > --- a/target/nios2/cpu.h > +++ b/target/nios2/cpu.h > @@ -244,6 +244,7 @@ static inline int cpu_interrupts_enabled(CPUNios2State > *env) > } > > typedef CPUNios2State CPUArchState; > +typedef Nios2CPU ArchCPU; > >
[Qemu-devel] [PATCH 05/35] cpu: Define ArchCPU
For all targets, do this just before including exec/cpu-all.h. Signed-off-by: Richard Henderson --- target/alpha/cpu.h | 1 + target/arm/cpu.h| 1 + target/cris/cpu.h | 1 + target/hppa/cpu.h | 1 + target/i386/cpu.h | 1 + target/lm32/cpu.h | 1 + target/m68k/cpu.h | 1 + target/microblaze/cpu.h | 1 + target/mips/cpu.h | 1 + target/moxie/cpu.h | 1 + target/nios2/cpu.h | 1 + target/openrisc/cpu.h | 1 + target/ppc/cpu.h| 1 + target/riscv/cpu.h | 1 + target/s390x/cpu.h | 1 + target/sh4/cpu.h| 1 + target/sparc/cpu.h | 1 + target/tilegx/cpu.h | 1 + target/tricore/cpu.h| 1 + target/unicore32/cpu.h | 1 + target/xtensa/cpu.h | 1 + 21 files changed, 21 insertions(+) diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h index fac622aa02..6629b869d2 100644 --- a/target/alpha/cpu.h +++ b/target/alpha/cpu.h @@ -301,6 +301,7 @@ void alpha_cpu_do_unaligned_access(CPUState *cpu, vaddr addr, #define cpu_signal_handler cpu_alpha_signal_handler typedef CPUAlphaState CPUArchState; +typedef AlphaCPU ArchCPU; #include "exec/cpu-all.h" diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 89fb92a032..5a8a3f7f7d 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -3055,6 +3055,7 @@ static inline bool arm_cpu_data_is_big_endian(CPUARMState *env) } typedef CPUARMState CPUArchState; +typedef ARMCPU ArchCPU; #include "exec/cpu-all.h" diff --git a/target/cris/cpu.h b/target/cris/cpu.h index 95662c36b2..bcd17bf88b 100644 --- a/target/cris/cpu.h +++ b/target/cris/cpu.h @@ -285,6 +285,7 @@ int cris_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, int rw, #define SFR_RW_MM_TLB_HI env->pregs[PR_SRS]][6 typedef CPUCRISState CPUArchState; +typedef CRISCPU ArchCPU; #include "exec/cpu-all.h" diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index 7c1d1e0a0e..f90b11dd0b 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -231,6 +231,7 @@ static inline HPPACPU *hppa_env_get_cpu(CPUHPPAState *env) #define ENV_OFFSET offsetof(HPPACPU, env) typedef CPUHPPAState CPUArchState; +typedef HPPACPU ArchCPU; #include "exec/cpu-all.h" diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 84ca69ea1a..bb1464d451 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1750,6 +1750,7 @@ static inline target_long lshift(target_long x, int n) void tcg_x86_init(void); typedef CPUX86State CPUArchState; +typedef X86CPU ArchCPU; #include "exec/cpu-all.h" #include "svm.h" diff --git a/target/lm32/cpu.h b/target/lm32/cpu.h index 5b24cfcc1f..5eef4ccfc5 100644 --- a/target/lm32/cpu.h +++ b/target/lm32/cpu.h @@ -257,6 +257,7 @@ int lm32_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, int rw, int mmu_idx); typedef CPULM32State CPUArchState; +typedef LM32CPU ArchCPU; #include "exec/cpu-all.h" diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index 48c051c7d2..5db18909cc 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -536,6 +536,7 @@ void m68k_cpu_unassigned_access(CPUState *cs, hwaddr addr, unsigned size); typedef CPUM68KState CPUArchState; +typedef M68kCPU ArchCPU; #include "exec/cpu-all.h" diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index 58e165..d7c1846e49 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -366,6 +366,7 @@ int mb_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, int rw, int mmu_idx); typedef CPUMBState CPUArchState; +typedef MicroBlazeCPU ArchCPU; #include "exec/cpu-all.h" diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 608ae23289..8c5a40b5ad 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -1091,6 +1091,7 @@ static inline int cpu_mmu_index (CPUMIPSState *env, bool ifetch) } typedef CPUMIPSState CPUArchState; +typedef MIPSCPU ArchCPU; #include "exec/cpu-all.h" diff --git a/target/moxie/cpu.h b/target/moxie/cpu.h index 10ba6aa7be..4bc5e07af9 100644 --- a/target/moxie/cpu.h +++ b/target/moxie/cpu.h @@ -119,6 +119,7 @@ static inline int cpu_mmu_index(CPUMoxieState *env, bool ifetch) } typedef CPUMoxieState CPUArchState; +typedef MoxieCPU ArchCPU; #include "exec/cpu-all.h" diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index 2b4bd25d65..272ab10e67 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -244,6 +244,7 @@ static inline int cpu_interrupts_enabled(CPUNios2State *env) } typedef CPUNios2State CPUArchState; +typedef Nios2CPU ArchCPU; #include "exec/cpu-all.h" diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h index 9bd583f13a..20ea1ca973 100644 --- a/target/openrisc/cpu.h +++ b/target/openrisc/cpu.h @@ -364,6 +364,7 @@ void cpu_openrisc_count_stop(OpenRISCCPU *cpu); #define CPU_RESOLVING_TYPE TYPE_OPENRISC_CPU typedef CPUOpenRISCState CPUArchState; +typedef OpenRISCCPU ArchCPU;
