Re: [Qemu-devel] [PATCH 12/17] s390x: Prepare cpu.h for emulation
On 28.03.2011, at 16:54, Peter Maydell wrote:
On 24 March 2011 15:58, Alexander Graf ag...@suse.de wrote:
diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
Minor nits only.
-FPReg fregs[16]; /* FP registers */
+CPU_DoubleU fregs[16]; /* FP registers */
These changes mean that the FPReg typedef in this file is no longer
used, so you might as well delete it.
Good point :)
Personally I prefer the way target-arm handles float regs,
ie it just has 'float64 regs[32]' and relies on them being
the right representation to pass in registers. This is
less likely to work with float128s though, and anyway I suspect
Nathan would disagree with me, so this isn't a request to change
this code.
+#define EXCP_EXT 1
+
+#define EXCP_SVC 2 /* supervisor call (syscall) */
+#define EXCP_PGM 3 /* program interruption */
+/* XXX */
+#define EXCP_EXECUTE_SVC 0xff0 /* supervisor call via execute insn */
This comment ought to have an explanation of what the issue is
that means it's 'XXX'...
It means this exception shouldn't be referenced in any code, but was at the
point of putting the XXX in there. I merely forgot to remove it again. Thanks
for the reminder :).
+CC_OP_ADD_64, /* */
+CC_OP_ADDU_64, /* */
+CC_OP_SUB_64, /* */
+CC_OP_SUBU_64, /* */
+CC_OP_ABS_64, /* */
+CC_OP_NABS_64, /* */
Why the empty comments?
Uh - yeah :).
+static inline uint64_t time2tod(uint64_t time) {
+return (time 9) / 125;
+}
Could maybe use a comment about what units we're converting
to and from here.
Yup :)
Alex
Re: [Qemu-devel] [PATCH 12/17] s390x: Prepare cpu.h for emulation
On 24 March 2011 15:58, Alexander Graf ag...@suse.de wrote:
diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
Minor nits only.
- FPReg fregs[16]; /* FP registers */
+ CPU_DoubleU fregs[16]; /* FP registers */
These changes mean that the FPReg typedef in this file is no longer
used, so you might as well delete it.
Personally I prefer the way target-arm handles float regs,
ie it just has 'float64 regs[32]' and relies on them being
the right representation to pass in registers. This is
less likely to work with float128s though, and anyway I suspect
Nathan would disagree with me, so this isn't a request to change
this code.
+#define EXCP_EXT 1
+
+#define EXCP_SVC 2 /* supervisor call (syscall) */
+#define EXCP_PGM 3 /* program interruption */
+/* XXX */
+#define EXCP_EXECUTE_SVC 0xff0 /* supervisor call via execute insn */
This comment ought to have an explanation of what the issue is
that means it's 'XXX'...
+ CC_OP_ADD_64, /* */
+ CC_OP_ADDU_64, /* */
+ CC_OP_SUB_64, /* */
+ CC_OP_SUBU_64, /* */
+ CC_OP_ABS_64, /* */
+ CC_OP_NABS_64, /* */
Why the empty comments?
+static inline uint64_t time2tod(uint64_t time) {
+ return (time 9) / 125;
+}
Could maybe use a comment about what units we're converting
to and from here.
-- PMM
[Qemu-devel] [PATCH 12/17] s390x: Prepare cpu.h for emulation
We need to add some more logic to the CPU description to leverage emulation
of an s390x CPU. This patch adds all the required helpers, fields in CPUState
and constant definitions required for user and system emulation.
Signed-off-by: Alexander Graf ag...@suse.de
---
target-s390x/cpu.h | 759 +--
1 files changed, 729 insertions(+), 30 deletions(-)
diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
index e47c372..54ecaa9 100644
--- a/target-s390x/cpu.h
+++ b/target-s390x/cpu.h
@@ -26,10 +26,24 @@
#define CPUState struct CPUS390XState
#include cpu-defs.h
+#define TARGET_PAGE_BITS 12
+
+#define TARGET_PHYS_ADDR_SPACE_BITS 64
+#define TARGET_VIRT_ADDR_SPACE_BITS 64
+
+#include cpu-all.h
#include softfloat.h
-#define NB_MMU_MODES 2
+#define NB_MMU_MODES 3
+
+#define MMU_MODE0_SUFFIX _primary
+#define MMU_MODE1_SUFFIX _secondary
+#define MMU_MODE2_SUFFIX _home
+
+#define MMU_USER_IDX 1
+
+#define MAX_EXT_QUEUE 16
typedef union FPReg {
struct {
@@ -45,23 +59,58 @@ typedef union FPReg {
uint64_t i;
} FPReg;
+typedef struct PSW {
+uint64_t mask;
+uint64_t addr;
+} PSW;
+
+typedef struct ExtQueue {
+uint32_t code;
+uint32_t param;
+uint32_t param64;
+} ExtQueue;
+
typedef struct CPUS390XState {
uint64_t regs[16]; /* GP registers */
uint32_t aregs[16];/* access registers */
uint32_t fpc; /* floating-point control register */
-FPReg fregs[16]; /* FP registers */
+CPU_DoubleU fregs[16]; /* FP registers */
float_status fpu_status; /* passed to softfloat lib */
-struct {
-uint64_t mask;
-uint64_t addr;
-} psw;
+PSW psw;
-int cc; /* condition code (0-3) */
+uint32_t cc_op;
+uint64_t cc_src;
+uint64_t cc_dst;
+uint64_t cc_vr;
uint64_t __excp_addr;
+uint64_t psa;
+
+uint32_t int_pgm_code;
+uint32_t int_pgm_ilc;
+
+uint32_t int_svc_code;
+uint32_t int_svc_ilc;
+
+uint64_t cregs[16]; /* control registers */
+
+int pending_int;
+ExtQueue ext_queue[MAX_EXT_QUEUE];
+
+/* reset does memset(0) up to here */
+
+int ext_index;
+int cpu_num;
+uint8_t *storage_keys;
+
+uint64_t tod_offset;
+uint64_t tod_basetime;
+QEMUTimer *tod_timer;
+
+QEMUTimer *cpu_timer;
CPU_COMMON
} CPUS390XState;
@@ -69,24 +118,174 @@ typedef struct CPUS390XState {
#if defined(CONFIG_USER_ONLY)
static inline void cpu_clone_regs(CPUState *env, target_ulong newsp)
{
-if (newsp)
+if (newsp) {
env-regs[15] = newsp;
+}
env-regs[0] = 0;
}
#endif
-#define MMU_MODE0_SUFFIX _kernel
-#define MMU_MODE1_SUFFIX _user
-#define MMU_USER_IDX 1
+/* Interrupt Codes */
+/* Program Interrupts */
+#define PGM_OPERATION 0x0001
+#define PGM_PRIVILEGED 0x0002
+#define PGM_EXECUTE 0x0003
+#define PGM_PROTECTION 0x0004
+#define PGM_ADDRESSING 0x0005
+#define PGM_SPECIFICATION 0x0006
+#define PGM_DATA0x0007
+#define PGM_FIXPT_OVERFLOW 0x0008
+#define PGM_FIXPT_DIVIDE0x0009
+#define PGM_DEC_OVERFLOW0x000a
+#define PGM_DEC_DIVIDE 0x000b
+#define PGM_HFP_EXP_OVERFLOW0x000c
+#define PGM_HFP_EXP_UNDERFLOW 0x000d
+#define PGM_HFP_SIGNIFICANCE0x000e
+#define PGM_HFP_DIVIDE 0x000f
+#define PGM_SEGMENT_TRANS 0x0010
+#define PGM_PAGE_TRANS 0x0011
+#define PGM_TRANS_SPEC 0x0012
+#define PGM_SPECIAL_OP 0x0013
+#define PGM_OPERAND 0x0015
+#define PGM_TRACE_TABLE 0x0016
+#define PGM_SPACE_SWITCH0x001c
+#define PGM_HFP_SQRT0x001d
+#define PGM_PC_TRANS_SPEC 0x001f
+#define PGM_AFX_TRANS 0x0020
+#define PGM_ASX_TRANS 0x0021
+#define PGM_LX_TRANS0x0022
+#define PGM_EX_TRANS0x0023
+#define PGM_PRIM_AUTH 0x0024
+#define PGM_SEC_AUTH0x0025
+#define PGM_ALET_SPEC 0x0028
+#define PGM_ALEN_SPEC 0x0029
+#define PGM_ALE_SEQ 0x002a
+#define PGM_ASTE_VALID 0x002b
+#define PGM_ASTE_SEQ0x002c
+#define PGM_EXT_AUTH0x002d
+#define PGM_STACK_FULL 0x0030
+#define PGM_STACK_EMPTY 0x0031
+#define PGM_STACK_SPEC 0x0032
+#define PGM_STACK_TYPE 0x0033
+#define PGM_STACK_OP0x0034
+#define PGM_ASCE_TYPE 0x0038
+#define PGM_REG_FIRST_TRANS 0x0039
+#define PGM_REG_SEC_TRANS 0x003a
+#define PGM_REG_THIRD_TRANS 0x003b
+#define PGM_MONITOR 0x0040
+#define PGM_PER
