Re: [Qemu-devel] [PATCH 14/35] tcg-s390: Rearrange register allocation order.

2010-06-10 Thread Aurelien Jarno 
On Fri, Jun 04, 2010 at 12:14:22PM -0700, Richard Henderson wrote:
 Try to avoid conflicting with the outgoing function call arguments.
 
 Signed-off-by: Richard Henderson r...@twiddle.net
 ---
  tcg/s390/tcg-target.c |   23 +--
  1 files changed, 13 insertions(+), 10 deletions(-)

This patch looks fine.

 diff --git a/tcg/s390/tcg-target.c b/tcg/s390/tcg-target.c
 index 95ea3c8..3944cb1 100644
 --- a/tcg/s390/tcg-target.c
 +++ b/tcg/s390/tcg-target.c
 @@ -149,22 +149,25 @@ static const char * const 
 tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
  };
  #endif
  
 +/* Since R6 is a potential argument register, choose it last of the
 +   call-saved registers.  Likewise prefer the call-clobbered registers
 +   in reverse order to maximize the chance of avoiding the arguments.  */
  static const int tcg_target_reg_alloc_order[] = {
 -TCG_REG_R6,
 -TCG_REG_R7,
 -TCG_REG_R8,
 -TCG_REG_R9,
 -TCG_REG_R10,
 -TCG_REG_R11,
 -TCG_REG_R12,
  TCG_REG_R13,
 +TCG_REG_R12,
 +TCG_REG_R11,
 +TCG_REG_R10,
 +TCG_REG_R9,
 +TCG_REG_R8,
 +TCG_REG_R7,
 +TCG_REG_R6,
  TCG_REG_R14,
  TCG_REG_R0,
  TCG_REG_R1,
 -TCG_REG_R2,
 -TCG_REG_R3,
 -TCG_REG_R4,
  TCG_REG_R5,
 +TCG_REG_R4,
 +TCG_REG_R3,
 +TCG_REG_R2,
  };
  
  static const int tcg_target_call_iarg_regs[] = {
 -- 
 1.7.0.1
 
 
 

-- 
Aurelien Jarno  GPG: 1024D/F1BCDB73
aurel...@aurel32.net http://www.aurel32.net

[Qemu-devel] [PATCH 14/35] tcg-s390: Rearrange register allocation order.

2010-06-04 Thread Richard Henderson 
Try to avoid conflicting with the outgoing function call arguments.

Signed-off-by: Richard Henderson r...@twiddle.net
---
 tcg/s390/tcg-target.c |   23 +--
 1 files changed, 13 insertions(+), 10 deletions(-)

diff --git a/tcg/s390/tcg-target.c b/tcg/s390/tcg-target.c
index 95ea3c8..3944cb1 100644
--- a/tcg/s390/tcg-target.c
+++ b/tcg/s390/tcg-target.c
@@ -149,22 +149,25 @@ static const char * const 
tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
 };
 #endif
 
+/* Since R6 is a potential argument register, choose it last of the
+   call-saved registers.  Likewise prefer the call-clobbered registers
+   in reverse order to maximize the chance of avoiding the arguments.  */
 static const int tcg_target_reg_alloc_order[] = {
-TCG_REG_R6,
-TCG_REG_R7,
-TCG_REG_R8,
-TCG_REG_R9,
-TCG_REG_R10,
-TCG_REG_R11,
-TCG_REG_R12,
 TCG_REG_R13,
+TCG_REG_R12,
+TCG_REG_R11,
+TCG_REG_R10,
+TCG_REG_R9,
+TCG_REG_R8,
+TCG_REG_R7,
+TCG_REG_R6,
 TCG_REG_R14,
 TCG_REG_R0,
 TCG_REG_R1,
-TCG_REG_R2,
-TCG_REG_R3,
-TCG_REG_R4,
 TCG_REG_R5,
+TCG_REG_R4,
+TCG_REG_R3,
+TCG_REG_R2,
 };
 
 static const int tcg_target_call_iarg_regs[] = {
-- 
1.7.0.1