Re: [Qemu-devel] [PATCH 2/2] target-ppc/kvm: Enable transactional memory on POWER8 with KVM-HV, too

[David Gibson]

On Thu, Sep 29, 2016 at 12:48:07PM +0200, Thomas Huth wrote:
> Transactional memory is also supported on POWER8 KVM-HV if the
> KVM_CAP_PPC_HTM is not available in the kernel yet, so add a hack
> to allow TM here, too.
> 
> Signed-off-by: Thomas Huth 

Applied to ppc-for-2.8.

> ---
>  hw/ppc/spapr.c   | 2 +-
>  target-ppc/kvm.c | 9 -
>  2 files changed, 9 insertions(+), 2 deletions(-)
> 
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index fc37145..2f4e818 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -584,7 +584,7 @@ static void spapr_populate_pa_features(CPUPPCState *env, 
> void *fdt, int offset)
>   */
>  pa_features[3] |= 0x20;
>  }
> -if (kvmppc_has_cap_htm()) {
> +if (kvmppc_has_cap_htm() && pa_size > 24) {

It looks like this is an unrelated fix to the original TM test.  I'll
fold it into the original patch.

>  pa_features[24] |= 0x80;/* Transactional memory support */
>  }
>  
> diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
> index dca50bc..e990cb7 100644
> --- a/target-ppc/kvm.c
> +++ b/target-ppc/kvm.c
> @@ -567,11 +567,18 @@ int kvm_arch_init_vcpu(CPUState *cs)
>  
>  idle_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, kvm_kick_cpu, cpu);
>  
> -/* Some targets support access to KVM's guest TLB. */
>  switch (cenv->mmu_model) {
>  case POWERPC_MMU_BOOKE206:
> +/* This target supports access to KVM's guest TLB */
>  ret = kvm_booke206_tlb_init(cpu);
>  break;
> +case POWERPC_MMU_2_07:
> +if (!cap_htm && !kvmppc_is_pr(cs->kvm_state)) {
> +/* KVM-HV has transactional memory on POWER8 also without the
> + * KVM_CAP_PPC_HTM extension, so enable it here instead. */
> +cap_htm = true;
> +}
> +break;
>  default:
>  break;
>  }

-- 
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson


signature.asc
Description: PGP signature

[Qemu-devel] [PATCH 2/2] target-ppc/kvm: Enable transactional memory on POWER8 with KVM-HV, too

[Thomas Huth]

Transactional memory is also supported on POWER8 KVM-HV if the
KVM_CAP_PPC_HTM is not available in the kernel yet, so add a hack
to allow TM here, too.

Signed-off-by: Thomas Huth 
---
 hw/ppc/spapr.c   | 2 +-
 target-ppc/kvm.c | 9 -
 2 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index fc37145..2f4e818 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -584,7 +584,7 @@ static void spapr_populate_pa_features(CPUPPCState *env, 
void *fdt, int offset)
  */
 pa_features[3] |= 0x20;
 }
-if (kvmppc_has_cap_htm()) {
+if (kvmppc_has_cap_htm() && pa_size > 24) {
 pa_features[24] |= 0x80;/* Transactional memory support */
 }
 
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
index dca50bc..e990cb7 100644
--- a/target-ppc/kvm.c
+++ b/target-ppc/kvm.c
@@ -567,11 +567,18 @@ int kvm_arch_init_vcpu(CPUState *cs)
 
 idle_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, kvm_kick_cpu, cpu);
 
-/* Some targets support access to KVM's guest TLB. */
 switch (cenv->mmu_model) {
 case POWERPC_MMU_BOOKE206:
+/* This target supports access to KVM's guest TLB */
 ret = kvm_booke206_tlb_init(cpu);
 break;
+case POWERPC_MMU_2_07:
+if (!cap_htm && !kvmppc_is_pr(cs->kvm_state)) {
+/* KVM-HV has transactional memory on POWER8 also without the
+ * KVM_CAP_PPC_HTM extension, so enable it here instead. */
+cap_htm = true;
+}
+break;
 default:
 break;
 }
-- 
1.8.3.1