Implement optional but real ext_i32_i64 and extu_i32_i64 ops. When
implemented, these ensure that a 32-bit value is always converted to
a 64-bit value and not propagated through the register allocator or
the optimizer.
Cc: Paolo Bonzini pbonz...@redhat.com
Cc: Richard Henderson r...@twiddle.net
Signed-off-by: Aurelien Jarno aurel...@aurel32.net
---
tcg/aarch64/tcg-target.h | 6 +-
tcg/i386/tcg-target.h| 7 ++-
tcg/ia64/tcg-target.h| 6 +-
tcg/ppc/tcg-target.h | 7 ++-
tcg/s390/tcg-target.h| 6 +-
tcg/sparc/tcg-target.h | 6 +-
tcg/tcg-op.c | 6 ++
tcg/tcg-opc.h| 3 +++
tcg/tci/tcg-target.h | 7 ++-
9 files changed, 47 insertions(+), 7 deletions(-)
diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h
index dfd8801..2cb870c 100644
--- a/tcg/aarch64/tcg-target.h
+++ b/tcg/aarch64/tcg-target.h
@@ -70,7 +70,6 @@ typedef enum {
#define TCG_TARGET_HAS_muls2_i320
#define TCG_TARGET_HAS_muluh_i320
#define TCG_TARGET_HAS_mulsh_i320
-#define TCG_TARGET_HAS_trunc_shr_i64_i32 0
#define TCG_TARGET_HAS_div_i64 1
#define TCG_TARGET_HAS_rem_i64 1
@@ -100,6 +99,11 @@ typedef enum {
#define TCG_TARGET_HAS_muluh_i641
#define TCG_TARGET_HAS_mulsh_i641
+/* size changing optional ops */
+#define TCG_TARGET_HAS_trunc_shr_i64_i32 0
+#define TCG_TARGET_HAS_ext_i32_i64 0
+#define TCG_TARGET_HAS_extu_i32_i64 0
+
static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
{
__builtin___clear_cache((char *)start, (char *)stop);
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
index dae50ba..274c97f 100644
--- a/tcg/i386/tcg-target.h
+++ b/tcg/i386/tcg-target.h
@@ -102,7 +102,6 @@ extern bool have_bmi1;
#define TCG_TARGET_HAS_mulsh_i320
#if TCG_TARGET_REG_BITS == 64
-#define TCG_TARGET_HAS_trunc_shr_i64_i32 0
#define TCG_TARGET_HAS_div2_i64 1
#define TCG_TARGET_HAS_rot_i64 1
#define TCG_TARGET_HAS_ext8s_i641
@@ -129,6 +128,12 @@ extern bool have_bmi1;
#define TCG_TARGET_HAS_muls2_i641
#define TCG_TARGET_HAS_muluh_i640
#define TCG_TARGET_HAS_mulsh_i640
+
+/* size changing optional ops */
+#define TCG_TARGET_HAS_trunc_shr_i64_i32 0
+#define TCG_TARGET_HAS_ext_i32_i64 0
+#define TCG_TARGET_HAS_extu_i32_i64 0
+
#endif
#define TCG_TARGET_deposit_i32_valid(ofs, len) \
diff --git a/tcg/ia64/tcg-target.h b/tcg/ia64/tcg-target.h
index 29902f9..adf4b17 100644
--- a/tcg/ia64/tcg-target.h
+++ b/tcg/ia64/tcg-target.h
@@ -160,11 +160,15 @@ typedef enum {
#define TCG_TARGET_HAS_muluh_i640
#define TCG_TARGET_HAS_mulsh_i320
#define TCG_TARGET_HAS_mulsh_i640
-#define TCG_TARGET_HAS_trunc_shr_i64_i32 0
#define TCG_TARGET_deposit_i32_valid(ofs, len) ((len) = 16)
#define TCG_TARGET_deposit_i64_valid(ofs, len) ((len) = 16)
+/* size changing optional ops */
+#define TCG_TARGET_HAS_trunc_shr_i64_i32 0
+#define TCG_TARGET_HAS_ext_i32_i64 0
+#define TCG_TARGET_HAS_extu_i32_i64 0
+
/* optional instructions automatically implemented */
#define TCG_TARGET_HAS_neg_i32 0 /* sub r1, r0, r3 */
#define TCG_TARGET_HAS_neg_i64 0 /* sub r1, r0, r3 */
diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h
index b7e6861..7b84491 100644
--- a/tcg/ppc/tcg-target.h
+++ b/tcg/ppc/tcg-target.h
@@ -77,7 +77,6 @@ typedef enum {
#if TCG_TARGET_REG_BITS == 64
#define TCG_TARGET_HAS_add2_i32 0
#define TCG_TARGET_HAS_sub2_i32 0
-#define TCG_TARGET_HAS_trunc_shr_i64_i32 0
#define TCG_TARGET_HAS_div_i64 1
#define TCG_TARGET_HAS_rem_i64 0
#define TCG_TARGET_HAS_rot_i64 1
@@ -105,6 +104,12 @@ typedef enum {
#define TCG_TARGET_HAS_muls2_i640
#define TCG_TARGET_HAS_muluh_i641
#define TCG_TARGET_HAS_mulsh_i641
+
+/* size changing optional ops */
+#define TCG_TARGET_HAS_trunc_shr_i64_i32 0
+#define TCG_TARGET_HAS_ext_i32_i64 0
+#define TCG_TARGET_HAS_extu_i32_i64 0
+
#endif
void flush_icache_range(uintptr_t start, uintptr_t stop);
diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h
index 50016a8..c4c5334 100644
--- a/tcg/s390/tcg-target.h
+++ b/tcg/s390/tcg-target.h
@@ -72,7 +72,6 @@ typedef enum TCGReg {
#define TCG_TARGET_HAS_muls2_i320
#define TCG_TARGET_HAS_muluh_i320
#define TCG_TARGET_HAS_mulsh_i320
-#define TCG_TARGET_HAS_trunc_shr_i64_i32 0
#define TCG_TARGET_HAS_div2_i64 1
#define TCG_TARGET_HAS_rot_i64 1
@@ -101,6 +100,11 @@ typedef enum TCGReg {
#define TCG_TARGET_HAS_muluh_i640
#define TCG_TARGET_HAS_mulsh_i640
+/* size changing optional ops */
+#define TCG_TARGET_HAS_trunc_shr_i64_i32 0
+#define TCG_TARGET_HAS_ext_i32_i64 0
+#define TCG_TARGET_HAS_extu_i32_i64 0
+
extern bool tcg_target_deposit_valid(int ofs, int len);
#define TCG_TARGET_deposit_i32_valid
