Re: [Qemu-devel] [PATCH arm-devs v1 13/13] net/cadence_gem: Dont rx packets when no rx buffer available

[Peter Crosthwaite]

On Mon, Dec 2, 2013 at 10:31 PM, Peter Maydell peter.mayd...@linaro.org wrote:
 On 2 December 2013 07:16, Peter Crosthwaite
 peter.crosthwa...@xilinx.com wrote:

 Missing apostrophe in Subject.

 Return false from can_recieve() when no valid buffer descriptor is

 can_receive

 available. Ensures against mass packet droppage in some applications.

 Signed-off-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
 ---

  hw/net/cadence_gem.c | 11 ++-
  1 file changed, 10 insertions(+), 1 deletion(-)

 diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
 index 8c2d8fc..a0499ac 100644
 --- a/hw/net/cadence_gem.c
 +++ b/hw/net/cadence_gem.c
 @@ -463,6 +463,15 @@ static int gem_can_receive(NetClientState *nc)
  return 0;
  }

 +if (rx_desc_get_ownership(s-rx_desc) == 1) {
 +if (s-can_rx_state != 2) {
 +s-can_rx_state = 2;
 +DB_PRINT(cant receive - busy buffer descriptor 0x%x\n,

 can't.


All fixed,

Regards,
Peter

 + s-rx_desc_addr);
 +}
 +return 0;
 +}
 +
  if (s-can_rx_state != 0) {
  s-can_rx_state = 0;
  DB_PRINT(can receive 0x%x\n, s-rx_desc_addr);
 @@ -1144,7 +1153,7 @@ static void gem_write(void *opaque, hwaddr offset, 
 uint64_t val,
  /* Reset to start of Q when transmit disabled. */
  s-tx_desc_addr = s-regs[GEM_TXQBASE];
  }
 -if (val  GEM_NWCTRL_RXENA) {
 +if (gem_can_receive(qemu_get_queue(s-nic))) {
  qemu_flush_queued_packets(qemu_get_queue(s-nic));
  }
  break;
 --
 1.8.4.4


 thanks
 -- PMM

[Qemu-devel] [PATCH arm-devs v1 13/13] net/cadence_gem: Dont rx packets when no rx buffer available

[Peter Crosthwaite]

Return false from can_recieve() when no valid buffer descriptor is
available. Ensures against mass packet droppage in some applications.

Signed-off-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
---

 hw/net/cadence_gem.c | 11 ++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
index 8c2d8fc..a0499ac 100644
--- a/hw/net/cadence_gem.c
+++ b/hw/net/cadence_gem.c
@@ -463,6 +463,15 @@ static int gem_can_receive(NetClientState *nc)
 return 0;
 }
 
+if (rx_desc_get_ownership(s-rx_desc) == 1) {
+if (s-can_rx_state != 2) {
+s-can_rx_state = 2;
+DB_PRINT(cant receive - busy buffer descriptor 0x%x\n,
+ s-rx_desc_addr);
+}
+return 0;
+}
+
 if (s-can_rx_state != 0) {
 s-can_rx_state = 0;
 DB_PRINT(can receive 0x%x\n, s-rx_desc_addr);
@@ -1144,7 +1153,7 @@ static void gem_write(void *opaque, hwaddr offset, 
uint64_t val,
 /* Reset to start of Q when transmit disabled. */
 s-tx_desc_addr = s-regs[GEM_TXQBASE];
 }
-if (val  GEM_NWCTRL_RXENA) {
+if (gem_can_receive(qemu_get_queue(s-nic))) {
 qemu_flush_queued_packets(qemu_get_queue(s-nic));
 }
 break;
-- 
1.8.4.4