On 08/09/2015 01:13 PM, Laurent Vivier wrote:
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
target-m68k/translate.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index ae57792..adf4521 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -2002,6 +2002,24 @@ DISAS_INSN(eor)
opsize = insn_opsize(insn, 6);
+if (((insn 3) 7) == 1) {
+/* cmpm */
Surely this can be separated out from EOR via masks at register_opcode time.
And since this isn't a coldfire instruction...
+reg = AREG(insn, 0);
+src = gen_load(s, opsize, reg, 1);
+tcg_gen_addi_i32(reg, reg, opsize_bytes(opsize));
+
+reg = AREG(insn, 9);
+dest = gen_load(s, opsize, reg, 1);
+tcg_gen_addi_i32(reg, reg, opsize_bytes(opsize));
+
+reg = tcg_temp_new();
+tcg_gen_sub_i32(reg, dest, src);
+gen_update_cc_add(reg, src);
No need for the extra temp, reg. Simply modify dest.
+SET_CC_OP(opsize, SUB);
+
+return;
+}
+
SRC_EA(env, src, opsize, -1, addr);
reg = DREG(insn, 9);
dest = tcg_temp_new();
