Re: [Qemu-devel] [PATCH v13 00/12] Add ARMv8 RAS virtualization support in QEMU
Hi peter, On 2017/12/14 2:12, Peter Maydell wrote: >> [v13,11/12] hw/arm/virt: Add RAS platform version for migration >> [v13,12/12] target-arm: kvm64: handle SIGBUS signal from kernel or KVM > Hi; unfortunately I only have one more working day this year, which > isn't really enough to get up to speed sufficiently with RAS to > review this patchset, so the earliest I'm likely to get to it is > the week beginning 9th Jan. Ok, thanks. > > Hopefully somebody who understands RAS better than me will > be able to review it before then. I also hope somebody can review it before then. > > thanks > -- PMM
Re: [Qemu-devel] [PATCH v13 00/12] Add ARMv8 RAS virtualization support in QEMU
On 13 December 2017 at 03:59, gengdongjiu wrote: > Hi Peter, > > On 2017/12/11 21:32, Igor Mammedov wrote: >> On Mon, 11 Dec 2017 19:31:14 +0800 >> gengdongjiu wrote: >> >>> Hi maintainer, >>> >>> This patch set seems pending about one month, could you help review for >>> them? Thanks. >> I'm going to look at ACPI side of it this week. > > Hi Peter/shannon, >Igor will review the ACPI part code, >could you review below five patches? which does not depend on OS kernel > patch and have received the agreement with others about the solution. >Thanks very much. > > [v13,08/12] target-arm: kvm64: inject synchronous External Abort > [v13,09/12] Move related hwpoison page function to accel/kvm/ folder > [v13,10/12] ARM: ACPI: Add _E04 for hardware error device > [v13,11/12] hw/arm/virt: Add RAS platform version for migration > [v13,12/12] target-arm: kvm64: handle SIGBUS signal from kernel or KVM Hi; unfortunately I only have one more working day this year, which isn't really enough to get up to speed sufficiently with RAS to review this patchset, so the earliest I'm likely to get to it is the week beginning 9th Jan. Hopefully somebody who understands RAS better than me will be able to review it before then. thanks -- PMM
Re: [Qemu-devel] [PATCH v13 00/12] Add ARMv8 RAS virtualization support in QEMU
Hi Peter, On 2017/12/11 21:32, Igor Mammedov wrote: > On Mon, 11 Dec 2017 19:31:14 +0800 > gengdongjiu wrote: > >> Hi maintainer, >> >> This patch set seems pending about one month, could you help review for >> them? Thanks. > I'm going to look at ACPI side of it this week. Hi Peter/shannon, Igor will review the ACPI part code, could you review below five patches? which does not depend on OS kernel patch and have received the agreement with others about the solution. Thanks very much. [v13,08/12] target-arm: kvm64: inject synchronous External Abort [v13,09/12] Move related hwpoison page function to accel/kvm/ folder [v13,10/12] ARM: ACPI: Add _E04 for hardware error device [v13,11/12] hw/arm/virt: Add RAS platform version for migration [v13,12/12] target-arm: kvm64: handle SIGBUS signal from kernel or KVM > > >> In this series, except the three patches in [1] are dependent on KVM >> implementation. Other patches does not depend on KVM/host, >> because KVM/host has already supported them, According to James Morse >> 's agreement, when Qemu receives SIGBUS with >> MCE_MCEERR_AR, Qemu record >> the CPER and inject a Synchronous-External-Abort; when Qemu receives SIGBUS >> with MCE_MCEERR_AO, Qemu record CPER and inject a GPIO IRQ. In my >> current patch set, I already do that. >> >> I plan to move the three patches in [1] out of this patch set, because it >> was a separate case, the three patches are used to set guest SError ESR, >> which depend on KVM "return a Error" to Qemu, James has some concern about >> "KVM return error", so I plan to remove them from this patch set so that it >> does not block the whole patches review. >> Thanks! >> >> [1]: >> [v13,05/12] linux-headers: sync against Linux v4.14-rc8 >> [v13,06/12] target-arm: kvm64: detect whether can set vsesr_el2 >> [v13,07/12] target-arm: handle SError interrupt exception from the guest OS >> >> >> On 2017/11/28 2:39, Dongjiu Geng wrote: >>> From: gengdongjiu >>> >>> In the ARMv8 platform, the CPU error type are synchronous external >>> abort(SEA) and SError Interrupt (SEI). If guest happen exception, >>> sometimes guest itself do the recovery is better, because host >>> does not know guest's detailed info. For example, if a guest >>> user-space application happen exception, guest can kill this >>> application, but host can not do that. >>> >>> For the ARMv8 SEA/SEI, KVM or host kernel will deliver SIGBUS or >>> use other interface to notify user space. After user space gets >>> the notification, it will record the CPER to guest GHES buffer >>> for guest and inject a exception or IRQ to KVM. >>> >>> In the current implement, if the SIGBUS is BUS_MCEERR_AR, we will >>> treat it as synchronous exception, and use ARMv8 SEA notification type >>> to notify guest after recording CPER for guest; If the SIGBUS is >>> BUS_MCEERR_AO, we will treat it as asynchronous exception, and use >>> GPIO-Signal to notify guest after recording CPER for guest. >>> >>> If KVM wants userspace to do the recovery for the SError, it will return a >>> error >>> status to Qemu. Then Qemu will specify the guest ESR value and inject a >>> virtual >>> SError. >>> >>> This series patches have three parts: >>> 1. Generate APEI/GHES table and record CPER for guest in runtime. >>> 2. Handle the SIGBUS signal, record the CPER and fill into guest memory, >>>then according to SIGBUS type(BUS_MCEERR_AR or BUS_MCEERR_AO), using >>>different ACPI notification type to notify guest. >>> 3. Specify guest SError ESR value and inject a virtual SError >>> >>> Whole solution was suggested by James(james.mo...@arm.com); inject RAS SEA >>> abort and specify guest ESR >>> in user space are suggested by Marc(marc.zyng...@arm.com), APEI part >>> solution is suggested by >>> Laszlo(ler...@redhat.com). Shown some discussion in [1]. >>> >>> >>> This series patches have already tested on ARM64 platform with RAS feature >>> enabled: >>> Show the APEI part verification result in [2] >>> Show the BUS_MCEERR_AR and BUS_MCEERR_AO SIGBUS handling verification >>> result in [3] >>> Show Qemu set guest ESR and inject virtual SError verification result in [4] >>> >>> --- >>> Change since v12: >>> 1. Address Paolo's comments to move HWPoisonPage definition to >>> accel/kvm/kvm-all.c >>> 2. Only call kvm_cpu_synchronize_state() when get the BUS_MCEERR_AR signal >>> 3. Only add and enable GPIO-Signal and ARMv8 SEA two hardware error sources >>> 4. Address Michael's comments to not sync SPDX from Linux kernel header file >>> >>> Change since v11: >>> Address James's comments(james.mo...@arm.com) >>> 1. Check whether KVM has the capability to to set ESR instead of detecting >>> host CPU RAS capability >>> 2. For SIGBUS_MCEERR_AR SIGBUS, use Synchronous-External-Abort(SEA) >>> notification type >>>for SIGBUS_MCEERR_AO SIGBUS, use GPIO-Signal notification >>> >>> >>> Address Shannon's comments(for ACPI part): >>> 1. Unify hest_ghes.c and hest_ghes.h license declaration >
Re: [Qemu-devel] [PATCH v13 00/12] Add ARMv8 RAS virtualization support in QEMU
On 2017/12/11 21:32, Igor Mammedov wrote: >> Hi maintainer, >> >> This patch set seems pending about one month, could you help review for >> them? Thanks. > I'm going to look at ACPI side of it this week. Igor, thank you very much in advance. > >
Re: [Qemu-devel] [PATCH v13 00/12] Add ARMv8 RAS virtualization support in QEMU
On Mon, 11 Dec 2017 19:31:14 +0800 gengdongjiu wrote: > Hi maintainer, > > This patch set seems pending about one month, could you help review for > them? Thanks. I'm going to look at ACPI side of it this week. > In this series, except the three patches in [1] are dependent on KVM > implementation. Other patches does not depend on KVM/host, > because KVM/host has already supported them, According to James Morse > 's agreement, when Qemu receives SIGBUS with > MCE_MCEERR_AR, Qemu record > the CPER and inject a Synchronous-External-Abort; when Qemu receives SIGBUS > with MCE_MCEERR_AO, Qemu record CPER and inject a GPIO IRQ. In my > current patch set, I already do that. > > I plan to move the three patches in [1] out of this patch set, because it was > a separate case, the three patches are used to set guest SError ESR, > which depend on KVM "return a Error" to Qemu, James has some concern about > "KVM return error", so I plan to remove them from this patch set so that it > does not block the whole patches review. > Thanks! > > [1]: > [v13,05/12] linux-headers: sync against Linux v4.14-rc8 > [v13,06/12] target-arm: kvm64: detect whether can set vsesr_el2 > [v13,07/12] target-arm: handle SError interrupt exception from the guest OS > > > On 2017/11/28 2:39, Dongjiu Geng wrote: > > From: gengdongjiu > > > > In the ARMv8 platform, the CPU error type are synchronous external > > abort(SEA) and SError Interrupt (SEI). If guest happen exception, > > sometimes guest itself do the recovery is better, because host > > does not know guest's detailed info. For example, if a guest > > user-space application happen exception, guest can kill this > > application, but host can not do that. > > > > For the ARMv8 SEA/SEI, KVM or host kernel will deliver SIGBUS or > > use other interface to notify user space. After user space gets > > the notification, it will record the CPER to guest GHES buffer > > for guest and inject a exception or IRQ to KVM. > > > > In the current implement, if the SIGBUS is BUS_MCEERR_AR, we will > > treat it as synchronous exception, and use ARMv8 SEA notification type > > to notify guest after recording CPER for guest; If the SIGBUS is > > BUS_MCEERR_AO, we will treat it as asynchronous exception, and use > > GPIO-Signal to notify guest after recording CPER for guest. > > > > If KVM wants userspace to do the recovery for the SError, it will return a > > error > > status to Qemu. Then Qemu will specify the guest ESR value and inject a > > virtual > > SError. > > > > This series patches have three parts: > > 1. Generate APEI/GHES table and record CPER for guest in runtime. > > 2. Handle the SIGBUS signal, record the CPER and fill into guest memory, > >then according to SIGBUS type(BUS_MCEERR_AR or BUS_MCEERR_AO), using > >different ACPI notification type to notify guest. > > 3. Specify guest SError ESR value and inject a virtual SError > > > > Whole solution was suggested by James(james.mo...@arm.com); inject RAS SEA > > abort and specify guest ESR > > in user space are suggested by Marc(marc.zyng...@arm.com), APEI part > > solution is suggested by > > Laszlo(ler...@redhat.com). Shown some discussion in [1]. > > > > > > This series patches have already tested on ARM64 platform with RAS feature > > enabled: > > Show the APEI part verification result in [2] > > Show the BUS_MCEERR_AR and BUS_MCEERR_AO SIGBUS handling verification > > result in [3] > > Show Qemu set guest ESR and inject virtual SError verification result in [4] > > > > --- > > Change since v12: > > 1. Address Paolo's comments to move HWPoisonPage definition to > > accel/kvm/kvm-all.c > > 2. Only call kvm_cpu_synchronize_state() when get the BUS_MCEERR_AR signal > > 3. Only add and enable GPIO-Signal and ARMv8 SEA two hardware error sources > > 4. Address Michael's comments to not sync SPDX from Linux kernel header file > > > > Change since v11: > > Address James's comments(james.mo...@arm.com) > > 1. Check whether KVM has the capability to to set ESR instead of detecting > > host CPU RAS capability > > 2. For SIGBUS_MCEERR_AR SIGBUS, use Synchronous-External-Abort(SEA) > > notification type > >for SIGBUS_MCEERR_AO SIGBUS, use GPIO-Signal notification > > > > > > Address Shannon's comments(for ACPI part): > > 1. Unify hest_ghes.c and hest_ghes.h license declaration > > 2. Remove unnecessary including "qmp-commands.h" in hest_ghes.c > > 3. Unconditionally add guest APEI table based on James's > > comments(james.mo...@arm.com) > > 4. Add a option to virt machine for migration compatibility. On new virt > > machine it's on > >by default while off for old ones, we enabled it since 2.10 > > 5. Refer to the ACPI spec version which introduces Hardware Error > > Notification first time > > 6. Add ACPI_HEST_NOTIFY_RESERVED notification type > > > > Address Igor's comments(for ACPI part): > > 1. Add doc patch first which will describe how it's supposed to work > > between QEMU/firmware/guest > >
Re: [Qemu-devel] [PATCH v13 00/12] Add ARMv8 RAS virtualization support in QEMU
Hi maintainer, This patch set seems pending about one month, could you help review for them? Thanks. In this series, except the three patches in [1] are dependent on KVM implementation. Other patches does not depend on KVM/host, because KVM/host has already supported them, According to James Morse 's agreement, when Qemu receives SIGBUS with MCE_MCEERR_AR, Qemu record the CPER and inject a Synchronous-External-Abort; when Qemu receives SIGBUS with MCE_MCEERR_AO, Qemu record CPER and inject a GPIO IRQ. In my current patch set, I already do that. I plan to move the three patches in [1] out of this patch set, because it was a separate case, the three patches are used to set guest SError ESR, which depend on KVM "return a Error" to Qemu, James has some concern about "KVM return error", so I plan to remove them from this patch set so that it does not block the whole patches review. Thanks! [1]: [v13,05/12] linux-headers: sync against Linux v4.14-rc8 [v13,06/12] target-arm: kvm64: detect whether can set vsesr_el2 [v13,07/12] target-arm: handle SError interrupt exception from the guest OS On 2017/11/28 2:39, Dongjiu Geng wrote: > From: gengdongjiu > > In the ARMv8 platform, the CPU error type are synchronous external > abort(SEA) and SError Interrupt (SEI). If guest happen exception, > sometimes guest itself do the recovery is better, because host > does not know guest's detailed info. For example, if a guest > user-space application happen exception, guest can kill this > application, but host can not do that. > > For the ARMv8 SEA/SEI, KVM or host kernel will deliver SIGBUS or > use other interface to notify user space. After user space gets > the notification, it will record the CPER to guest GHES buffer > for guest and inject a exception or IRQ to KVM. > > In the current implement, if the SIGBUS is BUS_MCEERR_AR, we will > treat it as synchronous exception, and use ARMv8 SEA notification type > to notify guest after recording CPER for guest; If the SIGBUS is > BUS_MCEERR_AO, we will treat it as asynchronous exception, and use > GPIO-Signal to notify guest after recording CPER for guest. > > If KVM wants userspace to do the recovery for the SError, it will return a > error > status to Qemu. Then Qemu will specify the guest ESR value and inject a > virtual > SError. > > This series patches have three parts: > 1. Generate APEI/GHES table and record CPER for guest in runtime. > 2. Handle the SIGBUS signal, record the CPER and fill into guest memory, >then according to SIGBUS type(BUS_MCEERR_AR or BUS_MCEERR_AO), using >different ACPI notification type to notify guest. > 3. Specify guest SError ESR value and inject a virtual SError > > Whole solution was suggested by James(james.mo...@arm.com); inject RAS SEA > abort and specify guest ESR > in user space are suggested by Marc(marc.zyng...@arm.com), APEI part solution > is suggested by > Laszlo(ler...@redhat.com). Shown some discussion in [1]. > > > This series patches have already tested on ARM64 platform with RAS feature > enabled: > Show the APEI part verification result in [2] > Show the BUS_MCEERR_AR and BUS_MCEERR_AO SIGBUS handling verification result > in [3] > Show Qemu set guest ESR and inject virtual SError verification result in [4] > > --- > Change since v12: > 1. Address Paolo's comments to move HWPoisonPage definition to > accel/kvm/kvm-all.c > 2. Only call kvm_cpu_synchronize_state() when get the BUS_MCEERR_AR signal > 3. Only add and enable GPIO-Signal and ARMv8 SEA two hardware error sources > 4. Address Michael's comments to not sync SPDX from Linux kernel header file > > Change since v11: > Address James's comments(james.mo...@arm.com) > 1. Check whether KVM has the capability to to set ESR instead of detecting > host CPU RAS capability > 2. For SIGBUS_MCEERR_AR SIGBUS, use Synchronous-External-Abort(SEA) > notification type >for SIGBUS_MCEERR_AO SIGBUS, use GPIO-Signal notification > > > Address Shannon's comments(for ACPI part): > 1. Unify hest_ghes.c and hest_ghes.h license declaration > 2. Remove unnecessary including "qmp-commands.h" in hest_ghes.c > 3. Unconditionally add guest APEI table based on James's > comments(james.mo...@arm.com) > 4. Add a option to virt machine for migration compatibility. On new virt > machine it's on >by default while off for old ones, we enabled it since 2.10 > 5. Refer to the ACPI spec version which introduces Hardware Error > Notification first time > 6. Add ACPI_HEST_NOTIFY_RESERVED notification type > > Address Igor's comments(for ACPI part): > 1. Add doc patch first which will describe how it's supposed to work between > QEMU/firmware/guest >OS with expected flows. > 2. Move APEI diagrams into doc/spec patch > 3. Remove redundant g_malloc in ghes_record_cper() > 4. Use build_append_int_noprefix() API to compose whole error status block > and whole APEI table, >and try to get rid of most structures in patch 1, as they will be left > unused after tha
Re: [Qemu-devel] [PATCH v13 00/12] Add ARMv8 RAS virtualization support in QEMU
ping again. thanks On 2017/11/28 2:39, Dongjiu Geng wrote: > From: gengdongjiu > > In the ARMv8 platform, the CPU error type are synchronous external > abort(SEA) and SError Interrupt (SEI). If guest happen exception, > sometimes guest itself do the recovery is better, because host > does not know guest's detailed info. For example, if a guest > user-space application happen exception, guest can kill this > application, but host can not do that. > > For the ARMv8 SEA/SEI, KVM or host kernel will deliver SIGBUS or > use other interface to notify user space. After user space gets > the notification, it will record the CPER to guest GHES buffer > for guest and inject a exception or IRQ to KVM. > > In the current implement, if the SIGBUS is BUS_MCEERR_AR, we will > treat it as synchronous exception, and use ARMv8 SEA notification type > to notify guest after recording CPER for guest; If the SIGBUS is > BUS_MCEERR_AO, we will treat it as asynchronous exception, and use > GPIO-Signal to notify guest after recording CPER for guest. > > If KVM wants userspace to do the recovery for the SError, it will return a > error > status to Qemu. Then Qemu will specify the guest ESR value and inject a > virtual > SError. > > This series patches have three parts: > 1. Generate APEI/GHES table and record CPER for guest in runtime. > 2. Handle the SIGBUS signal, record the CPER and fill into guest memory, >then according to SIGBUS type(BUS_MCEERR_AR or BUS_MCEERR_AO), using >different ACPI notification type to notify guest. > 3. Specify guest SError ESR value and inject a virtual SError > > Whole solution was suggested by James(james.mo...@arm.com); inject RAS SEA > abort and specify guest ESR > in user space are suggested by Marc(marc.zyng...@arm.com), APEI part solution > is suggested by > Laszlo(ler...@redhat.com). Shown some discussion in [1]. > > > This series patches have already tested on ARM64 platform with RAS feature > enabled: > Show the APEI part verification result in [2] > Show the BUS_MCEERR_AR and BUS_MCEERR_AO SIGBUS handling verification result > in [3] > Show Qemu set guest ESR and inject virtual SError verification result in [4] > > --- > Change since v12: > 1. Address Paolo's comments to move HWPoisonPage definition to > accel/kvm/kvm-all.c > 2. Only call kvm_cpu_synchronize_state() when get the BUS_MCEERR_AR signal > 3. Only add and enable GPIO-Signal and ARMv8 SEA two hardware error sources > 4. Address Michael's comments to not sync SPDX from Linux kernel header file > > Change since v11: > Address James's comments(james.mo...@arm.com) > 1. Check whether KVM has the capability to to set ESR instead of detecting > host CPU RAS capability > 2. For SIGBUS_MCEERR_AR SIGBUS, use Synchronous-External-Abort(SEA) > notification type >for SIGBUS_MCEERR_AO SIGBUS, use GPIO-Signal notification > > > Address Shannon's comments(for ACPI part): > 1. Unify hest_ghes.c and hest_ghes.h license declaration > 2. Remove unnecessary including "qmp-commands.h" in hest_ghes.c > 3. Unconditionally add guest APEI table based on James's > comments(james.mo...@arm.com) > 4. Add a option to virt machine for migration compatibility. On new virt > machine it's on >by default while off for old ones, we enabled it since 2.10 > 5. Refer to the ACPI spec version which introduces Hardware Error > Notification first time > 6. Add ACPI_HEST_NOTIFY_RESERVED notification type > > Address Igor's comments(for ACPI part): > 1. Add doc patch first which will describe how it's supposed to work between > QEMU/firmware/guest >OS with expected flows. > 2. Move APEI diagrams into doc/spec patch > 3. Remove redundant g_malloc in ghes_record_cper() > 4. Use build_append_int_noprefix() API to compose whole error status block > and whole APEI table, >and try to get rid of most structures in patch 1, as they will be left > unused after that > 5. Reuse something like > https://github.com/imammedo/qemu/commit/3d2fd6d13a3ea298d2ee814835495ce6241d085c >to build GAS > 6. Remove much offsetof() in the function > 7. Build independent tables first and only then build dependent tables > passing to it pointers >to previously build table if necessary. > 8. Redefine macro GHES_ACPI_HEST_NOTIFY_RESERVED to > ACPI_HEST_ERROR_SOURCE_COUNT to avoid confusion > > > Address Peter Maydell's comments > 1. linux-headers is done as a patch of their own created using > scripts/update-linux-headers.sh run against a >mainline kernel tree > 2. Tested whether this patchset builds OK on aarch32 > 3. Abstract Hwpoison page adding code out properly into a cpu-independent > source file from target/i386/kvm.c, >such as kvm-all.c > 4. Add doc-comment formatted documentation comment for new globally-visible > function prototype in a header > > --- > [1]: > https://lkml.org/lkml/2017/2/27/246 > https://patchwork.kernel.org/patch/9633105/ > https://patchwork.kernel.org/patch/9925227/ > > [2]: > Not
[Qemu-devel] [PATCH v13 00/12] Add ARMv8 RAS virtualization support in QEMU
From: gengdongjiu In the ARMv8 platform, the CPU error type are synchronous external abort(SEA) and SError Interrupt (SEI). If guest happen exception, sometimes guest itself do the recovery is better, because host does not know guest's detailed info. For example, if a guest user-space application happen exception, guest can kill this application, but host can not do that. For the ARMv8 SEA/SEI, KVM or host kernel will deliver SIGBUS or use other interface to notify user space. After user space gets the notification, it will record the CPER to guest GHES buffer for guest and inject a exception or IRQ to KVM. In the current implement, if the SIGBUS is BUS_MCEERR_AR, we will treat it as synchronous exception, and use ARMv8 SEA notification type to notify guest after recording CPER for guest; If the SIGBUS is BUS_MCEERR_AO, we will treat it as asynchronous exception, and use GPIO-Signal to notify guest after recording CPER for guest. If KVM wants userspace to do the recovery for the SError, it will return a error status to Qemu. Then Qemu will specify the guest ESR value and inject a virtual SError. This series patches have three parts: 1. Generate APEI/GHES table and record CPER for guest in runtime. 2. Handle the SIGBUS signal, record the CPER and fill into guest memory, then according to SIGBUS type(BUS_MCEERR_AR or BUS_MCEERR_AO), using different ACPI notification type to notify guest. 3. Specify guest SError ESR value and inject a virtual SError Whole solution was suggested by James(james.mo...@arm.com); inject RAS SEA abort and specify guest ESR in user space are suggested by Marc(marc.zyng...@arm.com), APEI part solution is suggested by Laszlo(ler...@redhat.com). Shown some discussion in [1]. This series patches have already tested on ARM64 platform with RAS feature enabled: Show the APEI part verification result in [2] Show the BUS_MCEERR_AR and BUS_MCEERR_AO SIGBUS handling verification result in [3] Show Qemu set guest ESR and inject virtual SError verification result in [4] --- Change since v12: 1. Address Paolo's comments to move HWPoisonPage definition to accel/kvm/kvm-all.c 2. Only call kvm_cpu_synchronize_state() when get the BUS_MCEERR_AR signal 3. Only add and enable GPIO-Signal and ARMv8 SEA two hardware error sources 4. Address Michael's comments to not sync SPDX from Linux kernel header file Change since v11: Address James's comments(james.mo...@arm.com) 1. Check whether KVM has the capability to to set ESR instead of detecting host CPU RAS capability 2. For SIGBUS_MCEERR_AR SIGBUS, use Synchronous-External-Abort(SEA) notification type for SIGBUS_MCEERR_AO SIGBUS, use GPIO-Signal notification Address Shannon's comments(for ACPI part): 1. Unify hest_ghes.c and hest_ghes.h license declaration 2. Remove unnecessary including "qmp-commands.h" in hest_ghes.c 3. Unconditionally add guest APEI table based on James's comments(james.mo...@arm.com) 4. Add a option to virt machine for migration compatibility. On new virt machine it's on by default while off for old ones, we enabled it since 2.10 5. Refer to the ACPI spec version which introduces Hardware Error Notification first time 6. Add ACPI_HEST_NOTIFY_RESERVED notification type Address Igor's comments(for ACPI part): 1. Add doc patch first which will describe how it's supposed to work between QEMU/firmware/guest OS with expected flows. 2. Move APEI diagrams into doc/spec patch 3. Remove redundant g_malloc in ghes_record_cper() 4. Use build_append_int_noprefix() API to compose whole error status block and whole APEI table, and try to get rid of most structures in patch 1, as they will be left unused after that 5. Reuse something like https://github.com/imammedo/qemu/commit/3d2fd6d13a3ea298d2ee814835495ce6241d085c to build GAS 6. Remove much offsetof() in the function 7. Build independent tables first and only then build dependent tables passing to it pointers to previously build table if necessary. 8. Redefine macro GHES_ACPI_HEST_NOTIFY_RESERVED to ACPI_HEST_ERROR_SOURCE_COUNT to avoid confusion Address Peter Maydell's comments 1. linux-headers is done as a patch of their own created using scripts/update-linux-headers.sh run against a mainline kernel tree 2. Tested whether this patchset builds OK on aarch32 3. Abstract Hwpoison page adding code out properly into a cpu-independent source file from target/i386/kvm.c, such as kvm-all.c 4. Add doc-comment formatted documentation comment for new globally-visible function prototype in a header --- [1]: https://lkml.org/lkml/2017/2/27/246 https://patchwork.kernel.org/patch/9633105/ https://patchwork.kernel.org/patch/9925227/ [2]: Note: the UEFI(QEMU_EFI.fd) is needed if guest want to use ACPI table. After guest boot up, dump the APEI table, then can see the initialized table (1) # iasl -p ./HEST -d /sys/firmware/acpi/tables/HEST (2) # cat HEST.dsl /* * Intel ACPI Component Architecture * AML/ASL+ Disassembler
