Re: [Qemu-devel] [PATCH v2 06/32] target/arm/helper: pass explicit fpst to set_rmode

[Richard Henderson]

On 02/08/2018 09:31 AM, Alex Bennée wrote:
> As the rounding mode is now split between FP16 and the rest of
> floating point we need to be explicit when tweaking it. Instead of
> passing the CPU env we now pass the appropriate fpst pointer directly.
> 
> Signed-off-by: Alex Bennée 
> ---
>  target/arm/helper.c|  4 ++--
>  target/arm/helper.h|  2 +-
>  target/arm/translate-a64.c | 26 +-
>  target/arm/translate.c | 12 ++--
>  4 files changed, 22 insertions(+), 22 deletions(-)

Reviewed-by: Richard Henderson 


r~

[Qemu-devel] [PATCH v2 06/32] target/arm/helper: pass explicit fpst to set_rmode

[Alex Bennée]

As the rounding mode is now split between FP16 and the rest of
floating point we need to be explicit when tweaking it. Instead of
passing the CPU env we now pass the appropriate fpst pointer directly.

Signed-off-by: Alex Bennée 
---
 target/arm/helper.c|  4 ++--
 target/arm/helper.h|  2 +-
 target/arm/translate-a64.c | 26 +-
 target/arm/translate.c | 12 ++--
 4 files changed, 22 insertions(+), 22 deletions(-)

diff --git a/target/arm/helper.c b/target/arm/helper.c
index 1cc3d43a9f..72522c125c 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -10974,9 +10974,9 @@ VFP_CONV_FIX_A64(uq, s, 32, 64, uint64)
 /* Set the current fp rounding mode and return the old one.
  * The argument is a softfloat float_round_ value.
  */
-uint32_t HELPER(set_rmode)(uint32_t rmode, CPUARMState *env)
+uint32_t HELPER(set_rmode)(uint32_t rmode, void *fpstp)
 {
-float_status *fp_status = >vfp.fp_status;
+float_status *fp_status = fpstp;
 
 uint32_t prev_rmode = get_float_rounding_mode(fp_status);
 set_float_rounding_mode(rmode, fp_status);
diff --git a/target/arm/helper.h b/target/arm/helper.h
index 5dec2e6262..40dcd74cfd 100644
--- a/target/arm/helper.h
+++ b/target/arm/helper.h
@@ -167,7 +167,7 @@ DEF_HELPER_3(vfp_uhtod, f64, i64, i32, ptr)
 DEF_HELPER_3(vfp_ultod, f64, i64, i32, ptr)
 DEF_HELPER_3(vfp_uqtod, f64, i64, i32, ptr)
 
-DEF_HELPER_FLAGS_2(set_rmode, TCG_CALL_NO_RWG, i32, i32, env)
+DEF_HELPER_FLAGS_2(set_rmode, TCG_CALL_NO_RWG, i32, i32, ptr)
 DEF_HELPER_FLAGS_2(set_neon_rmode, TCG_CALL_NO_RWG, i32, i32, env)
 
 DEF_HELPER_2(vfp_fcvt_f16_to_f32, f32, i32, env)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 1afa669e6e..531ac5999c 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -4540,10 +4540,10 @@ static void handle_fp_1src_single(DisasContext *s, int 
opcode, int rd, int rn)
 {
 TCGv_i32 tcg_rmode = tcg_const_i32(arm_rmode_to_sf(opcode & 7));
 
-gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
+gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
 gen_helper_rints(tcg_res, tcg_op, fpst);
 
-gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
+gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
 tcg_temp_free_i32(tcg_rmode);
 break;
 }
@@ -4596,10 +4596,10 @@ static void handle_fp_1src_double(DisasContext *s, int 
opcode, int rd, int rn)
 {
 TCGv_i32 tcg_rmode = tcg_const_i32(arm_rmode_to_sf(opcode & 7));
 
-gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
+gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
 gen_helper_rintd(tcg_res, tcg_op, fpst);
 
-gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
+gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
 tcg_temp_free_i32(tcg_rmode);
 break;
 }
@@ -5126,7 +5126,7 @@ static void handle_fpfpcvt(DisasContext *s, int rd, int 
rn, int opcode,
 
 tcg_rmode = tcg_const_i32(arm_rmode_to_sf(rmode));
 
-gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
+gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus);
 
 if (is_double) {
 TCGv_i64 tcg_double = read_fp_dreg(s, rn);
@@ -5173,7 +5173,7 @@ static void handle_fpfpcvt(DisasContext *s, int rd, int 
rn, int opcode,
 tcg_temp_free_i32(tcg_single);
 }
 
-gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
+gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus);
 tcg_temp_free_i32(tcg_rmode);
 
 if (!sf) {
@@ -6946,8 +6946,8 @@ static void handle_simd_shift_fpint_conv(DisasContext *s, 
bool is_scalar,
 assert(!(is_scalar && is_q));
 
 tcg_rmode = tcg_const_i32(arm_rmode_to_sf(FPROUNDING_ZERO));
-gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
 tcg_fpstatus = get_fpstatus_ptr(false);
+gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus);
 tcg_shift = tcg_const_i32(fracbits);
 
 if (is_double) {
@@ -6993,7 +6993,7 @@ static void handle_simd_shift_fpint_conv(DisasContext *s, 
bool is_scalar,
 
 tcg_temp_free_ptr(tcg_fpstatus);
 tcg_temp_free_i32(tcg_shift);
-gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
+gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus);
 tcg_temp_free_i32(tcg_rmode);
 }
 
@@ -8262,8 +8262,8 @@ static void disas_simd_scalar_two_reg_misc(DisasContext 
*s, uint32_t insn)
 
 if (is_fcvt) {
 tcg_rmode = tcg_const_i32(arm_rmode_to_sf(rmode));
-gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
 tcg_fpstatus = get_fpstatus_ptr(false);
+gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus);
 } else {
 tcg_rmode = NULL;
 tcg_fpstatus = NULL;
@@ -8328,7 +8328,7 @@ static void disas_simd_scalar_two_reg_misc(DisasContext 
*s, uint32_t insn)
 }
 
 if (is_fcvt) {
-