Re: [Qemu-devel] [PATCH v2 3/8] target/sparc: Define an enumeration for accessing env->regwptr

2019-05-19 Thread Richard Henderson 
On 5/14/19 10:44 PM, Philippe Mathieu-Daudé wrote:
>> +/* Windowed register indexes.  */
>> +enum {
>> +WREG_O0,
>> +WREG_O1,
>> +WREG_O2,
>> +WREG_O3,
>> +WREG_O4,
>> +WREG_O5,
>> +WREG_O6,
>> +WREG_O7,
>> +
>> +WREG_L0,
>> +WREG_L1,
>> +WREG_L2,
>> +WREG_L3,
>> +WREG_L4,
>> +WREG_L5,
>> +WREG_L6,
>> +WREG_L7,
>> +
>> +WREG_I0,
>> +WREG_I1,
>> +WREG_I2,
>> +WREG_I3,
>> +WREG_I4,
>> +WREG_I5,
>> +WREG_I6,
>> +WREG_I7,
> 
> I'd feel safer if you initialize those enums (better safe than sorry!).

What are you suggesting?  This is how C works, and always has...


r~

Re: [Qemu-devel] [PATCH v2 3/8] target/sparc: Define an enumeration for accessing env->regwptr

2019-05-14 Thread Philippe Mathieu-Daudé 
Hi Richard,

On 5/10/19 5:27 AM, Richard Henderson wrote:
> Signed-off-by: Richard Henderson 
> ---
>  target/sparc/cpu.h | 33 +
>  1 file changed, 33 insertions(+)
> 
> diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
> index 85b9665ccc..08f7d1a3c6 100644
> --- a/target/sparc/cpu.h
> +++ b/target/sparc/cpu.h
> @@ -31,6 +31,39 @@
>  
>  /*#define EXCP_INTERRUPT 0x100*/
>  
> +/* Windowed register indexes.  */
> +enum {
> +WREG_O0,
> +WREG_O1,
> +WREG_O2,
> +WREG_O3,
> +WREG_O4,
> +WREG_O5,
> +WREG_O6,
> +WREG_O7,
> +
> +WREG_L0,
> +WREG_L1,
> +WREG_L2,
> +WREG_L3,
> +WREG_L4,
> +WREG_L5,
> +WREG_L6,
> +WREG_L7,
> +
> +WREG_I0,
> +WREG_I1,
> +WREG_I2,
> +WREG_I3,
> +WREG_I4,
> +WREG_I5,
> +WREG_I6,
> +WREG_I7,

I'd feel safer if you initialize those enums (better safe than sorry!).

> +
> +WREG_SP = WREG_O6,
> +WREG_FP = WREG_I6,
> +};
> +
>  /* trap definitions */
>  #ifndef TARGET_SPARC64
>  #define TT_TFAULT   0x01
>

[Qemu-devel] [PATCH v2 3/8] target/sparc: Define an enumeration for accessing env->regwptr

2019-05-09 Thread Richard Henderson 
Signed-off-by: Richard Henderson 
---
 target/sparc/cpu.h | 33 +
 1 file changed, 33 insertions(+)

diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index 85b9665ccc..08f7d1a3c6 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -31,6 +31,39 @@
 
 /*#define EXCP_INTERRUPT 0x100*/
 
+/* Windowed register indexes.  */
+enum {
+WREG_O0,
+WREG_O1,
+WREG_O2,
+WREG_O3,
+WREG_O4,
+WREG_O5,
+WREG_O6,
+WREG_O7,
+
+WREG_L0,
+WREG_L1,
+WREG_L2,
+WREG_L3,
+WREG_L4,
+WREG_L5,
+WREG_L6,
+WREG_L7,
+
+WREG_I0,
+WREG_I1,
+WREG_I2,
+WREG_I3,
+WREG_I4,
+WREG_I5,
+WREG_I6,
+WREG_I7,
+
+WREG_SP = WREG_O6,
+WREG_FP = WREG_I6,
+};
+
 /* trap definitions */
 #ifndef TARGET_SPARC64
 #define TT_TFAULT   0x01
-- 
2.17.1