Re: [Qemu-devel] [PATCH v2 5/5] target-m68k: increment/decrement with SP
On 01/13/2017 04:52 AM, Laurent Vivier wrote: > +if (reg0 == 7 && opsize == OS_BYTE && > +m68k_feature(s->env, M68K_FEATURE_M68000)) { > +tcg_gen_subi_i32(tmp, reg, 2); > +} else { > +tcg_gen_addi_i32(tmp, reg, opsize_bytes(opsize)); > +} post-increment add. r~
Re: [Qemu-devel] [PATCH v2 5/5] target-m68k: increment/decrement with SP
On 13.01.2017 13:52, Laurent Vivier wrote: > On 680x0 family only. > > Address Register indirect With postincrement: > > When using the stack pointer (A7) with byte size data, the register > is incremented by two. > > Address Register indirect With predecrement: > > When using the stack pointer (A7) with byte size data, the register > is decremented by two. > > Signed-off-by: Laurent Vivier> --- > target/m68k/translate.c | 14 -- > 1 file changed, 12 insertions(+), 2 deletions(-) > > diff --git a/target/m68k/translate.c b/target/m68k/translate.c > index cf5d8dd..727c189 100644 > --- a/target/m68k/translate.c > +++ b/target/m68k/translate.c > @@ -725,7 +725,12 @@ static TCGv gen_lea_mode(CPUM68KState *env, DisasContext > *s, > } > reg = get_areg(s, reg0); > tmp = tcg_temp_new(); > -tcg_gen_subi_i32(tmp, reg, opsize_bytes(opsize)); > +if (reg0 == 7 && opsize == OS_BYTE && > +m68k_feature(s->env, M68K_FEATURE_M68000)) { > +tcg_gen_subi_i32(tmp, reg, 2); > +} else { > +tcg_gen_subi_i32(tmp, reg, opsize_bytes(opsize)); > +} > return tmp; > case 5: /* Indirect displacement. */ > reg = get_areg(s, reg0); > @@ -801,7 +806,12 @@ static TCGv gen_ea_mode(CPUM68KState *env, DisasContext > *s, int mode, int reg0, > result = gen_ldst(s, opsize, reg, val, what); > if (what == EA_STORE || !addrp) { > TCGv tmp = tcg_temp_new(); > -tcg_gen_addi_i32(tmp, reg, opsize_bytes(opsize)); > +if (reg0 == 7 && opsize == OS_BYTE && > +m68k_feature(s->env, M68K_FEATURE_M68000)) { > +tcg_gen_subi_i32(tmp, reg, 2); > +} else { > +tcg_gen_addi_i32(tmp, reg, opsize_bytes(opsize)); > +} > delay_set_areg(s, reg0, tmp, true); > } > return result; > Reviewed-by: Thomas Huth
[Qemu-devel] [PATCH v2 5/5] target-m68k: increment/decrement with SP
On 680x0 family only. Address Register indirect With postincrement: When using the stack pointer (A7) with byte size data, the register is incremented by two. Address Register indirect With predecrement: When using the stack pointer (A7) with byte size data, the register is decremented by two. Signed-off-by: Laurent Vivier--- target/m68k/translate.c | 14 -- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index cf5d8dd..727c189 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -725,7 +725,12 @@ static TCGv gen_lea_mode(CPUM68KState *env, DisasContext *s, } reg = get_areg(s, reg0); tmp = tcg_temp_new(); -tcg_gen_subi_i32(tmp, reg, opsize_bytes(opsize)); +if (reg0 == 7 && opsize == OS_BYTE && +m68k_feature(s->env, M68K_FEATURE_M68000)) { +tcg_gen_subi_i32(tmp, reg, 2); +} else { +tcg_gen_subi_i32(tmp, reg, opsize_bytes(opsize)); +} return tmp; case 5: /* Indirect displacement. */ reg = get_areg(s, reg0); @@ -801,7 +806,12 @@ static TCGv gen_ea_mode(CPUM68KState *env, DisasContext *s, int mode, int reg0, result = gen_ldst(s, opsize, reg, val, what); if (what == EA_STORE || !addrp) { TCGv tmp = tcg_temp_new(); -tcg_gen_addi_i32(tmp, reg, opsize_bytes(opsize)); +if (reg0 == 7 && opsize == OS_BYTE && +m68k_feature(s->env, M68K_FEATURE_M68000)) { +tcg_gen_subi_i32(tmp, reg, 2); +} else { +tcg_gen_addi_i32(tmp, reg, opsize_bytes(opsize)); +} delay_set_areg(s, reg0, tmp, true); } return result; -- 2.7.4