Re: [Qemu-devel] [PATCH v3 09/16] target/arm: Enable ARM_FEATURE_V8_RDM

[Peter Maydell]

On 28 February 2018 at 19:31, Richard Henderson
 wrote:
> Enable it for the "any" CPU used by *-linux-user.
>
> Signed-off-by: Richard Henderson 
> ---
>  target/arm/cpu.c   | 1 +
>  target/arm/cpu64.c | 1 +
>  2 files changed, 2 insertions(+)
>
> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
> index 1b3ae62db6..ca5fb1162a 100644
> --- a/target/arm/cpu.c
> +++ b/target/arm/cpu.c
> @@ -1650,6 +1650,7 @@ static void arm_any_initfn(Object *obj)
>  set_feature(>env, ARM_FEATURE_V8_SHA256);
>  set_feature(>env, ARM_FEATURE_V8_PMULL);
>  set_feature(>env, ARM_FEATURE_CRC);
> +set_feature(>env, ARM_FEATURE_V8_RDM);
>  cpu->midr = 0x;
>  }
>  #endif
> diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
> index 9743bdc8c3..7246866e7d 100644
> --- a/target/arm/cpu64.c
> +++ b/target/arm/cpu64.c
> @@ -230,6 +230,7 @@ static void aarch64_any_initfn(Object *obj)
>  set_feature(>env, ARM_FEATURE_V8_SM4);
>  set_feature(>env, ARM_FEATURE_V8_PMULL);
>  set_feature(>env, ARM_FEATURE_CRC);
> +set_feature(>env, ARM_FEATURE_V8_RDM);
>  set_feature(>env, ARM_FEATURE_V8_FP16);
>  cpu->ctr = 0x80038003; /* 32 byte I and D cacheline size, VIPT icache */
>  cpu->dcz_blocksize = 7; /*  512 bytes */
> --

Reviewed-by: Peter Maydell 

thanks
-- PMM

[Qemu-devel] [PATCH v3 09/16] target/arm: Enable ARM_FEATURE_V8_RDM

[Richard Henderson]

Enable it for the "any" CPU used by *-linux-user.

Signed-off-by: Richard Henderson 
---
 target/arm/cpu.c   | 1 +
 target/arm/cpu64.c | 1 +
 2 files changed, 2 insertions(+)

diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 1b3ae62db6..ca5fb1162a 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1650,6 +1650,7 @@ static void arm_any_initfn(Object *obj)
 set_feature(>env, ARM_FEATURE_V8_SHA256);
 set_feature(>env, ARM_FEATURE_V8_PMULL);
 set_feature(>env, ARM_FEATURE_CRC);
+set_feature(>env, ARM_FEATURE_V8_RDM);
 cpu->midr = 0x;
 }
 #endif
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 9743bdc8c3..7246866e7d 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -230,6 +230,7 @@ static void aarch64_any_initfn(Object *obj)
 set_feature(>env, ARM_FEATURE_V8_SM4);
 set_feature(>env, ARM_FEATURE_V8_PMULL);
 set_feature(>env, ARM_FEATURE_CRC);
+set_feature(>env, ARM_FEATURE_V8_RDM);
 set_feature(>env, ARM_FEATURE_V8_FP16);
 cpu->ctr = 0x80038003; /* 32 byte I and D cacheline size, VIPT icache */
 cpu->dcz_blocksize = 7; /*  512 bytes */
-- 
2.14.3