Re: [Qemu-devel] [PULL 00/67] ppc-for-2.9 queue 20170112

2017-01-16 Thread David Gibson 
On Fri, Jan 13, 2017 at 10:54:33AM +, Peter Maydell wrote:
> On 12 January 2017 at 02:02, David Gibson  wrote:
> > The following changes since commit b44486dfb9447c88e4b216e730adcc780190852c:
> >
> >   Merge remote-tracking branch 'remotes/kraxel/tags/pull-ui-20170110-1' 
> > into staging (2017-01-10 14:52:34 +)
> >
> > are available in the git repository at:
> >
> >   git://github.com/dgibson/qemu.git tags/ppc-for-2.9-20170112
> >
> > for you to fetch changes up to 229b5b6b56db9c3e6b8f44b4b55a62fa32979f47:
> >
> >   ppc: Fix a warning in bcdcfz code and improve BCD_DIG_BYTE macro 
> > (2017-01-12 10:21:49 +1100)
> >
> > 
> > ppc patch queue 2017-01-12
> >
> > This is the first ppc pull request for qemu-2.9.  It's been a while
> > coming, partly due to dealing with some problems running my usual set
> > of tests.  So, there's quite a lot in here.
> >
> > * More POWER9 instruction implementations for TCG
> > * The simpler parts of my CPU compatibility mode cleanup
> > * This changes behaviour to prefer compatibility modes over
> >   "raW" mode for new machine type versions
> > * New "40p" machine type which is essentially a modernized and
> >   cleaned up "prep".  The intention is that it will replace "prep"
> >   once it has some more testing and polish.
> > * Add pseries-2.9 machine type
> > * Implement H_SIGNAL_SYS_RESET hypercall
> > * Consolidate the two alternate CPU init paths in pseries by
> >   making it always go through CPU core objects to initialize CPU
> > * A handful of bugfixes and cleanups
> >
> > There are also some changes not strictly related to ppc code, but for
> > its benefit:
> >
> > * Limit the pxi-expander-bridge (PXB) device to x86 guests only
> >   (it's essentially a hack to work around historical x86
> >   limitations)
> > * Revise a number of qtests and enable them for ppc
> 
> Hi -- this fails "make check" on OSX host:

Bother.  I saw the failure on Travis, but I was misled by all the SASL
warnings, and assumed it was an upstream / library problem, not
something with my patches.

>   GTESTER check-qtest-ppc64
> qemu-system-ppc64: -object
> memory-backend-file,id=mb1,size=1M,share,mem-path=/dev/shm/qtest-68237-4247260626:
> invalid object type: memory-backend-file
> Broken pipe
> GTester: last random seed: R02Sc13bf53b8b3055a3c30552f67d7c263b
> **
> ERROR:/Users/pm215/src/qemu-for-merges/tests/libqos/pci.c:412:void
> qpci_plug_device_test(const char *, const char *, uint8_t, const char
> *): assertion failed: (!qdict_haskey(response, "error"))
> GTester: last random seed: R02Sf3594a21c711ec941d5f4c89724ce12d
> qemu-system-ppc64: -device ivshmem-plain,memdev=mb1: 'ivshmem-plain'
> is not a valid device model name
> Broken pipe
> 
> It looks like you've enabled the ivshmem test unconditionally,
> but it should only be turned on if CONFIG_EVENTFD is true, see
> how we do this for x86:
> 
> check-qtest-pci-$(CONFIG_EVENTFD) += tests/ivshmem-test$(EXESUF)
> gcov-files-pci-y += hw/misc/ivshmem.c

Ah, right, thanks.

> Q: can we just enable these tests for PCI with
> check-qtest-ppc64-y += $(check-qtest-pci-y)
> gcov-files-ppc64-y += $(gcov-files-pci-y)
> 
> the way we do for i386/x86_64 ? Or is that doing too much
> unwanted extra testing?

As Laurent says, that doesn't quite work, but we can still put the
test on CONFIG_EVENTFD in.  I've put a draft fix into my tree, but I
probably won't get a chance to properly test and resend until after
I'm back from LCA and holidays, around the end of Jan.

-- 
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson


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Re: [Qemu-devel] [PULL 00/67] ppc-for-2.9 queue 20170112

2017-01-13 Thread Laurent Vivier 
On 13/01/2017 11:54, Peter Maydell wrote:
> Q: can we just enable these tests for PCI with
> check-qtest-ppc64-y += $(check-qtest-pci-y)
> gcov-files-ppc64-y += $(gcov-files-pci-y)
> 
> the way we do for i386/x86_64 ? Or is that doing too much
> unwanted extra testing?

For most of the devices tested in check-qtest-pci-y, the test has not
been ported to ppc64 and fails (or hangs).

This is why we don't add the full list in check-qtest-ppc64-y.

Laurent

Re: [Qemu-devel] [PULL 00/67] ppc-for-2.9 queue 20170112

2017-01-13 Thread Peter Maydell 
On 12 January 2017 at 02:02, David Gibson  wrote:
> The following changes since commit b44486dfb9447c88e4b216e730adcc780190852c:
>
>   Merge remote-tracking branch 'remotes/kraxel/tags/pull-ui-20170110-1' into 
> staging (2017-01-10 14:52:34 +)
>
> are available in the git repository at:
>
>   git://github.com/dgibson/qemu.git tags/ppc-for-2.9-20170112
>
> for you to fetch changes up to 229b5b6b56db9c3e6b8f44b4b55a62fa32979f47:
>
>   ppc: Fix a warning in bcdcfz code and improve BCD_DIG_BYTE macro 
> (2017-01-12 10:21:49 +1100)
>
> 
> ppc patch queue 2017-01-12
>
> This is the first ppc pull request for qemu-2.9.  It's been a while
> coming, partly due to dealing with some problems running my usual set
> of tests.  So, there's quite a lot in here.
>
> * More POWER9 instruction implementations for TCG
> * The simpler parts of my CPU compatibility mode cleanup
> * This changes behaviour to prefer compatibility modes over
>   "raW" mode for new machine type versions
> * New "40p" machine type which is essentially a modernized and
>   cleaned up "prep".  The intention is that it will replace "prep"
>   once it has some more testing and polish.
> * Add pseries-2.9 machine type
> * Implement H_SIGNAL_SYS_RESET hypercall
> * Consolidate the two alternate CPU init paths in pseries by
>   making it always go through CPU core objects to initialize CPU
> * A handful of bugfixes and cleanups
>
> There are also some changes not strictly related to ppc code, but for
> its benefit:
>
> * Limit the pxi-expander-bridge (PXB) device to x86 guests only
>   (it's essentially a hack to work around historical x86
>   limitations)
> * Revise a number of qtests and enable them for ppc

Hi -- this fails "make check" on OSX host:

  GTESTER check-qtest-ppc64
qemu-system-ppc64: -object
memory-backend-file,id=mb1,size=1M,share,mem-path=/dev/shm/qtest-68237-4247260626:
invalid object type: memory-backend-file
Broken pipe
GTester: last random seed: R02Sc13bf53b8b3055a3c30552f67d7c263b
**
ERROR:/Users/pm215/src/qemu-for-merges/tests/libqos/pci.c:412:void
qpci_plug_device_test(const char *, const char *, uint8_t, const char
*): assertion failed: (!qdict_haskey(response, "error"))
GTester: last random seed: R02Sf3594a21c711ec941d5f4c89724ce12d
qemu-system-ppc64: -device ivshmem-plain,memdev=mb1: 'ivshmem-plain'
is not a valid device model name
Broken pipe

It looks like you've enabled the ivshmem test unconditionally,
but it should only be turned on if CONFIG_EVENTFD is true, see
how we do this for x86:

check-qtest-pci-$(CONFIG_EVENTFD) += tests/ivshmem-test$(EXESUF)
gcov-files-pci-y += hw/misc/ivshmem.c

Q: can we just enable these tests for PCI with
check-qtest-ppc64-y += $(check-qtest-pci-y)
gcov-files-ppc64-y += $(gcov-files-pci-y)

the way we do for i386/x86_64 ? Or is that doing too much
unwanted extra testing?

thanks
-- PMM

Re: [Qemu-devel] [PULL 00/67] ppc-for-2.9 queue 20170112

2017-01-12 Thread David Gibson 
On Wed, Jan 11, 2017 at 07:42:04PM -0800, no-re...@patchew.org wrote:
> Hi,
> 
> Your series seems to have some coding style problems. See output below for
> more information:

I don't think this is a real problem:

> Checking PATCH 46/67: target-ppc: Add xxextractuw instruction...
> ERROR: Macros with complex values should be enclosed in parenthesis
> #110: FILE: target/ppc/translate/vsx-ops.inc.c:52:
> +#define GEN_XX2FORM_EXT(name, opc2, opc3, fl2)  \
> +GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 0, opc3, 0x0010, PPC_NONE, 
> fl2), \
> +GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 1, opc3, 0x0010, PPC_NONE, fl2)
> 
> total: 1 errors, 0 warnings, 92 lines checked
> 
> Your patch has style problems, please review.  If any of these errors
> are false positives report them to the maintainer, see
> CHECKPATCH in MAINTAINERS.

This is the standard problem with checkpatch getting confused by the
ugly, ugly macros in the instruction decode stuff.  Maybe we'll fix
that one day, but it's not a priority, and it's definitely out of
scope for this patch.

-- 
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson


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Re: [Qemu-devel] [PULL 00/67] ppc-for-2.9 queue 20170112

2017-01-11 Thread no-reply 
Hi,

Your series seems to have some coding style problems. See output below for
more information:

Message-id: 20170112020327.24882-1-da...@gibson.dropbear.id.au
Subject: [Qemu-devel] [PULL 00/67] ppc-for-2.9 queue 20170112
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash

BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0

# Useful git options
git config --local diff.renamelimit 0
git config --local diff.renames True

commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
failed=1
echo
fi
n=$((n+1))
done

exit $failed
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 * [new tag] patchew/20170112020327.24882-1-da...@gibson.dropbear.id.au 
-> patchew/20170112020327.24882-1-da...@gibson.dropbear.id.au
Switched to a new branch 'test'
72585bd ppc: Fix a warning in bcdcfz code and improve BCD_DIG_BYTE macro
2db2c7b ppc: Prevent inifnite loop in decrementer auto-reload.
620e113 target-ppc: Add xscvqpdp instruction
092a884 target-ppc: Add xscvdpqp instruction
ff57624 target-ppc: Add xsaddqp instructions
27c5216 ppc: Add ppc_set_compat_all()
1481a0b pseries: Rewrite CAS PVR compatibility logic
e2a29af pxb: Restrict to x86
4b3013a target-ppc: Add xsxsigqp instructions
9fdc3d2 target-ppc: Add xsxsigdp instruction
f43d3fc target-ppc: Add xsxexpqp instruction
a239c30 target-ppc: Add xsxexpdp instruction
c29777c target-ppc: Use correct precision for FPRF setting
6ae9a4d target-ppc: Add xscvdphp, xscvhpdp
72d1eef target-ppc: Rename helper_compute_fprf to helper_compute_fprf_float64
748d789 target-ppc: Replace isden by float64_is_zero_or_denormal
82a197b target-ppc: Use float64 arg in helper_compute_fprf()
7156ebc prep: add IBM RS/6000 7020 (40p) machine emulation
afcb4bf prep: add IBM RS/6000 7020 (40p) memory controller
2fbd7b6 prep: add PReP System I/O
93cbe64 target-ppc: Add xxinsertw instruction
d70075c target-ppc: Add xxextractuw instruction
6290487 hw/ppc: QOM'ify spapr_vio.c
33ef5a9 hw/ppc: QOM'ify ppce500_spin.c
3fd3d44 hw/ppc: QOM'ify e500.c
239e417 hw/gpio: QOM'ify mpc8xxx.c
fbb187d qtest: add ivshmem-test for ppc64
15bb7c6 qtest: convert ivshmem-test to use libqos
40c9b58 libqos: fix spapr qpci_map()
b9b8246 qtest: add display-vga-test to ppc64
27bc180 qtest: add netfilter tests for ppc64
1ecf0e2 ppc: Validate compatibility modes when setting
2beabb6 ppc: Rewrite ppc_get_compat_smt_threads()
1f92c8b ppc: Rewrite ppc_set_compat()
7d7782d pseries: Add pseries-2.9 machine type
e905225 prep: do not use global variable to access nvram
f6ae8b9 hw/ppc/spapr: Fix boot path of usb-host storage devices
c2b60cf target-ppc: implement stxvll instructions
bd2f88a target-ppc: implement stxvl instruction
48a6ca2 target-ppc: implement lxvll instruction
3e7c1ff target-ppc: implement lxvl instruction
8c54325 target-ppc: Add xxperm and xxpermr instructions
70967fc target-ppc: implement xscpsgnqp instruction
89c0d8a target-ppc: implement xsnegqp instruction
fa5d29c target-ppc: Implement bcd_is_valid function
8c85203 target-ppc: implement xsabsqp/xsnabsqp instruction
823dce4 target-ppc: implement stop instruction
9d6502e target-ppc: move ppc_vsr_t to common header
ca7c6dc ppc/spapr: implement H_SIGNAL_SYS_RESET
d603b4e ppc: Rename cpu_version to compat_pvr
1873da5 ppc: Clean up and QOMify hypercall emulation
8183386 pseries: Make cpu_update during CAS unconditional
4cea010 pseries: Always use core objects for CPU construction
67a7a7d target-ppc: add vextu[bhw][lr]x instructions
d44501d target-ppc: Implement bcdsetsgn. instruction
fd0ab44 target-ppc: Implement bcdcpsgn. instruction
661615a target-ppc: Implement bcdctsq. instruction
f5eb3b3 target-ppc: Implement bcdcfsq. instruction
66ee361 target-ppc: implement lxv/lxvx and stxv/stxvx
c1a9d68 target-ppc: implement stxsd and stxssp
de3a632 target-ppc: implement lxsd and lxssp instructions
6aebf4c target-ppc: Add xscmpoqp and xscmpuqp instructions
53a4ac8 target-ppc: Add xscmpexp[dp, qp] instructions
b6e5abb target-ppc: Fix xscmpodp and xscmpudp instructions
fa4be48 target-ppc: rename CRF_* defines as CRF_*_BIT
8b01963 target-ppc: Consolidate instruction decode helpers
340c202 disas/ppc: Fix indefinite articles in comments

=== OUTPUT BEGIN ===
Checking PATCH 1/67: disas/ppc: Fix indefinite articles in comments...
Checking PATCH 2/67: target-ppc: Consolidate instruction decode helpers...
Checking PATCH 3/67: target-ppc: rename CRF_* defines as CRF_*_BIT...
Checking PATCH 4/67: target-ppc: Fix xscmpodp and xscmpudp instructions...
Checking PATCH 5/67: target-ppc: Add xscmpexp[dp, qp] instructions...
Checking PATCH 6/67: target-ppc: Add xscmpoqp and xscmpuqp instructions...
Checking PATCH 7/67: target-ppc: implement lxsd and lxssp instructions...
Checking PATCH 8/67: targ

[Qemu-devel] [PULL 00/67] ppc-for-2.9 queue 20170112

2017-01-11 Thread David Gibson 
The following changes since commit b44486dfb9447c88e4b216e730adcc780190852c:

  Merge remote-tracking branch 'remotes/kraxel/tags/pull-ui-20170110-1' into 
staging (2017-01-10 14:52:34 +)

are available in the git repository at:

  git://github.com/dgibson/qemu.git tags/ppc-for-2.9-20170112

for you to fetch changes up to 229b5b6b56db9c3e6b8f44b4b55a62fa32979f47:

  ppc: Fix a warning in bcdcfz code and improve BCD_DIG_BYTE macro (2017-01-12 
10:21:49 +1100)


ppc patch queue 2017-01-12

This is the first ppc pull request for qemu-2.9.  It's been a while
coming, partly due to dealing with some problems running my usual set
of tests.  So, there's quite a lot in here.

* More POWER9 instruction implementations for TCG
* The simpler parts of my CPU compatibility mode cleanup
* This changes behaviour to prefer compatibility modes over
  "raW" mode for new machine type versions
* New "40p" machine type which is essentially a modernized and
  cleaned up "prep".  The intention is that it will replace "prep"
  once it has some more testing and polish.
* Add pseries-2.9 machine type
* Implement H_SIGNAL_SYS_RESET hypercall
* Consolidate the two alternate CPU init paths in pseries by
  making it always go through CPU core objects to initialize CPU
* A handful of bugfixes and cleanups

There are also some changes not strictly related to ppc code, but for
its benefit:

* Limit the pxi-expander-bridge (PXB) device to x86 guests only
  (it's essentially a hack to work around historical x86
  limitations)
* Revise a number of qtests and enable them for ppc


Avinesh Kumar (1):
  target-ppc: add vextu[bhw][lr]x instructions

Bharata B Rao (13):
  target-ppc: Consolidate instruction decode helpers
  target-ppc: Fix xscmpodp and xscmpudp instructions
  target-ppc: Add xscmpexp[dp,qp] instructions
  target-ppc: Add xscmpoqp and xscmpuqp instructions
  target-ppc: Add xxperm and xxpermr instructions
  target-ppc: Use float64 arg in helper_compute_fprf()
  target-ppc: Replace isden by float64_is_zero_or_denormal
  target-ppc: Rename helper_compute_fprf to helper_compute_fprf_float64
  target-ppc: Add xscvdphp, xscvhpdp
  target-ppc: Use correct precision for FPRF setting
  target-ppc: Add xsaddqp instructions
  target-ppc: Add xscvdpqp instruction
  target-ppc: Add xscvqpdp instruction

David Gibson (12):
  pseries: Always use core objects for CPU construction
  pseries: Make cpu_update during CAS unconditional
  ppc: Clean up and QOMify hypercall emulation
  ppc: Rename cpu_version to compat_pvr
  target-ppc: implement xsabsqp/xsnabsqp instruction
  pseries: Add pseries-2.9 machine type
  ppc: Rewrite ppc_set_compat()
  ppc: Rewrite ppc_get_compat_smt_threads()
  ppc: Validate compatibility modes when setting
  pxb: Restrict to x86
  pseries: Rewrite CAS PVR compatibility logic
  ppc: Add ppc_set_compat_all()

Hervé Poussineau (4):
  prep: do not use global variable to access nvram
  prep: add PReP System I/O
  prep: add IBM RS/6000 7020 (40p) memory controller
  prep: add IBM RS/6000 7020 (40p) machine emulation

Jose Ricardo Ziviani (6):
  target-ppc: Implement bcdcfsq. instruction
  target-ppc: Implement bcdctsq. instruction
  target-ppc: Implement bcdcpsgn. instruction
  target-ppc: Implement bcdsetsgn. instruction
  target-ppc: Implement bcd_is_valid function
  ppc: Fix a warning in bcdcfz code and improve BCD_DIG_BYTE macro

Laurent Vivier (5):
  qtest: add netfilter tests for ppc64
  qtest: add display-vga-test to ppc64
  libqos: fix spapr qpci_map()
  qtest: convert ivshmem-test to use libqos
  qtest: add ivshmem-test for ppc64

Nicholas Piggin (1):
  ppc/spapr: implement H_SIGNAL_SYS_RESET

Nikunj A Dadhania (18):
  target-ppc: rename CRF_* defines as CRF_*_BIT
  target-ppc: implement lxsd and lxssp instructions
  target-ppc: implement stxsd and stxssp
  target-ppc: implement lxv/lxvx and stxv/stxvx
  target-ppc: move ppc_vsr_t to common header
  target-ppc: implement stop instruction
  target-ppc: implement xsnegqp instruction
  target-ppc: implement xscpsgnqp instruction
  target-ppc: implement lxvl instruction
  target-ppc: implement lxvll instruction
  target-ppc: implement stxvl instruction
  target-ppc: implement stxvll instructions
  target-ppc: Add xxextractuw instruction
  target-ppc: Add xxinsertw instruction
  target-ppc: Add xsxexpdp instruction
  target-ppc: Add xsxexpqp instruction
  target-ppc: Add xsxsigdp instruction
  target-ppc: Add xsxsigqp instructions

Roman Kapl (1):
  ppc: Prevent inifnite loop in decrementer auto-reload.

Stefan Weil (1):