[Qemu-devel] [PULL 01/30] target-sparc: ignore MMU-faults if MMU is disabled in hypervisor mode

[Artyom Tarasenko]

while IMMU/DMMU is disabled
- ignore MMU-faults in hypervisorv mode or if CPU doesn't have hypervisor
- signal TT_INSN_REAL_TRANSLATION_MISS/TT_DATA_REAL_TRANSLATION_MISS otherwise

Signed-off-by: Artyom Tarasenko 
---
 target/sparc/cpu.h |  2 ++
 target/sparc/ldst_helper.c | 15 +--
 2 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index 601c018..e815a19 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -68,6 +68,8 @@
 #define TT_DATA_ACCESS 0x32
 #define TT_UNALIGNED 0x34
 #define TT_PRIV_ACT 0x37
+#define TT_INSN_REAL_TRANSLATION_MISS 0x3e
+#define TT_DATA_REAL_TRANSLATION_MISS 0x3f
 #define TT_EXTINT   0x40
 #define TT_IVEC 0x60
 #define TT_TMISS0x64
diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c
index a0171f7..e479efd 100644
--- a/target/sparc/ldst_helper.c
+++ b/target/sparc/ldst_helper.c
@@ -1664,14 +1664,25 @@ void sparc_cpu_unassigned_access(CPUState *cs, hwaddr 
addr,
 {
 SPARCCPU *cpu = SPARC_CPU(cs);
 CPUSPARCState *env = >env;
-int tt = is_exec ? TT_CODE_ACCESS : TT_DATA_ACCESS;
 
 #ifdef DEBUG_UNASSIGNED
 printf("Unassigned mem access to " TARGET_FMT_plx " from " TARGET_FMT_lx
"\n", addr, env->pc);
 #endif
 
-cpu_raise_exception_ra(env, tt, GETPC());
+if (is_exec) { /* XXX has_hypervisor */
+if (env->lsu & (IMMU_E)) {
+cpu_raise_exception_ra(env, TT_CODE_ACCESS, GETPC());
+} else if (cpu_has_hypervisor(env) && !(env->hpstate & HS_PRIV)) {
+cpu_raise_exception_ra(env, TT_INSN_REAL_TRANSLATION_MISS, 
GETPC());
+}
+} else {
+if (env->lsu & (DMMU_E)) {
+cpu_raise_exception_ra(env, TT_DATA_ACCESS, GETPC());
+} else if (cpu_has_hypervisor(env) && !(env->hpstate & HS_PRIV)) {
+cpu_raise_exception_ra(env, TT_DATA_REAL_TRANSLATION_MISS, 
GETPC());
+}
+}
 }
 #endif
 #endif
-- 
2.7.2

[Qemu-devel] [PULL 01/30] target-sparc: ignore MMU-faults if MMU is disabled in hypervisor mode

[Richard Henderson]

From: Artyom Tarasenko 

while IMMU/DMMU is disabled
- ignore MMU-faults in hypervisorv mode or if CPU doesn't have hypervisor
- signal TT_INSN_REAL_TRANSLATION_MISS/TT_DATA_REAL_TRANSLATION_MISS otherwise

Signed-off-by: Artyom Tarasenko 
Message-Id: 

Signed-off-by: Richard Henderson 
---
 target/sparc/cpu.h |  2 ++
 target/sparc/ldst_helper.c | 15 +--
 2 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index 5fb0ed1..e0b2806 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -68,6 +68,8 @@
 #define TT_DATA_ACCESS 0x32
 #define TT_UNALIGNED 0x34
 #define TT_PRIV_ACT 0x37
+#define TT_INSN_REAL_TRANSLATION_MISS 0x3e
+#define TT_DATA_REAL_TRANSLATION_MISS 0x3f
 #define TT_EXTINT   0x40
 #define TT_IVEC 0x60
 #define TT_TMISS0x64
diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c
index de7d53a..fdca87f 100644
--- a/target/sparc/ldst_helper.c
+++ b/target/sparc/ldst_helper.c
@@ -1664,14 +1664,25 @@ void sparc_cpu_unassigned_access(CPUState *cs, hwaddr 
addr,
 {
 SPARCCPU *cpu = SPARC_CPU(cs);
 CPUSPARCState *env = >env;
-int tt = is_exec ? TT_CODE_ACCESS : TT_DATA_ACCESS;
 
 #ifdef DEBUG_UNASSIGNED
 printf("Unassigned mem access to " TARGET_FMT_plx " from " TARGET_FMT_lx
"\n", addr, env->pc);
 #endif
 
-cpu_raise_exception_ra(env, tt, GETPC());
+if (is_exec) { /* XXX has_hypervisor */
+if (env->lsu & (IMMU_E)) {
+cpu_raise_exception_ra(env, TT_CODE_ACCESS, GETPC());
+} else if (cpu_has_hypervisor(env) && !(env->hpstate & HS_PRIV)) {
+cpu_raise_exception_ra(env, TT_INSN_REAL_TRANSLATION_MISS, 
GETPC());
+}
+} else {
+if (env->lsu & (DMMU_E)) {
+cpu_raise_exception_ra(env, TT_DATA_ACCESS, GETPC());
+} else if (cpu_has_hypervisor(env) && !(env->hpstate & HS_PRIV)) {
+cpu_raise_exception_ra(env, TT_DATA_REAL_TRANSLATION_MISS, 
GETPC());
+}
+}
 }
 #endif
 #endif
-- 
2.9.3