Re: [Qemu-devel] [Qemu devel v6 PATCH 4/5] msf2: Add Smartfusion2 SoC.

[sundeep subbaraya]

Hi Alistair,

On Wed, Jul 5, 2017 at 11:55 PM, Alistair Francis 
wrote:

> On Sun, Jul 2, 2017 at 9:45 PM, Subbaraya Sundeep
>  wrote:
>
> The patch title shouldn't end in a full stop.
>

Ok will remove .

>
> > Smartfusion2 SoC has hardened Microcontroller subsystem
> > and flash based FPGA fabric. This patch adds support for
> > Microcontroller subsystem in the SoC.
> >
> > Signed-off-by: Subbaraya Sundeep 
>
> Once you have fixed up the title.
>
> Reviewed-by: Alistair Francis 
>

Thank you,
Sundeep

>
> Thanks,
> Alistair
>
>
> > ---
> >  default-configs/arm-softmmu.mak |   1 +
> >  hw/arm/Makefile.objs|   1 +
> >  hw/arm/msf2-soc.c   | 216 ++
> ++
> >  include/hw/arm/msf2-soc.h   |  67 +
> >  4 files changed, 285 insertions(+)
> >  create mode 100644 hw/arm/msf2-soc.c
> >  create mode 100644 include/hw/arm/msf2-soc.h
> >
> > diff --git a/default-configs/arm-softmmu.mak
> b/default-configs/arm-softmmu.mak
> > index 78d7af0..7062512 100644
> > --- a/default-configs/arm-softmmu.mak
> > +++ b/default-configs/arm-softmmu.mak
> > @@ -122,3 +122,4 @@ CONFIG_ACPI=y
> >  CONFIG_SMBIOS=y
> >  CONFIG_ASPEED_SOC=y
> >  CONFIG_GPIO_KEY=y
> > +CONFIG_MSF2=y
> > diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
> > index 4c5c4ee..c828061 100644
> > --- a/hw/arm/Makefile.objs
> > +++ b/hw/arm/Makefile.objs
> > @@ -18,3 +18,4 @@ obj-$(CONFIG_FSL_IMX25) += fsl-imx25.o imx25_pdk.o
> >  obj-$(CONFIG_FSL_IMX31) += fsl-imx31.o kzm.o
> >  obj-$(CONFIG_FSL_IMX6) += fsl-imx6.o sabrelite.o
> >  obj-$(CONFIG_ASPEED_SOC) += aspeed_soc.o aspeed.o
> > +obj-$(CONFIG_MSF2) += msf2-soc.o
> > diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c
> > new file mode 100644
> > index 000..d45827f
> > --- /dev/null
> > +++ b/hw/arm/msf2-soc.c
> > @@ -0,0 +1,216 @@
> > +/*
> > + * SmartFusion2 SoC emulation.
> > + *
> > + * Copyright (c) 2017 Subbaraya Sundeep 
> > + *
> > + * Permission is hereby granted, free of charge, to any person
> obtaining a copy
> > + * of this software and associated documentation files (the
> "Software"), to deal
> > + * in the Software without restriction, including without limitation
> the rights
> > + * to use, copy, modify, merge, publish, distribute, sublicense, and/or
> sell
> > + * copies of the Software, and to permit persons to whom the Software is
> > + * furnished to do so, subject to the following conditions:
> > + *
> > + * The above copyright notice and this permission notice shall be
> included in
> > + * all copies or substantial portions of the Software.
> > + *
> > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> EXPRESS OR
> > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
> MERCHANTABILITY,
> > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT
> SHALL
> > + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
> OTHER
> > + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> ARISING FROM,
> > + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
> DEALINGS IN
> > + * THE SOFTWARE.
> > + */
> > +
> > +#include "qemu/osdep.h"
> > +#include "qapi/error.h"
> > +#include "qemu-common.h"
> > +#include "hw/arm/arm.h"
> > +#include "exec/address-spaces.h"
> > +#include "hw/char/serial.h"
> > +#include "hw/boards.h"
> > +#include "sysemu/block-backend.h"
> > +#include "hw/arm/msf2-soc.h"
> > +
> > +#define MSF2_TIMER_BASE 0x40004000
> > +#define MSF2_SYSREG_BASE0x40038000
> > +
> > +#define ENVM_BASE_ADDRESS 0x6000
> > +
> > +#define SRAM_BASE_ADDRESS 0x2000
> > +
> > +#define MSF2_ENVM_SIZE(512 * K_BYTE)
> > +#define MSF2_ESRAM_SIZE   (64 * K_BYTE)
> > +
> > +static const uint32_t spi_addr[MSF2_NUM_SPIS] = { 0x40001000 ,
> 0x40011000 };
> > +static const uint32_t uart_addr[MSF2_NUM_UARTS] = { 0x4000 ,
> 0x4001 };
> > +
> > +static const int spi_irq[MSF2_NUM_SPIS] = { 2, 3 };
> > +static const int uart_irq[MSF2_NUM_UARTS] = { 10, 11 };
> > +static const int timer_irq[MSF2_NUM_TIMERS] = { 14, 15 };
> > +
> > +static void m2sxxx_soc_initfn(Object *obj)
> > +{
> > +MSF2State *s = MSF2_SOC(obj);
> > +int i;
> > +
> > +object_initialize(>armv7m, sizeof(s->armv7m), TYPE_ARMV7M);
> > +qdev_set_parent_bus(DEVICE(>armv7m), sysbus_get_default());
> > +
> > +object_initialize(>sysreg, sizeof(s->sysreg), TYPE_MSF2_SYSREG);
> > +qdev_set_parent_bus(DEVICE(>sysreg), sysbus_get_default());
> > +
> > +object_initialize(>timer, sizeof(s->timer), TYPE_MSS_TIMER);
> > +qdev_set_parent_bus(DEVICE(>timer), sysbus_get_default());
> > +
> > +for (i = 0; i < MSF2_NUM_SPIS; i++) {
> > +object_initialize(>spi[i], sizeof(s->spi[i]),
> > +  TYPE_MSS_SPI);
> > +qdev_set_parent_bus(DEVICE(>spi[i]), 

Re: [Qemu-devel] [Qemu devel v6 PATCH 4/5] msf2: Add Smartfusion2 SoC.

[Alistair Francis]

On Sun, Jul 2, 2017 at 9:45 PM, Subbaraya Sundeep
 wrote:

The patch title shouldn't end in a full stop.

> Smartfusion2 SoC has hardened Microcontroller subsystem
> and flash based FPGA fabric. This patch adds support for
> Microcontroller subsystem in the SoC.
>
> Signed-off-by: Subbaraya Sundeep 

Once you have fixed up the title.

Reviewed-by: Alistair Francis 

Thanks,
Alistair


> ---
>  default-configs/arm-softmmu.mak |   1 +
>  hw/arm/Makefile.objs|   1 +
>  hw/arm/msf2-soc.c   | 216 
> 
>  include/hw/arm/msf2-soc.h   |  67 +
>  4 files changed, 285 insertions(+)
>  create mode 100644 hw/arm/msf2-soc.c
>  create mode 100644 include/hw/arm/msf2-soc.h
>
> diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
> index 78d7af0..7062512 100644
> --- a/default-configs/arm-softmmu.mak
> +++ b/default-configs/arm-softmmu.mak
> @@ -122,3 +122,4 @@ CONFIG_ACPI=y
>  CONFIG_SMBIOS=y
>  CONFIG_ASPEED_SOC=y
>  CONFIG_GPIO_KEY=y
> +CONFIG_MSF2=y
> diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
> index 4c5c4ee..c828061 100644
> --- a/hw/arm/Makefile.objs
> +++ b/hw/arm/Makefile.objs
> @@ -18,3 +18,4 @@ obj-$(CONFIG_FSL_IMX25) += fsl-imx25.o imx25_pdk.o
>  obj-$(CONFIG_FSL_IMX31) += fsl-imx31.o kzm.o
>  obj-$(CONFIG_FSL_IMX6) += fsl-imx6.o sabrelite.o
>  obj-$(CONFIG_ASPEED_SOC) += aspeed_soc.o aspeed.o
> +obj-$(CONFIG_MSF2) += msf2-soc.o
> diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c
> new file mode 100644
> index 000..d45827f
> --- /dev/null
> +++ b/hw/arm/msf2-soc.c
> @@ -0,0 +1,216 @@
> +/*
> + * SmartFusion2 SoC emulation.
> + *
> + * Copyright (c) 2017 Subbaraya Sundeep 
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a 
> copy
> + * of this software and associated documentation files (the "Software"), to 
> deal
> + * in the Software without restriction, including without limitation the 
> rights
> + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
> + * copies of the Software, and to permit persons to whom the Software is
> + * furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
> FROM,
> + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
> + * THE SOFTWARE.
> + */
> +
> +#include "qemu/osdep.h"
> +#include "qapi/error.h"
> +#include "qemu-common.h"
> +#include "hw/arm/arm.h"
> +#include "exec/address-spaces.h"
> +#include "hw/char/serial.h"
> +#include "hw/boards.h"
> +#include "sysemu/block-backend.h"
> +#include "hw/arm/msf2-soc.h"
> +
> +#define MSF2_TIMER_BASE 0x40004000
> +#define MSF2_SYSREG_BASE0x40038000
> +
> +#define ENVM_BASE_ADDRESS 0x6000
> +
> +#define SRAM_BASE_ADDRESS 0x2000
> +
> +#define MSF2_ENVM_SIZE(512 * K_BYTE)
> +#define MSF2_ESRAM_SIZE   (64 * K_BYTE)
> +
> +static const uint32_t spi_addr[MSF2_NUM_SPIS] = { 0x40001000 , 0x40011000 };
> +static const uint32_t uart_addr[MSF2_NUM_UARTS] = { 0x4000 , 0x4001 
> };
> +
> +static const int spi_irq[MSF2_NUM_SPIS] = { 2, 3 };
> +static const int uart_irq[MSF2_NUM_UARTS] = { 10, 11 };
> +static const int timer_irq[MSF2_NUM_TIMERS] = { 14, 15 };
> +
> +static void m2sxxx_soc_initfn(Object *obj)
> +{
> +MSF2State *s = MSF2_SOC(obj);
> +int i;
> +
> +object_initialize(>armv7m, sizeof(s->armv7m), TYPE_ARMV7M);
> +qdev_set_parent_bus(DEVICE(>armv7m), sysbus_get_default());
> +
> +object_initialize(>sysreg, sizeof(s->sysreg), TYPE_MSF2_SYSREG);
> +qdev_set_parent_bus(DEVICE(>sysreg), sysbus_get_default());
> +
> +object_initialize(>timer, sizeof(s->timer), TYPE_MSS_TIMER);
> +qdev_set_parent_bus(DEVICE(>timer), sysbus_get_default());
> +
> +for (i = 0; i < MSF2_NUM_SPIS; i++) {
> +object_initialize(>spi[i], sizeof(s->spi[i]),
> +  TYPE_MSS_SPI);
> +qdev_set_parent_bus(DEVICE(>spi[i]), sysbus_get_default());
> +}
> +}
> +
> +static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp)
> +{
> +MSF2State *s = MSF2_SOC(dev_soc);
> +DeviceState *dev, *armv7m;
> +SysBusDevice *busdev;
> +Error *err = NULL;
> +int i;
> +
> +MemoryRegion *system_memory = get_system_memory();
> +MemoryRegion *nvm = g_new(MemoryRegion, 1);
> +MemoryRegion 

[Qemu-devel] [Qemu devel v6 PATCH 4/5] msf2: Add Smartfusion2 SoC.

[Subbaraya Sundeep]

Smartfusion2 SoC has hardened Microcontroller subsystem
and flash based FPGA fabric. This patch adds support for
Microcontroller subsystem in the SoC.

Signed-off-by: Subbaraya Sundeep 
---
 default-configs/arm-softmmu.mak |   1 +
 hw/arm/Makefile.objs|   1 +
 hw/arm/msf2-soc.c   | 216 
 include/hw/arm/msf2-soc.h   |  67 +
 4 files changed, 285 insertions(+)
 create mode 100644 hw/arm/msf2-soc.c
 create mode 100644 include/hw/arm/msf2-soc.h

diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index 78d7af0..7062512 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -122,3 +122,4 @@ CONFIG_ACPI=y
 CONFIG_SMBIOS=y
 CONFIG_ASPEED_SOC=y
 CONFIG_GPIO_KEY=y
+CONFIG_MSF2=y
diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
index 4c5c4ee..c828061 100644
--- a/hw/arm/Makefile.objs
+++ b/hw/arm/Makefile.objs
@@ -18,3 +18,4 @@ obj-$(CONFIG_FSL_IMX25) += fsl-imx25.o imx25_pdk.o
 obj-$(CONFIG_FSL_IMX31) += fsl-imx31.o kzm.o
 obj-$(CONFIG_FSL_IMX6) += fsl-imx6.o sabrelite.o
 obj-$(CONFIG_ASPEED_SOC) += aspeed_soc.o aspeed.o
+obj-$(CONFIG_MSF2) += msf2-soc.o
diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c
new file mode 100644
index 000..d45827f
--- /dev/null
+++ b/hw/arm/msf2-soc.c
@@ -0,0 +1,216 @@
+/*
+ * SmartFusion2 SoC emulation.
+ *
+ * Copyright (c) 2017 Subbaraya Sundeep 
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to 
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "qemu-common.h"
+#include "hw/arm/arm.h"
+#include "exec/address-spaces.h"
+#include "hw/char/serial.h"
+#include "hw/boards.h"
+#include "sysemu/block-backend.h"
+#include "hw/arm/msf2-soc.h"
+
+#define MSF2_TIMER_BASE 0x40004000
+#define MSF2_SYSREG_BASE0x40038000
+
+#define ENVM_BASE_ADDRESS 0x6000
+
+#define SRAM_BASE_ADDRESS 0x2000
+
+#define MSF2_ENVM_SIZE(512 * K_BYTE)
+#define MSF2_ESRAM_SIZE   (64 * K_BYTE)
+
+static const uint32_t spi_addr[MSF2_NUM_SPIS] = { 0x40001000 , 0x40011000 };
+static const uint32_t uart_addr[MSF2_NUM_UARTS] = { 0x4000 , 0x4001 };
+
+static const int spi_irq[MSF2_NUM_SPIS] = { 2, 3 };
+static const int uart_irq[MSF2_NUM_UARTS] = { 10, 11 };
+static const int timer_irq[MSF2_NUM_TIMERS] = { 14, 15 };
+
+static void m2sxxx_soc_initfn(Object *obj)
+{
+MSF2State *s = MSF2_SOC(obj);
+int i;
+
+object_initialize(>armv7m, sizeof(s->armv7m), TYPE_ARMV7M);
+qdev_set_parent_bus(DEVICE(>armv7m), sysbus_get_default());
+
+object_initialize(>sysreg, sizeof(s->sysreg), TYPE_MSF2_SYSREG);
+qdev_set_parent_bus(DEVICE(>sysreg), sysbus_get_default());
+
+object_initialize(>timer, sizeof(s->timer), TYPE_MSS_TIMER);
+qdev_set_parent_bus(DEVICE(>timer), sysbus_get_default());
+
+for (i = 0; i < MSF2_NUM_SPIS; i++) {
+object_initialize(>spi[i], sizeof(s->spi[i]),
+  TYPE_MSS_SPI);
+qdev_set_parent_bus(DEVICE(>spi[i]), sysbus_get_default());
+}
+}
+
+static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp)
+{
+MSF2State *s = MSF2_SOC(dev_soc);
+DeviceState *dev, *armv7m;
+SysBusDevice *busdev;
+Error *err = NULL;
+int i;
+
+MemoryRegion *system_memory = get_system_memory();
+MemoryRegion *nvm = g_new(MemoryRegion, 1);
+MemoryRegion *nvm_alias = g_new(MemoryRegion, 1);
+MemoryRegion *sram = g_new(MemoryRegion, 1);
+
+memory_region_init_ram(nvm, NULL, "MSF2.eNVM", s->envm_size,
+   _fatal);
+
+/*
+ * On power-on, the eNVM region 0x6000 is automatically
+ * remapped to the Cortex-M3 processor executable region
+ * start address (0x0). We do not support remapping other eNVM,
+ * eSRAM and DDR regions by guest(via Sysreg) currently.
+ */
+memory_region_init_alias(nvm_alias,