Re: [Qemu-devel] [Qemu devel v7 PATCH 4/5] msf2: Add Smartfusion2 SoC

2017-08-31 Thread Alistair Francis 
On Thu, Aug 31, 2017 at 4:40 PM, Philippe Mathieu-Daudé  wrote:
> Hi Alistair,
>
>
> On 08/31/2017 08:02 PM, Alistair Francis wrote:
>>
>> On Wed, Aug 30, 2017 at 7:47 AM, Philippe Mathieu-Daudé 
>> wrote:
>>>
>>> On 08/30/2017 09:26 AM, Peter Maydell wrote:


 On 30 August 2017 at 03:45, Philippe Mathieu-Daudé 
 wrote:
>
>
> I think they might be issues if you start QEMU without -serial and then
> use
> a firmware polling for an uart, the device won't be mapped and the
> memory
> accesses are mostly ignored.
>
> I'd rather use:
>
>   for (i = 0; i < MSF2_NUM_UARTS && i < MAX_SERIAL_PORTS; i++) {
>   static const char *serial[] = {"serial0", "serial1"};
>
>   if (!serial_hds[i]) {
>   serial_hds[i] = qemu_chr_new(serial[i], "null");
>
>   }
>
>> +serial_mm_init(get_system_memory(), uart_addr[i], 2,
>> +   qdev_get_gpio_in(armv7m, uart_irq[i]),
>> +   115200, serial_hds[i],
>> DEVICE_NATIVE_ENDIAN);
>> +}
>> +}



 It would be better to fix serial_mm_init() to handle having
 a NULL chardev pointer, because we already have a lot of
 SoC code that just passes it serial_hds[] regardless.
>>>
>>>
>>>
>>> clever :)
>>>
 I'd leave this code as it is and we can fix serial_mm_init
 separately (somebody pointed out this issue for a xilinx
 board recently).
>>
>>
>> Ah, I'll look into this then.
>
>
> I already sent a series to take care of this:
>
> http://lists.nongnu.org/archive/html/qemu-devel/2017-08/msg06325.html

That was quick.

Can you CC me on the next version?

Thanks,
Alistair

>
> I'll respin a v2 shortly.

Re: [Qemu-devel] [Qemu devel v7 PATCH 4/5] msf2: Add Smartfusion2 SoC

2017-08-31 Thread Philippe Mathieu-Daudé 

Hi Alistair,

On 08/31/2017 08:02 PM, Alistair Francis wrote:

On Wed, Aug 30, 2017 at 7:47 AM, Philippe Mathieu-Daudé  wrote:

On 08/30/2017 09:26 AM, Peter Maydell wrote:


On 30 August 2017 at 03:45, Philippe Mathieu-Daudé 
wrote:


I think they might be issues if you start QEMU without -serial and then
use
a firmware polling for an uart, the device won't be mapped and the memory
accesses are mostly ignored.

I'd rather use:

  for (i = 0; i < MSF2_NUM_UARTS && i < MAX_SERIAL_PORTS; i++) {
  static const char *serial[] = {"serial0", "serial1"};

  if (!serial_hds[i]) {
  serial_hds[i] = qemu_chr_new(serial[i], "null");

  }


+serial_mm_init(get_system_memory(), uart_addr[i], 2,
+   qdev_get_gpio_in(armv7m, uart_irq[i]),
+   115200, serial_hds[i],
DEVICE_NATIVE_ENDIAN);
+}
+}



It would be better to fix serial_mm_init() to handle having
a NULL chardev pointer, because we already have a lot of
SoC code that just passes it serial_hds[] regardless.



clever :)


I'd leave this code as it is and we can fix serial_mm_init
separately (somebody pointed out this issue for a xilinx
board recently).


Ah, I'll look into this then.


I already sent a series to take care of this:

http://lists.nongnu.org/archive/html/qemu-devel/2017-08/msg06325.html

I'll respin a v2 shortly.

Re: [Qemu-devel] [Qemu devel v7 PATCH 4/5] msf2: Add Smartfusion2 SoC

2017-08-31 Thread Alistair Francis 
On Wed, Aug 30, 2017 at 7:47 AM, Philippe Mathieu-Daudé  wrote:
> On 08/30/2017 09:26 AM, Peter Maydell wrote:
>>
>> On 30 August 2017 at 03:45, Philippe Mathieu-Daudé 
>> wrote:
>>>
>>> I think they might be issues if you start QEMU without -serial and then
>>> use
>>> a firmware polling for an uart, the device won't be mapped and the memory
>>> accesses are mostly ignored.
>>>
>>> I'd rather use:
>>>
>>>  for (i = 0; i < MSF2_NUM_UARTS && i < MAX_SERIAL_PORTS; i++) {
>>>  static const char *serial[] = {"serial0", "serial1"};
>>>
>>>  if (!serial_hds[i]) {
>>>  serial_hds[i] = qemu_chr_new(serial[i], "null");
>>>
>>>  }
>>>
 +serial_mm_init(get_system_memory(), uart_addr[i], 2,
 +   qdev_get_gpio_in(armv7m, uart_irq[i]),
 +   115200, serial_hds[i],
 DEVICE_NATIVE_ENDIAN);
 +}
 +}
>>
>>
>> It would be better to fix serial_mm_init() to handle having
>> a NULL chardev pointer, because we already have a lot of
>> SoC code that just passes it serial_hds[] regardless.
>
>
> clever :)
>
>> I'd leave this code as it is and we can fix serial_mm_init
>> separately (somebody pointed out this issue for a xilinx
>> board recently).

Ah, I'll look into this then.

Thanks,
Alistair

>
>
> Sure.

Re: [Qemu-devel] [Qemu devel v7 PATCH 4/5] msf2: Add Smartfusion2 SoC

2017-08-30 Thread Philippe Mathieu-Daudé 

On 08/30/2017 09:26 AM, Peter Maydell wrote:

On 30 August 2017 at 03:45, Philippe Mathieu-Daudé  wrote:

I think they might be issues if you start QEMU without -serial and then use
a firmware polling for an uart, the device won't be mapped and the memory
accesses are mostly ignored.

I'd rather use:

 for (i = 0; i < MSF2_NUM_UARTS && i < MAX_SERIAL_PORTS; i++) {
 static const char *serial[] = {"serial0", "serial1"};

 if (!serial_hds[i]) {
 serial_hds[i] = qemu_chr_new(serial[i], "null");

 }


+serial_mm_init(get_system_memory(), uart_addr[i], 2,
+   qdev_get_gpio_in(armv7m, uart_irq[i]),
+   115200, serial_hds[i], DEVICE_NATIVE_ENDIAN);
+}
+}


It would be better to fix serial_mm_init() to handle having
a NULL chardev pointer, because we already have a lot of
SoC code that just passes it serial_hds[] regardless.


clever :)


I'd leave this code as it is and we can fix serial_mm_init
separately (somebody pointed out this issue for a xilinx
board recently).


Sure.

Re: [Qemu-devel] [Qemu devel v7 PATCH 4/5] msf2: Add Smartfusion2 SoC

2017-08-30 Thread Peter Maydell 
On 30 August 2017 at 03:45, Philippe Mathieu-Daudé  wrote:
> I think they might be issues if you start QEMU without -serial and then use
> a firmware polling for an uart, the device won't be mapped and the memory
> accesses are mostly ignored.
>
> I'd rather use:
>
> for (i = 0; i < MSF2_NUM_UARTS && i < MAX_SERIAL_PORTS; i++) {
> static const char *serial[] = {"serial0", "serial1"};
>
> if (!serial_hds[i]) {
> serial_hds[i] = qemu_chr_new(serial[i], "null");
>
> }
>
>> +serial_mm_init(get_system_memory(), uart_addr[i], 2,
>> +   qdev_get_gpio_in(armv7m, uart_irq[i]),
>> +   115200, serial_hds[i], DEVICE_NATIVE_ENDIAN);
>> +}
>> +}

It would be better to fix serial_mm_init() to handle having
a NULL chardev pointer, because we already have a lot of
SoC code that just passes it serial_hds[] regardless.

I'd leave this code as it is and we can fix serial_mm_init
separately (somebody pointed out this issue for a xilinx
board recently).

thanks
-- PMM

Re: [Qemu-devel] [Qemu devel v7 PATCH 4/5] msf2: Add Smartfusion2 SoC

2017-08-30 Thread sundeep subbaraya 
Hi Philippe,

On Wed, Aug 30, 2017 at 8:15 AM, Philippe Mathieu-Daudé 
wrote:

> Hi Subbaraya,
>
>
> On 08/28/2017 01:38 PM, Subbaraya Sundeep wrote:
>
>> Smartfusion2 SoC has hardened Microcontroller subsystem
>> and flash based FPGA fabric. This patch adds support for
>> Microcontroller subsystem in the SoC.
>>
>> Signed-off-by: Subbaraya Sundeep 
>> ---
>>   default-configs/arm-softmmu.mak |   1 +
>>   hw/arm/Makefile.objs|   1 +
>>   hw/arm/msf2-soc.c   | 215 ++
>> ++
>>   include/hw/arm/msf2-soc.h   |  66 
>>   4 files changed, 283 insertions(+)
>>   create mode 100644 hw/arm/msf2-soc.c
>>   create mode 100644 include/hw/arm/msf2-soc.h
>>
>> diff --git a/default-configs/arm-softmmu.mak
>> b/default-configs/arm-softmmu.mak
>> index bbdd3c1..5059d13 100644
>> --- a/default-configs/arm-softmmu.mak
>> +++ b/default-configs/arm-softmmu.mak
>> @@ -129,3 +129,4 @@ CONFIG_ACPI=y
>>   CONFIG_SMBIOS=y
>>   CONFIG_ASPEED_SOC=y
>>   CONFIG_GPIO_KEY=y
>> +CONFIG_MSF2=y
>> diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
>> index a2e56ec..df36a03 100644
>> --- a/hw/arm/Makefile.objs
>> +++ b/hw/arm/Makefile.objs
>> @@ -19,3 +19,4 @@ obj-$(CONFIG_FSL_IMX31) += fsl-imx31.o kzm.o
>>   obj-$(CONFIG_FSL_IMX6) += fsl-imx6.o sabrelite.o
>>   obj-$(CONFIG_ASPEED_SOC) += aspeed_soc.o aspeed.o
>>   obj-$(CONFIG_MPS2) += mps2.o
>> +obj-$(CONFIG_MSF2) += msf2-soc.o
>> diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c
>> new file mode 100644
>> index 000..276eec5
>> --- /dev/null
>> +++ b/hw/arm/msf2-soc.c
>> @@ -0,0 +1,215 @@
>> +/*
>> + * SmartFusion2 SoC emulation.
>> + *
>> + * Copyright (c) 2017 Subbaraya Sundeep 
>> + *
>> + * Permission is hereby granted, free of charge, to any person obtaining
>> a copy
>> + * of this software and associated documentation files (the "Software"),
>> to deal
>> + * in the Software without restriction, including without limitation the
>> rights
>> + * to use, copy, modify, merge, publish, distribute, sublicense, and/or
>> sell
>> + * copies of the Software, and to permit persons to whom the Software is
>> + * furnished to do so, subject to the following conditions:
>> + *
>> + * The above copyright notice and this permission notice shall be
>> included in
>> + * all copies or substantial portions of the Software.
>> + *
>> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
>> EXPRESS OR
>> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
>> MERCHANTABILITY,
>> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT
>> SHALL
>> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
>> OTHER
>> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
>> ARISING FROM,
>> + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
>> DEALINGS IN
>> + * THE SOFTWARE.
>> + */
>> +
>> +#include "qemu/osdep.h"
>> +#include "qapi/error.h"
>> +#include "qemu-common.h"
>> +#include "hw/arm/arm.h"
>> +#include "exec/address-spaces.h"
>> +#include "hw/char/serial.h"
>> +#include "hw/boards.h"
>> +#include "sysemu/block-backend.h"
>> +#include "qemu/cutils.h"
>> +#include "hw/arm/msf2-soc.h"
>> +
>> +#define MSF2_TIMER_BASE   0x40004000
>> +#define MSF2_SYSREG_BASE  0x40038000
>> +
>> +#define ENVM_BASE_ADDRESS 0x6000
>> +
>> +#define SRAM_BASE_ADDRESS 0x2000
>> +
>> +#define MSF2_ENVM_SIZE(512 * K_BYTE)
>> +#define MSF2_ESRAM_SIZE   (64 * K_BYTE)
>>
>
> Eventually you should name those _SIZE_MAX.


I agree and will change to SIZE_MAX

>


> I miscorrected you in v4, 64kB is true with SECDED disabled, else the SoC
> is designed for 80kB. Not a big deal, we can add a "SECDED not supported"
> warning later.
> Can you add a comment about it?


Sure will add a comment about it.

>
>
> +
>> +static const uint32_t spi_addr[MSF2_NUM_SPIS] = { 0x40001000 ,
>> 0x40011000 };
>> +static const uint32_t uart_addr[MSF2_NUM_UARTS] = { 0x4000 ,
>> 0x4001 };
>> +
>> +static const int spi_irq[MSF2_NUM_SPIS] = { 2, 3 };
>> +static const int uart_irq[MSF2_NUM_UARTS] = { 10, 11 };
>> +static const int timer_irq[MSF2_NUM_TIMERS] = { 14, 15 };
>> +
>> +static void m2sxxx_soc_initfn(Object *obj)
>> +{
>> +MSF2State *s = MSF2_SOC(obj);
>> +int i;
>> +
>> +object_initialize(>armv7m, sizeof(s->armv7m), TYPE_ARMV7M);
>> +qdev_set_parent_bus(DEVICE(>armv7m), sysbus_get_default());
>> +
>> +object_initialize(>sysreg, sizeof(s->sysreg), TYPE_MSF2_SYSREG);
>> +qdev_set_parent_bus(DEVICE(>sysreg), sysbus_get_default());
>> +
>> +object_initialize(>timer, sizeof(s->timer), TYPE_MSS_TIMER);
>> +qdev_set_parent_bus(DEVICE(>timer), sysbus_get_default());
>> +
>>
>
> What about the UARTs?
>
> +for (i = 0; i < MSF2_NUM_SPIS; i++) {
>> +object_initialize(>spi[i], sizeof(s->spi[i]),
>> +  TYPE_MSS_SPI);
>>

Re: [Qemu-devel] [Qemu devel v7 PATCH 4/5] msf2: Add Smartfusion2 SoC

2017-08-29 Thread Philippe Mathieu-Daudé 

Hi Subbaraya,

On 08/28/2017 01:38 PM, Subbaraya Sundeep wrote:

Smartfusion2 SoC has hardened Microcontroller subsystem
and flash based FPGA fabric. This patch adds support for
Microcontroller subsystem in the SoC.

Signed-off-by: Subbaraya Sundeep 
---
  default-configs/arm-softmmu.mak |   1 +
  hw/arm/Makefile.objs|   1 +
  hw/arm/msf2-soc.c   | 215 
  include/hw/arm/msf2-soc.h   |  66 
  4 files changed, 283 insertions(+)
  create mode 100644 hw/arm/msf2-soc.c
  create mode 100644 include/hw/arm/msf2-soc.h

diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index bbdd3c1..5059d13 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -129,3 +129,4 @@ CONFIG_ACPI=y
  CONFIG_SMBIOS=y
  CONFIG_ASPEED_SOC=y
  CONFIG_GPIO_KEY=y
+CONFIG_MSF2=y
diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
index a2e56ec..df36a03 100644
--- a/hw/arm/Makefile.objs
+++ b/hw/arm/Makefile.objs
@@ -19,3 +19,4 @@ obj-$(CONFIG_FSL_IMX31) += fsl-imx31.o kzm.o
  obj-$(CONFIG_FSL_IMX6) += fsl-imx6.o sabrelite.o
  obj-$(CONFIG_ASPEED_SOC) += aspeed_soc.o aspeed.o
  obj-$(CONFIG_MPS2) += mps2.o
+obj-$(CONFIG_MSF2) += msf2-soc.o
diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c
new file mode 100644
index 000..276eec5
--- /dev/null
+++ b/hw/arm/msf2-soc.c
@@ -0,0 +1,215 @@
+/*
+ * SmartFusion2 SoC emulation.
+ *
+ * Copyright (c) 2017 Subbaraya Sundeep 
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to 
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "qemu-common.h"
+#include "hw/arm/arm.h"
+#include "exec/address-spaces.h"
+#include "hw/char/serial.h"
+#include "hw/boards.h"
+#include "sysemu/block-backend.h"
+#include "qemu/cutils.h"
+#include "hw/arm/msf2-soc.h"
+
+#define MSF2_TIMER_BASE   0x40004000
+#define MSF2_SYSREG_BASE  0x40038000
+
+#define ENVM_BASE_ADDRESS 0x6000
+
+#define SRAM_BASE_ADDRESS 0x2000
+
+#define MSF2_ENVM_SIZE(512 * K_BYTE)
+#define MSF2_ESRAM_SIZE   (64 * K_BYTE)


Eventually you should name those _SIZE_MAX.

I miscorrected you in v4, 64kB is true with SECDED disabled, else the 
SoC is designed for 80kB. Not a big deal, we can add a "SECDED not 
supported" warning later.

Can you add a comment about it?


+
+static const uint32_t spi_addr[MSF2_NUM_SPIS] = { 0x40001000 , 0x40011000 };
+static const uint32_t uart_addr[MSF2_NUM_UARTS] = { 0x4000 , 0x4001 };
+
+static const int spi_irq[MSF2_NUM_SPIS] = { 2, 3 };
+static const int uart_irq[MSF2_NUM_UARTS] = { 10, 11 };
+static const int timer_irq[MSF2_NUM_TIMERS] = { 14, 15 };
+
+static void m2sxxx_soc_initfn(Object *obj)
+{
+MSF2State *s = MSF2_SOC(obj);
+int i;
+
+object_initialize(>armv7m, sizeof(s->armv7m), TYPE_ARMV7M);
+qdev_set_parent_bus(DEVICE(>armv7m), sysbus_get_default());
+
+object_initialize(>sysreg, sizeof(s->sysreg), TYPE_MSF2_SYSREG);
+qdev_set_parent_bus(DEVICE(>sysreg), sysbus_get_default());
+
+object_initialize(>timer, sizeof(s->timer), TYPE_MSS_TIMER);
+qdev_set_parent_bus(DEVICE(>timer), sysbus_get_default());
+


What about the UARTs?


+for (i = 0; i < MSF2_NUM_SPIS; i++) {
+object_initialize(>spi[i], sizeof(s->spi[i]),
+  TYPE_MSS_SPI);
+qdev_set_parent_bus(DEVICE(>spi[i]), sysbus_get_default());
+}
+}
+
+static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp)
+{
+MSF2State *s = MSF2_SOC(dev_soc);
+DeviceState *dev, *armv7m;
+SysBusDevice *busdev;
+Error *err = NULL;
+int i;
+
+MemoryRegion *system_memory = get_system_memory();
+MemoryRegion *nvm = g_new(MemoryRegion, 1);
+MemoryRegion *nvm_alias = g_new(MemoryRegion, 1);
+MemoryRegion *sram = g_new(MemoryRegion, 1);
+
+memory_region_init_ram(nvm, NULL, "MSF2.eNVM",

Re: [Qemu-devel] [Qemu devel v7 PATCH 4/5] msf2: Add Smartfusion2 SoC

2017-08-28 Thread Alistair Francis 
On Mon, Aug 28, 2017 at 9:38 AM, Subbaraya Sundeep
 wrote:
> Smartfusion2 SoC has hardened Microcontroller subsystem
> and flash based FPGA fabric. This patch adds support for
> Microcontroller subsystem in the SoC.
>
> Signed-off-by: Subbaraya Sundeep 

It looks like I have reviewed this one previously as well. Unless
there were any major changes since then you can re-add my reviewed by
tag.

Thanks,
Alistair

> ---
>  default-configs/arm-softmmu.mak |   1 +
>  hw/arm/Makefile.objs|   1 +
>  hw/arm/msf2-soc.c   | 215 
> 
>  include/hw/arm/msf2-soc.h   |  66 
>  4 files changed, 283 insertions(+)
>  create mode 100644 hw/arm/msf2-soc.c
>  create mode 100644 include/hw/arm/msf2-soc.h
>
> diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
> index bbdd3c1..5059d13 100644
> --- a/default-configs/arm-softmmu.mak
> +++ b/default-configs/arm-softmmu.mak
> @@ -129,3 +129,4 @@ CONFIG_ACPI=y
>  CONFIG_SMBIOS=y
>  CONFIG_ASPEED_SOC=y
>  CONFIG_GPIO_KEY=y
> +CONFIG_MSF2=y
> diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
> index a2e56ec..df36a03 100644
> --- a/hw/arm/Makefile.objs
> +++ b/hw/arm/Makefile.objs
> @@ -19,3 +19,4 @@ obj-$(CONFIG_FSL_IMX31) += fsl-imx31.o kzm.o
>  obj-$(CONFIG_FSL_IMX6) += fsl-imx6.o sabrelite.o
>  obj-$(CONFIG_ASPEED_SOC) += aspeed_soc.o aspeed.o
>  obj-$(CONFIG_MPS2) += mps2.o
> +obj-$(CONFIG_MSF2) += msf2-soc.o
> diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c
> new file mode 100644
> index 000..276eec5
> --- /dev/null
> +++ b/hw/arm/msf2-soc.c
> @@ -0,0 +1,215 @@
> +/*
> + * SmartFusion2 SoC emulation.
> + *
> + * Copyright (c) 2017 Subbaraya Sundeep 
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a 
> copy
> + * of this software and associated documentation files (the "Software"), to 
> deal
> + * in the Software without restriction, including without limitation the 
> rights
> + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
> + * copies of the Software, and to permit persons to whom the Software is
> + * furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
> FROM,
> + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
> + * THE SOFTWARE.
> + */
> +
> +#include "qemu/osdep.h"
> +#include "qapi/error.h"
> +#include "qemu-common.h"
> +#include "hw/arm/arm.h"
> +#include "exec/address-spaces.h"
> +#include "hw/char/serial.h"
> +#include "hw/boards.h"
> +#include "sysemu/block-backend.h"
> +#include "qemu/cutils.h"
> +#include "hw/arm/msf2-soc.h"
> +
> +#define MSF2_TIMER_BASE   0x40004000
> +#define MSF2_SYSREG_BASE  0x40038000
> +
> +#define ENVM_BASE_ADDRESS 0x6000
> +
> +#define SRAM_BASE_ADDRESS 0x2000
> +
> +#define MSF2_ENVM_SIZE(512 * K_BYTE)
> +#define MSF2_ESRAM_SIZE   (64 * K_BYTE)
> +
> +static const uint32_t spi_addr[MSF2_NUM_SPIS] = { 0x40001000 , 0x40011000 };
> +static const uint32_t uart_addr[MSF2_NUM_UARTS] = { 0x4000 , 0x4001 
> };
> +
> +static const int spi_irq[MSF2_NUM_SPIS] = { 2, 3 };
> +static const int uart_irq[MSF2_NUM_UARTS] = { 10, 11 };
> +static const int timer_irq[MSF2_NUM_TIMERS] = { 14, 15 };
> +
> +static void m2sxxx_soc_initfn(Object *obj)
> +{
> +MSF2State *s = MSF2_SOC(obj);
> +int i;
> +
> +object_initialize(>armv7m, sizeof(s->armv7m), TYPE_ARMV7M);
> +qdev_set_parent_bus(DEVICE(>armv7m), sysbus_get_default());
> +
> +object_initialize(>sysreg, sizeof(s->sysreg), TYPE_MSF2_SYSREG);
> +qdev_set_parent_bus(DEVICE(>sysreg), sysbus_get_default());
> +
> +object_initialize(>timer, sizeof(s->timer), TYPE_MSS_TIMER);
> +qdev_set_parent_bus(DEVICE(>timer), sysbus_get_default());
> +
> +for (i = 0; i < MSF2_NUM_SPIS; i++) {
> +object_initialize(>spi[i], sizeof(s->spi[i]),
> +  TYPE_MSS_SPI);
> +qdev_set_parent_bus(DEVICE(>spi[i]), sysbus_get_default());
> +}
> +}
> +
> +static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp)
> +{
> +MSF2State *s = MSF2_SOC(dev_soc);
> +DeviceState *dev, *armv7m;
> +SysBusDevice *busdev;
> +Error *err = NULL;
> +int i;
> +
> +MemoryRegion *system_memory = get_system_memory();
> +MemoryRegion *nvm = g_new(MemoryRegion, 1);
> +MemoryRegion

[Qemu-devel] [Qemu devel v7 PATCH 4/5] msf2: Add Smartfusion2 SoC

2017-08-28 Thread Subbaraya Sundeep 
Smartfusion2 SoC has hardened Microcontroller subsystem
and flash based FPGA fabric. This patch adds support for
Microcontroller subsystem in the SoC.

Signed-off-by: Subbaraya Sundeep 
---
 default-configs/arm-softmmu.mak |   1 +
 hw/arm/Makefile.objs|   1 +
 hw/arm/msf2-soc.c   | 215 
 include/hw/arm/msf2-soc.h   |  66 
 4 files changed, 283 insertions(+)
 create mode 100644 hw/arm/msf2-soc.c
 create mode 100644 include/hw/arm/msf2-soc.h

diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index bbdd3c1..5059d13 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -129,3 +129,4 @@ CONFIG_ACPI=y
 CONFIG_SMBIOS=y
 CONFIG_ASPEED_SOC=y
 CONFIG_GPIO_KEY=y
+CONFIG_MSF2=y
diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
index a2e56ec..df36a03 100644
--- a/hw/arm/Makefile.objs
+++ b/hw/arm/Makefile.objs
@@ -19,3 +19,4 @@ obj-$(CONFIG_FSL_IMX31) += fsl-imx31.o kzm.o
 obj-$(CONFIG_FSL_IMX6) += fsl-imx6.o sabrelite.o
 obj-$(CONFIG_ASPEED_SOC) += aspeed_soc.o aspeed.o
 obj-$(CONFIG_MPS2) += mps2.o
+obj-$(CONFIG_MSF2) += msf2-soc.o
diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c
new file mode 100644
index 000..276eec5
--- /dev/null
+++ b/hw/arm/msf2-soc.c
@@ -0,0 +1,215 @@
+/*
+ * SmartFusion2 SoC emulation.
+ *
+ * Copyright (c) 2017 Subbaraya Sundeep 
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to 
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "qemu-common.h"
+#include "hw/arm/arm.h"
+#include "exec/address-spaces.h"
+#include "hw/char/serial.h"
+#include "hw/boards.h"
+#include "sysemu/block-backend.h"
+#include "qemu/cutils.h"
+#include "hw/arm/msf2-soc.h"
+
+#define MSF2_TIMER_BASE   0x40004000
+#define MSF2_SYSREG_BASE  0x40038000
+
+#define ENVM_BASE_ADDRESS 0x6000
+
+#define SRAM_BASE_ADDRESS 0x2000
+
+#define MSF2_ENVM_SIZE(512 * K_BYTE)
+#define MSF2_ESRAM_SIZE   (64 * K_BYTE)
+
+static const uint32_t spi_addr[MSF2_NUM_SPIS] = { 0x40001000 , 0x40011000 };
+static const uint32_t uart_addr[MSF2_NUM_UARTS] = { 0x4000 , 0x4001 };
+
+static const int spi_irq[MSF2_NUM_SPIS] = { 2, 3 };
+static const int uart_irq[MSF2_NUM_UARTS] = { 10, 11 };
+static const int timer_irq[MSF2_NUM_TIMERS] = { 14, 15 };
+
+static void m2sxxx_soc_initfn(Object *obj)
+{
+MSF2State *s = MSF2_SOC(obj);
+int i;
+
+object_initialize(>armv7m, sizeof(s->armv7m), TYPE_ARMV7M);
+qdev_set_parent_bus(DEVICE(>armv7m), sysbus_get_default());
+
+object_initialize(>sysreg, sizeof(s->sysreg), TYPE_MSF2_SYSREG);
+qdev_set_parent_bus(DEVICE(>sysreg), sysbus_get_default());
+
+object_initialize(>timer, sizeof(s->timer), TYPE_MSS_TIMER);
+qdev_set_parent_bus(DEVICE(>timer), sysbus_get_default());
+
+for (i = 0; i < MSF2_NUM_SPIS; i++) {
+object_initialize(>spi[i], sizeof(s->spi[i]),
+  TYPE_MSS_SPI);
+qdev_set_parent_bus(DEVICE(>spi[i]), sysbus_get_default());
+}
+}
+
+static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp)
+{
+MSF2State *s = MSF2_SOC(dev_soc);
+DeviceState *dev, *armv7m;
+SysBusDevice *busdev;
+Error *err = NULL;
+int i;
+
+MemoryRegion *system_memory = get_system_memory();
+MemoryRegion *nvm = g_new(MemoryRegion, 1);
+MemoryRegion *nvm_alias = g_new(MemoryRegion, 1);
+MemoryRegion *sram = g_new(MemoryRegion, 1);
+
+memory_region_init_ram(nvm, NULL, "MSF2.eNVM", s->envm_size,
+   _fatal);
+
+/*
+ * On power-on, the eNVM region 0x6000 is automatically
+ * remapped to the Cortex-M3 processor executable region
+ * start address (0x0). We do not support remapping other eNVM,
+ * eSRAM and DDR regions by guest(via Sysreg) currently.
+ */
+