Re: [PATCH for-6.2 07/25] armsse: Wire up systick cpuclk clock
On 10:33 Thu 12 Aug , Peter Maydell wrote: > Wire up the cpuclk for the systick devices to the SSE object's > existing mainclk clock. > > We do not wire up the refclk because the SSE subsystems do not > provide a refclk. (This is documented in the IoTKit and SSE-200 > TRMs; the SSE-300 TRM doesn't mention it but we assume it follows the > same approach.) When we update the systick device later to honour "no > refclk connected" this will fix a minor emulation inaccuracy for the > SSE-based boards. > > Signed-off-by: Peter Maydell Reviewed-by: Luc Michel > --- > hw/arm/armsse.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c > index a1456cb0f42..70b52c3d4b9 100644 > --- a/hw/arm/armsse.c > +++ b/hw/arm/armsse.c > @@ -995,6 +995,9 @@ static void armsse_realize(DeviceState *dev, Error **errp) > int j; > char *gpioname; > > +qdev_connect_clock_in(cpudev, "cpuclk", s->mainclk); > +/* The SSE subsystems do not wire up a systick refclk */ > + > qdev_prop_set_uint32(cpudev, "num-irq", s->exp_numirq + > NUM_SSE_IRQS); > /* > * In real hardware the initial Secure VTOR is set from the > INITSVTOR* > -- > 2.20.1 > --
Re: [PATCH for-6.2 07/25] armsse: Wire up systick cpuclk clock
On Thu, Aug 12, 2021 at 7:42 PM Peter Maydell wrote: > > Wire up the cpuclk for the systick devices to the SSE object's > existing mainclk clock. > > We do not wire up the refclk because the SSE subsystems do not > provide a refclk. (This is documented in the IoTKit and SSE-200 > TRMs; the SSE-300 TRM doesn't mention it but we assume it follows the > same approach.) When we update the systick device later to honour "no > refclk connected" this will fix a minor emulation inaccuracy for the > SSE-based boards. > > Signed-off-by: Peter Maydell Acked-by: Alistair Francis Alistair > --- > hw/arm/armsse.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c > index a1456cb0f42..70b52c3d4b9 100644 > --- a/hw/arm/armsse.c > +++ b/hw/arm/armsse.c > @@ -995,6 +995,9 @@ static void armsse_realize(DeviceState *dev, Error **errp) > int j; > char *gpioname; > > +qdev_connect_clock_in(cpudev, "cpuclk", s->mainclk); > +/* The SSE subsystems do not wire up a systick refclk */ > + > qdev_prop_set_uint32(cpudev, "num-irq", s->exp_numirq + > NUM_SSE_IRQS); > /* > * In real hardware the initial Secure VTOR is set from the > INITSVTOR* > -- > 2.20.1 > >