Re: [Qemu-devel] [RFC PATCH 1/2] hw/isa/smc37c669-superio: Basic 'Config Registers' implementation

2018-06-14 Thread Paolo Bonzini
On 14/06/2018 23:14, Richard Henderson wrote:
> On 06/14/2018 08:19 AM, Paolo Bonzini wrote:
>> But why isn't the parallel port at 0x378?  That's the expected place on
>> PC (the second parallel port is at 0x278 and the third is at 0x3bc), and
>> I would expect other SuperIO chips to have it there too.  That would be
>> a one line fix.
> 
> Agreed.

FWIW the datasheet says that the base parallel port address is
configurable using the config registers, and can be placed between 0x100
(inclusive) and 0x400 (exclusive), in 4-bytes increments if EPP is
disabled and in 8-byte increments if it is enabled.  Therefore, 0x378
sounds like something that PALcode would probably use.

Paolo



Re: [Qemu-devel] [RFC PATCH 1/2] hw/isa/smc37c669-superio: Basic 'Config Registers' implementation

2018-06-14 Thread Richard Henderson
On 06/14/2018 08:19 AM, Paolo Bonzini wrote:
> But why isn't the parallel port at 0x378?  That's the expected place on
> PC (the second parallel port is at 0x278 and the third is at 0x3bc), and
> I would expect other SuperIO chips to have it there too.  That would be
> a one line fix.

Agreed.


r~



Re: [Qemu-devel] [RFC PATCH 1/2] hw/isa/smc37c669-superio: Basic 'Config Registers' implementation

2018-06-14 Thread Paolo Bonzini
On 14/06/2018 20:01, Philippe Mathieu-Daudé wrote:
> +
> +static Property smc37c669_properties[] = {
> +DEFINE_PROP_UINT32("config", SMC37C669State, config, 0x78889c28),
> +DEFINE_PROP_BIT("parallel", SMC37C669State, config, 8 + 2, true),
> +DEFINE_PROP_END_OF_LIST()
> +};

I would initialize the config word in instance_init rather
than using a property.  Having overlapping properties for the same field
sounds like a recipe for undesired behavior.

But why isn't the parallel port at 0x378?  That's the expected place on
PC (the second parallel port is at 0x278 and the third is at 0x3bc), and
I would expect other SuperIO chips to have it there too.  That would be
a one line fix.

Yet another possibility is to disable EPP on the parallel port, so that
it occupies only the addresses from 0x3bc to 0x3be.

Paolo