RE: [RFC PATCH 00/66] Hexagon patch series
Hi all, I've made the changes from Philippe's review of the patch series. If there is no more feedback, I'll prepare v2 and send it to the list. Thanks, Taylor > -Original Message- > From: Philippe Mathieu-Daudé > Sent: Tuesday, February 11, 2020 9:32 AM > To: Taylor Simpson ; qemu-devel@nongnu.org > Cc: richard.hender...@linaro.org; laur...@vivier.eu; riku.voi...@iki.fi; > aleksandar.m.m...@gmail.com > Subject: Re: [RFC PATCH 00/66] Hexagon patch series > > > Please look at the file scripts/git.orderfile and if possible install it > before your next version (please wait at least 1 week between version, > for a so big series!). This script order files in patch in a way easier > to review by mail.
Re: [RFC PATCH 00/66] Hexagon patch series
Hi Taylor, On 2/11/20 1:39 AM, Taylor Simpson wrote: This series adds support for the Hexagon processor with Linux user support [...]> MAINTAINERS |8 + configure|9 + default-configs/hexagon-linux-user.mak |1 + disas/Makefile.objs |1 + disas/hexagon.c | 56 + include/disas/dis-asm.h |1 + include/elf.h|2 + linux-user/elfload.c | 16 + linux-user/hexagon/cpu_loop.c| 173 ++ linux-user/hexagon/signal.c | 276 ++ linux-user/hexagon/sockbits.h| 18 + linux-user/hexagon/syscall_nr.h | 346 +++ linux-user/hexagon/target_cpu.h | 44 + linux-user/hexagon/target_elf.h | 38 + linux-user/hexagon/target_fcntl.h| 18 + linux-user/hexagon/target_signal.h | 34 + linux-user/hexagon/target_structs.h | 46 + linux-user/hexagon/target_syscall.h | 32 + linux-user/hexagon/termbits.h| 18 + linux-user/syscall.c |2 + linux-user/syscall_defs.h| 33 + scripts/qemu-binfmt-conf.sh |6 +- target/hexagon/Makefile.objs | 109 + target/hexagon/arch.c| 664 + target/hexagon/arch.h| 62 + target/hexagon/attribs.h | 32 + target/hexagon/attribs_def.h | 404 +++ target/hexagon/conv_emu.c| 370 +++ target/hexagon/conv_emu.h| 50 + target/hexagon/cpu-param.h | 26 + target/hexagon/cpu.c | 356 +++ target/hexagon/cpu.h | 207 ++ target/hexagon/cpu_bits.h| 37 + target/hexagon/decode.c | 792 + target/hexagon/decode.h | 39 + target/hexagon/dectree.py| 354 +++ target/hexagon/do_qemu.py| 1198 target/hexagon/fma_emu.c | 918 ++ target/hexagon/fma_emu.h | 30 + target/hexagon/gdbstub.c | 111 + target/hexagon/gen_dectree_import.c | 205 ++ target/hexagon/gen_semantics.c | 101 + target/hexagon/genptr.c | 62 + target/hexagon/genptr.h | 25 + target/hexagon/genptr_helpers.h | 1022 +++ target/hexagon/helper.h | 38 + target/hexagon/helper_overrides.h| 1850 target/hexagon/hex_arch_types.h | 42 + target/hexagon/hex_regs.h| 97 + target/hexagon/iclass.c | 109 + target/hexagon/iclass.h | 46 + target/hexagon/imported/allext.idef | 25 + target/hexagon/imported/allext_macros.def| 25 + target/hexagon/imported/allextenc.def| 20 + target/hexagon/imported/allidefs.def | 92 + target/hexagon/imported/alu.idef | 1335 + target/hexagon/imported/branch.idef | 344 +++ target/hexagon/imported/compare.idef | 639 + target/hexagon/imported/encode.def | 126 + target/hexagon/imported/encode_pp.def| 2283 +++ target/hexagon/imported/encode_subinsn.def | 150 + target/hexagon/imported/float.idef | 498 target/hexagon/imported/iclass.def | 52 + target/hexagon/imported/ldst.idef| 421 +++ target/hexagon/imported/macros.def | 3970 ++ target/hexagon/imported/mmvec/encode_ext.def | 830 ++ target/hexagon/imported/mmvec/ext.idef | 2809 ++ target/hexagon/imported/mmvec/macros.def | 1110 +++ target/hexagon/imported/mpy.idef | 1269 target/hexagon/imported/shift.idef | 1211 target/hexagon/imported/subinsns.idef| 152 + target/hexagon/imported/system.idef | 302 ++ target/hexagon/insn.h| 149 + target/hexagon/internal.h| 54 + target/hexagon/macros.h | 1499 ++ target/hexagon/mmvec/decode_ext_mmvec.c | 673 + target/hexagon/mmvec/decode_ext_mmvec.h | 24 + target/hexagon/mmvec/macros.h| 668 + target/hexagon/mmvec/mmvec.h | 87 + target/hexagon/mmvec/system_ext_mmvec.c | 265 ++ target/hexagon/mmvec/system_ext_mmvec.h | 38 + target/hexagon/op_helper.c | 507 target/hexagon/opcodes.c | 223 ++ target/hexagon/opcodes.h
Re: [RFC PATCH 00/66] Hexagon patch series
On 2/11/20 1:39 AM, Taylor Simpson wrote: This series adds support for the Hexagon processor with Linux user support Hexagon is Qualcomm's very long instruction word (VLIW) digital signal processor(DSP). We also support Hexagon Vector eXtensions (HVX). HVX is a wide vector coprocessor designed for high performance computer vision, image processing, machine learning, and other workloads. This series of patches supports the following versions of the Hexagon core Scalar core: v67 https://developer.qualcomm.com/downloads/qualcomm-hexagon-v67-programmer-s-reference-manual HVX extension: v66 https://developer.qualcomm.com/downloads/qualcomm-hexagon-v66-hvx-programmer-s-reference-manual We presented an overview of the project at the 2019 KVM Forum. https://kvmforum2019.sched.com/event/Tmwc/qemu-hexagon-automatic-translation-of-the-isa-manual-pseudcode-to-tiny-code-instructions-of-a-vliw-architecture-niccolo-izzo-revng-taylor-simpson-qualcomm-innovation-center The patches up to and including "Hexagon build infractructure" implement the base Hexagon core and the remainder add HVX. Once the build infrastructure patch is applied, you can build and qemu will execute non-HVX Hexagon programs. We have a parallel effort to make the Hexagon Linux toolchain publically available. *** Required patches *** In order to build, we need this patch https://lists.nongnu.org/archive/html/qemu-devel/2020-02/msg01203.html In order to run pthread_cancel, we need this patch series https://lists.nongnu.org/archive/html/qemu-devel/2020-02/msg00834.html https://lists.nongnu.org/archive/html/qemu-devel/2020-02/msg00832.html https://lists.nongnu.org/archive/html/qemu-devel/2020-02/msg00833.html https://lists.nongnu.org/archive/html/qemu-devel/2020-02/msg00835.html https://lists.nongnu.org/archive/html/qemu-devel/2020-02/msg00836.html *** Testing *** The port passes the following tests Directed unit tests MUSL libc test suite (good coverage of Linux system calls) Compiler intrinsics test suite (good coverage of instructions) Hexagon machine learning library unit tests Link/references please? make check-tcg TIMEOUT=60 *** Known checkpatch issues *** The following are known checkpatch errors in the series include/disas/dis-asm.h space prohibited (Follow convention of other targets on prior lines) target/hexagon/reg_fields.h Complex macro target/hexagon/attribs.hComplex macro target/hexagon/decode.c Complex macro target/hexagon/q6v_decode.c Macro needs do - while target/hexagon/printinsn.c Macro needs do - while target/hexagon/gen_semantics.c Suspicious ; after while (0) target/hexagon/gen_dectree_import.c Complex macro target/hexagon/gen_dectree_import.c Suspicious ; after while (0) target/hexagon/opcodes.cComplex macro target/hexagon/iclass.h Complex macro scripts/qemu-binfmt-conf.sh Line over 90 characters target/hexagon/mmvec/macros.h Suspicious ; after while (0) The following are known checkpatch warnings in the series target/hexagon/fma_emu.cComments inside macro definition scripts/qemu-binfmt-conf.sh Line over 80 characters *** Tour of the code *** The qemu-hexagon implementation is a combination of qemu and the Hexagon architecture library (aka archlib). The three primary directories with Hexagon-specific code are qemu/target/hexagon This has all the instruction and packet semantics qemu/target/hexagon/imported These files are imported with very little modification from archlib *.idef Instruction semantics definition macros.def Mapping of macros to instruction attributes encode*.def Encoding patterns for each instruction iclass.def Instruction class definitions used to determine legal VLIW slots for each instruction qemu/linux-user/hexagon Helpers for loading the ELF file and making Linux system calls, signals, etc We start with a script that generates qemu helper for each instruction. This is a two step process. The first step is to use the C preprocessor to expand macros inside the architecture definition files. This is done in target/hexagon/semantics.c. This step produces /hexagon-linux-user/semantics_generated.pyinc. That file is consumed by the do_qemu.py script. This script generates several files. All of the generated files end in "_generated.*". The primary file produced is /hexagon-linux-user/qemu_def_generated.h Qemu helper functions have 3 parts DEF_HELPER declaration indicates the signature of the helper gen_helper_ will generate a TCG call to the helper function The helper implementation In the
Re: [RFC PATCH 00/66] Hexagon patch series
On 2/11/20 2:31 AM, no-re...@patchew.org wrote: Patchew URL: https://patchew.org/QEMU/1581381644-13678-1-git-send-email-tsimp...@quicinc.com/ Hi, This series seems to have some coding style problems. See output below for more information: [...]> ERROR: please use python3 interpreter #21: FILE: target/hexagon/do_qemu.py:1: +#!/usr/bin/env python Yay my Perl fu worked \o/ total: 1 errors, 1 warnings, 773 lines checked Patch 21/66 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 22/66 Checking commit 38aac214033b (Hexagon generator phase 2 - qemu_wrap_generated.h) 23/66 Checking commit 55b2d7ee57f9 (Hexagon generator phase 2 - opcodes_def_generated.h) 24/66 Checking commit c200b920adee (Hexagon generator phase 2 - op_attribs_generated.h) 25/66 Checking commit f0262c416b0e (Hexagon generator phase 2 - op_regs_generated.h) 26/66 Checking commit a25a1a5fb267 (Hexagon generator phase 2 - printinsn-generated.h) 27/66 Checking commit 3d4364b80632 (Hexagon generator phase 3 - C preprocessor for decode tree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #15: new file mode 100644 ERROR: Macros with complex values should be enclosed in parenthesis #82: FILE: target/hexagon/gen_dectree_import.c:63: +#define REGINFO(TAG, REGINFO, RREGS, WREGS) RREGS, ERROR: Macros with complex values should be enclosed in parenthesis #91: FILE: target/hexagon/gen_dectree_import.c:72: +#define REGINFO(TAG, REGINFO, RREGS, WREGS) WREGS, ERROR: suspicious ; after while (0) #196: FILE: target/hexagon/gen_dectree_import.c:177: +} while (0); total: 3 errors, 1 warnings, 205 lines checked Patch 27/66 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 28/66 Checking commit 38f354878e1b (Hexagon generater phase 4 - Decode tree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #13: new file mode 100755 ERROR: please use python3 interpreter #18: FILE: target/hexagon/dectree.py:1: +#!/usr/bin/env python total: 1 errors, 1 warnings, 354 lines checked [...]
Re: [RFC PATCH 00/66] Hexagon patch series
Patchew URL:
https://patchew.org/QEMU/1581381644-13678-1-git-send-email-tsimp...@quicinc.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [RFC PATCH 00/66] Hexagon patch series
Message-id: 1581381644-13678-1-git-send-email-tsimp...@quicinc.com
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
From https://github.com/patchew-project/qemu
* [new tag]
patchew/1581381644-13678-1-git-send-email-tsimp...@quicinc.com ->
patchew/1581381644-13678-1-git-send-email-tsimp...@quicinc.com
Switched to a new branch 'test'
7a2b354 Hexagon HVX build infrastructure
f445784 Hexagon HVX translation
876116c Hexagon HVX TCG generation
e77505e Hexagon HVX helper to commit vector stores (masked and scatter/gather)
dc23a1c Hexagon HVX macros referenced in instruction semantics
cc6be78 Hexagon HVX macros to interface with the generator
22f408f Hexagon HVX instruction utility functions
3d4f56a Hexagon HVX instruction decoding
40ec295 Hexagon HVX semantics generator
9c5c895 Hexagon HVX import macro definitions
92dce5d Hexagon HVX import semantics
ffcca92 Hexagon HVX import instruction encodings
d5ebf14 Hexagon HVX support in gdbstub
df47f64 Hexagon - Add Hexagon Vector eXtensions (HVX) to core definition
86f9dd7 Hexagon build infrastructure
4a0112d Hexagon Linux user emulation
b272b70 Hexagon translation
8bfe3f2 Hexagon TCG generation - step 12
03465b3 Hexagon TCG generation - step 11
bca0e86 Hexagon TCG generation - step 10
3d5e67f Hexagon TCG generation - step 09
f382bf5 Hexagon TCG generation - step 08
5ce4437 Hexagon TCG generation - step 07
9d340b5 Hexagon TCG generation - step 06
9d2028e Hexagon TCG generation - step 05
42b2388 Hexagon TCG generation - step 04
cdca413 Hexagon TCG generation - step 03
8841a20 Hexagon TCG generation - step 02
0e7ecc9 Hexagon TCG generation - step 01
efc508d Hexagon TCG generation helpers - step 5
4860b36 Hexagon TCG generation helpers - step 4
bac1a49 Hexagon TCG generation helpers - step 3
803f77c Hexagon TCG generation helpers - step 2
8b842c6 Hexagon TCG generation helpers - step 1
6c5d03d Hexagon instruction classes
21cb791 Hexagon macros referenced in instruction semantics
c26cc78 Hexagon macros to interface with the generator
a9c1282 Hexagon opcode data structures
38f3548 Hexagon generater phase 4 - Decode tree
3d4364b Hexagon generator phase 3 - C preprocessor for decode tree
a25a1a5 Hexagon generator phase 2 - printinsn-generated.h
f0262c4 Hexagon generator phase 2 - op_regs_generated.h
c200b92 Hexagon generator phase 2 - op_attribs_generated.h
55b2d7e Hexagon generator phase 2 - opcodes_def_generated.h
38aac21 Hexagon generator phase 2 - qemu_wrap_generated.h
2c859f2 Hexagon generator phase 2 - qemu_def_generated.h
e149804 Hexagon generator phase 1 - C preprocessor for semantics
2a9b0de Hexagon instruction utility functions
6d20bd9 Hexagon instruction class definitions
9510854 Hexagon arch import - instruction encoding
0b9bf23 Hexagon arch import - macro definitions
53dc5e2 Hexagon arch import - instruction semantics definitions
b8b3fc7 Hexagon instruction printing
4f5c5b2 Hexagon instruction/packet decode
7ec0047 Hexagon register map
2b98b28 Hexagon instruction attributes
d22b29a Hexagon register fields
86ce4af Hexagon architecture types
ea357b9 Hexagon instruction and packet types
c0d62e7 Hexagon GDB Stub
8fdc6fa Hexagon CPU Scalar Core Helpers
edc29eb Hexagon Disassembler
d909607 Hexagon register names
10b1312 Hexagon CPU Scalar Core Definition
52e9d22 Hexagon ELF Machine Definition
950dc7d Hexagon Maintainers
=== OUTPUT BEGIN ===
1/66 Checking commit 950dc7d420ac (Hexagon Maintainers)
2/66 Checking commit 52e9d224e833 (Hexagon ELF Machine Definition)
3/66 Checking commit 10b1312bed65 (Hexagon CPU Scalar Core Definition)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#13:
new file mode 100644
total: 0 errors, 1 warnings, 584 lines checked
Patch 3/66 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
4/66 Checking commit d9096078a0ab (Hexagon register names)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#11:
new file mode 100644
total: 0 errors, 1 warnings, 97 lines checked
Patch 4/66 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
5/66 Checking commit edc29ebfa061 (Hexagon Disassembler)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#26:
new file mode 100644
ERROR: space prohibited between function name and open parenthesis '('
#95: FILE: include/disas/dis-asm.h:439:
+int print_insn_hexagon (bfd_vma,
