Re: [Qemu-devel] [PATCH_v2 0/9] target-openrisc: Corrections and speed improvements
Hi Sebastian, On Mon, Oct 28, 2013 at 9:56 AM, Sebastian Macke sebast...@macke.de wrote: On 25/10/2013 5:21 PM, Jia Liu wrote: On Fri, Oct 25, 2013 at 7:23 AM, Sebastian Macke sebast...@macke.de wrote: On 22/10/2013 8:47 PM, Jia Liu wrote: Hi Sebastian, On Tue, Oct 22, 2013 at 8:12 AM, Sebastian Macke sebast...@macke.de wrote: This series is the first part to make the OpenRISC target more reliable and faster. It corrects several severe problems which prevented the OpenRISC emulation for being useful in the past. The patchset was tested with - the tests/tcg/openrisc tests - booting Linux 3.11 - run configure + make + gcc of a simple terminal graphic demo called cmatrix - run benchmark tool nbench in qemu-user mode and in the softmmu mode The speed improvement is less than 10% because the overhead is still to high as the openrisc target does not support translation block chaining. This will be included in one of the future patches. Only the patch which removes the npc and ppc variables removes a little feature from the OpenRISC target but which does not break the specification and will lead to a significant speed improvement. For v2 0/9 - 9/9 Acked-by: Jia Liu pro...@gmail.com I'll add some comment into the code to explain why we separate flags from sr and send a pull request if nobody raise a rejection. Ok great, the next bunch of patches is already in development. Then, I'll make one pull request when you finish all you jobs, please let me know when you finish your last work, is it OK? Ok, do you want me to send then all patches including the old ones together in one patchset? At the moment this are 19 patches. Your call. Keep in mind that the new patches will change much more. And maybe there will be discussions of some decisions I made. But I promise also a speed increase of a factor of 7-10 :) When you summit a patch, I'll be always there :) Sebastian Macke (9): target-openrisc: Speed up move instruction target-openrisc: Remove unnecessary code generated by jump instructions target-openrisc: Remove executable flag for every page target-openrisc: Correct wrong epcr register in interrupt handler openrisc-timer: Reduce overhead, Separate clock update functions target-openrisc: Correct memory bounds checking for the tlb buffers target-openrisc: Separate branch flag from Supervision register target-openrisc: Complete remove of npc and ppc variables target-openrisc: Correct carry flag check of l.addc and l.addic test cases hw/openrisc/cputimer.c | 29 -- target-openrisc/cpu.c | 1 + target-openrisc/cpu.h | 16 ++- target-openrisc/gdbstub.c | 20 +--- target-openrisc/interrupt.c| 27 ++--- target-openrisc/interrupt_helper.c | 3 +- target-openrisc/machine.c | 3 +- target-openrisc/mmu.c | 4 +- target-openrisc/sys_helper.c | 74 ++ target-openrisc/translate.c| 201 - tests/tcg/openrisc/test_addc.c | 8 +- tests/tcg/openrisc/test_addic.c| 10 +- 12 files changed, 175 insertions(+), 221 deletions(-) -- 1.8.4.1 Regards, Jia
[Qemu-devel] There are two distinct qdevs named TYPE_OPENPROM
sun4m.c and sun4u.c both define a qdev named TYPE_OPENPROM. As far as I can tell, they differ only in the name of their memory region. If they ever get linked into the same executable, type_register_internal() will reject the second one. But they aren't, so this isn't a bug. Is it bad style?
Re: [Qemu-devel] [PATCH V9 00/11] Quorum block driver
Le Friday 04 Oct 2013 à 16:31:56 (+0200), Max Reitz a écrit : On 2013-10-02 14:39, Benoît Canet wrote: It must be applied on top of block: Add BlockDriver.bdrv_check_ext_snapshot. This patchset create a block driver implementing a quorum using total qemu disk images. Writes are mirrored on the $total files. For the reading part the $total files are read at the same time and a vote is done to determine if a qiov version is present $threshold or more times. It then return this majority version to the upper layers. When i $threshold versions of the data are returned by the lower layer the quorum is broken and the read return -EIO. The goal of this patchset is to be turned in a QEMU block filter living just above raw-*.c and below qcow2/qed when the required infrastructure will be done. Main use of this feature will be people using NFS appliances which can be subjected to bitflip errors. This patchset can be used to replace blkverify and the out of tree blkmirror. v9: integrate latests comments from kevin Benoît Canet (11): quorum: Create quorum.c, add QuorumSingleAIOCB and QuorumAIOCB. quorum: Create BDRVQuorumState and BlkDriver and do init. quorum: Add quorum_aio_writev and its dependencies. blkverify: Extract qemu_iovec_clone() and qemu_iovec_compare() from blkverify. quorum: Add quorum_aio_readv. quorum: Add quorum mechanism. quorum: Add quorum_getlength(). quorum: Add quorum_invalidate_cache(). quorum: Add quorum_co_get_block_status. quorum: Add quorum_co_flush(). quorum: Add quorum_open() and quorum_close(). block/Makefile.objs |1 + block/blkverify.c | 108 + block/quorum.c| 1035 + configure | 36 ++ include/monitor/monitor.h |2 + include/qemu-common.h |2 + monitor.c |2 + util/iov.c| 103 + 8 files changed, 1183 insertions(+), 106 deletions(-) create mode 100644 block/quorum.c Could you add a qemu-iotest if possible? I don't see how to specify quorum to qemu-io for bytes checking. Best regards Benoît Max
Re: [Qemu-devel] [PATCH] cpu-exec: Fix compiler warning (-Werror=clobbered)
On 2013-10-28 20:18, Stefan Weil wrote: Am 18.09.2013 09:48, schrieb Jan Kiszka: On 2013-09-18 09:26, Peter Maydell wrote: [...] And gcc's documentation of the 'noreturn' attribute specifically says it does not affect the exceptional path where the function returns via longjmp. OK, that is the clarifying bit of information. Now the question is if want to drop support for faulty compilers again, work around the false-positive warning, or avoid the issue differently than via reloading. Jan Recently commit 6c78f29a2424622bfc9c30dfbbc13404481eacb6 added a third variable which is reloaded now. Obviously the clang compiler needs this workaround. Jan, can you remember whether the initial problems were also caused by clang? If yes, we might restrict the code to that compiler. This would avoid the -Wclobbered warnings with newer gcc while still fixing the code generated by clang. Look up this thread: gcc 4.5.0 Jan signature.asc Description: OpenPGP digital signature
[Qemu-devel] [PATCH 0/2] sheepdog: add user-defined redundancy option
This patch set add one sheepdog specific option for qemu-img to control redundancy. This patch set is on top of Kevin's block tree. Liu Yuan (2): sheepdog: refactor do_sd_create() sheepdog: support user-defined redundancy option block/sheepdog.c | 110 +++-- include/block/block_int.h |1 + 2 files changed, 88 insertions(+), 23 deletions(-) -- 1.7.9.5
[Qemu-devel] [PATCH 1/2] sheepdog: refactor do_sd_create()
We can actually use BDRVSheepdogState *s to pass most of the parameters.
Cc: Kevin Wolf kw...@redhat.com
Cc: Stefan Hajnoczi stefa...@redhat.com
Signed-off-by: Liu Yuan namei.u...@gmail.com
---
block/sheepdog.c | 37 +++--
1 file changed, 15 insertions(+), 22 deletions(-)
diff --git a/block/sheepdog.c b/block/sheepdog.c
index 9f0757b..e66d2f8 100644
--- a/block/sheepdog.c
+++ b/block/sheepdog.c
@@ -1348,9 +1348,7 @@ out:
return ret;
}
-static int do_sd_create(BDRVSheepdogState *s, char *filename, int64_t vdi_size,
-uint32_t base_vid, uint32_t *vdi_id, int snapshot,
-uint8_t copy_policy)
+static int do_sd_create(BDRVSheepdogState *s, uint32_t *vdi_id, int snapshot)
{
SheepdogVdiReq hdr;
SheepdogVdiRsp *rsp = (SheepdogVdiRsp *)hdr;
@@ -1367,11 +1365,11 @@ static int do_sd_create(BDRVSheepdogState *s, char
*filename, int64_t vdi_size,
* does not fit in buf? For now, just truncate and avoid buffer overrun.
*/
memset(buf, 0, sizeof(buf));
-pstrcpy(buf, sizeof(buf), filename);
+pstrcpy(buf, sizeof(buf), s-name);
memset(hdr, 0, sizeof(hdr));
hdr.opcode = SD_OP_NEW_VDI;
-hdr.vdi_id = base_vid;
+hdr.vdi_id = s-inode.vdi_id;
wlen = SD_MAX_VDI_LEN;
@@ -1379,8 +1377,8 @@ static int do_sd_create(BDRVSheepdogState *s, char
*filename, int64_t vdi_size,
hdr.snapid = snapshot;
hdr.data_length = wlen;
-hdr.vdi_size = vdi_size;
-hdr.copy_policy = copy_policy;
+hdr.vdi_size = s-inode.vdi_size;
+hdr.copy_policy = s-inode.copy_policy;
ret = do_req(fd, (SheepdogReq *)hdr, buf, wlen, rlen);
@@ -1391,7 +1389,7 @@ static int do_sd_create(BDRVSheepdogState *s, char
*filename, int64_t vdi_size,
}
if (rsp-result != SD_RES_SUCCESS) {
-error_report(%s, %s, sd_strerror(rsp-result), filename);
+error_report(%s, %s, sd_strerror(rsp-result), s-inode.name);
return -EIO;
}
@@ -1452,23 +1450,21 @@ static int sd_create(const char *filename,
QEMUOptionParameter *options,
Error **errp)
{
int ret = 0;
-uint32_t vid = 0, base_vid = 0;
-int64_t vdi_size = 0;
+uint32_t vid = 0;
char *backing_file = NULL;
BDRVSheepdogState *s;
-char vdi[SD_MAX_VDI_LEN], tag[SD_MAX_VDI_TAG_LEN];
+char tag[SD_MAX_VDI_TAG_LEN];
uint32_t snapid;
bool prealloc = false;
Error *local_err = NULL;
s = g_malloc0(sizeof(BDRVSheepdogState));
-memset(vdi, 0, sizeof(vdi));
memset(tag, 0, sizeof(tag));
if (strstr(filename, ://)) {
-ret = sd_parse_uri(s, filename, vdi, snapid, tag);
+ret = sd_parse_uri(s, filename, s-name, snapid, tag);
} else {
-ret = parse_vdiname(s, filename, vdi, snapid, tag);
+ret = parse_vdiname(s, filename, s-name, snapid, tag);
}
if (ret 0) {
goto out;
@@ -1476,7 +1472,7 @@ static int sd_create(const char *filename,
QEMUOptionParameter *options,
while (options options-name) {
if (!strcmp(options-name, BLOCK_OPT_SIZE)) {
-vdi_size = options-value.n;
+s-inode.vdi_size = options-value.n;
} else if (!strcmp(options-name, BLOCK_OPT_BACKING_FILE)) {
backing_file = options-value.s;
} else if (!strcmp(options-name, BLOCK_OPT_PREALLOC)) {
@@ -1494,7 +1490,7 @@ static int sd_create(const char *filename,
QEMUOptionParameter *options,
options++;
}
-if (vdi_size SD_MAX_VDI_SIZE) {
+if (s-inode.vdi_size SD_MAX_VDI_SIZE) {
error_report(too big image size);
ret = -EINVAL;
goto out;
@@ -1529,12 +1525,11 @@ static int sd_create(const char *filename,
QEMUOptionParameter *options,
goto out;
}
-base_vid = s-inode.vdi_id;
bdrv_unref(bs);
}
/* TODO: allow users to specify copy number */
-ret = do_sd_create(s, vdi, vdi_size, base_vid, vid, 0, 0);
+ret = do_sd_create(s, vid, 0);
if (!prealloc || ret) {
goto out;
}
@@ -1723,8 +1718,7 @@ static int sd_create_branch(BDRVSheepdogState *s)
* false bail out.
*/
deleted = sd_delete(s);
-ret = do_sd_create(s, s-name, s-inode.vdi_size, s-inode.vdi_id, vid,
- !deleted, s-inode.copy_policy);
+ret = do_sd_create(s, vid, !deleted);
if (ret) {
goto out;
}
@@ -2013,8 +2007,7 @@ static int sd_snapshot_create(BlockDriverState *bs,
QEMUSnapshotInfo *sn_info)
goto cleanup;
}
-ret = do_sd_create(s, s-name, s-inode.vdi_size, s-inode.vdi_id,
new_vid,
- 1, s-inode.copy_policy);
+ret = do_sd_create(s, new_vid, 1);
if (ret 0) {
error_report(failed to create inode for snapshot. %s,
strerror(errno));
--
1.7.9.5
[Qemu-devel] [PATCH] sheepdog: support user-defined redundancy option
Sheepdog support two kinds od redundancy, full replication and erasure coding.
# create a fully replicated vdi with x copies
-o redundancy=x (1 = x = SD_MAX_COPIES)
# create a erasure coded vdi with x data strips and y parity strips
-o redundancy=x:y (x must be one of {2,4,8,16} and 1 = y SD_EC_MAX_STRIP)
E.g, to convert a vdi into sheepdog vdi 'test' with 8:3 erasure coding scheme
$ qemu-img convert -o redundancy=8:3 linux-0.2.img sheepdog:test
Cc: Kevin Wolf kw...@redhat.com
Cc: Stefan Hajnoczi stefa...@redhat.com
Signed-off-by: Liu Yuan namei.u...@gmail.com
---
block/sheepdog.c | 78 -
include/block/block_int.h |1 +
2 files changed, 78 insertions(+), 1 deletion(-)
diff --git a/block/sheepdog.c b/block/sheepdog.c
index e66d2f8..c7ea517 100644
--- a/block/sheepdog.c
+++ b/block/sheepdog.c
@@ -91,6 +91,14 @@
#define SD_NR_VDIS (1U 24)
#define SD_DATA_OBJ_SIZE (UINT64_C(1) 22)
#define SD_MAX_VDI_SIZE (SD_DATA_OBJ_SIZE * MAX_DATA_OBJS)
+/*
+ * For erasure coding, we use at most SD_EC_MAX_STRIP for data strips and
+ * (SD_EC_MAX_STRIP - 1) for parity strips
+ *
+ * SD_MAX_COPIES is sum of number of dats trips and parity strips.
+ */
+#define SD_EC_MAX_STRIP 16
+#define SD_MAX_COPIES (SD_EC_MAX_STRIP * 2 - 1)
#define SD_INODE_SIZE (sizeof(SheepdogInode))
#define CURRENT_VDI_ID 0
@@ -1446,6 +1454,65 @@ out:
return ret;
}
+static int64_t is_numeric(const char *s)
+{
+char *end;
+return strtosz_suffix(s, end, STRTOSZ_DEFSUFFIX_B);
+}
+
+/*
+ * Sheepdog support two kinds od redundancy, full replication and erasure
+ * coding.
+ *
+ * # create a fully replicated vdi with x copies
+ * -o redundancy=x (1 = x = SD_MAX_COPIES)
+ *
+ * # create a erasure coded vdi with x data strips and y parity strips
+ * -o redundancy=x:y (x must be one of {2,4,8,16} and 1 = y SD_EC_MAX_STRIP)
+ */
+static int parse_redundancy(BDRVSheepdogState *s, const char *opt)
+{
+struct SheepdogInode *inode = s-inode;
+const char *n1, *n2;
+uint8_t copy, parity;
+char p[10];
+
+strncpy(p, opt, sizeof(p));
+n1 = strtok(p, :);
+n2 = strtok(NULL, :);
+
+if ((n1 !is_numeric(n1)) || (n2 !is_numeric(n2))) {
+return -EINVAL;
+}
+
+copy = strtol(n1, NULL, 10);
+if (copy SD_MAX_COPIES) {
+return -EINVAL;
+}
+if (!n2) {
+inode-copy_policy = 0;
+inode-nr_copies = copy;
+}
+
+if (copy != 2 copy != 4 copy != 8 copy != 16) {
+return -EINVAL;
+}
+
+parity = strtol(n2, NULL, 10);
+if (parity = SD_EC_MAX_STRIP || parity == 0) {
+return -EINVAL;
+}
+
+/*
+ * 4 bits for parity and 4 bits for data.
+ * We have to compress upper data bits because it can't represent 16
+ */
+inode-copy_policy = ((copy / 2) 4) + parity;
+inode-nr_copies = copy + parity;
+
+return 0;
+}
+
static int sd_create(const char *filename, QEMUOptionParameter *options,
Error **errp)
{
@@ -1486,6 +1553,11 @@ static int sd_create(const char *filename,
QEMUOptionParameter *options,
ret = -EINVAL;
goto out;
}
+} else if (!strcmp(options-name, BLOCK_OPT_REDUNDANCY)) {
+ret = parse_redundancy(s, options-value.s);
+if (ret 0) {
+goto out;
+}
}
options++;
}
@@ -1528,7 +1600,6 @@ static int sd_create(const char *filename,
QEMUOptionParameter *options,
bdrv_unref(bs);
}
-/* TODO: allow users to specify copy number */
ret = do_sd_create(s, vid, 0);
if (!prealloc || ret) {
goto out;
@@ -2332,6 +2403,11 @@ static QEMUOptionParameter sd_create_options[] = {
.type = OPT_STRING,
.help = Preallocation mode (allowed values: off, full)
},
+{
+.name = BLOCK_OPT_REDUNDANCY,
+.type = OPT_STRING,
+.help = Redundancy of the image
+},
{ NULL }
};
diff --git a/include/block/block_int.h b/include/block/block_int.h
index a48731d..b90862f 100644
--- a/include/block/block_int.h
+++ b/include/block/block_int.h
@@ -53,6 +53,7 @@
#define BLOCK_OPT_COMPAT_LEVEL compat
#define BLOCK_OPT_LAZY_REFCOUNTSlazy_refcounts
#define BLOCK_OPT_ADAPTER_TYPE adapter_type
+#define BLOCK_OPT_REDUNDANCYredundancy
typedef struct BdrvTrackedRequest {
BlockDriverState *bs;
--
1.7.9.5
[Qemu-devel] [PATCH v2 2/2] sheepdog: refactor do_sd_create()
We can actually use BDRVSheepdogState *s to pass most of the parameters.
Cc: Kevin Wolf kw...@redhat.com
Cc: Stefan Hajnoczi stefa...@redhat.com
Signed-off-by: Liu Yuan namei.u...@gmail.com
---
block/sheepdog.c | 37 +++--
1 file changed, 15 insertions(+), 22 deletions(-)
diff --git a/block/sheepdog.c b/block/sheepdog.c
index 9f0757b..e66d2f8 100644
--- a/block/sheepdog.c
+++ b/block/sheepdog.c
@@ -1348,9 +1348,7 @@ out:
return ret;
}
-static int do_sd_create(BDRVSheepdogState *s, char *filename, int64_t vdi_size,
-uint32_t base_vid, uint32_t *vdi_id, int snapshot,
-uint8_t copy_policy)
+static int do_sd_create(BDRVSheepdogState *s, uint32_t *vdi_id, int snapshot)
{
SheepdogVdiReq hdr;
SheepdogVdiRsp *rsp = (SheepdogVdiRsp *)hdr;
@@ -1367,11 +1365,11 @@ static int do_sd_create(BDRVSheepdogState *s, char
*filename, int64_t vdi_size,
* does not fit in buf? For now, just truncate and avoid buffer overrun.
*/
memset(buf, 0, sizeof(buf));
-pstrcpy(buf, sizeof(buf), filename);
+pstrcpy(buf, sizeof(buf), s-name);
memset(hdr, 0, sizeof(hdr));
hdr.opcode = SD_OP_NEW_VDI;
-hdr.vdi_id = base_vid;
+hdr.vdi_id = s-inode.vdi_id;
wlen = SD_MAX_VDI_LEN;
@@ -1379,8 +1377,8 @@ static int do_sd_create(BDRVSheepdogState *s, char
*filename, int64_t vdi_size,
hdr.snapid = snapshot;
hdr.data_length = wlen;
-hdr.vdi_size = vdi_size;
-hdr.copy_policy = copy_policy;
+hdr.vdi_size = s-inode.vdi_size;
+hdr.copy_policy = s-inode.copy_policy;
ret = do_req(fd, (SheepdogReq *)hdr, buf, wlen, rlen);
@@ -1391,7 +1389,7 @@ static int do_sd_create(BDRVSheepdogState *s, char
*filename, int64_t vdi_size,
}
if (rsp-result != SD_RES_SUCCESS) {
-error_report(%s, %s, sd_strerror(rsp-result), filename);
+error_report(%s, %s, sd_strerror(rsp-result), s-inode.name);
return -EIO;
}
@@ -1452,23 +1450,21 @@ static int sd_create(const char *filename,
QEMUOptionParameter *options,
Error **errp)
{
int ret = 0;
-uint32_t vid = 0, base_vid = 0;
-int64_t vdi_size = 0;
+uint32_t vid = 0;
char *backing_file = NULL;
BDRVSheepdogState *s;
-char vdi[SD_MAX_VDI_LEN], tag[SD_MAX_VDI_TAG_LEN];
+char tag[SD_MAX_VDI_TAG_LEN];
uint32_t snapid;
bool prealloc = false;
Error *local_err = NULL;
s = g_malloc0(sizeof(BDRVSheepdogState));
-memset(vdi, 0, sizeof(vdi));
memset(tag, 0, sizeof(tag));
if (strstr(filename, ://)) {
-ret = sd_parse_uri(s, filename, vdi, snapid, tag);
+ret = sd_parse_uri(s, filename, s-name, snapid, tag);
} else {
-ret = parse_vdiname(s, filename, vdi, snapid, tag);
+ret = parse_vdiname(s, filename, s-name, snapid, tag);
}
if (ret 0) {
goto out;
@@ -1476,7 +1472,7 @@ static int sd_create(const char *filename,
QEMUOptionParameter *options,
while (options options-name) {
if (!strcmp(options-name, BLOCK_OPT_SIZE)) {
-vdi_size = options-value.n;
+s-inode.vdi_size = options-value.n;
} else if (!strcmp(options-name, BLOCK_OPT_BACKING_FILE)) {
backing_file = options-value.s;
} else if (!strcmp(options-name, BLOCK_OPT_PREALLOC)) {
@@ -1494,7 +1490,7 @@ static int sd_create(const char *filename,
QEMUOptionParameter *options,
options++;
}
-if (vdi_size SD_MAX_VDI_SIZE) {
+if (s-inode.vdi_size SD_MAX_VDI_SIZE) {
error_report(too big image size);
ret = -EINVAL;
goto out;
@@ -1529,12 +1525,11 @@ static int sd_create(const char *filename,
QEMUOptionParameter *options,
goto out;
}
-base_vid = s-inode.vdi_id;
bdrv_unref(bs);
}
/* TODO: allow users to specify copy number */
-ret = do_sd_create(s, vdi, vdi_size, base_vid, vid, 0, 0);
+ret = do_sd_create(s, vid, 0);
if (!prealloc || ret) {
goto out;
}
@@ -1723,8 +1718,7 @@ static int sd_create_branch(BDRVSheepdogState *s)
* false bail out.
*/
deleted = sd_delete(s);
-ret = do_sd_create(s, s-name, s-inode.vdi_size, s-inode.vdi_id, vid,
- !deleted, s-inode.copy_policy);
+ret = do_sd_create(s, vid, !deleted);
if (ret) {
goto out;
}
@@ -2013,8 +2007,7 @@ static int sd_snapshot_create(BlockDriverState *bs,
QEMUSnapshotInfo *sn_info)
goto cleanup;
}
-ret = do_sd_create(s, s-name, s-inode.vdi_size, s-inode.vdi_id,
new_vid,
- 1, s-inode.copy_policy);
+ret = do_sd_create(s, new_vid, 1);
if (ret 0) {
error_report(failed to create inode for snapshot. %s,
strerror(errno));
--
1.7.9.5
[Qemu-devel] [PATCH v2 0/2] sheepdog: add user-defined redundancy option
v2: - fix a typo in comment and commit log This patch set add one sheepdog specific option for qemu-img to control redundancy. This patch set is on top of Kevin's block tree. Liu Yuan (2): sheepdog: pass copy_policy in the request sheepdog: refactor do_sd_create() block/sheepdog.c | 45 ++--- 1 file changed, 22 insertions(+), 23 deletions(-) -- 1.7.9.5
[Qemu-devel] [PATCH v2 1/2] sheepdog: pass copy_policy in the request
Currently copy_policy isn't used. Recent sheepdog supports erasure coding, which
make use of copy_policy internally, but require client explicitly passing
copy_policy from base inode to newly creately inode for snapshot related
operations.
If connected sheep daemon doesn't utilize copy_policy, passing it to sheep
daemon is just one extra null effect operation. So no compatibility problem.
With this patch, sheepdog can provide erasure coded volume for QEMU VM.
Cc: Kevin Wolf kw...@redhat.com
Cc: Stefan Hajnoczi stefa...@redhat.com
Signed-off-by: Liu Yuan namei.u...@gmail.com
---
block/sheepdog.c | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/block/sheepdog.c b/block/sheepdog.c
index b8a2985..9f0757b 100644
--- a/block/sheepdog.c
+++ b/block/sheepdog.c
@@ -126,7 +126,8 @@ typedef struct SheepdogObjReq {
uint64_t oid;
uint64_t cow_oid;
uint8_t copies;
-uint8_t reserved[7];
+uint8_t copy_policy;
+uint8_t reserved[6];
uint64_t offset;
} SheepdogObjReq;
@@ -139,7 +140,8 @@ typedef struct SheepdogObjRsp {
uint32_t data_length;
uint32_t result;
uint8_t copies;
-uint8_t reserved[3];
+uint8_t copy_policy;
+uint8_t reserved[2];
uint32_t pad[6];
} SheepdogObjRsp;
@@ -153,7 +155,8 @@ typedef struct SheepdogVdiReq {
uint64_t vdi_size;
uint32_t vdi_id;
uint8_t copies;
-uint8_t reserved[3];
+uint8_t copy_policy;
+uint8_t reserved[2];
uint32_t snapid;
uint32_t pad[3];
} SheepdogVdiReq;
@@ -1346,7 +1349,8 @@ out:
}
static int do_sd_create(BDRVSheepdogState *s, char *filename, int64_t vdi_size,
-uint32_t base_vid, uint32_t *vdi_id, int snapshot)
+uint32_t base_vid, uint32_t *vdi_id, int snapshot,
+uint8_t copy_policy)
{
SheepdogVdiReq hdr;
SheepdogVdiRsp *rsp = (SheepdogVdiRsp *)hdr;
@@ -1376,6 +1380,7 @@ static int do_sd_create(BDRVSheepdogState *s, char
*filename, int64_t vdi_size,
hdr.data_length = wlen;
hdr.vdi_size = vdi_size;
+hdr.copy_policy = copy_policy;
ret = do_req(fd, (SheepdogReq *)hdr, buf, wlen, rlen);
@@ -1528,7 +1533,8 @@ static int sd_create(const char *filename,
QEMUOptionParameter *options,
bdrv_unref(bs);
}
-ret = do_sd_create(s, vdi, vdi_size, base_vid, vid, 0);
+/* TODO: allow users to specify copy number */
+ret = do_sd_create(s, vdi, vdi_size, base_vid, vid, 0, 0);
if (!prealloc || ret) {
goto out;
}
@@ -1718,7 +1724,7 @@ static int sd_create_branch(BDRVSheepdogState *s)
*/
deleted = sd_delete(s);
ret = do_sd_create(s, s-name, s-inode.vdi_size, s-inode.vdi_id, vid,
- !deleted);
+ !deleted, s-inode.copy_policy);
if (ret) {
goto out;
}
@@ -2008,7 +2014,7 @@ static int sd_snapshot_create(BlockDriverState *bs,
QEMUSnapshotInfo *sn_info)
}
ret = do_sd_create(s, s-name, s-inode.vdi_size, s-inode.vdi_id,
new_vid,
- 1);
+ 1, s-inode.copy_policy);
if (ret 0) {
error_report(failed to create inode for snapshot. %s,
strerror(errno));
--
1.7.9.5
Re: [Qemu-devel] [PATCH v2 0/2] sheepdog: add user-defined redundancy option
On Tue, Oct 29, 2013 at 04:23:33PM +0800, Liu Yuan wrote: v2: - fix a typo in comment and commit log This patch set add one sheepdog specific option for qemu-img to control redundancy. This patch set is on top of Kevin's block tree. Oops, please ignore this patch set because I formated the wrong patch. Thanks Yuan
[Qemu-devel] [PATCH v2 1/2] sheepdog: refactor do_sd_create()
We can actually use BDRVSheepdogState *s to pass most of the parameters.
Cc: Kevin Wolf kw...@redhat.com
Cc: Stefan Hajnoczi stefa...@redhat.com
Signed-off-by: Liu Yuan namei.u...@gmail.com
---
block/sheepdog.c | 37 +++--
1 file changed, 15 insertions(+), 22 deletions(-)
diff --git a/block/sheepdog.c b/block/sheepdog.c
index 9f0757b..e66d2f8 100644
--- a/block/sheepdog.c
+++ b/block/sheepdog.c
@@ -1348,9 +1348,7 @@ out:
return ret;
}
-static int do_sd_create(BDRVSheepdogState *s, char *filename, int64_t vdi_size,
-uint32_t base_vid, uint32_t *vdi_id, int snapshot,
-uint8_t copy_policy)
+static int do_sd_create(BDRVSheepdogState *s, uint32_t *vdi_id, int snapshot)
{
SheepdogVdiReq hdr;
SheepdogVdiRsp *rsp = (SheepdogVdiRsp *)hdr;
@@ -1367,11 +1365,11 @@ static int do_sd_create(BDRVSheepdogState *s, char
*filename, int64_t vdi_size,
* does not fit in buf? For now, just truncate and avoid buffer overrun.
*/
memset(buf, 0, sizeof(buf));
-pstrcpy(buf, sizeof(buf), filename);
+pstrcpy(buf, sizeof(buf), s-name);
memset(hdr, 0, sizeof(hdr));
hdr.opcode = SD_OP_NEW_VDI;
-hdr.vdi_id = base_vid;
+hdr.vdi_id = s-inode.vdi_id;
wlen = SD_MAX_VDI_LEN;
@@ -1379,8 +1377,8 @@ static int do_sd_create(BDRVSheepdogState *s, char
*filename, int64_t vdi_size,
hdr.snapid = snapshot;
hdr.data_length = wlen;
-hdr.vdi_size = vdi_size;
-hdr.copy_policy = copy_policy;
+hdr.vdi_size = s-inode.vdi_size;
+hdr.copy_policy = s-inode.copy_policy;
ret = do_req(fd, (SheepdogReq *)hdr, buf, wlen, rlen);
@@ -1391,7 +1389,7 @@ static int do_sd_create(BDRVSheepdogState *s, char
*filename, int64_t vdi_size,
}
if (rsp-result != SD_RES_SUCCESS) {
-error_report(%s, %s, sd_strerror(rsp-result), filename);
+error_report(%s, %s, sd_strerror(rsp-result), s-inode.name);
return -EIO;
}
@@ -1452,23 +1450,21 @@ static int sd_create(const char *filename,
QEMUOptionParameter *options,
Error **errp)
{
int ret = 0;
-uint32_t vid = 0, base_vid = 0;
-int64_t vdi_size = 0;
+uint32_t vid = 0;
char *backing_file = NULL;
BDRVSheepdogState *s;
-char vdi[SD_MAX_VDI_LEN], tag[SD_MAX_VDI_TAG_LEN];
+char tag[SD_MAX_VDI_TAG_LEN];
uint32_t snapid;
bool prealloc = false;
Error *local_err = NULL;
s = g_malloc0(sizeof(BDRVSheepdogState));
-memset(vdi, 0, sizeof(vdi));
memset(tag, 0, sizeof(tag));
if (strstr(filename, ://)) {
-ret = sd_parse_uri(s, filename, vdi, snapid, tag);
+ret = sd_parse_uri(s, filename, s-name, snapid, tag);
} else {
-ret = parse_vdiname(s, filename, vdi, snapid, tag);
+ret = parse_vdiname(s, filename, s-name, snapid, tag);
}
if (ret 0) {
goto out;
@@ -1476,7 +1472,7 @@ static int sd_create(const char *filename,
QEMUOptionParameter *options,
while (options options-name) {
if (!strcmp(options-name, BLOCK_OPT_SIZE)) {
-vdi_size = options-value.n;
+s-inode.vdi_size = options-value.n;
} else if (!strcmp(options-name, BLOCK_OPT_BACKING_FILE)) {
backing_file = options-value.s;
} else if (!strcmp(options-name, BLOCK_OPT_PREALLOC)) {
@@ -1494,7 +1490,7 @@ static int sd_create(const char *filename,
QEMUOptionParameter *options,
options++;
}
-if (vdi_size SD_MAX_VDI_SIZE) {
+if (s-inode.vdi_size SD_MAX_VDI_SIZE) {
error_report(too big image size);
ret = -EINVAL;
goto out;
@@ -1529,12 +1525,11 @@ static int sd_create(const char *filename,
QEMUOptionParameter *options,
goto out;
}
-base_vid = s-inode.vdi_id;
bdrv_unref(bs);
}
/* TODO: allow users to specify copy number */
-ret = do_sd_create(s, vdi, vdi_size, base_vid, vid, 0, 0);
+ret = do_sd_create(s, vid, 0);
if (!prealloc || ret) {
goto out;
}
@@ -1723,8 +1718,7 @@ static int sd_create_branch(BDRVSheepdogState *s)
* false bail out.
*/
deleted = sd_delete(s);
-ret = do_sd_create(s, s-name, s-inode.vdi_size, s-inode.vdi_id, vid,
- !deleted, s-inode.copy_policy);
+ret = do_sd_create(s, vid, !deleted);
if (ret) {
goto out;
}
@@ -2013,8 +2007,7 @@ static int sd_snapshot_create(BlockDriverState *bs,
QEMUSnapshotInfo *sn_info)
goto cleanup;
}
-ret = do_sd_create(s, s-name, s-inode.vdi_size, s-inode.vdi_id,
new_vid,
- 1, s-inode.copy_policy);
+ret = do_sd_create(s, new_vid, 1);
if (ret 0) {
error_report(failed to create inode for snapshot. %s,
strerror(errno));
--
1.7.9.5
[Qemu-devel] [PATCH v2 2/2] sheepdog: support user-defined redundancy option
Sheepdog support two kinds of redundancy, full replication and erasure coding.
# create a fully replicated vdi with x copies
-o redundancy=x (1 = x = SD_MAX_COPIES)
# create a erasure coded vdi with x data strips and y parity strips
-o redundancy=x:y (x must be one of {2,4,8,16} and 1 = y SD_EC_MAX_STRIP)
E.g, to convert a vdi into sheepdog vdi 'test' with 8:3 erasure coding scheme
$ qemu-img convert -o redundancy=8:3 linux-0.2.img sheepdog:test
Cc: Kevin Wolf kw...@redhat.com
Cc: Stefan Hajnoczi stefa...@redhat.com
Signed-off-by: Liu Yuan namei.u...@gmail.com
---
block/sheepdog.c | 78 -
include/block/block_int.h |1 +
2 files changed, 78 insertions(+), 1 deletion(-)
diff --git a/block/sheepdog.c b/block/sheepdog.c
index e66d2f8..bd7cfd6 100644
--- a/block/sheepdog.c
+++ b/block/sheepdog.c
@@ -91,6 +91,14 @@
#define SD_NR_VDIS (1U 24)
#define SD_DATA_OBJ_SIZE (UINT64_C(1) 22)
#define SD_MAX_VDI_SIZE (SD_DATA_OBJ_SIZE * MAX_DATA_OBJS)
+/*
+ * For erasure coding, we use at most SD_EC_MAX_STRIP for data strips and
+ * (SD_EC_MAX_STRIP - 1) for parity strips
+ *
+ * SD_MAX_COPIES is sum of number of dats trips and parity strips.
+ */
+#define SD_EC_MAX_STRIP 16
+#define SD_MAX_COPIES (SD_EC_MAX_STRIP * 2 - 1)
#define SD_INODE_SIZE (sizeof(SheepdogInode))
#define CURRENT_VDI_ID 0
@@ -1446,6 +1454,65 @@ out:
return ret;
}
+static int64_t is_numeric(const char *s)
+{
+char *end;
+return strtosz_suffix(s, end, STRTOSZ_DEFSUFFIX_B);
+}
+
+/*
+ * Sheepdog support two kinds of redundancy, full replication and erasure
+ * coding.
+ *
+ * # create a fully replicated vdi with x copies
+ * -o redundancy=x (1 = x = SD_MAX_COPIES)
+ *
+ * # create a erasure coded vdi with x data strips and y parity strips
+ * -o redundancy=x:y (x must be one of {2,4,8,16} and 1 = y SD_EC_MAX_STRIP)
+ */
+static int parse_redundancy(BDRVSheepdogState *s, const char *opt)
+{
+struct SheepdogInode *inode = s-inode;
+const char *n1, *n2;
+uint8_t copy, parity;
+char p[10];
+
+strncpy(p, opt, sizeof(p));
+n1 = strtok(p, :);
+n2 = strtok(NULL, :);
+
+if ((n1 !is_numeric(n1)) || (n2 !is_numeric(n2))) {
+return -EINVAL;
+}
+
+copy = strtol(n1, NULL, 10);
+if (copy SD_MAX_COPIES) {
+return -EINVAL;
+}
+if (!n2) {
+inode-copy_policy = 0;
+inode-nr_copies = copy;
+}
+
+if (copy != 2 copy != 4 copy != 8 copy != 16) {
+return -EINVAL;
+}
+
+parity = strtol(n2, NULL, 10);
+if (parity = SD_EC_MAX_STRIP || parity == 0) {
+return -EINVAL;
+}
+
+/*
+ * 4 bits for parity and 4 bits for data.
+ * We have to compress upper data bits because it can't represent 16
+ */
+inode-copy_policy = ((copy / 2) 4) + parity;
+inode-nr_copies = copy + parity;
+
+return 0;
+}
+
static int sd_create(const char *filename, QEMUOptionParameter *options,
Error **errp)
{
@@ -1486,6 +1553,11 @@ static int sd_create(const char *filename,
QEMUOptionParameter *options,
ret = -EINVAL;
goto out;
}
+} else if (!strcmp(options-name, BLOCK_OPT_REDUNDANCY)) {
+ret = parse_redundancy(s, options-value.s);
+if (ret 0) {
+goto out;
+}
}
options++;
}
@@ -1528,7 +1600,6 @@ static int sd_create(const char *filename,
QEMUOptionParameter *options,
bdrv_unref(bs);
}
-/* TODO: allow users to specify copy number */
ret = do_sd_create(s, vid, 0);
if (!prealloc || ret) {
goto out;
@@ -2332,6 +2403,11 @@ static QEMUOptionParameter sd_create_options[] = {
.type = OPT_STRING,
.help = Preallocation mode (allowed values: off, full)
},
+{
+.name = BLOCK_OPT_REDUNDANCY,
+.type = OPT_STRING,
+.help = Redundancy of the image
+},
{ NULL }
};
diff --git a/include/block/block_int.h b/include/block/block_int.h
index a48731d..b90862f 100644
--- a/include/block/block_int.h
+++ b/include/block/block_int.h
@@ -53,6 +53,7 @@
#define BLOCK_OPT_COMPAT_LEVEL compat
#define BLOCK_OPT_LAZY_REFCOUNTSlazy_refcounts
#define BLOCK_OPT_ADAPTER_TYPE adapter_type
+#define BLOCK_OPT_REDUNDANCYredundancy
typedef struct BdrvTrackedRequest {
BlockDriverState *bs;
--
1.7.9.5
[Qemu-devel] [PATCH v2 0/2] sheepdog: add user-defined redundancy option
v2: - fix a typo in comment and commit log This patch set add one sheepdog specific option for qemu-img to control redundancy. This patch set is on top of Kevin's block tree. Liu Yuan (2): sheepdog: refactor do_sd_create() sheepdog: support user-defined redundancy option block/sheepdog.c | 115 - include/block/block_int.h |1 + 2 files changed, 93 insertions(+), 23 deletions(-) -- 1.7.9.5
[Qemu-devel] [Bug 1245724] Re: libfdt.a git compilation fail
Which version of make are you using? Recently, a bug with make 4.0 has been discovered, please see this thread for a description and a work- around: http://www.mail-archive.com/qemu-devel@nongnu.org/msg198719.html -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1245724 Title: libfdt.a git compilation fail Status in QEMU: New Bug description: I don't know the commit tags but I checked out dtc on the 28 of october at 20:27 in the tree of qemu (also git checkout out tonight). The compilation fail at line 234 in qemu/dtc/Makefile so I inserted that line: @$ /usr/bin/strace -o /usr/src/qemu_build/error.log.txt /usr/bin/ar $@ into the makefile at position 234 to see what is the exact problem but the strace log is inconclusive. for the error: /usr/bin/ar: deux operations différentes spécifiées liberal translation is: two different operation specified. the distribution is arch linux with binutils 2.23.2, gcc 4.8.2 and kernel kvm-3.12.0-rc5 from git. To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/1245724/+subscriptions
Re: [Qemu-devel] kvm/hyper-v: obtaining client machine id
- Original Message - From: Peter Lieven p...@kamp.de To: Gleb Natapov g...@redhat.com, Vadim Rozenfeld vroze...@redhat.com, qemu-devel@nongnu.org Sent: Monday, October 28, 2013 6:50:31 PM Subject: [Qemu-devel] kvm/hyper-v: obtaining client machine id Hi, do you know if it is possible to obtain the client machine id of a Windows vServer via a Hyper-V hypercall? I would need an information to check vServer activations against our KMS. Hi Peter, WMI SoftwareLicensingService should be able to do it http://msdn.microsoft.com/en-us/library/cc534597%28v=vs.85%29.aspx Vadim. Thanks, Peter
Re: [Qemu-devel] [WIP PATCH 00/24] IDE cleanups, initial work on AHCI rerror/werror=stop
Il 28/10/2013 19:42, Michael S. Tsirkin ha scritto: Hmm. Actually maybe there was an io error... is there an easy way to find out? This would be a *host* I/O error, so I doubt. Yes, I know. Something like an out of range access on a disk can trigger it perhaps? Yes, that could happen. The easiest way to find out is probably very low tech: a conditional breakpoint on bdrv_aio_readv or bdrv_aio_writev. Paolo
Re: [Qemu-devel] [SeaBIOS] qemu 1.7 seabios -- release planning
On Di, 2013-10-15 at 12:04 +0200, Gerd Hoffmann wrote: Hi, It's probably going to be a bit tough this time. We are pretty late in the qemu 1.7 devel cycle, soft freeze today, and a big chunk of code (ahci-tables-from qemu) which needs seabios support[1] is just about to be pulled. Update: ahci-tables-from was NOT pulled to 1.7 and will likely be merged in the 1.8 devel cycle, hopefully early. I think we should plan for a release soon after the patches got merged, but there is no need to rush it, qemu 1.7 will do fine with the latest stable release currently in the tree. cheers, Gerd
Re: [Qemu-devel] [PATCH v2] net: disallow to specify multicast MAC address
On Mon, Oct 21, 2013 at 12:08:44PM +0400, Dmitry Krivenok wrote: Changes to v1: 1) Resolved names clash in include/net/eth.h 2) Reused is_multicast_ether_addr() from that header for MAC check. Signed-off-by: Dmitry V. Krivenok krivenok.dmi...@gmail.com --- include/net/eth.h | 6 +++--- net/net.c | 6 ++ 2 files changed, 9 insertions(+), 3 deletions(-) Thanks, applied to my net tree: https://github.com/stefanha/qemu/commits/net Stefan
Re: [Qemu-devel] kvm/hyper-v: obtaining client machine id
On 29.10.2013 10:03, Vadim Rozenfeld wrote: - Original Message - From: Peter Lieven p...@kamp.de To: Gleb Natapov g...@redhat.com, Vadim Rozenfeld vroze...@redhat.com, qemu-devel@nongnu.org Sent: Monday, October 28, 2013 6:50:31 PM Subject: [Qemu-devel] kvm/hyper-v: obtaining client machine id Hi, do you know if it is possible to obtain the client machine id of a Windows vServer via a Hyper-V hypercall? I would need an information to check vServer activations against our KMS. Hi Peter, WMI SoftwareLicensingService should be able to do it http://msdn.microsoft.com/en-us/library/cc534597%28v=vs.85%29.aspx Vadim. Sorry, I don't see how to get this information via a Hyper-V MSR?! Peter Thanks, Peter -- Mit freundlichen Grüßen Peter Lieven ... KAMP Netzwerkdienste GmbH Vestische Str. 89-91 | 46117 Oberhausen Tel: +49 (0) 208.89 402-50 | Fax: +49 (0) 208.89 402-40 p...@kamp.de | http://www.kamp.de Geschäftsführer: Heiner Lante | Michael Lante Amtsgericht Duisburg | HRB Nr. 12154 USt-Id-Nr.: DE 120607556 ...
[Qemu-devel] Prohibit Windows from running in QEMU
Hi all, this question might seem a bit weird, but does anyone see a good way to avoid that Windows is able to boot inside qemu? We have defined several profiles for different operation systems and I want to avoid that someone chooses Linux and then installs Windows within a VM. Reason is licensing. Thanks, Peter
Re: [Qemu-devel] Prohibit Windows from running in QEMU
Il 29/10/2013 10:48, Peter Lieven ha scritto: Hi all, this question might seem a bit weird, but does anyone see a good way to avoid that Windows is able to boot inside qemu? We have defined several profiles for different operation systems and I want to avoid that someone chooses Linux and then installs Windows within a VM. Reason is licensing. Patch QEMU to crash when Hyper-V extensions are enabled... Paolo
Re: [Qemu-devel] [PATCH 0/4] pc: inform SeaBIOS where 64-bit PCI hole start and PCI mappings cleanup
On Wed, 16 Oct 2013 12:20:45 +0300
Michael S. Tsirkin m...@redhat.com wrote:
On Wed, Oct 16, 2013 at 10:49:10AM +0200, Igor Mammedov wrote:
* simplify PCI address space mapping into system address space,
replacing code duplication in piix/q53 PCs with helper function
I think this does not go far enough.
I was always wondering about PCI hole in QEMU.
Some real PCs have a PCI hole where PCI
masks real memory, but PIIX does not do this,
instead PCI is whenever RAM does not mask it.
So it looks like the hole concept is a left-over
from when we didn't have priorities in the memory API.
How about we remove them?
See patch below.
I did a quick boot test and it seems to work, of course
it needs much more testing.
It's on top of Marcel's series adding negative priorities,
so works on top of the acpi branch or the pci branch.
I have done quite thorough testing and it works well except of
one caveat, it breaks migration due to different memory regions
layout.
So we'll have to keep an old aliasing scheme at least for old
machine types. Having that in mind do we still want to add
an extra implementation as you suggested?
I'm also wondering about the smram region - it uses
priority 1 but does not say why.
Need to check what does it overlap with, and why.
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index bad3953..988516a 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -102,8 +102,6 @@ struct PCII440FXState {
MemoryRegion *system_memory;
MemoryRegion *pci_address_space;
MemoryRegion *ram_memory;
-MemoryRegion pci_hole;
-MemoryRegion pci_hole_64bit;
PAMMemoryRegion pam_regions[13];
MemoryRegion smram_region;
uint8_t smm_enabled;
@@ -326,7 +324,6 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state,
PCII440FXState *f;
unsigned i;
I440FXState *i440fx;
-uint64_t pci_hole64_size;
dev = qdev_create(NULL, TYPE_I440FX_PCI_HOST_BRIDGE);
s = PCI_HOST_BRIDGE(dev);
@@ -354,23 +351,9 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state,
i440fx-pci_info.w32.begin = 0xe000;
}
-memory_region_init_alias(f-pci_hole, OBJECT(d), pci-hole,
f-pci_address_space,
- pci_hole_start, pci_hole_size);
-memory_region_add_subregion(f-system_memory, pci_hole_start,
f-pci_hole);
-
-pci_hole64_size = pci_host_get_hole64_size(i440fx-pci_hole64_size);
-
-pc_init_pci64_hole(i440fx-pci_info, 0x1ULL + above_4g_mem_size,
- pci_hole64_size);
-memory_region_init_alias(f-pci_hole_64bit, OBJECT(d), pci-hole64,
- f-pci_address_space,
- i440fx-pci_info.w64.begin,
- pci_hole64_size);
-if (pci_hole64_size) {
-memory_region_add_subregion(f-system_memory,
-i440fx-pci_info.w64.begin,
-f-pci_hole_64bit);
-}
+/* Set to lower priority than RAM */
+memory_region_add_subregion_overlap(f-system_memory, 0x0,
+f-pci_address_space, -1);
memory_region_init_alias(f-smram_region, OBJECT(d), smram-region,
f-pci_address_space, 0xa, 0x2);
memory_region_add_subregion_overlap(f-system_memory, 0xa,
Re: [Qemu-devel] Prohibit Windows from running in QEMU
On 29.10.2013 10:59, Paolo Bonzini wrote: Il 29/10/2013 10:48, Peter Lieven ha scritto: Hi all, this question might seem a bit weird, but does anyone see a good way to avoid that Windows is able to boot inside qemu? We have defined several profiles for different operation systems and I want to avoid that someone chooses Linux and then installs Windows within a VM. Reason is licensing. Patch QEMU to crash when Hyper-V extensions are enabled... I was thinking about this, but wouldn't this mean the cpu signature would always be Microsoft Hv and not KVMKVMKVM\0\0\0? Peter
[Qemu-devel] [PATCH v3] net: Adding netmap network backend
This patch adds support for a network backend based on netmap.
netmap is a framework for high speed packet I/O. You can use it
to build extremely fast traffic generators, monitors, software
switches or network middleboxes. Its companion software switch
VALE lets you interconnect virtual machines.
netmap and VALE are implemented as a non intrusive kernel module,
support NICs from multiple vendors, are part of standard FreeBSD
distributions and available in source format for Linux too.
To compile QEMU with netmap support, use the following configure
options:
./configure [...] --enable-netmap --extra-cflags=-I/path/to/netmap/sys
where /path/to/netmap contains the netmap source code, available at
http://info.iet.unipi.it/~luigi/netmap/
The same webpage contains more information about the netmap project
(together with papers and presentations).
Signed-off-by: Vincenzo Maffione v.maffi...@gmail.com
---
This patch follows a previous thread (whose subject was netmap backend),
in which a previous version was already revised. All the review comments
have been taken into consideration or applied.
This patch only contains the simplest netmap backend for QEMU.
In particular, this backend implementation is still not
able to make use of batching on the TX side (frontend - backend),
which is where most of the TX performance gain comes from.
As you can see from the code, there is an ioctl(NIOCTXSYNC) for each
packet, instead of an ioctl(NIOCTXSYNC) for a batch of packets.
In order to make TX batching possible, we would need to do some
modifications to the generic net/net.c code, adding to the
frontend/backend datapath interface a way to send a batch (this can
be done using a QEMU_NET_PACKET_FLAG_MORE, without changing too
much the existing interface).
We will propose these features in future patches.
configure | 31
hmp-commands.hx | 4 +-
net/Makefile.objs | 1 +
net/clients.h | 5 +
net/net.c | 6 +
net/netmap.c | 423 ++
qapi-schema.json | 19 ++-
qemu-options.hx | 8 ++
8 files changed, 494 insertions(+), 3 deletions(-)
create mode 100644 net/netmap.c
diff --git a/configure b/configure
index 57ee62a..4046fe5 100755
--- a/configure
+++ b/configure
@@ -155,6 +155,7 @@ curl=
curses=
docs=
fdt=
+netmap=
pixman=
sdl=
virtfs=
@@ -777,6 +778,10 @@ for opt do
;;
--enable-vde) vde=yes
;;
+ --disable-netmap) netmap=no
+ ;;
+ --enable-netmap) netmap=yes
+ ;;
--disable-xen) xen=no
;;
--enable-xen) xen=yes
@@ -1157,6 +1162,8 @@ echo --disable-uuid disable uuid support
echo --enable-uuidenable uuid support
echo --disable-vdedisable support for vde network
echo --enable-vde enable support for vde network
+echo --disable-netmap disable support for netmap network
+echo --enable-netmap enable support for netmap network
echo --disable-linux-aio disable Linux AIO support
echo --enable-linux-aio enable Linux AIO support
echo --disable-cap-ng disable libcap-ng support
@@ -2061,6 +2068,26 @@ EOF
fi
##
+# netmap headers probe
+if test $netmap != no ; then
+ cat $TMPC EOF
+#include inttypes.h
+#include net/if.h
+#include net/netmap.h
+#include net/netmap_user.h
+int main(void) { return 0; }
+EOF
+ if compile_prog ; then
+netmap=yes
+ else
+if test $netmap = yes ; then
+ feature_not_found netmap
+fi
+netmap=no
+ fi
+fi
+
+##
# libcap-ng library probe
if test $cap_ng != no ; then
cap_libs=-lcap-ng
@@ -3716,6 +3743,7 @@ echo uname -r $uname_release
echo GUEST_BASE$guest_base
echo PIE $pie
echo vde support $vde
+echo netmap support$netmap
echo Linux AIO support $linux_aio
echo ATTR/XATTR support $attr
echo Install blobs $blobs
@@ -3854,6 +3882,9 @@ fi
if test $vde = yes ; then
echo CONFIG_VDE=y $config_host_mak
fi
+if test $netmap = yes ; then
+ echo CONFIG_NETMAP=y $config_host_mak
+fi
if test $cap_ng = yes ; then
echo CONFIG_LIBCAP=y $config_host_mak
fi
diff --git a/hmp-commands.hx b/hmp-commands.hx
index caae5ad..ebe8e78 100644
--- a/hmp-commands.hx
+++ b/hmp-commands.hx
@@ -1190,7 +1190,7 @@ ETEXI
{
.name = host_net_add,
.args_type = device:s,opts:s?,
-.params = tap|user|socket|vde|dump [options],
+.params = tap|user|socket|vde|netmap|dump [options],
.help = add host VLAN client,
.mhandler.cmd = net_host_device_add,
},
@@ -1218,7 +1218,7 @@ ETEXI
{
.name = netdev_add,
.args_type = netdev:O,
-.params = [user|tap|socket|hubport],id=str[,prop=value][,...],
+.params =
[user|tap|socket|hubport|netmap],id=str[,prop=value][,...],
.help = add host network device,
Re: [Qemu-devel] [PATCH 0/4] pc: inform SeaBIOS where 64-bit PCI hole start and PCI mappings cleanup
On Tue, Oct 29, 2013 at 11:08:56AM +0100, Igor Mammedov wrote:
On Wed, 16 Oct 2013 12:20:45 +0300
Michael S. Tsirkin m...@redhat.com wrote:
On Wed, Oct 16, 2013 at 10:49:10AM +0200, Igor Mammedov wrote:
* simplify PCI address space mapping into system address space,
replacing code duplication in piix/q53 PCs with helper function
I think this does not go far enough.
I was always wondering about PCI hole in QEMU.
Some real PCs have a PCI hole where PCI
masks real memory, but PIIX does not do this,
instead PCI is whenever RAM does not mask it.
So it looks like the hole concept is a left-over
from when we didn't have priorities in the memory API.
How about we remove them?
See patch below.
I did a quick boot test and it seems to work, of course
it needs much more testing.
It's on top of Marcel's series adding negative priorities,
so works on top of the acpi branch or the pci branch.
I have done quite thorough testing and it works well except of
one caveat, it breaks migration due to different memory regions
layout.
Interesting. We don't migrate PCI memory regions so what's going on?
So we'll have to keep an old aliasing scheme at least for old
machine types. Having that in mind do we still want to add
an extra implementation as you suggested?
I'm also wondering about the smram region - it uses
priority 1 but does not say why.
Need to check what does it overlap with, and why.
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index bad3953..988516a 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -102,8 +102,6 @@ struct PCII440FXState {
MemoryRegion *system_memory;
MemoryRegion *pci_address_space;
MemoryRegion *ram_memory;
-MemoryRegion pci_hole;
-MemoryRegion pci_hole_64bit;
PAMMemoryRegion pam_regions[13];
MemoryRegion smram_region;
uint8_t smm_enabled;
@@ -326,7 +324,6 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state,
PCII440FXState *f;
unsigned i;
I440FXState *i440fx;
-uint64_t pci_hole64_size;
dev = qdev_create(NULL, TYPE_I440FX_PCI_HOST_BRIDGE);
s = PCI_HOST_BRIDGE(dev);
@@ -354,23 +351,9 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state,
i440fx-pci_info.w32.begin = 0xe000;
}
-memory_region_init_alias(f-pci_hole, OBJECT(d), pci-hole,
f-pci_address_space,
- pci_hole_start, pci_hole_size);
-memory_region_add_subregion(f-system_memory, pci_hole_start,
f-pci_hole);
-
-pci_hole64_size = pci_host_get_hole64_size(i440fx-pci_hole64_size);
-
-pc_init_pci64_hole(i440fx-pci_info, 0x1ULL +
above_4g_mem_size,
- pci_hole64_size);
-memory_region_init_alias(f-pci_hole_64bit, OBJECT(d), pci-hole64,
- f-pci_address_space,
- i440fx-pci_info.w64.begin,
- pci_hole64_size);
-if (pci_hole64_size) {
-memory_region_add_subregion(f-system_memory,
-i440fx-pci_info.w64.begin,
-f-pci_hole_64bit);
-}
+/* Set to lower priority than RAM */
+memory_region_add_subregion_overlap(f-system_memory, 0x0,
+f-pci_address_space, -1);
memory_region_init_alias(f-smram_region, OBJECT(d), smram-region,
f-pci_address_space, 0xa, 0x2);
memory_region_add_subregion_overlap(f-system_memory, 0xa,
Re: [Qemu-devel] Prohibit Windows from running in QEMU
Il 29/10/2013 11:11, Peter Lieven ha scritto: On 29.10.2013 10:59, Paolo Bonzini wrote: Il 29/10/2013 10:48, Peter Lieven ha scritto: Hi all, this question might seem a bit weird, but does anyone see a good way to avoid that Windows is able to boot inside qemu? We have defined several profiles for different operation systems and I want to avoid that someone chooses Linux and then installs Windows within a VM. Reason is licensing. Patch QEMU to crash when Hyper-V extensions are enabled... I was thinking about this, but wouldn't this mean the cpu signature would always be Microsoft Hv and not KVMKVMKVM\0\0\0? The KVM signature should be at CPUID leaf 0x4100. Paolo
Re: [Qemu-devel] Prohibit Windows from running in QEMU
On Tue, Oct 29, 2013 at 11:19:54AM +0100, Paolo Bonzini wrote: Il 29/10/2013 11:11, Peter Lieven ha scritto: On 29.10.2013 10:59, Paolo Bonzini wrote: Il 29/10/2013 10:48, Peter Lieven ha scritto: Hi all, this question might seem a bit weird, but does anyone see a good way to avoid that Windows is able to boot inside qemu? We have defined several profiles for different operation systems and I want to avoid that someone chooses Linux and then installs Windows within a VM. Reason is licensing. Patch QEMU to crash when Hyper-V extensions are enabled... I was thinking about this, but wouldn't this mean the cpu signature would always be Microsoft Hv and not KVMKVMKVM\0\0\0? The KVM signature should be at CPUID leaf 0x4100. But only recently Linux started to search for it there. -- Gleb.
Re: [Qemu-devel] Prohibit Windows from running in QEMU
On 29.10.2013 11:19, Paolo Bonzini wrote: Il 29/10/2013 11:11, Peter Lieven ha scritto: On 29.10.2013 10:59, Paolo Bonzini wrote: Il 29/10/2013 10:48, Peter Lieven ha scritto: Hi all, this question might seem a bit weird, but does anyone see a good way to avoid that Windows is able to boot inside qemu? We have defined several profiles for different operation systems and I want to avoid that someone chooses Linux and then installs Windows within a VM. Reason is licensing. Patch QEMU to crash when Hyper-V extensions are enabled... I was thinking about this, but wouldn't this mean the cpu signature would always be Microsoft Hv and not KVMKVMKVM\0\0\0? The KVM signature should be at CPUID leaf 0x4100. If I enable hyperv for all vServers the signature is at KVM_CPUID_SIGNATURE_NEXT (0x4100) otherwise at KVM_CPUID_SIGNATURE (0x0). Does this matter to Linux? Peter
Re: [Qemu-devel] Prohibit Windows from running in QEMU
Il 29/10/2013 11:40, Peter Lieven ha scritto: The KVM signature should be at CPUID leaf 0x4100. If I enable hyperv for all vServers the signature is at KVM_CPUID_SIGNATURE_NEXT (0x4100) otherwise at KVM_CPUID_SIGNATURE (0x0). KVM_CPU_ID_SIGNATURE is 0x4000. Does this matter to Linux? For recent versions it doesn't. Older versions will not be able to use kvmclock (and other PV enhancements for KVM such as steal time or PV EOI). Paolo
Re: [Qemu-devel] Prohibit Windows from running in QEMU
On 29.10.2013 11:48, Paolo Bonzini wrote: Il 29/10/2013 11:40, Peter Lieven ha scritto: The KVM signature should be at CPUID leaf 0x4100. If I enable hyperv for all vServers the signature is at KVM_CPUID_SIGNATURE_NEXT (0x4100) otherwise at KVM_CPUID_SIGNATURE (0x0). KVM_CPU_ID_SIGNATURE is 0x4000. Does this matter to Linux? For recent versions it doesn't. Older versions will not be able to use kvmclock (and other PV enhancements for KVM such as steal time or PV EOI). Ok, so this is not an option today - maybe later... Any other idea to detect Windows is running or trying to start? Thanks, Peter
Re: [Qemu-devel] kvm/hyper-v: obtaining client machine id
On Mon, Oct 28, 2013 at 08:50:31AM +0100, Peter Lieven wrote: Hi, do you know if it is possible to obtain the client machine id of a Windows vServer via a Hyper-V hypercall? I would need an information to check vServer activations against our KMS. Have not idea, sorry. -- Gleb.
Re: [Qemu-devel] Prohibit Windows from running in QEMU
On Tue, Oct 29, 2013 at 10:48:07AM +0100, Peter Lieven wrote: Hi all, this question might seem a bit weird, but does anyone see a good way to avoid that Windows is able to boot inside qemu? We have defined several profiles for different operation systems and I want to avoid that someone chooses Linux and then installs Windows within a VM. Reason is licensing. Thanks, Peter - create a device - write a linux driver - if driver is not enabled crash guest -- MST
Re: [Qemu-devel] [PATCH 0/4] pc: inform SeaBIOS where 64-bit PCI hole start and PCI mappings cleanup
On Tue, 29 Oct 2013 12:22:09 +0200
Michael S. Tsirkin m...@redhat.com wrote:
On Tue, Oct 29, 2013 at 11:08:56AM +0100, Igor Mammedov wrote:
On Wed, 16 Oct 2013 12:20:45 +0300
Michael S. Tsirkin m...@redhat.com wrote:
On Wed, Oct 16, 2013 at 10:49:10AM +0200, Igor Mammedov wrote:
* simplify PCI address space mapping into system address space,
replacing code duplication in piix/q53 PCs with helper function
I think this does not go far enough.
I was always wondering about PCI hole in QEMU.
Some real PCs have a PCI hole where PCI
masks real memory, but PIIX does not do this,
instead PCI is whenever RAM does not mask it.
So it looks like the hole concept is a left-over
from when we didn't have priorities in the memory API.
How about we remove them?
See patch below.
I did a quick boot test and it seems to work, of course
it needs much more testing.
It's on top of Marcel's series adding negative priorities,
so works on top of the acpi branch or the pci branch.
I have done quite thorough testing and it works well except of
one caveat, it breaks migration due to different memory regions
layout.
Interesting. We don't migrate PCI memory regions so what's going on?
I'm sorry for noise, it was a false alarm due to wrong testing
configuration. It was failing with:
qemu-system-x86_64: pci_add_option_rom: failed to find romfile efi-e1000.rom
Unknown ramblock :03.0/e1000.rom, cannot accept migration
Caused by incorrect -L option. It works fine when correct BIOS path is
provided.
One more questions about whether we should disable etc/pci-info fw_cfg
for 1.7 again since Seabios doesn't use it (and it looks like it's not
going to do so)?
So we'll have to keep an old aliasing scheme at least for old
machine types. Having that in mind do we still want to add
an extra implementation as you suggested?
I'm also wondering about the smram region - it uses
priority 1 but does not say why.
Need to check what does it overlap with, and why.
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index bad3953..988516a 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -102,8 +102,6 @@ struct PCII440FXState {
MemoryRegion *system_memory;
MemoryRegion *pci_address_space;
MemoryRegion *ram_memory;
-MemoryRegion pci_hole;
-MemoryRegion pci_hole_64bit;
PAMMemoryRegion pam_regions[13];
MemoryRegion smram_region;
uint8_t smm_enabled;
@@ -326,7 +324,6 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state,
PCII440FXState *f;
unsigned i;
I440FXState *i440fx;
-uint64_t pci_hole64_size;
dev = qdev_create(NULL, TYPE_I440FX_PCI_HOST_BRIDGE);
s = PCI_HOST_BRIDGE(dev);
@@ -354,23 +351,9 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state,
i440fx-pci_info.w32.begin = 0xe000;
}
-memory_region_init_alias(f-pci_hole, OBJECT(d), pci-hole,
f-pci_address_space,
- pci_hole_start, pci_hole_size);
-memory_region_add_subregion(f-system_memory, pci_hole_start,
f-pci_hole);
-
-pci_hole64_size = pci_host_get_hole64_size(i440fx-pci_hole64_size);
-
-pc_init_pci64_hole(i440fx-pci_info, 0x1ULL +
above_4g_mem_size,
- pci_hole64_size);
-memory_region_init_alias(f-pci_hole_64bit, OBJECT(d), pci-hole64,
- f-pci_address_space,
- i440fx-pci_info.w64.begin,
- pci_hole64_size);
-if (pci_hole64_size) {
-memory_region_add_subregion(f-system_memory,
-i440fx-pci_info.w64.begin,
-f-pci_hole_64bit);
-}
+/* Set to lower priority than RAM */
+memory_region_add_subregion_overlap(f-system_memory, 0x0,
+f-pci_address_space, -1);
memory_region_init_alias(f-smram_region, OBJECT(d), smram-region,
f-pci_address_space, 0xa, 0x2);
memory_region_add_subregion_overlap(f-system_memory, 0xa,
Re: [Qemu-devel] Prohibit Windows from running in QEMU
On Tue, Oct 29, 2013 at 01:13:24PM +0200, Michael S. Tsirkin wrote: On Tue, Oct 29, 2013 at 10:48:07AM +0100, Peter Lieven wrote: Hi all, this question might seem a bit weird, but does anyone see a good way to avoid that Windows is able to boot inside qemu? We have defined several profiles for different operation systems and I want to avoid that someone chooses Linux and then installs Windows within a VM. Reason is licensing. Thanks, Peter - create a device - write a linux driver - if driver is not enabled crash guest For how long to wait before a crash? -- Gleb.
Re: [Qemu-devel] Prohibit Windows from running in QEMU
On 29.10.2013 12:26, Gleb Natapov wrote: On Tue, Oct 29, 2013 at 01:13:24PM +0200, Michael S. Tsirkin wrote: On Tue, Oct 29, 2013 at 10:48:07AM +0100, Peter Lieven wrote: Hi all, this question might seem a bit weird, but does anyone see a good way to avoid that Windows is able to boot inside qemu? We have defined several profiles for different operation systems and I want to avoid that someone chooses Linux and then installs Windows within a VM. Reason is licensing. Thanks, Peter - create a device - write a linux driver - if driver is not enabled crash guest For how long to wait before a crash? I would not like to alter the software in the guest anyway. If this would be required I could force a Linux version that would search for the alternate KVM signature in the cpuid leaf. Peter
Re: [Qemu-devel] Prohibit Windows from running in QEMU
On Tue, Oct 29, 2013 at 12:31:18PM +0100, Peter Lieven wrote: On 29.10.2013 12:26, Gleb Natapov wrote: On Tue, Oct 29, 2013 at 01:13:24PM +0200, Michael S. Tsirkin wrote: On Tue, Oct 29, 2013 at 10:48:07AM +0100, Peter Lieven wrote: Hi all, this question might seem a bit weird, but does anyone see a good way to avoid that Windows is able to boot inside qemu? We have defined several profiles for different operation systems and I want to avoid that someone chooses Linux and then installs Windows within a VM. Reason is licensing. Thanks, Peter - create a device - write a linux driver - if driver is not enabled crash guest For how long to wait before a crash? I would not like to alter the software in the guest anyway. If this would be required I could force a Linux version that would search for the alternate KVM signature in the cpuid leaf. You can detect certain patterns of RTC usage (Linux does not use it usually), but it is fragile since Linux allows userspace to access RTC and it may create the same usage pattern. -- Gleb.
[Qemu-devel] [PATCH] block: Avoid unecessary drv-bdrv_getlength() calls
The block layer generally keeps the size of an image cached in
bs-total_sectors so that it doesn't have to perform expensive
operations to get the size whenever it needs it.
This doesn't work however when using a backend that can change its size
without qemu being aware of it, i.e. passthrough of removable media like
CD-ROMs or floppy disks. For this reason, the caching is disabled when a
removable device is used.
It is obvious that checking whether the _guest_ device has removable
media isn't the right thing to do when we want to know whether the size
of the host backend can change. To make things worse, non-top-level
BlockDriverStates never have any device attached, which makes qemu
assume they are removable, so drv-bdrv_getlength() is always called on
the protocol layer. In the case of raw-posix, this causes unnecessary
lseek() system calls, which turned out to be rather expensive.
This patch completely changes the logic and disables bs-total_sectors
caching only for certain block driver types, for which a size change is
expected: host_cdrom and host_floppy; also the raw format in case it
sits on top of one of these protocols, but in the common case the nested
bdrv_getlength() call on the protocol driver will use the cache again
and avoid an expensive drv-bdrv_getlength() call.
Signed-off-by: Kevin Wolf kw...@redhat.com
---
block.c | 7 ---
block/raw-posix.c | 9 ++---
block/raw_bsd.c | 1 +
include/block/block_int.h | 3 +++
4 files changed, 14 insertions(+), 6 deletions(-)
diff --git a/block.c b/block.c
index 366999b..da88be0 100644
--- a/block.c
+++ b/block.c
@@ -2868,9 +2868,10 @@ int64_t bdrv_getlength(BlockDriverState *bs)
if (!drv)
return -ENOMEDIUM;
-if (bdrv_dev_has_removable_media(bs)) {
-if (drv-bdrv_getlength) {
-return drv-bdrv_getlength(bs);
+if (drv-has_variable_length) {
+int ret = refresh_total_sectors(bs, bs-total_sectors);
+if (ret 0) {
+return ret;
}
}
return bs-total_sectors * BDRV_SECTOR_SIZE;
diff --git a/block/raw-posix.c b/block/raw-posix.c
index 6f03fbf..f6d48bb 100644
--- a/block/raw-posix.c
+++ b/block/raw-posix.c
@@ -1715,7 +1715,8 @@ static BlockDriver bdrv_host_floppy = {
.bdrv_aio_flush= raw_aio_flush,
.bdrv_truncate = raw_truncate,
-.bdrv_getlength= raw_getlength,
+.bdrv_getlength = raw_getlength,
+.has_variable_length = true,
.bdrv_get_allocated_file_size
= raw_get_allocated_file_size,
@@ -1824,7 +1825,8 @@ static BlockDriver bdrv_host_cdrom = {
.bdrv_aio_flush= raw_aio_flush,
.bdrv_truncate = raw_truncate,
-.bdrv_getlength = raw_getlength,
+.bdrv_getlength = raw_getlength,
+.has_variable_length = true,
.bdrv_get_allocated_file_size
= raw_get_allocated_file_size,
@@ -1951,7 +1953,8 @@ static BlockDriver bdrv_host_cdrom = {
.bdrv_aio_flush= raw_aio_flush,
.bdrv_truncate = raw_truncate,
-.bdrv_getlength = raw_getlength,
+.bdrv_getlength = raw_getlength,
+.has_variable_length = true,
.bdrv_get_allocated_file_size
= raw_get_allocated_file_size,
diff --git a/block/raw_bsd.c b/block/raw_bsd.c
index 0078c1b..2265dcc 100644
--- a/block/raw_bsd.c
+++ b/block/raw_bsd.c
@@ -178,6 +178,7 @@ static BlockDriver bdrv_raw = {
.bdrv_co_get_block_status = raw_co_get_block_status,
.bdrv_truncate= raw_truncate,
.bdrv_getlength = raw_getlength,
+.has_variable_length = true,
.bdrv_get_info= raw_get_info,
.bdrv_is_inserted = raw_is_inserted,
.bdrv_media_changed = raw_media_changed,
diff --git a/include/block/block_int.h b/include/block/block_int.h
index a48731d..1666066 100644
--- a/include/block/block_int.h
+++ b/include/block/block_int.h
@@ -156,8 +156,11 @@ struct BlockDriver {
const char *protocol_name;
int (*bdrv_truncate)(BlockDriverState *bs, int64_t offset);
+
int64_t (*bdrv_getlength)(BlockDriverState *bs);
+bool has_variable_length;
int64_t (*bdrv_get_allocated_file_size)(BlockDriverState *bs);
+
int (*bdrv_write_compressed)(BlockDriverState *bs, int64_t sector_num,
const uint8_t *buf, int nb_sectors);
--
1.8.1.4
Re: [Qemu-devel] [PATCH 0/4] pc: inform SeaBIOS where 64-bit PCI hole start and PCI mappings cleanup
On Tue, Oct 29, 2013 at 11:08:56AM +0100, Igor Mammedov wrote: On Wed, 16 Oct 2013 12:20:45 +0300 Michael S. Tsirkin m...@redhat.com wrote: On Wed, Oct 16, 2013 at 10:49:10AM +0200, Igor Mammedov wrote: * simplify PCI address space mapping into system address space, replacing code duplication in piix/q53 PCs with helper function I think this does not go far enough. I was always wondering about PCI hole in QEMU. Some real PCs have a PCI hole where PCI masks real memory, but PIIX does not do this, instead PCI is whenever RAM does not mask it. So it looks like the hole concept is a left-over from when we didn't have priorities in the memory API. How about we remove them? See patch below. I did a quick boot test and it seems to work, of course it needs much more testing. It's on top of Marcel's series adding negative priorities, so works on top of the acpi branch or the pci branch. I have done quite thorough testing and it works well except of one caveat, it breaks migration due to different memory regions layout. So we'll have to keep an old aliasing scheme at least for old machine types. Having that in mind do we still want to add an extra implementation as you suggested? Sorry I didn't answer this question. I think it's a bug - PCI hole should not affect migration.
Re: [Qemu-devel] Prohibit Windows from running in QEMU
On Tue, Oct 29, 2013 at 10:48:07AM +0100, Peter Lieven wrote: Hi all, this question might seem a bit weird, but does anyone see a good way to avoid that Windows is able to boot inside qemu? We have defined several profiles for different operation systems and I want to avoid that someone chooses Linux and then installs Windows within a VM. Reason is licensing. Do you have todo the check in QEMU itself, or is it possible to add a hook into your installation method ? If so, then you could use the virt-inspector tool that comes with libguestfs to probe the install media and/or disk image to detect the operating system type, and then avoid starting QEMU at all if not what was expected Daniel -- |: http://berrange.com -o-http://www.flickr.com/photos/dberrange/ :| |: http://libvirt.org -o- http://virt-manager.org :| |: http://autobuild.org -o- http://search.cpan.org/~danberr/ :| |: http://entangle-photo.org -o- http://live.gnome.org/gtk-vnc :|
Re: [Qemu-devel] [PATCH repost] ahci: fix win7 hang on boot
Am 28.10.2013 um 20:01 hat Michael S. Tsirkin geschrieben: From: Alexander Graf ag...@suse.de When AHCI executes an asynchronous IDE command, it checked DRDY without checking either DRQ or BSY. This sometimes caused interrupt to be sent before command is actually completed. This resulted in a race condition: if guest then managed to access the device before command has completed, it would hang waiting for an interrupt. This was observed with windows 7 guests. To fix, check for DRQ or BSY in additiona to DRDY, if set, the command is asynchronous so delay the interrupt until asynchronous done callback is invoked. Reported-by: Michael S. Tsirkin m...@redhat.com Reviewed-by: Michael S. Tsirkin m...@redhat.com Tested-by: Michael S. Tsirkin m...@redhat.com Signed-off-by: Michael S. Tsirkin m...@redhat.com Thanks, applied to the block branch. Kevin
Re: [Qemu-devel] [PATCH] Fix COR by disabling BDRV_O_COPY_ON_READ before opening the backing_file.
Am 26.10.2013 um 15:31 hat Max Reitz geschrieben: Am 25.10.2013 02:15, schrieb Thibaut LAURENT: Since commit 0ebd24e0a203cf2852c310b59fbe050190dc6c8c, bdrv_open_common will throw an error when trying to open a file read-only with the BDRV_O_COPY_ON_READ flag set. Although BDRV_O_RDWR is unset for the backing files, BDRV_O_COPY_ON_READ is still passed on if copy-on-read was requested for the drive. Let's unset this flag too before opening the backing file, or bdrv_open_common will fail. Signed-off-by: Thibaut LAURENT thibaut.laur...@gmail.com --- block.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) Reviewed-by: Max Reitz mre...@redhat.com Thanks, applied to the block branch. (And thanks for CCing me, Max, I would have missed the patch otherwise.) Kevin
Re: [Qemu-devel] [PATCH] block: Avoid unecessary drv-bdrv_getlength() calls
Il 29/10/2013 12:35, Kevin Wolf ha scritto:
The block layer generally keeps the size of an image cached in
bs-total_sectors so that it doesn't have to perform expensive
operations to get the size whenever it needs it.
This doesn't work however when using a backend that can change its size
without qemu being aware of it, i.e. passthrough of removable media like
CD-ROMs or floppy disks. For this reason, the caching is disabled when a
removable device is used.
It is obvious that checking whether the _guest_ device has removable
media isn't the right thing to do when we want to know whether the size
of the host backend can change. To make things worse, non-top-level
BlockDriverStates never have any device attached, which makes qemu
assume they are removable, so drv-bdrv_getlength() is always called on
the protocol layer. In the case of raw-posix, this causes unnecessary
lseek() system calls, which turned out to be rather expensive.
This patch completely changes the logic and disables bs-total_sectors
caching only for certain block driver types, for which a size change is
expected: host_cdrom and host_floppy; also the raw format in case it
sits on top of one of these protocols, but in the common case the nested
bdrv_getlength() call on the protocol driver will use the cache again
and avoid an expensive drv-bdrv_getlength() call.
Signed-off-by: Kevin Wolf kw...@redhat.com
---
block.c | 7 ---
block/raw-posix.c | 9 ++---
block/raw_bsd.c | 1 +
include/block/block_int.h | 3 +++
4 files changed, 14 insertions(+), 6 deletions(-)
diff --git a/block.c b/block.c
index 366999b..da88be0 100644
--- a/block.c
+++ b/block.c
@@ -2868,9 +2868,10 @@ int64_t bdrv_getlength(BlockDriverState *bs)
if (!drv)
return -ENOMEDIUM;
-if (bdrv_dev_has_removable_media(bs)) {
-if (drv-bdrv_getlength) {
-return drv-bdrv_getlength(bs);
+if (drv-has_variable_length) {
+int ret = refresh_total_sectors(bs, bs-total_sectors);
+if (ret 0) {
+return ret;
}
}
return bs-total_sectors * BDRV_SECTOR_SIZE;
diff --git a/block/raw-posix.c b/block/raw-posix.c
index 6f03fbf..f6d48bb 100644
--- a/block/raw-posix.c
+++ b/block/raw-posix.c
@@ -1715,7 +1715,8 @@ static BlockDriver bdrv_host_floppy = {
.bdrv_aio_flush = raw_aio_flush,
.bdrv_truncate = raw_truncate,
-.bdrv_getlength = raw_getlength,
+.bdrv_getlength = raw_getlength,
+.has_variable_length = true,
.bdrv_get_allocated_file_size
= raw_get_allocated_file_size,
@@ -1824,7 +1825,8 @@ static BlockDriver bdrv_host_cdrom = {
.bdrv_aio_flush = raw_aio_flush,
.bdrv_truncate = raw_truncate,
-.bdrv_getlength = raw_getlength,
+.bdrv_getlength = raw_getlength,
+.has_variable_length = true,
.bdrv_get_allocated_file_size
= raw_get_allocated_file_size,
@@ -1951,7 +1953,8 @@ static BlockDriver bdrv_host_cdrom = {
.bdrv_aio_flush = raw_aio_flush,
.bdrv_truncate = raw_truncate,
-.bdrv_getlength = raw_getlength,
+.bdrv_getlength = raw_getlength,
+.has_variable_length = true,
.bdrv_get_allocated_file_size
= raw_get_allocated_file_size,
diff --git a/block/raw_bsd.c b/block/raw_bsd.c
index 0078c1b..2265dcc 100644
--- a/block/raw_bsd.c
+++ b/block/raw_bsd.c
@@ -178,6 +178,7 @@ static BlockDriver bdrv_raw = {
.bdrv_co_get_block_status = raw_co_get_block_status,
.bdrv_truncate= raw_truncate,
.bdrv_getlength = raw_getlength,
+.has_variable_length = true,
.bdrv_get_info= raw_get_info,
.bdrv_is_inserted = raw_is_inserted,
.bdrv_media_changed = raw_media_changed,
diff --git a/include/block/block_int.h b/include/block/block_int.h
index a48731d..1666066 100644
--- a/include/block/block_int.h
+++ b/include/block/block_int.h
@@ -156,8 +156,11 @@ struct BlockDriver {
const char *protocol_name;
int (*bdrv_truncate)(BlockDriverState *bs, int64_t offset);
+
int64_t (*bdrv_getlength)(BlockDriverState *bs);
+bool has_variable_length;
int64_t (*bdrv_get_allocated_file_size)(BlockDriverState *bs);
+
int (*bdrv_write_compressed)(BlockDriverState *bs, int64_t sector_num,
const uint8_t *buf, int nb_sectors);
raw-win32.c probably needs to have a .has_variable_length=true in
bdrv_host_device. Apart from that,
Reviewed-by: Paolo Bonzini pbonz...@redhat.com
Re: [Qemu-devel] kvm/hyper-v: obtaining client machine id
On Tue, 2013-10-29 at 10:40 +0100, Peter Lieven wrote: On 29.10.2013 10:03, Vadim Rozenfeld wrote: - Original Message - From: Peter Lieven p...@kamp.de To: Gleb Natapov g...@redhat.com, Vadim Rozenfeld vroze...@redhat.com, qemu-devel@nongnu.org Sent: Monday, October 28, 2013 6:50:31 PM Subject: [Qemu-devel] kvm/hyper-v: obtaining client machine id Hi, do you know if it is possible to obtain the client machine id of a Windows vServer via a Hyper-V hypercall? I would need an information to check vServer activations against our KMS. Hi Peter, WMI SoftwareLicensingService should be able to do it http://msdn.microsoft.com/en-us/library/cc534597%28v=vs.85%29.aspx Vadim. Sorry, I don't see how to get this information via a Hyper-V MSR?! Yes, there is no such MSR. But you probably don't need it in any case. If you need to collect CMIDs you can access WMI data on remote computers. Alternatively, you can write a small application to obtain CMID locally and pass it to host via virtio-serial port. Vadim. Peter Thanks, Peter
Re: [Qemu-devel] [PATCH] block: Avoid unecessary drv-bdrv_getlength() calls
Am 29.10.2013 um 13:02 hat Paolo Bonzini geschrieben: Il 29/10/2013 12:35, Kevin Wolf ha scritto: The block layer generally keeps the size of an image cached in bs-total_sectors so that it doesn't have to perform expensive operations to get the size whenever it needs it. This doesn't work however when using a backend that can change its size without qemu being aware of it, i.e. passthrough of removable media like CD-ROMs or floppy disks. For this reason, the caching is disabled when a removable device is used. It is obvious that checking whether the _guest_ device has removable media isn't the right thing to do when we want to know whether the size of the host backend can change. To make things worse, non-top-level BlockDriverStates never have any device attached, which makes qemu assume they are removable, so drv-bdrv_getlength() is always called on the protocol layer. In the case of raw-posix, this causes unnecessary lseek() system calls, which turned out to be rather expensive. This patch completely changes the logic and disables bs-total_sectors caching only for certain block driver types, for which a size change is expected: host_cdrom and host_floppy; also the raw format in case it sits on top of one of these protocols, but in the common case the nested bdrv_getlength() call on the protocol driver will use the cache again and avoid an expensive drv-bdrv_getlength() call. Signed-off-by: Kevin Wolf kw...@redhat.com raw-win32.c probably needs to have a .has_variable_length=true in bdrv_host_device. Apart from that, Reviewed-by: Paolo Bonzini pbonz...@redhat.com Thanks, good catch. I've added this now. Kevin
Re: [Qemu-devel] Prohibit Windows from running in QEMU
On Tue, Oct 29, 2013 at 01:26:59PM +0200, Gleb Natapov wrote: On Tue, Oct 29, 2013 at 01:13:24PM +0200, Michael S. Tsirkin wrote: On Tue, Oct 29, 2013 at 10:48:07AM +0100, Peter Lieven wrote: Hi all, this question might seem a bit weird, but does anyone see a good way to avoid that Windows is able to boot inside qemu? We have defined several profiles for different operation systems and I want to avoid that someone chooses Linux and then installs Windows within a VM. Reason is licensing. Thanks, Peter - create a device - write a linux driver - if driver is not enabled crash guest For how long to wait before a crash? Or don't crash, disable some other functionality, for example, you can keep all network links down until your driver is loaded. -- Gleb.
Re: [Qemu-devel] Prohibit Windows from running in QEMU
On Tue, Oct 29, 2013 at 02:17:10PM +0200, Michael S. Tsirkin wrote: On Tue, Oct 29, 2013 at 01:26:59PM +0200, Gleb Natapov wrote: On Tue, Oct 29, 2013 at 01:13:24PM +0200, Michael S. Tsirkin wrote: On Tue, Oct 29, 2013 at 10:48:07AM +0100, Peter Lieven wrote: Hi all, this question might seem a bit weird, but does anyone see a good way to avoid that Windows is able to boot inside qemu? We have defined several profiles for different operation systems and I want to avoid that someone chooses Linux and then installs Windows within a VM. Reason is licensing. Thanks, Peter - create a device - write a linux driver - if driver is not enabled crash guest For how long to wait before a crash? Or don't crash, disable some other functionality, for example, you can keep all network links down until your driver is loaded. Unless your root is on nfs and driver is in a module :). Anyway if you need to write guest code there are easier ways to do it than writing new device/driver. In ideal world you could have used ACPI _OS(?) function, but since most bioses are broken for anything but Windows Linux reports that it is Windows too. -- Gleb.
[Qemu-devel] [PATCH 0/2 v2] pc: inform SeaBIOS where 64-bit PCI hole begins
* simplify PCI address space mapping into system address space, replacing code duplication in piix/q53 PCs with a helper function * add fw_cfg 'etc/pcimem64-minimum-address' to allow QEMU reserve additional address space before 64-bit PCI hole. Which will be need for reserving memory hotplug region in highmem. SeaBIOS counterpart: http://patchwork.ozlabs.org/patch/283623/ v2: * use negative priority to map PCI address space under RAM memory regions which allows simplify code by removing pci_hole pci_hole64 memory region aliases Series depends on: memory: Change MemoryRegion priorities from unsigned to signed: Git tree for testing: https://github.com/imammedo/qemu/commits/pcimem64-minimum-address-v2 Igor Mammedov (1): pc: add 'etc/pcimem64-minimum-address' fw_cfg interface to SeaBIOS Michael S. Tsirkin (1): pc: map PCI address space as catchall region for not mapped addresses hw/i386/pc.c | 28 hw/i386/pc_piix.c |2 -- hw/pci-host/piix.c| 27 +-- hw/pci-host/q35.c | 28 ++-- include/hw/i386/pc.h | 15 +++ include/hw/pci-host/q35.h |2 -- 6 files changed, 30 insertions(+), 72 deletions(-)
[Qemu-devel] [PATCH 2/2] pc: add 'etc/pcimem64-minimum-address' fw_cfg interface to SeaBIOS
'etc/pcimem64-minimum-address' will allow QEMU to tell BIOS
where PCI memory address space mapping could start in high memory.
Allowing BIOS to start mapping 64-bit PCI BARs at address where it
wouldn't conflict with other mappings QEMU might place before it.
That permits QEMU to reserve extra address space before
64-bit PCI hole for memory hotplug.
Related SeaBIOS patch: http://patchwork.ozlabs.org/patch/283623/
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
hw/i386/pc.c | 14 +-
hw/pci-host/piix.c |3 ++-
hw/pci-host/q35.c|3 ++-
include/hw/i386/pc.h |3 ++-
4 files changed, 19 insertions(+), 4 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 340c696..53d07a4 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1055,11 +1055,23 @@ PcGuestInfo *pc_guest_info_init(ram_addr_t
below_4g_mem_size,
/* setup pci memory address space mapping into system address space */
void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory,
-MemoryRegion *pci_address_space)
+MemoryRegion *pci_address_space,
+uint64_t pcimem64_min_addr)
{
+uint64_t *val;
+FWCfgState *fw_cfg = fw_cfg_find();
+
/* Set to lower priority than RAM */
memory_region_add_subregion_overlap(system_memory, 0x0,
pci_address_space, -1);
+g_assert(fw_cfg);
+/*
+ * Align address at 1G, this makes sure it can be exactly covered
+ * with a PAT entry even when using huge pages.
+ */
+val = g_malloc(sizeof(*val));
+*val = cpu_to_le64(ROUND_UP(pcimem64_min_addr, 0x1ULL 30));
+fw_cfg_add_file(fw_cfg, etc/pcimem64-minimum-address, val, sizeof(*val));
}
void pc_acpi_init(const char *default_dsdt)
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index d34d20b..fcebe9a 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -351,7 +351,8 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state,
/* setup pci memory mapping */
pc_pci_as_mapping_init(OBJECT(f), f-system_memory,
- f-pci_address_space);
+ f-pci_address_space,
+ 0x1ULL + above_4g_mem_size);
memory_region_init_alias(f-smram_region, OBJECT(d), smram-region,
f-pci_address_space, 0xa, 0x2);
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 3e82caf..0f3aabc 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -339,7 +339,8 @@ static int mch_init(PCIDevice *d)
/* setup pci memory mapping */
pc_pci_as_mapping_init(OBJECT(mch), mch-system_memory,
- mch-pci_address_space);
+ mch-pci_address_space,
+ 0x1ULL + mch-above_4g_mem_size);
/* smram */
cpu_smm_register(mch_set_smm, mch);
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index de5a347..9b9bcf0 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -110,7 +110,8 @@ PcGuestInfo *pc_guest_info_init(ram_addr_t
below_4g_mem_size,
void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory,
-MemoryRegion *pci_address_space);
+MemoryRegion *pci_address_space,
+uint64_t pcimem64_min_addr);
FWCfgState *pc_memory_init(MemoryRegion *system_memory,
const char *kernel_filename,
--
1.7.1
[Qemu-devel] [PATCH 1/2] pc: map PCI address space as catchall region for not mapped addresses
From: Michael S. Tsirkin m...@redhat.com
With a help of negative memory region priority PCI address space
is mapped underneath RAM regions effectively catching every access
to addresses not mapped by any other region.
It simplifies PCI address space mapping into system address space.
Signed-off-by: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
hw/i386/pc.c | 20 ++--
hw/i386/pc_piix.c |2 --
hw/pci-host/piix.c| 26 --
hw/pci-host/q35.c | 27 +--
include/hw/i386/pc.h | 14 ++
include/hw/pci-host/q35.h |2 --
6 files changed, 17 insertions(+), 74 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 0c313fe..340c696 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1053,21 +1053,13 @@ PcGuestInfo *pc_guest_info_init(ram_addr_t
below_4g_mem_size,
return guest_info;
}
-void pc_init_pci64_hole(PcPciInfo *pci_info, uint64_t pci_hole64_start,
-uint64_t pci_hole64_size)
+/* setup pci memory address space mapping into system address space */
+void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory,
+MemoryRegion *pci_address_space)
{
-if ((sizeof(hwaddr) == 4) || (!pci_hole64_size)) {
-return;
-}
-/*
- * BIOS does not set MTRR entries for the 64 bit window, so no need to
- * align address to power of two. Align address at 1G, this makes sure
- * it can be exactly covered with a PAT entry even when using huge
- * pages.
- */
-pci_info-w64.begin = ROUND_UP(pci_hole64_start, 0x1ULL 30);
-pci_info-w64.end = pci_info-w64.begin + pci_hole64_size;
-assert(pci_info-w64.begin = pci_info-w64.end);
+/* Set to lower priority than RAM */
+memory_region_add_subregion_overlap(system_memory, 0x0,
+pci_address_space, -1);
}
void pc_acpi_init(const char *default_dsdt)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index c6042c7..73053cb 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -146,8 +146,6 @@ static void pc_init1(QEMUMachineInitArgs *args,
if (pci_enabled) {
pci_bus = i440fx_init(i440fx_state, piix3_devfn, isa_bus, gsi,
system_memory, system_io, args-ram_size,
- below_4g_mem_size,
- 0x1ULL - below_4g_mem_size,
above_4g_mem_size,
pci_memory, ram_memory);
} else {
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index c041149..d34d20b 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -102,8 +102,6 @@ struct PCII440FXState {
MemoryRegion *system_memory;
MemoryRegion *pci_address_space;
MemoryRegion *ram_memory;
-MemoryRegion pci_hole;
-MemoryRegion pci_hole_64bit;
PAMMemoryRegion pam_regions[13];
MemoryRegion smram_region;
uint8_t smm_enabled;
@@ -312,8 +310,6 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state,
MemoryRegion *address_space_mem,
MemoryRegion *address_space_io,
ram_addr_t ram_size,
-hwaddr pci_hole_start,
-hwaddr pci_hole_size,
ram_addr_t above_4g_mem_size,
MemoryRegion *pci_address_space,
MemoryRegion *ram_memory)
@@ -326,7 +322,6 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state,
PCII440FXState *f;
unsigned i;
I440FXState *i440fx;
-uint64_t pci_hole64_size;
dev = qdev_create(NULL, TYPE_I440FX_PCI_HOST_BRIDGE);
s = PCI_HOST_BRIDGE(dev);
@@ -354,23 +349,10 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state,
i440fx-pci_info.w32.begin = 0xe000;
}
-memory_region_init_alias(f-pci_hole, OBJECT(d), pci-hole,
f-pci_address_space,
- pci_hole_start, pci_hole_size);
-memory_region_add_subregion(f-system_memory, pci_hole_start,
f-pci_hole);
-
-pci_hole64_size = pci_host_get_hole64_size(i440fx-pci_hole64_size);
-
-pc_init_pci64_hole(i440fx-pci_info, 0x1ULL + above_4g_mem_size,
- pci_hole64_size);
-memory_region_init_alias(f-pci_hole_64bit, OBJECT(d), pci-hole64,
- f-pci_address_space,
- i440fx-pci_info.w64.begin,
- pci_hole64_size);
-if (pci_hole64_size) {
-memory_region_add_subregion(f-system_memory,
-i440fx-pci_info.w64.begin,
-f-pci_hole_64bit);
-}
+/* setup pci memory mapping */
+pc_pci_as_mapping_init(OBJECT(f), f-system_memory,
+ f-pci_address_space);
+
memory_region_init_alias(f-smram_region, OBJECT(d),
[Qemu-devel] [PATCH V2 00/19] PowerPC VSX Stage 3
From 89de52ee03f68cef1f3343d3275162427ec22ded Mon Sep 17 00:00:00 2001 From: Tom Musta tommu...@gmail.com Date: Tue, 29 Oct 2013 07:52:19 -0500 Subject: To: qemu-...@nongnu.org This is the third series of patches to add PowerPC VSX emulation support to QEMU. This series adds the floating point arithmetic, compare, conversion and rounding instructions. Instructions are implemented using helpers and wherever practical, existing floating point code such as the softfloat library and the existing PowerPC floating point helper code. As with the previous series, the Power ISA V2.06 instructions are added but the V2.07 instructions are not. The latter will be implemented in a future patch series. V2: Implemented changes based on feedback from Richard Henderson and Peter Maydell: - Included float64_to_uint64() patch in this series rather than just cite it as a pre-requesite. - Isolated float32_to_uint64() in its own patch. - Re-implemented helpers and eliminated the need for some of the proposed softfloat routines (float*_is_denormal, float*_get_unbiased_exp). - Re-implemented severy helpers so that corner cases (e.g. invalid operations) are detected by softfloat. - Re-implemented fused multiply-add to use the softfloat muladd routines. - Re-implemented the min/max instructions to used the softfloat min/max functions. - assorted style fixes Tom Musta (19): Fix float64_to_uint64 Add float32_to_uint64() Add set_fprf Argument to fload_invalid_op_excp() General Support for VSX Helpers Add VSX ISA2.06 xadd/xsub Instructions Add VSX ISA2.06 xmul Instructions Add VSX ISA2.06 xdiv Instructions Add VSX ISA2.06 xre Instructions Add VSX ISA2.06 xsqrt Instructions Add VSX ISA2.06 xrsqrte Instructions Add VSX ISA2.06 xtdiv Instructions Add VSX ISA2.06 xtsqrt Instructions Add VSX ISA2.06 Multiply Add Instructions Add VSX xscmp*dp Instructions Add VSX xmax/xmin Instructions Add VSX Vector Compare Instructions Add VSX Floating Point to Floating Point Conversion Instructions Add VSX ISA2.06 Integer Conversion Instructions Add VSX Rounding Instructions fpu/softfloat.c | 140 +++- include/fpu/softfloat.h |1 + target-ppc/fpu_helper.c | 1002 --- target-ppc/helper.h | 109 + target-ppc/translate.c | 243 5 files changed, 1439 insertions(+), 56 deletions(-)
[Qemu-devel] [PATCH V2 01/19] Fix float64_to_uint64
The comment preceding the float64_to_uint64 routine suggests that
the implementation is broken. And this is, indeed, the case.
This patch properly implements the conversion of a 64-bit floating
point number to an unsigned, 64 bit integer.
This contribution can be licensed under either the softfloat-2a or -2b
license.
V2: Added softfloat license statement.
V3: Modified to meet QEMU coding conventions.
Signed-off-by: Tom Musta tommu...@gmail.com
---
fpu/softfloat.c | 95 ++-
1 files changed, 87 insertions(+), 8 deletions(-)
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 7ba51b6..3070eaa 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -204,6 +204,47 @@ static int64 roundAndPackInt64( flag zSign, uint64_t
absZ0, uint64_t absZ1 STATU
}
/*
+| Takes the 128-bit fixed-point value formed by concatenating `absZ0' and
+| `absZ1', with binary point between bits 63 and 64 (between the input words),
+| and returns the properly rounded 64-bit unsigned integer corresponding to the
+| input. Ordinarily, the fixed-point input is simply rounded to an integer,
+| with the inexact exception raised if the input cannot be represented exactly
+| as an integer. However, if the fixed-point input is too large, the invalid
+| exception is raised and the largest unsigned integer is returned.
+**/
+
+static int64 roundAndPackUint64(uint64_t absZ0, uint64_t absZ1 STATUS_PARAM)
+{
+int8 roundingMode;
+flag roundNearestEven, increment;
+int64_t z;
+
+roundingMode = STATUS(float_rounding_mode);
+roundNearestEven = (roundingMode == float_round_nearest_even);
+increment = ((int64_t) absZ1 0);
+if (!roundNearestEven) {
+if (roundingMode == float_round_to_zero) {
+increment = 0;
+} else {
+increment = (roundingMode == float_round_up) absZ1;
+}
+}
+if (increment) {
+++absZ0;
+if (absZ0 == 0) {
+float_raise(float_flag_invalid STATUS_VAR);
+return LIT64(0x);
+}
+absZ0 = ~(((uint64_t)(absZ11) == 0) roundNearestEven);
+}
+z = absZ0;
+if (absZ1) {
+STATUS(float_exception_flags) |= float_flag_inexact;
+}
+return z;
+}
+
+/*
| Returns the fraction bits of the single-precision floating-point value `a'.
**/
@@ -6536,18 +6577,56 @@ uint_fast16_t float64_to_uint16_round_to_zero(float64 a
STATUS_PARAM)
return res;
}
-/* FIXME: This looks broken. */
-uint64_t float64_to_uint64 (float64 a STATUS_PARAM)
-{
-int64_t v;
+/*
+| Returns the result of converting the double-precision floating-point value
+| `a' to the 64-bit unsigned integer format. The conversion is
+| performed according to the IEC/IEEE Standard for Binary Floating-Point
+| Arithmetic---which means in particular that the conversion is rounded
+| according to the current rounding mode. If `a' is a NaN, the largest
+| positive integer is returned. If the conversion overflows, the
+| largest unsigned integer is returned. If 'a' is negative, zero is
+| returned.
+**/
-v = float64_val(int64_to_float64(INT64_MIN STATUS_VAR));
-v += float64_val(a);
-v = float64_to_int64(make_float64(v) STATUS_VAR);
+uint64_t float64_to_uint64(float64 a STATUS_PARAM)
+{
+flag aSign;
+int_fast16_t aExp, shiftCount;
+uint64_t aSig, aSigExtra;
+a = float64_squash_input_denormal(a STATUS_VAR);
-return v - INT64_MIN;
+aSig = extractFloat64Frac(a);
+aExp = extractFloat64Exp(a);
+aSign = extractFloat64Sign(a);
+if (aSign) {
+if (aExp) {
+float_raise(float_flag_invalid STATUS_VAR);
+} else if (aSig) { /* negative denormalized */
+float_raise(float_flag_inexact STATUS_VAR);
+}
+return 0;
+}
+if (aExp) {
+aSig |= LIT64(0x0010);
+}
+shiftCount = 0x433 - aExp;
+if (shiftCount = 0) {
+if (0x43E aExp) {
+if ((aSig != LIT64(0x0010)) ||
+ (aExp == 0x7FF)) {
+float_raise(float_flag_invalid STATUS_VAR);
+}
+return LIT64(0x);
+}
+aSigExtra = 0;
+aSig = -shiftCount;
+} else {
+shift64ExtraRightJamming(aSig, 0, shiftCount, aSig, aSigExtra);
+}
+return roundAndPackUint64(aSig, aSigExtra STATUS_VAR);
}
+
uint64_t float64_to_uint64_round_to_zero (float64 a STATUS_PARAM)
{
int64_t v;
--
1.7.1
[Qemu-devel] [PATCH V2 02/19] Add float32_to_uint64()
This patch adds the float32_to_uint64() routine, which converts a
32-bit floating point number to an unsigned 64 bit number.
This contribution can be licensed under either the softfloat-2a or -2b
license.
V2: Reduced patch to just this single routine per feedback from Peter
Maydell.
Signed-off-by: Tom Musta tommu...@gmail.com
---
fpu/softfloat.c | 45 +
include/fpu/softfloat.h |1 +
2 files changed, 46 insertions(+), 0 deletions(-)
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 3070eaa..cb03dca 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -1550,6 +1550,51 @@ int64 float32_to_int64( float32 a STATUS_PARAM )
/*
| Returns the result of converting the single-precision floating-point value
+| `a' to the 64-bit unsigned integer format. The conversion is
+| performed according to the IEC/IEEE Standard for Binary Floating-Point
+| Arithmetic---which means in particular that the conversion is rounded
+| according to the current rounding mode. If `a' is a NaN, the largest
+| unsigned integer is returned. Otherwise, if the conversion overflows, the
+| largest unsigned integer is returned. If the 'a' is negative, zero is
+| returned.
+**/
+
+uint64 float32_to_uint64(float32 a STATUS_PARAM)
+{
+flag aSign;
+int_fast16_t aExp, shiftCount;
+uint32_t aSig;
+uint64_t aSig64, aSigExtra;
+a = float32_squash_input_denormal(a STATUS_VAR);
+
+aSig = extractFloat32Frac(a);
+aExp = extractFloat32Exp(a);
+aSign = extractFloat32Sign(a);
+if (aSign) {
+if (aExp) {
+float_raise(float_flag_invalid STATUS_VAR);
+} else if (aSig) { /* negative denormalized */
+float_raise(float_flag_inexact STATUS_VAR);
+}
+return 0;
+}
+shiftCount = 0xBE - aExp;
+if (aExp) {
+aSig |= 0x0080;
+}
+if (shiftCount 0) {
+float_raise(float_flag_invalid STATUS_VAR);
+return (int64_t)LIT64(0x);
+}
+
+aSig64 = aSig;
+aSig64 = 40;
+shift64ExtraRightJamming(aSig64, 0, shiftCount, aSig64, aSigExtra);
+return roundAndPackUint64(aSig64, aSigExtra STATUS_VAR);
+}
+
+/*
+| Returns the result of converting the single-precision floating-point value
| `a' to the 64-bit two's complement integer format. The conversion is
| performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic, except that the conversion is always rounded toward zero. If
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index f3927e2..6448082 100644
--- a/include/fpu/softfloat.h
+++ b/include/fpu/softfloat.h
@@ -272,6 +272,7 @@ int32 float32_to_int32_round_to_zero( float32 STATUS_PARAM
);
uint32 float32_to_uint32( float32 STATUS_PARAM );
uint32 float32_to_uint32_round_to_zero( float32 STATUS_PARAM );
int64 float32_to_int64( float32 STATUS_PARAM );
+uint64 float32_to_uint64(float32 STATUS_PARAM);
int64 float32_to_int64_round_to_zero( float32 STATUS_PARAM );
float64 float32_to_float64( float32 STATUS_PARAM );
floatx80 float32_to_floatx80( float32 STATUS_PARAM );
--
1.7.1
[Qemu-devel] [PATCH V2 03/19] Add set_fprf Argument to fload_invalid_op_excp()
The fload_invalid_op_excp() function sets assorted invalid
operation status bits. However, it also implicitly modifies
the FPRF field of the PowerPC FPSCR. Many VSX instructions
set invalid operation bits but do not alter FPRF. Thus the
function is more generally useful if the setting of the FPRF
field is made conditional via a parameter.
All invocations of this routine in existing instructions are
modified to pass 1 and thus retain their current behavior.
Signed-off-by: Tom Musta tommu...@gmail.com
---
target-ppc/fpu_helper.c | 103 +--
1 files changed, 55 insertions(+), 48 deletions(-)
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index 4f60218..f0b0a49 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -106,7 +106,8 @@ uint32_t helper_compute_fprf(CPUPPCState *env, uint64_t
arg, uint32_t set_fprf)
}
/* Floating-point invalid operations exception */
-static inline uint64_t fload_invalid_op_excp(CPUPPCState *env, int op)
+static inline uint64_t fload_invalid_op_excp(CPUPPCState *env, int op,
+ int set_fpcc)
{
uint64_t ret = 0;
int ve;
@@ -138,8 +139,10 @@ static inline uint64_t fload_invalid_op_excp(CPUPPCState
*env, int op)
case POWERPC_EXCP_FP_VXVC:
/* Ordered comparison of NaN */
env-fpscr |= 1 FPSCR_VXVC;
-env-fpscr = ~(0xF FPSCR_FPCC);
-env-fpscr |= 0x11 FPSCR_FPCC;
+if (set_fpcc) {
+env-fpscr = ~(0xF FPSCR_FPCC);
+env-fpscr |= 0x11 FPSCR_FPCC;
+}
/* We must update the target FPR before raising the exception */
if (ve != 0) {
env-exception_index = POWERPC_EXCP_PROGRAM;
@@ -158,8 +161,10 @@ static inline uint64_t fload_invalid_op_excp(CPUPPCState
*env, int op)
if (ve == 0) {
/* Set the result to quiet NaN */
ret = 0x7FF8ULL;
-env-fpscr = ~(0xF FPSCR_FPCC);
-env-fpscr |= 0x11 FPSCR_FPCC;
+if (set_fpcc) {
+env-fpscr = ~(0xF FPSCR_FPCC);
+env-fpscr |= 0x11 FPSCR_FPCC;
+}
}
break;
case POWERPC_EXCP_FP_VXCVI:
@@ -169,8 +174,10 @@ static inline uint64_t fload_invalid_op_excp(CPUPPCState
*env, int op)
if (ve == 0) {
/* Set the result to quiet NaN */
ret = 0x7FF8ULL;
-env-fpscr = ~(0xF FPSCR_FPCC);
-env-fpscr |= 0x11 FPSCR_FPCC;
+if (set_fpcc) {
+env-fpscr = ~(0xF FPSCR_FPCC);
+env-fpscr |= 0x11 FPSCR_FPCC;
+}
}
break;
}
@@ -505,12 +512,12 @@ uint64_t helper_fadd(CPUPPCState *env, uint64_t arg1,
uint64_t arg2)
if (unlikely(float64_is_infinity(farg1.d) float64_is_infinity(farg2.d)
float64_is_neg(farg1.d) != float64_is_neg(farg2.d))) {
/* Magnitude subtraction of infinities */
-farg1.ll = fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXISI);
+farg1.ll = fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXISI, 1);
} else {
if (unlikely(float64_is_signaling_nan(farg1.d) ||
float64_is_signaling_nan(farg2.d))) {
/* sNaN addition */
-fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN);
+fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1);
}
farg1.d = float64_add(farg1.d, farg2.d, env-fp_status);
}
@@ -529,12 +536,12 @@ uint64_t helper_fsub(CPUPPCState *env, uint64_t arg1,
uint64_t arg2)
if (unlikely(float64_is_infinity(farg1.d) float64_is_infinity(farg2.d)
float64_is_neg(farg1.d) == float64_is_neg(farg2.d))) {
/* Magnitude subtraction of infinities */
-farg1.ll = fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXISI);
+farg1.ll = fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXISI, 1);
} else {
if (unlikely(float64_is_signaling_nan(farg1.d) ||
float64_is_signaling_nan(farg2.d))) {
/* sNaN subtraction */
-fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN);
+fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1);
}
farg1.d = float64_sub(farg1.d, farg2.d, env-fp_status);
}
@@ -553,12 +560,12 @@ uint64_t helper_fmul(CPUPPCState *env, uint64_t arg1,
uint64_t arg2)
if (unlikely((float64_is_infinity(farg1.d) float64_is_zero(farg2.d)) ||
(float64_is_zero(farg1.d) float64_is_infinity(farg2.d {
/* Multiplication of zero by infinity */
-farg1.ll = fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXIMZ);
+farg1.ll = fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXIMZ, 1);
} else {
if (unlikely(float64_is_signaling_nan(farg1.d) ||
float64_is_signaling_nan(farg2.d))) {
/* sNaN multiplication */
-
[Qemu-devel] [PATCH V2 05/19] Add VSX ISA2.06 xadd/xsub Instructions
This patch adds the floating point addition and subtraction
instructions defined by V2.06 of the PowerPC ISA: xssubdp,
xvsubdp and xvsubsp.
V2: re-implemented helper macro and combined add and substract.
Signed-off-by: Tom Musta tommu...@gmail.com
---
target-ppc/fpu_helper.c | 51 +++
target-ppc/helper.h |9
target-ppc/translate.c | 18
3 files changed, 78 insertions(+), 0 deletions(-)
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index cea94ac..a577d28 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -1758,3 +1758,54 @@ static void putVSR(int n, ppc_vsr_t *vsr, CPUPPCState
*env)
}
#define float64_to_float64(x, env) x
+
+
+/* VSX_ADD_SUB - VSX floating point add/subract
+ * name - instruction mnemonic
+ * op- operation (add or sub)
+ * nels - number of elements (1, 2 or 4)
+ * tp- type (float32 or float64)
+ * fld - vsr_t field (f32 or f64)
+ * sfprf - set FPRF
+ */
+#define VSX_ADD_SUB(name, op, nels, tp, fld, sfprf) \
+void helper_##name(CPUPPCState *env, uint32_t opcode)\
+{\
+ppc_vsr_t xt, xa, xb;\
+int i; \
+ \
+getVSR(xA(opcode), xa, env);\
+getVSR(xB(opcode), xb, env);\
+getVSR(xT(opcode), xt, env);\
+helper_reset_fpstatus(env); \
+ \
+for (i = 0; i nels; i++) { \
+float_status tstat = env-fp_status; \
+set_float_exception_flags(0, tstat);\
+xt.fld[i] = tp##_##op(xa.fld[i], xb.fld[i], tstat); \
+env-fp_status.float_exception_flags |= tstat.float_exception_flags; \
+ \
+if (unlikely(tstat.float_exception_flags float_flag_invalid)) {\
+if (tp##_is_infinity(xa.fld[i]) tp##_is_infinity(xb.fld[i])) {\
+fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXISI, sfprf);\
+} else if (tp##_is_signaling_nan(xa.fld[i]) || \
+ tp##_is_signaling_nan(xb.fld[i])) { \
+fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, sfprf); \
+}\
+}\
+ \
+if (sfprf) { \
+helper_compute_fprf(env, xt.fld[i], sfprf); \
+}\
+}\
+putVSR(xT(opcode), xt, env);\
+helper_float_check_status(env); \
+}
+
+VSX_ADD_SUB(xsadddp, add, 1, float64, f64, 1)
+VSX_ADD_SUB(xvadddp, add, 2, float64, f64, 0)
+VSX_ADD_SUB(xvaddsp, add, 4, float32, f32, 0)
+VSX_ADD_SUB(xssubdp, sub, 1, float64, f64, 1)
+VSX_ADD_SUB(xvsubdp, sub, 2, float64, f64, 0)
+VSX_ADD_SUB(xvsubsp, sub, 4, float32, f32, 0)
+
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 6d282bb..966200d 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -251,6 +251,15 @@ DEF_HELPER_4(vcfsx, void, env, avr, avr, i32)
DEF_HELPER_4(vctuxs, void, env, avr, avr, i32)
DEF_HELPER_4(vctsxs, void, env, avr, avr, i32)
+DEF_HELPER_2(xsadddp, void, env, i32)
+DEF_HELPER_2(xssubdp, void, env, i32)
+
+DEF_HELPER_2(xvadddp, void, env, i32)
+DEF_HELPER_2(xvsubdp, void, env, i32)
+
+DEF_HELPER_2(xvaddsp, void, env, i32)
+DEF_HELPER_2(xvsubsp, void, env, i32)
+
DEF_HELPER_2(efscfsi, i32, env, i32)
DEF_HELPER_2(efscfui, i32, env, i32)
DEF_HELPER_2(efscfuf, i32, env, i32)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 0453900..d20b269 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -7295,6 +7295,15 @@ static void gen_##name(DisasContext * ctx)
\
tcg_temp_free_i32(opc); \
}
+GEN_VSX_HELPER_2(xsadddp, 0x00, 0x04, 0, PPC2_VSX)
+GEN_VSX_HELPER_2(xssubdp, 0x00, 0x05, 0, PPC2_VSX)
+
+GEN_VSX_HELPER_2(xvadddp,
[Qemu-devel] [PATCH V2 04/19] General Support for VSX Helpers
This patch adds general support that will be used by the VSX helper
routines:
- a union describing the various VSR subfields.
- access routines to get and set VSRs
- VSX decoders
- a general routine to generate a handler that invokes a VSX
helper.
Signed-off-by: Tom Musta tommu...@gmail.com
---
target-ppc/fpu_helper.c | 41 +
target-ppc/translate.c | 14 ++
2 files changed, 55 insertions(+), 0 deletions(-)
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index f0b0a49..cea94ac 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -1717,3 +1717,44 @@ uint32_t helper_efdcmpeq(CPUPPCState *env, uint64_t op1,
uint64_t op2)
/* XXX: TODO: test special values (NaN, infinites, ...) */
return helper_efdtsteq(env, op1, op2);
}
+
+#define DECODE_SPLIT(opcode, shift1, nb1, shift2, nb2) \
+(opcode) (shift1)) ((1 (nb1)) - 1)) nb2) |\
+ (((opcode) (shift2)) ((1 (nb2)) - 1)))
+
+#define xT(opcode) DECODE_SPLIT(opcode, 0, 1, 21, 5)
+#define xA(opcode) DECODE_SPLIT(opcode, 2, 1, 16, 5)
+#define xB(opcode) DECODE_SPLIT(opcode, 1, 1, 11, 5)
+#define xC(opcode) DECODE_SPLIT(opcode, 3, 1, 6, 5)
+#define BF(opcode) (((opcode) (31-8)) 7)
+
+typedef union _ppc_vsr_t {
+uint64_t u64[2];
+uint32_t u32[4];
+float32 f32[4];
+float64 f64[2];
+} ppc_vsr_t;
+
+static void getVSR(int n, ppc_vsr_t *vsr, CPUPPCState *env)
+{
+if (n 32) {
+vsr-f64[0] = env-fpr[n];
+vsr-u64[1] = env-vsr[n];
+} else {
+vsr-u64[0] = env-avr[n-32].u64[0];
+vsr-u64[1] = env-avr[n-32].u64[1];
+}
+}
+
+static void putVSR(int n, ppc_vsr_t *vsr, CPUPPCState *env)
+{
+if (n 32) {
+env-fpr[n] = vsr-f64[0];
+env-vsr[n] = vsr-u64[1];
+} else {
+env-avr[n-32].u64[0] = vsr-u64[0];
+env-avr[n-32].u64[1] = vsr-u64[1];
+}
+}
+
+#define float64_to_float64(x, env) x
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index ce07a56..0453900 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -7280,6 +7280,20 @@ VSX_VECTOR_MOVE(xvnabssp, OP_NABS, SGN_MASK_SP)
VSX_VECTOR_MOVE(xvnegsp, OP_NEG, SGN_MASK_SP)
VSX_VECTOR_MOVE(xvcpsgnsp, OP_CPSGN, SGN_MASK_SP)
+#define GEN_VSX_HELPER_2(name, op1, op2, inval, type) \
+static void gen_##name(DisasContext * ctx)\
+{ \
+TCGv_i32 opc; \
+if (unlikely(!ctx-vsx_enabled)) {\
+gen_exception(ctx, POWERPC_EXCP_VSXU);\
+return; \
+} \
+/* NIP cannot be restored if the memory exception comes from an helper */ \
+gen_update_nip(ctx, ctx-nip - 4);\
+opc = tcg_const_i32(ctx-opcode); \
+gen_helper_##name(cpu_env, opc); \
+tcg_temp_free_i32(opc); \
+}
#define VSX_LOGICAL(name, tcg_op)\
static void glue(gen_, name)(DisasContext * ctx) \
--
1.7.1
[Qemu-devel] [PATCH V2 07/19] Add VSX ISA2.06 xdiv Instructions
This patch adds the VSX floating point divide instructions defined
by V2.06 of the PowerPC ISA: xsdivdp, xvdivdp, xvdivsp.
V2: re-implemented the VSX_DIV macro.
Signed-off-by: Tom Musta tommu...@gmail.com
---
target-ppc/fpu_helper.c | 49 +++
target-ppc/helper.h |3 ++
target-ppc/translate.c |6 +
3 files changed, 58 insertions(+), 0 deletions(-)
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index 51ca589..c84f432 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -1855,3 +1855,52 @@ void helper_##op(CPUPPCState *env, uint32_t opcode)
\
VSX_MUL(xsmuldp, 1, float64, f64, 1)
VSX_MUL(xvmuldp, 2, float64, f64, 0)
VSX_MUL(xvmulsp, 4, float32, f32, 0)
+
+/* VSX_DIV - VSX floating point divide
+ * op- instruction mnemonic
+ * nels - number of elements (1, 2 or 4)
+ * tp- type (float32 or float64)
+ * fld - vsr_t field (f32 or f64)
+ * sfprf - set FPRF
+ */
+#define VSX_DIV(op, nels, tp, fld, sfprf) \
+void helper_##op(CPUPPCState *env, uint32_t opcode) \
+{ \
+ppc_vsr_t xt, xa, xb; \
+int i;\
+ \
+getVSR(xA(opcode), xa, env); \
+getVSR(xB(opcode), xb, env); \
+getVSR(xT(opcode), xt, env); \
+helper_reset_fpstatus(env); \
+ \
+for (i = 0; i nels; i++) { \
+float_status tstat = env-fp_status; \
+set_float_exception_flags(0, tstat); \
+xt.fld[i] = tp##_div(xa.fld[i], xb.fld[i], tstat); \
+env-fp_status.float_exception_flags |= tstat.float_exception_flags; \
+ \
+if (unlikely(tstat.float_exception_flags float_flag_invalid)) { \
+if (tp##_is_infinity(xa.fld[i]) tp##_is_infinity(xb.fld[i])) { \
+fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXIDI, sfprf); \
+} else if (tp##_is_zero(xa.fld[i]) \
+tp##_is_zero(xb.fld[i])) {\
+fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXZDZ, sfprf); \
+} else if (tp##_is_signaling_nan(xa.fld[i]) ||\
+tp##_is_signaling_nan(xb.fld[i])) { \
+fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, sfprf);\
+} \
+} \
+ \
+if (sfprf) { \
+helper_compute_fprf(env, xt.fld[i], sfprf); \
+} \
+} \
+ \
+putVSR(xT(opcode), xt, env); \
+helper_float_check_status(env); \
+}
+
+VSX_DIV(xsdivdp, 1, float64, f64, 1)
+VSX_DIV(xvdivdp, 2, float64, f64, 0)
+VSX_DIV(xvdivsp, 4, float32, f32, 0)
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index ecb900f..6ede7ea 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -254,14 +254,17 @@ DEF_HELPER_4(vctsxs, void, env, avr, avr, i32)
DEF_HELPER_2(xsadddp, void, env, i32)
DEF_HELPER_2(xssubdp, void, env, i32)
DEF_HELPER_2(xsmuldp, void, env, i32)
+DEF_HELPER_2(xsdivdp, void, env, i32)
DEF_HELPER_2(xvadddp, void, env, i32)
DEF_HELPER_2(xvsubdp, void, env, i32)
DEF_HELPER_2(xvmuldp, void, env, i32)
+DEF_HELPER_2(xvdivdp, void, env, i32)
DEF_HELPER_2(xvaddsp, void, env, i32)
DEF_HELPER_2(xvsubsp, void, env, i32)
DEF_HELPER_2(xvmulsp, void, env, i32)
+DEF_HELPER_2(xvdivsp, void, env, i32)
DEF_HELPER_2(efscfsi, i32, env, i32)
DEF_HELPER_2(efscfui, i32, env, i32)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 1fb21b7..e77fcde 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -7298,14 +7298,17 @@ static void gen_##name(DisasContext
[Qemu-devel] [PATCH V2 06/19] Add VSX ISA2.06 xmul Instructions
This patch adds the VSX floating point multiply instructions defined
by V2.06 of the PowerPC ISA: xsmuldp, xvmuldp, xvmulsp.
V2: re-implemented VSX_MUL macro.
Signed-off-by: Tom Musta tommu...@gmail.com
---
target-ppc/fpu_helper.c | 46 ++
target-ppc/helper.h |3 +++
target-ppc/translate.c |6 ++
3 files changed, 55 insertions(+), 0 deletions(-)
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index a577d28..51ca589 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -1809,3 +1809,49 @@ VSX_ADD_SUB(xssubdp, sub, 1, float64, f64, 1)
VSX_ADD_SUB(xvsubdp, sub, 2, float64, f64, 0)
VSX_ADD_SUB(xvsubsp, sub, 4, float32, f32, 0)
+/* VSX_MUL - VSX floating point multiply
+ * op- instruction mnemonic
+ * nels - number of elements (1, 2 or 4)
+ * tp- type (float32 or float64)
+ * fld - vsr_t field (f32 or f64)
+ * sfprf - set FPRF
+ */
+#define VSX_MUL(op, nels, tp, fld, sfprf)\
+void helper_##op(CPUPPCState *env, uint32_t opcode) \
+{\
+ppc_vsr_t xt, xa, xb;\
+int i; \
+ \
+getVSR(xA(opcode), xa, env);\
+getVSR(xB(opcode), xb, env);\
+getVSR(xT(opcode), xt, env);\
+helper_reset_fpstatus(env); \
+ \
+for (i = 0; i nels; i++) { \
+float_status tstat = env-fp_status; \
+set_float_exception_flags(0, tstat);\
+xt.fld[i] = tp##_mul(xa.fld[i], xb.fld[i], tstat); \
+env-fp_status.float_exception_flags |= tstat.float_exception_flags; \
+ \
+if (unlikely(tstat.float_exception_flags float_flag_invalid)) {\
+if ((tp##_is_infinity(xa.fld[i]) tp##_is_zero(xb.fld[i])) || \
+(tp##_is_infinity(xb.fld[i]) tp##_is_zero(xa.fld[i]))) { \
+fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXIMZ, sfprf);\
+} else if (tp##_is_signaling_nan(xa.fld[i]) || \
+ tp##_is_signaling_nan(xb.fld[i])) { \
+fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, sfprf); \
+}\
+}\
+ \
+if (sfprf) { \
+helper_compute_fprf(env, xt.fld[i], sfprf); \
+}\
+}\
+ \
+putVSR(xT(opcode), xt, env);\
+helper_float_check_status(env); \
+}
+
+VSX_MUL(xsmuldp, 1, float64, f64, 1)
+VSX_MUL(xvmuldp, 2, float64, f64, 0)
+VSX_MUL(xvmulsp, 4, float32, f32, 0)
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 966200d..ecb900f 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -253,12 +253,15 @@ DEF_HELPER_4(vctsxs, void, env, avr, avr, i32)
DEF_HELPER_2(xsadddp, void, env, i32)
DEF_HELPER_2(xssubdp, void, env, i32)
+DEF_HELPER_2(xsmuldp, void, env, i32)
DEF_HELPER_2(xvadddp, void, env, i32)
DEF_HELPER_2(xvsubdp, void, env, i32)
+DEF_HELPER_2(xvmuldp, void, env, i32)
DEF_HELPER_2(xvaddsp, void, env, i32)
DEF_HELPER_2(xvsubsp, void, env, i32)
+DEF_HELPER_2(xvmulsp, void, env, i32)
DEF_HELPER_2(efscfsi, i32, env, i32)
DEF_HELPER_2(efscfui, i32, env, i32)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index d20b269..1fb21b7 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -7297,12 +7297,15 @@ static void gen_##name(DisasContext * ctx)
\
GEN_VSX_HELPER_2(xsadddp, 0x00, 0x04, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xssubdp, 0x00, 0x05, 0, PPC2_VSX)
+GEN_VSX_HELPER_2(xsmuldp, 0x00, 0x06, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvadddp, 0x00, 0x0C, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvsubdp, 0x00, 0x0D, 0, PPC2_VSX)
+GEN_VSX_HELPER_2(xvmuldp, 0x00, 0x0E, 0, PPC2_VSX)
[Qemu-devel] [PATCH V2 08/19] Add VSX ISA2.06 xre Instructions
This patch adds the VSX floating point reciprocal estimate instructions
defined by V2.06 of the PowerPC ISA: xsredp, xvredp, xvresp.
Signed-off-by: Tom Musta tommu...@gmail.com
---
target-ppc/fpu_helper.c | 35 +++
target-ppc/helper.h |3 +++
target-ppc/translate.c |6 ++
3 files changed, 44 insertions(+), 0 deletions(-)
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index c84f432..5908e41 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -1904,3 +1904,38 @@ void helper_##op(CPUPPCState *env, uint32_t opcode)
\
VSX_DIV(xsdivdp, 1, float64, f64, 1)
VSX_DIV(xvdivdp, 2, float64, f64, 0)
VSX_DIV(xvdivsp, 4, float32, f32, 0)
+
+/* VSX_RE - VSX floating point reciprocal estimate
+ * op- instruction mnemonic
+ * nels - number of elements (1, 2 or 4)
+ * tp- type (float32 or float64)
+ * fld - vsr_t field (f32 or f64)
+ * sfprf - set FPRF
+ */
+#define VSX_RE(op, nels, tp, fld, sfprf) \
+void helper_##op(CPUPPCState *env, uint32_t opcode) \
+{ \
+ppc_vsr_t xt, xb; \
+int i;\
+ \
+getVSR(xB(opcode), xb, env); \
+getVSR(xT(opcode), xt, env); \
+helper_reset_fpstatus(env); \
+ \
+for (i = 0; i nels; i++) { \
+if (unlikely(tp##_is_signaling_nan(xb.fld[i]))) { \
+fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, sfprf);\
+} \
+xt.fld[i] = tp##_div(tp##_one, xb.fld[i], env-fp_status); \
+if (sfprf) { \
+helper_compute_fprf(env, xt.fld[0], sfprf); \
+} \
+} \
+ \
+putVSR(xT(opcode), xt, env); \
+helper_float_check_status(env); \
+}
+
+VSX_RE(xsredp, 1, float64, f64, 1)
+VSX_RE(xvredp, 2, float64, f64, 0)
+VSX_RE(xvresp, 4, float32, f32, 0)
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 6ede7ea..fe5b61c 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -255,16 +255,19 @@ DEF_HELPER_2(xsadddp, void, env, i32)
DEF_HELPER_2(xssubdp, void, env, i32)
DEF_HELPER_2(xsmuldp, void, env, i32)
DEF_HELPER_2(xsdivdp, void, env, i32)
+DEF_HELPER_2(xsredp, void, env, i32)
DEF_HELPER_2(xvadddp, void, env, i32)
DEF_HELPER_2(xvsubdp, void, env, i32)
DEF_HELPER_2(xvmuldp, void, env, i32)
DEF_HELPER_2(xvdivdp, void, env, i32)
+DEF_HELPER_2(xvredp, void, env, i32)
DEF_HELPER_2(xvaddsp, void, env, i32)
DEF_HELPER_2(xvsubsp, void, env, i32)
DEF_HELPER_2(xvmulsp, void, env, i32)
DEF_HELPER_2(xvdivsp, void, env, i32)
+DEF_HELPER_2(xvresp, void, env, i32)
DEF_HELPER_2(efscfsi, i32, env, i32)
DEF_HELPER_2(efscfui, i32, env, i32)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index e77fcde..d2060b7 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -7299,16 +7299,19 @@ GEN_VSX_HELPER_2(xsadddp, 0x00, 0x04, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xssubdp, 0x00, 0x05, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xsmuldp, 0x00, 0x06, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xsdivdp, 0x00, 0x07, 0, PPC2_VSX)
+GEN_VSX_HELPER_2(xsredp, 0x14, 0x05, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvadddp, 0x00, 0x0C, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvsubdp, 0x00, 0x0D, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvmuldp, 0x00, 0x0E, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvdivdp, 0x00, 0x0F, 0, PPC2_VSX)
+GEN_VSX_HELPER_2(xvredp, 0x14, 0x0D, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvaddsp, 0x00, 0x08, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvsubsp, 0x00, 0x09, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvmulsp, 0x00, 0x0A, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvdivsp, 0x00, 0x0B, 0, PPC2_VSX)
+GEN_VSX_HELPER_2(xvresp, 0x14, 0x09, 0, PPC2_VSX)
#define VSX_LOGICAL(name, tcg_op)\
static void glue(gen_, name)(DisasContext * ctx) \
@@ -9996,16 +,19 @@ GEN_XX3FORM(xsadddp, 0x00, 0x04, PPC2_VSX),
GEN_XX3FORM(xssubdp, 0x00, 0x05, PPC2_VSX),
GEN_XX3FORM(xsmuldp, 0x00, 0x06, PPC2_VSX),
GEN_XX3FORM(xsdivdp, 0x00, 0x07, PPC2_VSX),
[Qemu-devel] [PATCH V2 09/19] Add VSX ISA2.06 xsqrt Instructions
This patch adds the VSX floating point square root instructions
defined by V2.06 of the PowerPC ISA: xssqrtdp, xvsqrtdp, xvsqrtsp.
V2: re-implemented the VSX_SQRT macro.
Signed-off-by: Tom Musta tommu...@gmail.com
---
target-ppc/fpu_helper.c | 44
target-ppc/helper.h |3 +++
target-ppc/translate.c |6 ++
3 files changed, 53 insertions(+), 0 deletions(-)
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index 5908e41..060e6a0 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -1939,3 +1939,47 @@ void helper_##op(CPUPPCState *env, uint32_t opcode)
\
VSX_RE(xsredp, 1, float64, f64, 1)
VSX_RE(xvredp, 2, float64, f64, 0)
VSX_RE(xvresp, 4, float32, f32, 0)
+
+/* VSX_SQRT - VSX floating point square root
+ * op- instruction mnemonic
+ * nels - number of elements (1, 2 or 4)
+ * tp- type (float32 or float64)
+ * fld - vsr_t field (f32 or f64)
+ * sfprf - set FPRF
+ */
+#define VSX_SQRT(op, nels, tp, fld, sfprf) \
+void helper_##op(CPUPPCState *env, uint32_t opcode) \
+{\
+ppc_vsr_t xt, xb;\
+int i; \
+ \
+getVSR(xB(opcode), xb, env);\
+getVSR(xT(opcode), xt, env);\
+helper_reset_fpstatus(env); \
+ \
+for (i = 0; i nels; i++) { \
+float_status tstat = env-fp_status; \
+set_float_exception_flags(0, tstat);\
+xt.fld[i] = tp##_sqrt(xb.fld[i], tstat);\
+env-fp_status.float_exception_flags |= tstat.float_exception_flags; \
+ \
+if (unlikely(tstat.float_exception_flags float_flag_invalid)) {\
+if (tp##_is_neg(xb.fld[i]) !tp##_is_zero(xb.fld[i])) {\
+fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSQRT, sfprf); \
+} else if (tp##_is_signaling_nan(xb.fld[i])) { \
+fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, sfprf); \
+}\
+}\
+ \
+if (sfprf) { \
+helper_compute_fprf(env, xt.fld[i], sfprf); \
+}\
+}\
+ \
+putVSR(xT(opcode), xt, env);\
+helper_float_check_status(env); \
+}
+
+VSX_SQRT(xssqrtdp, 1, float64, f64, 1)
+VSX_SQRT(xvsqrtdp, 2, float64, f64, 0)
+VSX_SQRT(xvsqrtsp, 4, float32, f32, 0)
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index fe5b61c..a6e7e62 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -256,18 +256,21 @@ DEF_HELPER_2(xssubdp, void, env, i32)
DEF_HELPER_2(xsmuldp, void, env, i32)
DEF_HELPER_2(xsdivdp, void, env, i32)
DEF_HELPER_2(xsredp, void, env, i32)
+DEF_HELPER_2(xssqrtdp, void, env, i32)
DEF_HELPER_2(xvadddp, void, env, i32)
DEF_HELPER_2(xvsubdp, void, env, i32)
DEF_HELPER_2(xvmuldp, void, env, i32)
DEF_HELPER_2(xvdivdp, void, env, i32)
DEF_HELPER_2(xvredp, void, env, i32)
+DEF_HELPER_2(xvsqrtdp, void, env, i32)
DEF_HELPER_2(xvaddsp, void, env, i32)
DEF_HELPER_2(xvsubsp, void, env, i32)
DEF_HELPER_2(xvmulsp, void, env, i32)
DEF_HELPER_2(xvdivsp, void, env, i32)
DEF_HELPER_2(xvresp, void, env, i32)
+DEF_HELPER_2(xvsqrtsp, void, env, i32)
DEF_HELPER_2(efscfsi, i32, env, i32)
DEF_HELPER_2(efscfui, i32, env, i32)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index d2060b7..c5c97ba 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -7300,18 +7300,21 @@ GEN_VSX_HELPER_2(xssubdp, 0x00, 0x05, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xsmuldp, 0x00, 0x06, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xsdivdp, 0x00, 0x07, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xsredp, 0x14, 0x05, 0, PPC2_VSX)
+GEN_VSX_HELPER_2(xssqrtdp, 0x16, 0x04, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvadddp, 0x00, 0x0C, 0,
[Qemu-devel] [PATCH V2 12/19] Add VSX ISA2.06 xtsqrt Instructions
This patch adds the VSX floating point test for software square
root instructions defined by V2.06 of the PowerPC ISA: xstsqrtdp,
xvtsqrtdp, xvtsqrtsp.
V2: (a) using locally implemented ppc_float*_get_unbiased_exp
routines (b) eliminated dependency on float*_is_denormal().
Signed-off-by: Tom Musta tommu...@gmail.com
---
target-ppc/fpu_helper.c | 54 +++
target-ppc/helper.h |3 ++
target-ppc/translate.c |6 +
3 files changed, 63 insertions(+), 0 deletions(-)
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index ee03942..73227b7 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -2095,3 +2095,57 @@ void helper_##op(CPUPPCState *env, uint32_t opcode)
\
VSX_TDIV(xstdivdp, 1, float64, f64, -1022, 1023, 52)
VSX_TDIV(xvtdivdp, 2, float64, f64, -1022, 1023, 52)
VSX_TDIV(xvtdivsp, 4, float32, f32, -126, 127, 23)
+
+/* VSX_TSQRT - VSX floating point test for square root
+ * op- instruction mnemonic
+ * nels - number of elements (1, 2 or 4)
+ * tp- type (float32 or float64)
+ * fld - vsr_t field (f32 or f64)
+ * emin - minimum unbiased exponent
+ * emax - maximum unbiased exponent
+ * nbits - number of fraction bits
+ */
+#define VSX_TSQRT(op, nels, tp, fld, emin, nbits) \
+void helper_##op(CPUPPCState *env, uint32_t opcode) \
+{ \
+ppc_vsr_t xa, xb; \
+int i; \
+int fe_flag = 0;\
+int fg_flag = 0;\
+\
+getVSR(xA(opcode), xa, env); \
+getVSR(xB(opcode), xb, env); \
+\
+for (i = 0; i nels; i++) {\
+if (unlikely(tp##_is_infinity(xb.fld[i]) || \
+ tp##_is_zero(xb.fld[i]))) {\
+fe_flag = 1;\
+fg_flag = 1;\
+} else {\
+int e_b = ppc_##tp##_get_unbiased_exp(xb.fld[i]); \
+\
+if (unlikely(tp##_is_any_nan(xb.fld[i]))) { \
+fe_flag = 1;\
+} else if (unlikely(tp##_is_zero(xb.fld[i]))) { \
+fe_flag = 1;\
+} else if (unlikely(tp##_is_neg(xb.fld[i]))) { \
+fe_flag = 1;\
+} else if (!tp##_is_zero(xb.fld[i]) \
+ (e_b = (emin+nbits))) { \
+fe_flag = 1;\
+} \
+\
+if (unlikely(tp##_is_zero_or_denormal(xb.fld[i]))) {\
+/* XB is not zero because of the above check and */ \
+/* therefore must be denormalized. */ \
+fg_flag = 1;\
+} \
+} \
+} \
+\
+env-crf[BF(opcode)] = 0x8 | (fg_flag ? 4 : 0) | (fe_flag ? 2 : 0); \
+}
+
+VSX_TSQRT(xstsqrtdp, 1, float64, f64, -1022, 52)
+VSX_TSQRT(xvtsqrtdp, 2, float64, f64, -1022, 52)
+VSX_TSQRT(xvtsqrtsp, 4, float32, f32, -126, 23)
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 80cffc9..c413c98 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -259,6 +259,7 @@ DEF_HELPER_2(xsredp, void, env, i32)
DEF_HELPER_2(xssqrtdp, void, env, i32)
DEF_HELPER_2(xsrsqrtedp, void, env, i32)
DEF_HELPER_2(xstdivdp, void, env, i32)
+DEF_HELPER_2(xstsqrtdp, void, env, i32)
DEF_HELPER_2(xvadddp, void, env, i32)
DEF_HELPER_2(xvsubdp, void, env, i32)
@@ -268,6 +269,7 @@ DEF_HELPER_2(xvredp, void, env, i32)
DEF_HELPER_2(xvsqrtdp, void, env, i32)
DEF_HELPER_2(xvrsqrtedp, void, env, i32)
DEF_HELPER_2(xvtdivdp, void, env, i32)
+DEF_HELPER_2(xvtsqrtdp,
[Qemu-devel] About QEMU for MIPS
Hi, 1. When QEMU for MIPS support watchpoint debug facility? Any hint or guide to implement that function? 2. qemu-system-mipsel -M malta -kernel vmlinux-2.6.26-1-4kc-malta -hda debian_lenny_mipsel_small.qcow2 -append root=/dev/hda1 console=ttyS0 kgdboc=ttyS0,115200 kgdbwait -nographic -serial tcp::1234,server -net nic,model=pcnet -net user Did I miss something? I cannot see the bootup message in the current client unless I remove -serial tcp::1234,server away. But I need that for kgdb debug. What is the right way to configure it? -- Best Regards, Yu Rong Tan
[Qemu-devel] [PATCH V2 11/19] Add VSX ISA2.06 xtdiv Instructions
This patch adds the VSX floating point test for software divide
instructions defined by V2.06 of the PowerPC ISA: xstdivdp, xvtdivdp,
and xvtdivsp.
V2: added ppc_float*_get_unbiased_exp() routines (pulled back from
softfloat). Eliminated dependency on float*_is_denormalized()
routines.
Signed-off-by: Tom Musta tommu...@gmail.com
---
target-ppc/fpu_helper.c | 67 +++
target-ppc/helper.h |3 ++
target-ppc/translate.c |6
3 files changed, 76 insertions(+), 0 deletions(-)
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index 31669f1..ee03942 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -2028,3 +2028,70 @@ void helper_##op(CPUPPCState *env, uint32_t opcode)
\
VSX_RSQRTE(xsrsqrtedp, 1, float64, f64, 1)
VSX_RSQRTE(xvrsqrtedp, 2, float64, f64, 0)
VSX_RSQRTE(xvrsqrtesp, 4, float32, f32, 0)
+
+static inline int ppc_float32_get_unbiased_exp(float32 f)
+{
+return ((f 23) 0xFF) - 127;
+}
+
+static inline int ppc_float64_get_unbiased_exp(float64 f)
+{
+return ((f 52) 0x7FF) - 1023;
+}
+
+/* VSX_TDIV - VSX floating point test for divide
+ * op- instruction mnemonic
+ * nels - number of elements (1, 2 or 4)
+ * tp- type (float32 or float64)
+ * fld - vsr_t field (f32 or f64)
+ * emin - minimum unbiased exponent
+ * emax - maximum unbiased exponent
+ * nbits - number of fraction bits
+ */
+#define VSX_TDIV(op, nels, tp, fld, emin, emax, nbits) \
+void helper_##op(CPUPPCState *env, uint32_t opcode) \
+{ \
+ppc_vsr_t xa, xb; \
+int i; \
+int fe_flag = 0;\
+int fg_flag = 0;\
+\
+getVSR(xA(opcode), xa, env); \
+getVSR(xB(opcode), xb, env); \
+\
+for (i = 0; i nels; i++) {\
+if (unlikely(tp##_is_infinity(xa.fld[i]) || \
+ tp##_is_infinity(xb.fld[i]) || \
+ tp##_is_zero(xb.fld[i]))) {\
+fe_flag = 1;\
+fg_flag = 1;\
+} else {\
+int e_a = ppc_##tp##_get_unbiased_exp(xa.fld[i]); \
+int e_b = ppc_##tp##_get_unbiased_exp(xb.fld[i]); \
+\
+if (unlikely(tp##_is_any_nan(xa.fld[i]) || \
+ tp##_is_any_nan(xb.fld[i]))) { \
+fe_flag = 1;\
+} else if ((e_b = emin) || (e_b = (emax-2))) {\
+fe_flag = 1;\
+} else if (!tp##_is_zero(xa.fld[i]) \
+ (((e_a - e_b) = emax) ||\
+((e_a - e_b) = (emin+1)) ||\
+ (e_a = (emin+nbits { \
+fe_flag = 1;\
+} \
+\
+if (unlikely(tp##_is_zero_or_denormal(xb.fld[i]))) {\
+/* XB is not zero because of the above check and */ \
+/* so must be denormalized. */ \
+fg_flag = 1;\
+} \
+} \
+} \
+\
+env-crf[BF(opcode)] = 0x8 | (fg_flag ? 4 : 0) | (fe_flag ? 2 : 0); \
+}
+
+VSX_TDIV(xstdivdp, 1, float64, f64, -1022, 1023, 52)
+VSX_TDIV(xvtdivdp, 2, float64, f64, -1022, 1023, 52)
+VSX_TDIV(xvtdivsp, 4, float32, f32, -126, 127, 23)
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 4d5e31b..80cffc9 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -258,6 +258,7 @@ DEF_HELPER_2(xsdivdp, void, env, i32)
DEF_HELPER_2(xsredp, void,
[Qemu-devel] [PATCH V2 13/19] Add VSX ISA2.06 Multiply Add Instructions
This patch adds the VSX floating point multiply/add instructions
defined by V2.06 of the PowerPC ISA:
- xsmaddadp, xvmaddadp, xvmaddasp
- xsmaddmdp, xvmaddmdp, xvmaddmsp
- xsmsubadp, xvmsubadp, xvmsubasp
- xsmsubmdp, xvmsubmdp, xvmsubmsp
- xsnmaddadp, xvnmaddadp, xvnmaddasp
- xsnmaddmdp, xvnmaddmdp, xvnmaddmsp
- xsnmsubadp, xvnmsubadp, xvnmsubasp
- xsnmsubmdp, xvnmsubmdp, xvnmsubmsp
V2: reworked implementation per comments from Richard Henderson and
Peter Maydell.
Signed-off-by: Tom Musta tommu...@gmail.com
---
target-ppc/fpu_helper.c | 100 +++
target-ppc/helper.h | 24 +++
target-ppc/translate.c | 48 ++
3 files changed, 172 insertions(+), 0 deletions(-)
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index 73227b7..54c47c8 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -2149,3 +2149,103 @@ void helper_##op(CPUPPCState *env, uint32_t opcode)
\
VSX_TSQRT(xstsqrtdp, 1, float64, f64, -1022, 52)
VSX_TSQRT(xvtsqrtdp, 2, float64, f64, -1022, 52)
VSX_TSQRT(xvtsqrtsp, 4, float32, f32, -126, 23)
+
+/* VSX_MADD - VSX floating point muliply/add variations
+ * op- instruction mnemonic
+ * nels - number of elements (1, 2 or 4)
+ * tp- type (float32 or float64)
+ * fld - vsr_t field (f32 or f64)
+ * maddflgs - flags for the float*muladd routine that control the
+ * various forms (madd, msub, nmadd, nmsub)
+ * afrm - A form (1=A, 0=M)
+ * sfprf - set FPRF
+ */
+#define VSX_MADD(op, nels, tp, fld, maddflgs, afrm, sfprf)\
+void helper_##op(CPUPPCState *env, uint32_t opcode) \
+{ \
+ppc_vsr_t xt_in, xa, xb, xt_out; \
+ppc_vsr_t *b, *c; \
+int i;\
+ \
+if (afrm) { /* AxB + T */ \
+b = xb; \
+c = xt_in; \
+} else { /* AxT + B */\
+b = xt_in; \
+c = xb; \
+} \
+ \
+getVSR(xA(opcode), xa, env); \
+getVSR(xB(opcode), xb, env); \
+getVSR(xT(opcode), xt_in, env); \
+ \
+xt_out = xt_in; \
+ \
+helper_reset_fpstatus(env); \
+ \
+for (i = 0; i nels; i++) { \
+float_status tstat = env-fp_status; \
+set_float_exception_flags(0, tstat); \
+xt_out.fld[i] = tp##_muladd(xa.fld[i], b-fld[i], c-fld[i], \
+ maddflgs, tstat); \
+env-fp_status.float_exception_flags |= tstat.float_exception_flags; \
+ \
+if (unlikely(tstat.float_exception_flags float_flag_invalid)) { \
+if (tp##_is_signaling_nan(xa.fld[i]) || \
+tp##_is_signaling_nan(b-fld[i]) || \
+tp##_is_signaling_nan(c-fld[i])) { \
+fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, sfprf);\
+tstat.float_exception_flags = ~float_flag_invalid; \
+} \
+if ((tp##_is_infinity(xa.fld[i]) tp##_is_zero(b-fld[i])) || \
+(tp##_is_zero(xa.fld[i]) tp##_is_infinity(b-fld[i]))) { \
+xt_out.fld[i] = float64_to_##tp(fload_invalid_op_excp(env,\
+POWERPC_EXCP_FP_VXIMZ, sfprf), env-fp_status); \
+tstat.float_exception_flags = ~float_flag_invalid; \
+}
[Qemu-devel] [PATCH V2 14/19] Add VSX xscmp*dp Instructions
This patch adds the VSX scalar floating point compare ordered
and unordered instructions.
Signed-off-by: Tom Musta tommu...@gmail.com
---
target-ppc/fpu_helper.c | 39 +++
target-ppc/helper.h |2 ++
target-ppc/translate.c |4
3 files changed, 45 insertions(+), 0 deletions(-)
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index 54c47c8..eb5d878 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -2249,3 +2249,42 @@ VSX_MADD(xvnmaddasp, 4, float32, f32, NMADD_FLGS, 1, 0)
VSX_MADD(xvnmaddmsp, 4, float32, f32, NMADD_FLGS, 0, 0)
VSX_MADD(xvnmsubasp, 4, float32, f32, NMSUB_FLGS, 1, 0)
VSX_MADD(xvnmsubmsp, 4, float32, f32, NMSUB_FLGS, 0, 0)
+
+#define VSX_SCALAR_CMP(op, ordered) \
+void helper_##op(CPUPPCState *env, uint32_t opcode) \
+{\
+ppc_vsr_t xa, xb;\
+uint32_t cc = 0; \
+ \
+getVSR(xA(opcode), xa, env);\
+getVSR(xB(opcode), xb, env);\
+ \
+if (unlikely(float64_is_any_nan(xa.f64[0]) ||\
+ float64_is_any_nan(xb.f64[0]))) { \
+if (float64_is_signaling_nan(xa.f64[0]) || \
+float64_is_signaling_nan(xb.f64[0])) { \
+fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 0); \
+}\
+if (ordered) { \
+fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXVC, 0); \
+}\
+cc = 1; \
+} else { \
+if (float64_lt(xa.f64[0], xb.f64[0], env-fp_status)) { \
+cc = 8; \
+} else if (!float64_le(xa.f64[0], xb.f64[0], env-fp_status)) { \
+cc = 4; \
+} else { \
+cc = 2; \
+}\
+}\
+ \
+env-fpscr = ~(0x0F FPSCR_FPRF); \
+env-fpscr |= cc FPSCR_FPRF; \
+env-crf[BF(opcode)] = cc; \
+ \
+helper_float_check_status(env); \
+}
+
+VSX_SCALAR_CMP(xscmpodp, 1)
+VSX_SCALAR_CMP(xscmpudp, 0)
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 7368908..cd72388 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -268,6 +268,8 @@ DEF_HELPER_2(xsnmaddadp, void, env, i32)
DEF_HELPER_2(xsnmaddmdp, void, env, i32)
DEF_HELPER_2(xsnmsubadp, void, env, i32)
DEF_HELPER_2(xsnmsubmdp, void, env, i32)
+DEF_HELPER_2(xscmpodp, void, env, i32)
+DEF_HELPER_2(xscmpudp, void, env, i32)
DEF_HELPER_2(xvadddp, void, env, i32)
DEF_HELPER_2(xvsubdp, void, env, i32)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 3a62125..a2a4e2d 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -7312,6 +7312,8 @@ GEN_VSX_HELPER_2(xsnmaddadp, 0x04, 0x14, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xsnmaddmdp, 0x04, 0x15, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xsnmsubadp, 0x04, 0x16, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xsnmsubmdp, 0x04, 0x17, 0, PPC2_VSX)
+GEN_VSX_HELPER_2(xscmpodp, 0x0C, 0x05, 0, PPC2_VSX)
+GEN_VSX_HELPER_2(xscmpudp, 0x0C, 0x04, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvadddp, 0x00, 0x0C, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvsubdp, 0x00, 0x0D, 0, PPC2_VSX)
@@ -10048,6 +10050,8 @@ GEN_XX3FORM(xsnmaddadp, 0x04, 0x14, PPC2_VSX),
GEN_XX3FORM(xsnmaddmdp, 0x04, 0x15, PPC2_VSX),
GEN_XX3FORM(xsnmsubadp, 0x04, 0x16, PPC2_VSX),
GEN_XX3FORM(xsnmsubmdp, 0x04, 0x17, PPC2_VSX),
+GEN_XX2FORM(xscmpodp, 0x0C, 0x05, PPC2_VSX),
+GEN_XX2FORM(xscmpudp, 0x0C, 0x04, PPC2_VSX),
GEN_XX3FORM(xvadddp, 0x00, 0x0C, PPC2_VSX),
GEN_XX3FORM(xvsubdp, 0x00, 0x0D, PPC2_VSX),
--
1.7.1
[Qemu-devel] [PATCH V2 17/19] Add VSX Floating Point to Floating Point Conversion Instructions
This patch adds the VSX instructions that convert between floating
point formats: xscvdpsp, xscvspdp, xvcvdpsp, xvcvspdp.
Signed-off-by: Tom Musta tommu...@gmail.com
---
target-ppc/fpu_helper.c | 46 ++
target-ppc/helper.h |4
target-ppc/translate.c |8
3 files changed, 58 insertions(+), 0 deletions(-)
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index ec1df4f..c9fb59f 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -2395,3 +2395,49 @@ VSX_CMP(xvcmpgtdp, 2, float64, f64, lt, 1)
VSX_CMP(xvcmpeqsp, 4, float32, f32, eq, 0)
VSX_CMP(xvcmpgesp, 4, float32, f32, le, 1)
VSX_CMP(xvcmpgtsp, 4, float32, f32, lt, 1)
+
+#if defined(HOST_WORDS_BIGENDIAN)
+#define JOFFSET 0
+#else
+#define JOFFSET 1
+#endif
+
+/* VSX_CVT_FP_TO_FP - VSX floating point/floating point conversion
+ * op- instruction mnemonic
+ * nels - number of elements (1, 2 or 4)
+ * stp - source type (float32 or float64)
+ * ttp - target type (float32 or float64)
+ * sfld - source vsr_t field
+ * tfld - target vsr_t field (f32 or f64)
+ * sfprf - set FPRF
+ */
+#define VSX_CVT_FP_TO_FP(op, nels, stp, ttp, sfld, tfld, sfprf)\
+void helper_##op(CPUPPCState *env, uint32_t opcode)\
+{ \
+ppc_vsr_t xt, xb; \
+int i; \
+ \
+getVSR(xB(opcode), xb, env); \
+getVSR(xT(opcode), xt, env); \
+ \
+for (i = 0; i nels; i++) { \
+int j = 2*i + JOFFSET; \
+xt.tfld = stp##_to_##ttp(xb.sfld, env-fp_status);\
+if (unlikely(stp##_is_signaling_nan(xb.sfld))) { \
+fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 0); \
+xt.tfld = ttp##_snan_to_qnan(xt.tfld); \
+} \
+if (sfprf) { \
+helper_compute_fprf(env, ttp##_to_float64(xt.tfld, \
+env-fp_status), sfprf); \
+} \
+} \
+ \
+putVSR(xT(opcode), xt, env); \
+helper_float_check_status(env);\
+}
+
+VSX_CVT_FP_TO_FP(xscvdpsp, 1, float64, float32, f64[i], f32[j], 1)
+VSX_CVT_FP_TO_FP(xscvspdp, 1, float32, float64, f32[j], f64[i], 1)
+VSX_CVT_FP_TO_FP(xvcvdpsp, 2, float64, float32, f64[i], f32[j], 0)
+VSX_CVT_FP_TO_FP(xvcvspdp, 2, float32, float64, f32[j], f64[i], 0)
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 35389c5..dd9518c 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -272,6 +272,8 @@ DEF_HELPER_2(xscmpodp, void, env, i32)
DEF_HELPER_2(xscmpudp, void, env, i32)
DEF_HELPER_2(xsmaxdp, void, env, i32)
DEF_HELPER_2(xsmindp, void, env, i32)
+DEF_HELPER_2(xscvdpsp, void, env, i32)
+DEF_HELPER_2(xscvspdp, void, env, i32)
DEF_HELPER_2(xvadddp, void, env, i32)
DEF_HELPER_2(xvsubdp, void, env, i32)
@@ -295,6 +297,7 @@ DEF_HELPER_2(xvmindp, void, env, i32)
DEF_HELPER_2(xvcmpeqdp, void, env, i32)
DEF_HELPER_2(xvcmpgedp, void, env, i32)
DEF_HELPER_2(xvcmpgtdp, void, env, i32)
+DEF_HELPER_2(xvcvdpsp, void, env, i32)
DEF_HELPER_2(xvaddsp, void, env, i32)
DEF_HELPER_2(xvsubsp, void, env, i32)
@@ -318,6 +321,7 @@ DEF_HELPER_2(xvminsp, void, env, i32)
DEF_HELPER_2(xvcmpeqsp, void, env, i32)
DEF_HELPER_2(xvcmpgesp, void, env, i32)
DEF_HELPER_2(xvcmpgtsp, void, env, i32)
+DEF_HELPER_2(xvcvspdp, void, env, i32)
DEF_HELPER_2(efscfsi, i32, env, i32)
DEF_HELPER_2(efscfui, i32, env, i32)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 377a482..1366ced 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -7316,6 +7316,8 @@ GEN_VSX_HELPER_2(xscmpodp, 0x0C, 0x05, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xscmpudp, 0x0C, 0x04, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xsmaxdp, 0x00, 0x14, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xsmindp, 0x00, 0x15, 0, PPC2_VSX)
+GEN_VSX_HELPER_2(xscvdpsp, 0x12, 0x10, 0, PPC2_VSX)
+GEN_VSX_HELPER_2(xscvspdp, 0x12, 0x14, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvadddp, 0x00, 0x0C, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvsubdp, 0x00, 0x0D, 0, PPC2_VSX)
@@ -7339,6 +7341,7 @@ GEN_VSX_HELPER_2(xvmindp, 0x00, 0x1D, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvcmpeqdp, 0x0C, 0x0C, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvcmpgtdp, 0x0C, 0x0D, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvcmpgedp,
[Qemu-devel] [PATCH V2 15/19] Add VSX xmax/xmin Instructions
This patch adds the VSX floating point maximum and minimum
instructions:
- xsmaxdp, xvmaxdp, xvmaxsp
- xsmindp, xvmindp, xvminsp
Because of the Power ISA definitions of maximum and minimum
on various boundary cases, the standard softfloat comparison
routines (e.g. float64_lt) do not work as well as one might
think. Therefore specific routines for comparing 64 and 32
bit floating point numbers are implemented in the PowerPC
helper code.
V2: consolidated into a single macro, using the softfloat
float*_max/float*_min routines.
Signed-off-by: Tom Musta tommu...@gmail.com
---
target-ppc/fpu_helper.c | 50 +++
target-ppc/helper.h |6 +
target-ppc/translate.c | 12 +++
3 files changed, 68 insertions(+), 0 deletions(-)
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index eb5d878..b90541c 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -2288,3 +2288,53 @@ void helper_##op(CPUPPCState *env, uint32_t opcode)
\
VSX_SCALAR_CMP(xscmpodp, 1)
VSX_SCALAR_CMP(xscmpudp, 0)
+
+#define float64_snan_to_qnan(x) ((x) | 0x0008ul)
+#define float32_snan_to_qnan(x) ((x) | 0x0040)
+
+/* VSX_MAX_MIN - VSX floating point maximum/minimum
+ * name - instruction mnemonic
+ * op- operation (max or min)
+ * nels - number of elements (1, 2 or 4)
+ * tp- type (float32 or float64)
+ * fld - vsr_t field (f32 or f64)
+ */
+#define VSX_MAX_MIN(name, op, nels, tp, fld) \
+void helper_##name(CPUPPCState *env, uint32_t opcode) \
+{ \
+ppc_vsr_t xt, xa, xb; \
+int i;\
+ \
+getVSR(xA(opcode), xa, env); \
+getVSR(xB(opcode), xb, env); \
+getVSR(xT(opcode), xt, env); \
+ \
+for (i = 0; i nels; i++) { \
+if (unlikely(tp##_is_any_nan(xa.fld[i]) ||\
+ tp##_is_any_nan(xb.fld[i]))) { \
+if (tp##_is_signaling_nan(xa.fld[i])) { \
+xt.fld[i] = tp##_snan_to_qnan(xa.fld[i]); \
+fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 0);\
+} else if (tp##_is_signaling_nan(xb.fld[i])) {\
+xt.fld[i] = tp##_snan_to_qnan(xb.fld[i]); \
+fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 0);\
+} else if (tp##_is_quiet_nan(xb.fld[i])) {\
+xt.fld[i] = xa.fld[i];\
+} else { /* XA is QNaN */ \
+xt.fld[i] = xb.fld[i];\
+} \
+} else { \
+xt.fld[i] = tp##_##op(xa.fld[i], xb.fld[i], env-fp_status); \
+} \
+} \
+ \
+putVSR(xT(opcode), xt, env); \
+helper_float_check_status(env); \
+}
+
+VSX_MAX_MIN(xsmaxdp, max, 1, float64, f64)
+VSX_MAX_MIN(xvmaxdp, max, 2, float64, f64)
+VSX_MAX_MIN(xvmaxsp, max, 4, float32, f32)
+VSX_MAX_MIN(xsmindp, min, 1, float64, f64)
+VSX_MAX_MIN(xvmindp, min, 2, float64, f64)
+VSX_MAX_MIN(xvminsp, min, 4, float32, f32)
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index cd72388..4a65d39 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -270,6 +270,8 @@ DEF_HELPER_2(xsnmsubadp, void, env, i32)
DEF_HELPER_2(xsnmsubmdp, void, env, i32)
DEF_HELPER_2(xscmpodp, void, env, i32)
DEF_HELPER_2(xscmpudp, void, env, i32)
+DEF_HELPER_2(xsmaxdp, void, env, i32)
+DEF_HELPER_2(xsmindp, void, env, i32)
DEF_HELPER_2(xvadddp, void, env, i32)
DEF_HELPER_2(xvsubdp, void, env, i32)
@@ -288,6 +290,8 @@ DEF_HELPER_2(xvnmaddadp, void, env, i32)
DEF_HELPER_2(xvnmaddmdp, void, env, i32)
DEF_HELPER_2(xvnmsubadp, void, env, i32)
DEF_HELPER_2(xvnmsubmdp, void, env, i32)
+DEF_HELPER_2(xvmaxdp, void, env, i32)
+DEF_HELPER_2(xvmindp, void, env,
Re: [Qemu-devel] [PULL v2][RESEND] char: fix segfault on chardev detach
On (Fri) 04 Oct 2013 [21:18:02], Amit Shah wrote: Hi Anthony, Please pull to receive a fix for a segfault in the char layer. The patches have been on the list for a week, and Gerd has reviewed them. (I'm overloading the virtio-serial git tree for this series, haven't gotten around to setting up a separate tree for char yet.) v2: I bungled up the git url, fixed one below. Ping? The following changes since commit aaa6a40194e9f204cb853f64ef3c1e170bb014e8: Merge remote-tracking branch 'afaerber/tags/qom-cpu-for-anthony' into staging (2013-09-03 12:33:32 -0500) are available in the git repository at: git://git.kernel.org/pub/scm/virt/qemu/amit/virtio-serial.git char-remove-watch-on-unplug for you to fetch changes up to 386a5a1e0057e220f79c48fe3689e3dfb17f1b09: char: remove watch callback on chardev detach from frontend (2013-09-05 18:30:36 +0530) Amit Shah (3): char: move backends' io watch tag to CharDriverState char: use common function to disable callbacks on chardev close char: remove watch callback on chardev detach from frontend include/sysemu/char.h | 1 + qemu-char.c | 82 +++ 2 files changed, 32 insertions(+), 51 deletions(-) Amit Amit
[Qemu-devel] [PATCH V2 16/19] Add VSX Vector Compare Instructions
This patch adds the VSX floating point compare vector instructions:
- xvcmpeqdp[.], xvcmpgedp[.], xvcmpgtdp[.]
- xvcmpeqsp[.], xvcmpgesp[.], xvcmpgtsp[.]
Signed-off-by: Tom Musta tommu...@gmail.com
---
target-ppc/fpu_helper.c | 57 +++
target-ppc/helper.h |6 +
target-ppc/translate.c | 23 +++
3 files changed, 86 insertions(+), 0 deletions(-)
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index b90541c..ec1df4f 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -2338,3 +2338,60 @@ VSX_MAX_MIN(xvmaxsp, max, 4, float32, f32)
VSX_MAX_MIN(xsmindp, min, 1, float64, f64)
VSX_MAX_MIN(xvmindp, min, 2, float64, f64)
VSX_MAX_MIN(xvminsp, min, 4, float32, f32)
+
+/* VSX_CMP - VSX floating point compare
+ * op- instruction mnemonic
+ * nels - number of elements (1, 2 or 4)
+ * tp- type (float32 or float64)
+ * fld - vsr_t field (f32 or f64)
+ * cmp - comparison operation
+ * svxvc - set VXVC bit
+ */
+#define VSX_CMP(op, nels, tp, fld, cmp, svxvc)\
+void helper_##op(CPUPPCState *env, uint32_t opcode) \
+{ \
+ppc_vsr_t xt, xa, xb; \
+int i;\
+int all_true = 1; \
+int all_false = 1;\
+ \
+getVSR(xA(opcode), xa, env); \
+getVSR(xB(opcode), xb, env); \
+getVSR(xT(opcode), xt, env); \
+ \
+for (i = 0; i nels; i++) { \
+if (unlikely(tp##_is_any_nan(xa.fld[i]) ||\
+ tp##_is_any_nan(xb.fld[i]))) { \
+if (tp##_is_signaling_nan(xa.fld[i]) || \
+tp##_is_signaling_nan(xb.fld[i])) { \
+fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 0);\
+} \
+if (svxvc) { \
+fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXVC, 0); \
+} \
+xt.fld[i] = 0;\
+all_true = 0; \
+} else { \
+if (tp##_##cmp(xb.fld[i], xa.fld[i], env-fp_status) == 1) { \
+xt.fld[i] = -1; \
+all_false = 0;\
+} else { \
+xt.fld[i] = 0;\
+all_true = 0; \
+} \
+} \
+} \
+ \
+putVSR(xT(opcode), xt, env); \
+if ((opcode (31-21)) 1) {\
+env-crf[6] = (all_true ? 0x8 : 0) | (all_false ? 0x2 : 0); \
+} \
+helper_float_check_status(env); \
+ }
+
+VSX_CMP(xvcmpeqdp, 2, float64, f64, eq, 0)
+VSX_CMP(xvcmpgedp, 2, float64, f64, le, 1)
+VSX_CMP(xvcmpgtdp, 2, float64, f64, lt, 1)
+VSX_CMP(xvcmpeqsp, 4, float32, f32, eq, 0)
+VSX_CMP(xvcmpgesp, 4, float32, f32, le, 1)
+VSX_CMP(xvcmpgtsp, 4, float32, f32, lt, 1)
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 4a65d39..35389c5 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -292,6 +292,9 @@ DEF_HELPER_2(xvnmsubadp, void, env, i32)
DEF_HELPER_2(xvnmsubmdp, void, env, i32)
DEF_HELPER_2(xvmaxdp, void, env, i32)
DEF_HELPER_2(xvmindp, void, env, i32)
+DEF_HELPER_2(xvcmpeqdp, void, env, i32)
+DEF_HELPER_2(xvcmpgedp, void, env, i32)
+DEF_HELPER_2(xvcmpgtdp, void, env, i32)
DEF_HELPER_2(xvaddsp, void, env, i32)
DEF_HELPER_2(xvsubsp, void, env, i32)
@@ -312,6 +315,9 @@ DEF_HELPER_2(xvnmsubasp, void, env, i32)
DEF_HELPER_2(xvnmsubmsp,
[Qemu-devel] [PATCH V2 18/19] Add VSX ISA2.06 Integer Conversion Instructions
This patch adds the VSX Integer Conversion instructions defined by
V2.06 of the PowerPC ISA:
- xscvdpsxds, xscvdpsxws, xscvdpuxds, xscvdpuxws
- xvcvdpsxds, xvcvdpsxws, xvcvdpuxds, xvcvdpuxws
- xvcvspsxds, xvcvspsxws, xvcvspuxds, xvcvspuxws
- xscvsxddp, xscvuxddp
- xvcvsxddp, xscvsxwdp, xvcvuxddp, xvcvuxwdp
- xvcvsxdsp, xscvsxwsp, xvcvuxdsp, xvcvuxwsp
Signed-off-by: Tom Musta tommu...@gmail.com
---
target-ppc/fpu_helper.c | 107 +++
target-ppc/helper.h | 22 ++
target-ppc/translate.c | 44 +++
3 files changed, 173 insertions(+), 0 deletions(-)
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index c9fb59f..f913ad7 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -2441,3 +2441,110 @@ VSX_CVT_FP_TO_FP(xscvdpsp, 1, float64, float32, f64[i],
f32[j], 1)
VSX_CVT_FP_TO_FP(xscvspdp, 1, float32, float64, f32[j], f64[i], 1)
VSX_CVT_FP_TO_FP(xvcvdpsp, 2, float64, float32, f64[i], f32[j], 0)
VSX_CVT_FP_TO_FP(xvcvspdp, 2, float32, float64, f32[j], f64[i], 0)
+
+/* VSX_CVT_FP_TO_INT - VSX floating point to integer conversion
+ * op- instruction mnemonic
+ * nels - number of elements (1, 2 or 4)
+ * stp - source type (float32 or float64)
+ * ttp - target type (int32, uint32, int64 or uint64)
+ * sfld - source vsr_t field
+ * tfld - target vsr_t field
+ * jdef - definition of the j index (i or 2*i)
+ * rnan - resulting NaN
+ */
+#define VSX_CVT_FP_TO_INT(op, nels, stp, ttp, sfld, tfld, jdef, rnan)\
+void helper_##op(CPUPPCState *env, uint32_t opcode) \
+{\
+ppc_vsr_t xt, xb;\
+int i; \
+ \
+getVSR(xB(opcode), xb, env);\
+getVSR(xT(opcode), xt, env);\
+ \
+for (i = 0; i nels; i++) { \
+int j = jdef;\
+if (unlikely(stp##_is_any_nan(xb.sfld))) { \
+if (stp##_is_signaling_nan(xb.sfld)) { \
+fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 0); \
+}\
+fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXCVI, 0);\
+xt.tfld = rnan; \
+} else { \
+xt.tfld = stp##_to_##ttp(xb.sfld, env-fp_status); \
+if (env-fp_status.float_exception_flags float_flag_invalid) { \
+fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXCVI, 0);\
+}\
+}\
+}\
+ \
+putVSR(xT(opcode), xt, env);\
+helper_float_check_status(env); \
+}
+
+VSX_CVT_FP_TO_INT(xscvdpsxds, 1, float64, int64, f64[j], u64[i], i, \
+ 0x8000ul)
+VSX_CVT_FP_TO_INT(xscvdpsxws, 1, float64, int32, f64[i], u32[j], \
+ 2*i + JOFFSET, 0x8000l)
+VSX_CVT_FP_TO_INT(xscvdpuxds, 1, float64, uint64, f64[j], u64[i], i, 0ul)
+VSX_CVT_FP_TO_INT(xscvdpuxws, 1, float64, uint32, f64[i], u32[j], \
+ 2*i + JOFFSET, 0)
+VSX_CVT_FP_TO_INT(xvcvdpsxds, 2, float64, int64, f64[j], u64[i], i, \
+ 0x8000ul)
+VSX_CVT_FP_TO_INT(xvcvdpsxws, 2, float64, int32, f64[i], u32[j], \
+ 2*i + JOFFSET, 0x8000l)
+VSX_CVT_FP_TO_INT(xvcvdpuxds, 2, float64, uint64, f64[j], u64[i], i, 0ul)
+VSX_CVT_FP_TO_INT(xvcvdpuxws, 2, float64, uint32, f64[i], u32[j], \
+ 2*i + JOFFSET, 0)
+VSX_CVT_FP_TO_INT(xvcvspsxds, 2, float32, int64, f32[j], u64[i], \
+ 2*i + JOFFSET, 0x8000ul)
+VSX_CVT_FP_TO_INT(xvcvspsxws, 4, float32, int32, f32[j], u32[j], i, \
+ 0x8000l)
+VSX_CVT_FP_TO_INT(xvcvspuxds, 2, float32, uint64, f32[j], u64[i], \
+ 2*i + JOFFSET, 0ul)
+VSX_CVT_FP_TO_INT(xvcvspuxws, 4, float32, uint32, f32[j], u32[i], i, 0)
+
+/* VSX_CVT_INT_TO_FP - VSX integer to floating point conversion
+ * op- instruction mnemonic
+ * nels -
[Qemu-devel] [PATCH V2 19/19] Add VSX Rounding Instructions
This patch adds the VSX Round to Floating Point Integer instructions:
- xsrdpi, xsrdpic, xsrdpim, xsrdpip, xsrdpiz
- xvrdpi, xvrdpic, xvrdpim, xvrdpip, xvrdpiz
- xvrspi, xvrspic, xvrspim, xvrspip, xvrspiz
Signed-off-by: Tom Musta tommu...@gmail.com
---
target-ppc/fpu_helper.c | 68 +++
target-ppc/helper.h | 15 ++
target-ppc/translate.c | 30
3 files changed, 113 insertions(+), 0 deletions(-)
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index f913ad7..f3d02cc 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -2548,3 +2548,71 @@ VSX_CVT_INT_TO_FP(xvcvuxdsp, 2, uint64, float32, u64[i],
f32[j], \
2*i + JOFFSET, 0)
VSX_CVT_INT_TO_FP(xvcvsxwsp, 4, int32, float32, u32[j], f32[i], i, 0)
VSX_CVT_INT_TO_FP(xvcvuxwsp, 4, uint32, float32, u32[j], f32[i], i, 0)
+
+/* For use current rounding mode, define a value that will not be one of
+ * the existing rounding model enums.
+ */
+#define FLOAT_ROUND_CURRENT (float_round_nearest_even + float_round_down + \
+ float_round_up + float_round_to_zero)
+
+/* VSX_ROUND - VSX floating point round
+ * op- instruction mnemonic
+ * nels - number of elements (1, 2 or 4)
+ * tp- type (float32 or float64)
+ * fld - vsr_t field (f32 or f64)
+ * rmode - rounding mode
+ * sfprf - set FPRF
+ */
+#define VSX_ROUND(op, nels, tp, fld, rmode, sfprf) \
+void helper_##op(CPUPPCState *env, uint32_t opcode)\
+{ \
+ppc_vsr_t xt, xb; \
+int i; \
+getVSR(xB(opcode), xb, env); \
+getVSR(xT(opcode), xt, env); \
+ \
+if (rmode != FLOAT_ROUND_CURRENT) {\
+set_float_rounding_mode(rmode, env-fp_status); \
+} \
+ \
+for (i = 0; i nels; i++) { \
+if (unlikely(tp##_is_signaling_nan(xb.fld[i]))) { \
+fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 0); \
+xt.fld[i] = tp##_snan_to_qnan(xb.fld[i]); \
+} else { \
+xt.fld[i] = tp##_round_to_int(xb.fld[i], env-fp_status); \
+} \
+if (sfprf) { \
+helper_compute_fprf(env, xt.fld[i], sfprf);\
+} \
+} \
+ \
+/* If this is not a use current rounding mode instruction, \
+ * then inhibit setting of the XX bit and restore rounding \
+ * mode from FPSCR */ \
+if (rmode != FLOAT_ROUND_CURRENT) {\
+fpscr_set_rounding_mode(env); \
+env-fp_status.float_exception_flags = ~float_flag_inexact; \
+} \
+ \
+putVSR(xT(opcode), xt, env); \
+helper_float_check_status(env);\
+}
+
+VSX_ROUND(xsrdpi, 1, float64, f64, float_round_nearest_even, 1)
+VSX_ROUND(xsrdpic, 1, float64, f64, FLOAT_ROUND_CURRENT, 1)
+VSX_ROUND(xsrdpim, 1, float64, f64, float_round_down, 1)
+VSX_ROUND(xsrdpip, 1, float64, f64, float_round_up, 1)
+VSX_ROUND(xsrdpiz, 1, float64, f64, float_round_to_zero, 1)
+
+VSX_ROUND(xvrdpi, 2, float64, f64, float_round_nearest_even, 0)
+VSX_ROUND(xvrdpic, 2, float64, f64, FLOAT_ROUND_CURRENT, 0)
+VSX_ROUND(xvrdpim, 2, float64, f64, float_round_down, 0)
+VSX_ROUND(xvrdpip, 2, float64, f64, float_round_up, 0)
+VSX_ROUND(xvrdpiz, 2, float64, f64, float_round_to_zero, 0)
+
+VSX_ROUND(xvrspi, 4, float32, f32, float_round_nearest_even, 0)
+VSX_ROUND(xvrspic, 4, float32, f32, FLOAT_ROUND_CURRENT, 0)
+VSX_ROUND(xvrspim, 4, float32, f32, float_round_down, 0)
+VSX_ROUND(xvrspip, 4, float32, f32, float_round_up, 0)
+VSX_ROUND(xvrspiz, 4, float32, f32, float_round_to_zero, 0)
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index de46b6f..0276b02 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -280,6 +280,11 @@
[Qemu-devel] [PATCH V2 10/19] Add VSX ISA2.06 xrsqrte Instructions
This patch adds the VSX floating point reciprocal square root
estimate instructions defined by V2.06 of the PowerPC ISA: xsrsqrtedp,
xvrsqrtedp, xvrsqrtesp.
V2: re-implemented VSX_RSQRTE macro.
Signed-off-by: Tom Musta tommu...@gmail.com
---
target-ppc/fpu_helper.c | 45 +
target-ppc/helper.h |3 +++
target-ppc/translate.c |6 ++
3 files changed, 54 insertions(+), 0 deletions(-)
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index 060e6a0..31669f1 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -1983,3 +1983,48 @@ void helper_##op(CPUPPCState *env, uint32_t opcode)
\
VSX_SQRT(xssqrtdp, 1, float64, f64, 1)
VSX_SQRT(xvsqrtdp, 2, float64, f64, 0)
VSX_SQRT(xvsqrtsp, 4, float32, f32, 0)
+
+/* VSX_RSQRTE - VSX floating point reciprocal square root estimate
+ * op- instruction mnemonic
+ * nels - number of elements (1, 2 or 4)
+ * tp- type (float32 or float64)
+ * fld - vsr_t field (f32 or f64)
+ * sfprf - set FPRF
+ */
+#define VSX_RSQRTE(op, nels, tp, fld, sfprf) \
+void helper_##op(CPUPPCState *env, uint32_t opcode) \
+{\
+ppc_vsr_t xt, xb;\
+int i; \
+ \
+getVSR(xB(opcode), xb, env);\
+getVSR(xT(opcode), xt, env);\
+helper_reset_fpstatus(env); \
+ \
+for (i = 0; i nels; i++) { \
+float_status tstat = env-fp_status; \
+set_float_exception_flags(0, tstat);\
+xt.fld[i] = tp##_sqrt(xb.fld[i], tstat);\
+xt.fld[i] = tp##_div(tp##_one, xt.fld[i], tstat); \
+env-fp_status.float_exception_flags |= tstat.float_exception_flags; \
+ \
+if (unlikely(tstat.float_exception_flags float_flag_invalid)) {\
+if (tp##_is_neg(xb.fld[i]) !tp##_is_zero(xb.fld[i])) {\
+fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSQRT, sfprf); \
+} else if (tp##_is_signaling_nan(xb.fld[i])) { \
+fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, sfprf); \
+}\
+}\
+ \
+if (sfprf) { \
+helper_compute_fprf(env, xt.fld[i], sfprf); \
+}\
+}\
+ \
+putVSR(xT(opcode), xt, env);\
+helper_float_check_status(env); \
+}
+
+VSX_RSQRTE(xsrsqrtedp, 1, float64, f64, 1)
+VSX_RSQRTE(xvrsqrtedp, 2, float64, f64, 0)
+VSX_RSQRTE(xvrsqrtesp, 4, float32, f32, 0)
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index a6e7e62..4d5e31b 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -257,6 +257,7 @@ DEF_HELPER_2(xsmuldp, void, env, i32)
DEF_HELPER_2(xsdivdp, void, env, i32)
DEF_HELPER_2(xsredp, void, env, i32)
DEF_HELPER_2(xssqrtdp, void, env, i32)
+DEF_HELPER_2(xsrsqrtedp, void, env, i32)
DEF_HELPER_2(xvadddp, void, env, i32)
DEF_HELPER_2(xvsubdp, void, env, i32)
@@ -264,6 +265,7 @@ DEF_HELPER_2(xvmuldp, void, env, i32)
DEF_HELPER_2(xvdivdp, void, env, i32)
DEF_HELPER_2(xvredp, void, env, i32)
DEF_HELPER_2(xvsqrtdp, void, env, i32)
+DEF_HELPER_2(xvrsqrtedp, void, env, i32)
DEF_HELPER_2(xvaddsp, void, env, i32)
DEF_HELPER_2(xvsubsp, void, env, i32)
@@ -271,6 +273,7 @@ DEF_HELPER_2(xvmulsp, void, env, i32)
DEF_HELPER_2(xvdivsp, void, env, i32)
DEF_HELPER_2(xvresp, void, env, i32)
DEF_HELPER_2(xvsqrtsp, void, env, i32)
+DEF_HELPER_2(xvrsqrtesp, void, env, i32)
DEF_HELPER_2(efscfsi, i32, env, i32)
DEF_HELPER_2(efscfui, i32, env, i32)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index c5c97ba..287b924 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -7301,6 +7301,7 @@ GEN_VSX_HELPER_2(xsmuldp, 0x00,
Re: [Qemu-devel] KVM call agenda for 2013-10-29
Juan Quintela quint...@redhat.com wrote: Hi Please, send any topic that you are interested in covering. As there are no topics, no call (lots of stuff got discussed on kvm forum) See you in two weeks.
Re: [Qemu-devel] Prohibit Windows from running in QEMU
On 10/29/13 11:50, Peter Lieven wrote: On 29.10.2013 11:48, Paolo Bonzini wrote: Il 29/10/2013 11:40, Peter Lieven ha scritto: The KVM signature should be at CPUID leaf 0x4100. If I enable hyperv for all vServers the signature is at KVM_CPUID_SIGNATURE_NEXT (0x4100) otherwise at KVM_CPUID_SIGNATURE (0x0). KVM_CPU_ID_SIGNATURE is 0x4000. Does this matter to Linux? For recent versions it doesn't. Older versions will not be able to use kvmclock (and other PV enhancements for KVM such as steal time or PV EOI). Ok, so this is not an option today - maybe later... Any other idea to detect Windows is running or trying to start? I don't know what I'm talking about. But: - Maybe tracing MSR accesses could give you a profile. - Windows' ACPI parser is super cranky. You could pass in a custom (but standardized) ACPI table on the command line (-acpitable) that only triggers some warnings in Linux's port of ACPICA, but crashes Windows (BSOD). Like, write compile a simple table to AML, then mess it up (eg. Package encoding or some such) with a hex editor. This would take some experimentation as well, but searching existing bug reports could help. Laszlo
Re: [Qemu-devel] There are two distinct qdevs named TYPE_OPENPROM
On 29 October 2013 07:57, Markus Armbruster arm...@redhat.com wrote: sun4m.c and sun4u.c both define a qdev named TYPE_OPENPROM. As far as I can tell, they differ only in the name of their memory region. If they ever get linked into the same executable, type_register_internal() will reject the second one. But they aren't, so this isn't a bug. Is it bad style? Yes, in several ways. Board models shouldn't include qdev devices in their source files -- the devices should have their own source files in the appropriate section of hw/. We shouldn't have multiple devices of the same TYPE like that. And the device should probably be built once rather than per-target. I also suspect this device is jumping through hoops to deal with the fact that our image-loading API doesn't have any load this image into this memory region function (compare discussion recently on how the sbus graphics card patches handle loading their prom image). Fixing that might also simplify these devices. -- PMM
[Qemu-devel] [PATCH for 1.7] pc: disable pci-info
The BIOS that we ship in 1.7 does not use pci info
from host and so far isn't going to use it.
Taking in account problems it caused see 9604f70fdf and
to avoid future incompatibility issues, it's safest to
disable that interface by default for all machine types
including 1.7 as it was never exposed/used by guest.
And properly remove/cleanup it during 1.8 development cycle.
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
hw/i386/pc_piix.c |3 ++-
hw/i386/pc_q35.c |3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index c6042c7..4a4d969 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -58,7 +58,8 @@ static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
static bool has_pvpanic;
-static bool has_pci_info = true;
+/* TODO: remove unused etc/pci-info */
+static bool has_pci_info;
/* PC hardware initialisation */
static void pc_init1(QEMUMachineInitArgs *args,
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index ca84e1c..8e5c1ae 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -48,7 +48,8 @@
#define MAX_SATA_PORTS 6
static bool has_pvpanic;
-static bool has_pci_info = true;
+/* TODO: remove unused etc/pci-info */
+static bool has_pci_info;
/* PC hardware initialisation */
static void pc_q35_init(QEMUMachineInitArgs *args)
--
1.7.1
Re: [Qemu-devel] [PATCH for 1.7] pc: disable pci-info
On Di, 2013-10-29 at 15:35 +0100, Igor Mammedov wrote: The BIOS that we ship in 1.7 does not use pci info from host and so far isn't going to use it. Taking in account problems it caused see 9604f70fdf and to avoid future incompatibility issues, it's safest to disable that interface by default for all machine types including 1.7 as it was never exposed/used by guest. And properly remove/cleanup it during 1.8 development cycle. Reviewed-by: Gerd Hoffmann kra...@redhat.com cheers, Gerd
[Qemu-devel] [PATCH v2] usb: drop unused USBNetState.inpkt field
Signed-off-by: Stefan Hajnoczi stefa...@redhat.com
---
hw/usb/dev-network.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/usb/dev-network.c b/hw/usb/dev-network.c
index 660d774..4c532b7 100644
--- a/hw/usb/dev-network.c
+++ b/hw/usb/dev-network.c
@@ -637,7 +637,6 @@ typedef struct USBNetState {
unsigned int out_ptr;
uint8_t out_buf[2048];
-USBPacket *inpkt;
unsigned int in_ptr, in_len;
uint8_t in_buf[2048];
--
1.8.3.1
[Qemu-devel] How to prevent DomU(windows) to write to certain sector of hard drive
I am trying to prevent write from DomU for particular sector of hardisk which is passed through QEMU device. I am putting an error condition in ide.c using API ide_handle_write_error(s, -ret, BM_STATUS_ERROR) called from ide_write_dma_cb, however DomU is still going ahead and writing to those sectors. Is there a way to prevent DomU from writing to certain sector of hard disk as well as propagate those error back to DomU saying, Write error or some message so that user is notified of error writing to certain sectors of disk. Regards Shakil ---
Re: [Qemu-devel] [PATCH 0/2 v2] pc: inform SeaBIOS where 64-bit PCI hole begins
On Tue, Oct 29, 2013 at 01:57:33PM +0100, Igor Mammedov wrote: * simplify PCI address space mapping into system address space, replacing code duplication in piix/q53 PCs with a helper function * add fw_cfg 'etc/pcimem64-minimum-address' to allow QEMU reserve additional address space before 64-bit PCI hole. Which will be need for reserving memory hotplug region in highmem. SeaBIOS counterpart: http://patchwork.ozlabs.org/patch/283623/ I'd like to see if we can figure out the migration issue with memory layout. Because if we do, and get rid of the separate 64 bit region as a concept, exposing the start of this non-existent region in FW CFG will make very little sense IMHO. v2: * use negative priority to map PCI address space under RAM memory regions which allows simplify code by removing pci_hole pci_hole64 memory region aliases Series depends on: memory: Change MemoryRegion priorities from unsigned to signed: Git tree for testing: https://github.com/imammedo/qemu/commits/pcimem64-minimum-address-v2 Igor Mammedov (1): pc: add 'etc/pcimem64-minimum-address' fw_cfg interface to SeaBIOS Michael S. Tsirkin (1): pc: map PCI address space as catchall region for not mapped addresses hw/i386/pc.c | 28 hw/i386/pc_piix.c |2 -- hw/pci-host/piix.c| 27 +-- hw/pci-host/q35.c | 28 ++-- include/hw/i386/pc.h | 15 +++ include/hw/pci-host/q35.h |2 -- 6 files changed, 30 insertions(+), 72 deletions(-)
Re: [Qemu-devel] [PATCH for 1.7] pc: disable pci-info
On Tue, Oct 29, 2013 at 03:35:07PM +0100, Igor Mammedov wrote:
The BIOS that we ship in 1.7 does not use pci info
from host and so far isn't going to use it.
Taking in account problems it caused see 9604f70fdf and
to avoid future incompatibility issues, it's safest to
disable that interface by default for all machine types
including 1.7 as it was never exposed/used by guest.
And properly remove/cleanup it during 1.8 development cycle.
Signed-off-by: Igor Mammedov imamm...@redhat.com
Reviewed-by: Michael S. Tsirkin m...@redhat.com
---
hw/i386/pc_piix.c |3 ++-
hw/i386/pc_q35.c |3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index c6042c7..4a4d969 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -58,7 +58,8 @@ static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376
};
static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
static bool has_pvpanic;
-static bool has_pci_info = true;
+/* TODO: remove unused etc/pci-info */
+static bool has_pci_info;
/* PC hardware initialisation */
static void pc_init1(QEMUMachineInitArgs *args,
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index ca84e1c..8e5c1ae 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -48,7 +48,8 @@
#define MAX_SATA_PORTS 6
static bool has_pvpanic;
-static bool has_pci_info = true;
+/* TODO: remove unused etc/pci-info */
+static bool has_pci_info;
/* PC hardware initialisation */
static void pc_q35_init(QEMUMachineInitArgs *args)
--
1.7.1
Re: [Qemu-devel] [PATCH] net/hub: remove can_receive handler
On Mon, Oct 21, 2013 at 03:44:46PM +0400, Fedorov Sergey wrote:
After our discussion about this patch I decided to keep my patch in
our branch until rebase onto a new release. Recently I have rebased
our branch onto v1.5.3 and reverted my patch. Then I face an issue
when using user-mode networking with USB network device for mounting
root file system through NFS. Fragmented UDP packets from host to
guest does not handled properly. Seems that some fragments is lost
or somehow stalled. See guest tcpdump log below.
03:16:52.259690 IP (tos 0x0, ttl 64, id 0, offset 0, flags [DF],
proto UDP (17), length 164)
10.0.2.15.3369105030 10.0.2.2.nfs: 136 readdirplus fh
Unknown/01000700040012002873593C9B3C43388E23748B0BAD870C
512 bytes @ 0 max 4096 verf
03:16:52.262323 IP (tos 0x0, ttl 64, id 16, offset 0, flags [+],
proto UDP (17), length 1500)
10.0.2.2.nfs 10.0.2.15.3369105030: reply ok 1472 readdirplus
POST: DIR 40777 ids 0/0 sz 4096 verf
03:16:52.264592 IP (tos 0x0, ttl 64, id 16, offset 1480, flags [+],
proto UDP (17), length 1500)
10.0.2.2 10.0.2.15: udp
03:16:54.462961 IP (tos 0x0, ttl 64, id 0, offset 0, flags [DF],
proto UDP (17), length 164)
10.0.2.15.3369105030 10.0.2.2.nfs: 136 readdirplus fh
Unknown/01000700040012002873593C9B3C43388E23748B0BAD870C
512 bytes @ 0 max 4096 verf
03:16:54.466300 IP (tos 0x0, ttl 64, id 17, offset 0, flags [+],
proto UDP (17), length 1500)
10.0.2.2.nfs 10.0.2.15.3369105030: reply ok 1472 readdirplus
POST: DIR 40777 ids 0/0 sz 4096 verf
03:16:54.467084 IP (tos 0x0, ttl 64, id 17, offset 1480, flags [+],
proto UDP (17), length 1500)
10.0.2.2 10.0.2.15: udp
...
I didn't investigate the cause of the problem in detail. I just reverted
commit 199ee608f0d08510b5c6c37f31a7fbff211d63c4
Author: Luigi Rizzo ri...@iet.unipi.it
Date: Tue Feb 5 17:53:31 2013 +0100
net: fix qemu_flush_queued_packets() in presence of a hub
And then applied my patch. After that everything works fine for me.
See guest tcpdump log below.
04:45:15.897245 IP (tos 0x0, ttl 64, id 0, offset 0, flags [DF],
proto UDP (17), length 164)
10.0.2.15.3642011847 10.0.2.2.nfs: 136 readdirplus fh
Unknown/01000700040012002873593C9B3C43388E23748B0BAD870C
512 bytes @ 0 max 4096 verf
04:45:15.899686 IP (tos 0x0, ttl 64, id 15, offset 0, flags [+],
proto UDP (17), length 1500)
10.0.2.2.nfs 10.0.2.15.3642011847: reply ok 1472 readdirplus
POST: DIR 40777 ids 0/0 sz 4096 verf
04:45:15.906253 IP (tos 0x0, ttl 64, id 15, offset 1480, flags [+],
proto UDP (17), length 1500)
10.0.2.2 10.0.2.15: udp
04:45:15.906687 IP (tos 0x0, ttl 64, id 15, offset 2960, flags
[none], proto UDP (17), length 240)
10.0.2.2 10.0.2.15: udp
So there must be something wrong with already applied patch. What
could you suggest?
The next step is to investigate the cause.
Perhaps hw/usb/dev-network.c:usb_net_handle_datain() is not calling
qemu_flush_queued_packets() every time in_buf[] is read completely.
This if statement looks strange to me:
if (s-in_ptr = s-in_len
(is_rndis(s) || (s-in_len (64 - 1)) || !len)) {
/* no short packet necessary */
usb_net_reset_in_buf(s);
}
Try placing printfs to find out whether qemu_flush_queued_packets() is
getting called when you see packet loss.
Stefan
Re: [Qemu-devel] [PATCH 0/2 v2] pc: inform SeaBIOS where 64-bit PCI hole begins
On Tue, 29 Oct 2013 17:10:47 +0200 Michael S. Tsirkin m...@redhat.com wrote: On Tue, Oct 29, 2013 at 01:57:33PM +0100, Igor Mammedov wrote: * simplify PCI address space mapping into system address space, replacing code duplication in piix/q53 PCs with a helper function * add fw_cfg 'etc/pcimem64-minimum-address' to allow QEMU reserve additional address space before 64-bit PCI hole. Which will be need for reserving memory hotplug region in highmem. SeaBIOS counterpart: http://patchwork.ozlabs.org/patch/283623/ I'd like to see if we can figure out the migration issue with memory layout. It seems that there isn't migration issue here. Because if we do, and get rid of the separate 64 bit region as a concept, exposing the start of this non-existent region in FW CFG will make very little sense IMHO. Well, BIOS have to know where it could start 64-bit BARs mappings and telling it explicitly where, looks like a good way to do it. v2: * use negative priority to map PCI address space under RAM memory regions which allows simplify code by removing pci_hole pci_hole64 memory region aliases Series depends on: memory: Change MemoryRegion priorities from unsigned to signed: Git tree for testing: https://github.com/imammedo/qemu/commits/pcimem64-minimum-address-v2 Igor Mammedov (1): pc: add 'etc/pcimem64-minimum-address' fw_cfg interface to SeaBIOS Michael S. Tsirkin (1): pc: map PCI address space as catchall region for not mapped addresses hw/i386/pc.c | 28 hw/i386/pc_piix.c |2 -- hw/pci-host/piix.c| 27 +-- hw/pci-host/q35.c | 28 ++-- include/hw/i386/pc.h | 15 +++ include/hw/pci-host/q35.h |2 -- 6 files changed, 30 insertions(+), 72 deletions(-)
Re: [Qemu-devel] [PATCH for 1.7] pc: disable pci-info
On Tue, Oct 29, 2013 at 03:35:07PM +0100, Igor Mammedov wrote: The BIOS that we ship in 1.7 does not use pci info from host and so far isn't going to use it. Taking in account problems it caused see 9604f70fdf and to avoid future incompatibility issues, it's safest to disable that interface by default for all machine types including 1.7 as it was never exposed/used by guest. And properly remove/cleanup it during 1.8 development cycle. Signed-off-by: Igor Mammedov imamm...@redhat.com Reviewed-by: Eduardo Habkost ehabk...@redhat.com -- Eduardo
Re: [Qemu-devel] Prohibit Windows from running in QEMU
Il 29/10/2013 16:55, BALATON Zoltan ha scritto: On Tue, 29 Oct 2013, Laszlo Ersek wrote: I don't know what I'm talking about. But: Neither do I but... - Windows' ACPI parser is super cranky. You could pass in a custom (but standardized) ACPI table on the command line (-acpitable) that only triggers some warnings in Linux's port of ACPICA, but crashes Windows (BSOD). Like, write compile a simple table to AML, then mess it up (eg. Package encoding or some such) with a hex editor. This would take some experimentation as well, but searching existing bug reports could help. This seems evil and fragile (although this can be done without patches with a command line option only). But instead why not remove/disable some BIOS functions that Linux doesn't need but Windows relies on? This seems to be less fragile (although requiring a patch) if it's possible at all. Subtly crippling the HPET might work, since Linux will prefer kvmclock. Good luck when users come screaming for support though. Paolo
Re: [Qemu-devel] pvpanic plans?
Ping! Hu Tao hu...@cn.fujitsu.com writes: Hi All, I know it's been a long time since this thread. But qemu 1.7 is releasing, do you have any consensus on this? Thanks.
Re: [Qemu-devel] Prohibit Windows from running in QEMU
On Tue, 29 Oct 2013, Laszlo Ersek wrote: I don't know what I'm talking about. But: Neither do I but... - Windows' ACPI parser is super cranky. You could pass in a custom (but standardized) ACPI table on the command line (-acpitable) that only triggers some warnings in Linux's port of ACPICA, but crashes Windows (BSOD). Like, write compile a simple table to AML, then mess it up (eg. Package encoding or some such) with a hex editor. This would take some experimentation as well, but searching existing bug reports could help. This seems evil and fragile (although this can be done without patches with a command line option only). But instead why not remove/disable some BIOS functions that Linux doesn't need but Windows relies on? This seems to be less fragile (although requiring a patch) if it's possible at all. Regards, BALATON Zoltan
[Qemu-devel] [PATCH] qemu-iotests: Fix 051 reference output
Commit 684b254 forgot to update it. Signed-off-by: Kevin Wolf kw...@redhat.com --- tests/qemu-iotests/051.out | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/qemu-iotests/051.out b/tests/qemu-iotests/051.out index 2839e32..15deef6 100644 --- a/tests/qemu-iotests/051.out +++ b/tests/qemu-iotests/051.out @@ -24,7 +24,7 @@ QEMU X.Y.Z monitor - type 'help' for more information (qemu) i[K[Din[K[D[Dinf[K[D[D[Dinfo[K[D[D[D[Dinfo [K[D[D[D[D[Dinfo b[K[D[D[D[D[D[Dinfo bl[K[D[D[D[D[D[D[Dinfo blo[K[D[D[D[D[D[D[D[Dinfo bloc[K[D[D[D[D[D[D[D[D[Dinfo block[K ide0-hd0: TEST_DIR/t.qcow2 (qcow2) Backing file: TEST_DIR/t.qcow2.orig (chain depth: 1) - [not inserted](qemu) q[K[Dqu[K[D[Dqui[K[D[D[Dquit[K +(qemu) q[K[Dqu[K[D[Dqui[K[D[D[Dquit[K === Enable and disable lazy refcounting on the command line, plus some invalid values === -- 1.8.1.4
[Qemu-devel] [PATCH v2 04/10] apic: Document why cannot_instantiate_with_device_add_yet
From: Markus Armbruster arm...@redhat.com
Signed-off-by: Markus Armbruster arm...@redhat.com
Reviewed-by: Peter Maydell peter.mayd...@linaro.org
---
hw/intc/apic_common.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c
index ea420c7..aaef054 100644
--- a/hw/intc/apic_common.c
+++ b/hw/intc/apic_common.c
@@ -386,9 +386,13 @@ static void apic_common_class_init(ObjectClass *klass,
void *data)
dc-vmsd = vmstate_apic_common;
dc-reset = apic_reset_common;
-dc-cannot_instantiate_with_device_add_yet = true; /* FIXME explain why */
dc-props = apic_properties_common;
idc-init = apic_init_common;
+/*
+ * Reason: APIC and CPU need to be wired up by
+ * x86_cpu_apic_create()
+ */
+dc-cannot_instantiate_with_device_add_yet = true;
}
static const TypeInfo apic_common_type = {
--
1.8.1.4
[Qemu-devel] [PATCH v2 00/10] Clean up and fix no_user
From: Markus Armbruster arm...@redhat.com In an ideal world, machines can be built by wiring devices together with configuration, not code. Unfortunately, that's not the world we live in right now. We still have quite a few devices that need to be wired up by code. If you try to device_add such a device, it'll fail in sometimes mysterious ways. If you're lucky, you get an unmysterious immediate crash. We used to protect users from such badness by marking devices where device_add cannot possibly work no-user, and refusing to device_add them. Anthony silently broke the protection in v1.1. He has rejected attempts to unbreak it with the argument that the protection makes it impossible to wire devices together with configuration, not code, and that the protection is being misused[*]. On the former, I disagree. The problem isn't protecting users from devices that cannot be wired up that way, it's devices that cannot be wired up that way. On the latter, Anthony has a point: the purpose of the no-user flag isn't obvious, and some of its uses are suspect. So, instead of just fixing the regression, this series first addresses that point. PATCH 1 clarifies the purpose of no-user. PATCH 2-9 clean up and document its use. PATCH 10 fixes the regression. The series makes following devices available with device_add: * PCI [PATCH 07-08]: piix3-ide, piix3-ide-xen, piix4-ide, via-ide * ISA [PATCH 09]: i8042, isa-fdc The following devices are made unavailable: * PCI [PATCH 05]: dec-21154, e500-host-bridge, gt64120_pci, mch, pbm-pci, ppc4xx-host-bridge, sh_pci_host, u3-agp, uni-north-agp, uni-north-internal-pci, uni-north-pci, versatile_pci_host * Sysbus [PATCH 02]: ARM,bitband-memory, SUNW,CS4231, SUNW,fdtwo, SUNW,tcx, a15mpcore_priv, a9-scu, a9mpcore_priv, apc, arm11mpcore_priv, cadence_gem, cadence_ttc, cadence_uart, cfi.pflash01, cfi.pflash02, cuda, dec-21154-sysbus, ds1225y, e500-ccsr, e500-pcihost, e500-spin, eccmemctl, empty_slot, escc, esp, etraxfs,pic, etraxfs,serial, etraxfs,timer, etraxfs-eth, exynos4210-ehci-usb, exynos4210.combiner, exynos4210.fimd, exynos4210.gic, exynos4210.i2c, exynos4210.irq_gate, exynos4210.mct, exynos4210.pmu, exynos4210.pwm, exynos4210.rtc, exynos4210.uart, fusbh200-ehci-usb, generic-sdhci, gpio_i2c, grlib,apbuart, grlib,gptimer, grlib,irqmp, gt64120, highbank-regs, icc-bridge, imx-serial, imx.epit, imx.gpt, imx_avic, imx_ccm, integrator_core, integrator_pic, integrator_pit, iommu, jazz-led, lan9118, lance, lm32-juart, lm32-pic, lm32-sys, lm32-timer, lm32-uart, m48t59, macio-ide, macio-nvram, macio_idreg, mainstone-fpga, memory, milkymist-ac97, milkymist-hpdmc, milkymist-memcard, milkymist-minimac2, milkymist-pfpu, milkymist-softusb, milkymist-sysctl, milkymist-tmu2, milkymist-uart, milkymist-vgafb, mips-malta, mipsnet, mmio-ide, mpc8544-guts, musicpal-misc, musicpal_gpio, musicpal_key, musicpal_lcd, mv88w8618_audio, mv88w8618_eth, mv88w8618_flashcfg, mv88w8618_pic, mv88w8618_pit, mv88w8618_wlan, omap-gpio, omap-intc, omap2-gpio, omap2-intc, omap_i2c, onenand, open_eth, openpic, openprom, pbm, pl011, pl011_luminary, pl022, pl050_keyboard, pl050_mouse, pl061, pl061_luminary, pl330, ppc4xx-pcihost, puv3_dma, puv3_gpio, puv3_intc, puv3_ost, puv3_pm, pxa25x-timer, pxa27x-timer, pxa2xx-dma, pxa2xx-gpio, pxa2xx-ssp, pxa2xx_i2c, pxa2xx_pic, pxa2xx_rtc, q35-pcihost, realview_gic, realview_mpcore, realview_pci, realview_sysctl, s390-sclp-event-facility, scoop, sh_pci, sl-nand, slavio_intctl, slavio_misc, slavio_timer, smc91c111, sp804, spapr-pci-host-bridge, sparc32_dma, spitz-keyboard, stellaris-adc, stellaris-gptm, stellaris-i2c, stellaris_enet, strongarm-gpio, strongarm-ppc, strongarm-rtc, strongarm-ssp, strongarm-uart, strongarm_pic, sysbus-ahci, sysbus-fdc, sysbus-g364, sysbus-ohci, tcx_afx, tegra2-ehci-usb, tusb6010, u3-agp-pcihost, uni-north-agp-pcihost, uni-north-internal-pci-pcihost, uni-north-pci-pcihost, versatile_i2c, versatile_pci, virtio-mmio, xgmac, xics, xilinx,zynq_slcr, xlnx,ps7-usb, xlnx.axi-dma, xlnx.ps7-qspi, xlnx.ps7-spi, xlnx.xps-ethernetlite, xlnx.xps-intc, xlnx.xps-spi, xlnx.xps-timer, xlnx.xps-uartlite v2: address Peter Maydell's review * Some commit messages improved * Use QOM cast macros instead of .parent_class [PATCH 05] * keep cannot_instantiate_with_device_add_yet for port92, isa-pit, kvm-pit, m48t59_isa, mc146818rtc [PATCH 09] Markus Armbruster (10): qdev: Replace no_user by cannot_instantiate_with_device_add_yet sysbus: Set cannot_instantiate_with_device_add_yet cpu: Document why cannot_instantiate_with_device_add_yet apic: Document why cannot_instantiate_with_device_add_yet pci-host: Consistently set cannot_instantiate_with_device_add_yet ich9: Document why cannot_instantiate_with_device_add_yet piix3 piix4: Clean up use of cannot_instantiate_with_device_add_yet vt82c686: Clean up use of cannot_instantiate_with_device_add_yet isa: Clean up
[Qemu-devel] [PATCH v2 03/10] cpu: Document why cannot_instantiate_with_device_add_yet
From: Markus Armbruster arm...@redhat.com
Signed-off-by: Markus Armbruster arm...@redhat.com
Reviewed-by: Peter Maydell peter.mayd...@linaro.org
---
qom/cpu.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/qom/cpu.c b/qom/cpu.c
index 09c15e6..6e0d54e 100644
--- a/qom/cpu.c
+++ b/qom/cpu.c
@@ -254,7 +254,11 @@ static void cpu_class_init(ObjectClass *klass, void *data)
k-gdb_read_register = cpu_common_gdb_read_register;
k-gdb_write_register = cpu_common_gdb_write_register;
dc-realize = cpu_common_realizefn;
-dc-cannot_instantiate_with_device_add_yet = true; /* FIXME explain why */
+/*
+ * Reason: CPUs still need special care by board code: wiring up
+ * IRQs, adding reset handlers, halting non-first CPUS, ...
+ */
+dc-cannot_instantiate_with_device_add_yet = true;
}
static const TypeInfo cpu_type_info = {
--
1.8.1.4
[Qemu-devel] [PATCH v2 08/10] vt82c686: Clean up use of cannot_instantiate_with_device_add_yet
From: Markus Armbruster arm...@redhat.com
A VT82C686B southbridge has multiple functions. We model each
function as a separate qdev. One of them need some special wiring set
up in mips_fulong2e_init() to work: the ISA bridge at 05.0.
The IDE controller at 05.1 (via-ide) has always had
cannot_instantiate_with_device_add_yet set, but there is no obvious
reason why device_add could not work for them. Drop it.
Signed-off-by: Markus Armbruster arm...@redhat.com
Reviewed-by: Peter Maydell peter.mayd...@linaro.org
---
hw/ide/via.c | 1 -
hw/isa/vt82c686.c | 6 +-
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/hw/ide/via.c b/hw/ide/via.c
index b556c14..198123b 100644
--- a/hw/ide/via.c
+++ b/hw/ide/via.c
@@ -225,7 +225,6 @@ static void via_ide_class_init(ObjectClass *klass, void
*data)
k-revision = 0x06;
k-class_id = PCI_CLASS_STORAGE_IDE;
set_bit(DEVICE_CATEGORY_STORAGE, dc-categories);
-dc-cannot_instantiate_with_device_add_yet = true; /* FIXME explain why */
}
static const TypeInfo via_ide_info = {
diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
index 3e8ec80..ec7c259 100644
--- a/hw/isa/vt82c686.c
+++ b/hw/isa/vt82c686.c
@@ -480,8 +480,12 @@ static void via_class_init(ObjectClass *klass, void *data)
k-class_id = PCI_CLASS_BRIDGE_ISA;
k-revision = 0x40;
dc-desc = ISA bridge;
-dc-cannot_instantiate_with_device_add_yet = true; /* FIXME explain why */
dc-vmsd = vmstate_via;
+/*
+ * Reason: part of VIA VT82C686 southbridge, needs to be wired up,
+ * e.g. by mips_fulong2e_init()
+ */
+dc-cannot_instantiate_with_device_add_yet = true;
}
static const TypeInfo via_info = {
--
1.8.1.4
[Qemu-devel] [PATCH v2 10/10] qdev: Do not let the user try to device_add when it cannot work
From: Markus Armbruster arm...@redhat.com
Such devices have always been unavailable and omitted from the list of
available devices shown by device_add help. Until commit 18b6dad
silently broke the former, setting up nasty traps for unwary users,
like this one:
$ qemu-system-x86_64 -nodefaults -monitor stdio -display none
QEMU 1.6.50 monitor - type 'help' for more information
(qemu) device_add apic
Segmentation fault (core dumped)
I call that a regression. Fix it.
Signed-off-by: Markus Armbruster arm...@redhat.com
---
qdev-monitor.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/qdev-monitor.c b/qdev-monitor.c
index 36f6f09..c538fec 100644
--- a/qdev-monitor.c
+++ b/qdev-monitor.c
@@ -477,7 +477,7 @@ DeviceState *qdev_device_add(QemuOpts *opts)
}
}
-if (!obj) {
+if (!obj || DEVICE_CLASS(obj)-cannot_instantiate_with_device_add_yet) {
qerror_report(QERR_INVALID_PARAMETER_VALUE, driver, device type);
return NULL;
}
--
1.8.1.4
[Qemu-devel] [PATCH v2 06/10] ich9: Document why cannot_instantiate_with_device_add_yet
From: Markus Armbruster arm...@redhat.com
An ICH9 southbridge contains several PCI devices, some of them with
multiple functions. We model each function as a separate qdev. Two
of them need some special wiring set up in pc_q35_init() to work: the
LPC controller at 00:1f.0, and the SMBus controller at 00:1f.3.
Signed-off-by: Markus Armbruster arm...@redhat.com
Reviewed-by: Peter Maydell peter.mayd...@linaro.org
---
hw/i2c/smbus_ich9.c | 6 +-
hw/isa/lpc_ich9.c | 7 +--
2 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/hw/i2c/smbus_ich9.c b/hw/i2c/smbus_ich9.c
index c1ffa34..8d47eaf 100644
--- a/hw/i2c/smbus_ich9.c
+++ b/hw/i2c/smbus_ich9.c
@@ -97,11 +97,15 @@ static void ich9_smb_class_init(ObjectClass *klass, void
*data)
k-device_id = PCI_DEVICE_ID_INTEL_ICH9_6;
k-revision = ICH9_A2_SMB_REVISION;
k-class_id = PCI_CLASS_SERIAL_SMBUS;
-dc-cannot_instantiate_with_device_add_yet = true; /* FIXME explain why */
dc-vmsd = vmstate_ich9_smbus;
dc-desc = ICH9 SMBUS Bridge;
k-init = ich9_smbus_initfn;
k-config_write = ich9_smbus_write_config;
+/*
+ * Reason: part of ICH9 southbridge, needs to be wired up by
+ * pc_q35_init()
+ */
+dc-cannot_instantiate_with_device_add_yet = true;
}
i2c_bus *ich9_smb_init(PCIBus *bus, int devfn, uint32_t smb_io_base)
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index ad841b5..d00d698 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -604,14 +604,17 @@ static void ich9_lpc_class_init(ObjectClass *klass, void
*data)
dc-reset = ich9_lpc_reset;
k-init = ich9_lpc_initfn;
dc-vmsd = vmstate_ich9_lpc;
-dc-cannot_instantiate_with_device_add_yet = true; /* FIXME explain why */
k-config_write = ich9_lpc_config_write;
dc-desc = ICH9 LPC bridge;
k-vendor_id = PCI_VENDOR_ID_INTEL;
k-device_id = PCI_DEVICE_ID_INTEL_ICH9_8;
k-revision = ICH9_A2_LPC_REVISION;
k-class_id = PCI_CLASS_BRIDGE_ISA;
-
+/*
+ * Reason: part of ICH9 southbridge, needs to be wired up by
+ * pc_q35_init()
+ */
+dc-cannot_instantiate_with_device_add_yet = true;
}
static const TypeInfo ich9_lpc_info = {
--
1.8.1.4
Re: [Qemu-devel] [PATCH] linux-user: create target_structs header to place ipc_perm and shmid_ds
Ping
http://patchwork.ozlabs.org/patch/281527/
From: Petar Jovanovic
Sent: Tuesday, October 22, 2013 5:13 PM
To: Petar Jovanovic; qemu-devel@nongnu.org
Cc: aurel...@aurel32.net; riku.voi...@linaro.org; peter.mayd...@linaro.org
Subject: RE: [PATCH] linux-user: create target_structs header to place ipc_perm
and shmid_ds
Ping
http://patchwork.ozlabs.org/patch/281527/
From: Petar Jovanovic
Sent: Tuesday, October 15, 2013 2:44 PM
To: Petar Jovanovic; qemu-devel@nongnu.org
Cc: aurel...@aurel32.net; riku.voi...@linaro.org; peter.mayd...@linaro.org
Subject: RE: [PATCH] linux-user: create target_structs header to place ipc_perm
and shmid_ds
Ping
http://patchwork.ozlabs.org/patch/281527/
Regards,
Petar
From: Petar Jovanovic [petar.jovano...@rt-rk.com]
Sent: Tuesday, October 08, 2013 7:32 PM
To: qemu-devel@nongnu.org
Cc: Petar Jovanovic; aurel...@aurel32.net; riku.voi...@linaro.org;
peter.mayd...@linaro.org
Subject: [PATCH] linux-user: create target_structs header to place ipc_perm and
shmid_ds
From: Petar Jovanovic petar.jovano...@imgtec.com
Creating target_structs header in linux-user/$arch/ and making
target_ipc_perm and target_shmid_ds its first inhabitants.
The struct defintions may/should be further fine-tuned by arch maintainers.
Signed-off-by: Petar Jovanovic petar.jovano...@imgtec.com
---
As suggested, this header can be used to move all target-specific struct
definitions. All arch maintainers are welcome to double check definitions
of target_shmid_ds and target_ipc_perm. The definitions have been either
improved by comparing the actual layout to the one in arch-toolchains
headers or remain the same (i.e. as they are now in the code).
linux-user/aarch64/target_structs.h| 40 +
linux-user/alpha/target_structs.h | 30 +
linux-user/arm/target_structs.h| 34 ++
linux-user/cris/target_structs.h | 40 +
linux-user/i386/target_structs.h | 40 +
linux-user/m68k/target_structs.h | 40 +
linux-user/microblaze/target_structs.h | 40 +
linux-user/mips/target_structs.h | 30 +
linux-user/mips64/target_structs.h |2 +
linux-user/openrisc/target_structs.h | 40 +
linux-user/ppc/target_structs.h| 42 ++
linux-user/qemu.h |1 +
linux-user/s390x/target_structs.h | 45 +++
linux-user/sh4/target_structs.h| 40 +
linux-user/sparc/target_structs.h | 45 +++
linux-user/sparc64/target_structs.h| 40 +
linux-user/syscall.c | 76
linux-user/unicore32/target_structs.h | 40 +
linux-user/x86_64/target_structs.h | 40 +
19 files changed, 657 insertions(+), 48 deletions(-)
create mode 100644 linux-user/aarch64/target_structs.h
create mode 100644 linux-user/alpha/target_structs.h
create mode 100644 linux-user/arm/target_structs.h
create mode 100644 linux-user/cris/target_structs.h
create mode 100644 linux-user/i386/target_structs.h
create mode 100644 linux-user/m68k/target_structs.h
create mode 100644 linux-user/microblaze/target_structs.h
create mode 100644 linux-user/mips/target_structs.h
create mode 100644 linux-user/mips64/target_structs.h
create mode 100644 linux-user/openrisc/target_structs.h
create mode 100644 linux-user/ppc/target_structs.h
create mode 100644 linux-user/s390x/target_structs.h
create mode 100644 linux-user/sh4/target_structs.h
create mode 100644 linux-user/sparc/target_structs.h
create mode 100644 linux-user/sparc64/target_structs.h
create mode 100644 linux-user/unicore32/target_structs.h
create mode 100644 linux-user/x86_64/target_structs.h
diff --git a/linux-user/aarch64/target_structs.h
b/linux-user/aarch64/target_structs.h
new file mode 100644
index 000..30ed852
--- /dev/null
+++ b/linux-user/aarch64/target_structs.h
@@ -0,0 +1,40 @@
+#ifndef TARGET_STRUCTS_H
+#define TARGET_STRUCTS_H
+
+struct target_ipc_perm {
+abi_int __key; /* Key. */
+abi_uint uid; /* Owner's user ID. */
+abi_uint gid; /* Owner's group ID. */
+abi_uint cuid; /* Creator's user ID. */
+abi_uint cgid; /* Creator's group ID. */
+abi_ushort mode;/* Read/write permission. */
+abi_ushort __pad1;
+abi_ushort __seq; /* Sequence number. */
+abi_ushort __pad2;
+abi_ulong __unused1;
+abi_ulong __unused2;
+};
+
+struct target_shmid_ds {
+struct target_ipc_perm shm_perm;/* operation permission struct */
+abi_long shm_segsz; /* size of segment in
Re: [Qemu-devel] [PATCH 3/6] qapi: rename prefix QEVENT to Q_EVENT
On 10/28/2013 11:22 PM, Wenchao Xia wrote:
MONITOR_EVENT seems tide to monitor too much, since it will be present
in qapi-schema, I think Q_EVENT_ or QMP_EVENT_KIND would be better?
I don't have a strong enough opinion on the bikeshed color.
MONITOR_EVENT implies the event is always associated with delivery over
a monitor; but how else would you receive an event without a monitor?
I am coding v2, which fully support event define in qapi-schema. There
is another thing I hope to know your opinion:
Should we support use enum as discriminator?
{ 'enum': 'QEvent',
'data': [ 'SHUTDOWN', 'POWERDOWN']
{ 'type': 'QmpEventBase',
'data': { 'event': 'QEvent', 'timestamp': 'EventTimestamp' } }
{ 'Union': 'QmpEvent',
'base': 'QmpEventBase',
'discriminator': 'event',
I raised that question when Kevin first added discriminated unions; if I
recall, the answer was along the lines: yes, it would be a nice
addition, but someone would have to code it, and we'd have to teach the
generator.py to loudly fail if all branches of the enum are not covered
in the union's data. So go for it!
'data': {
'SHUTDOWN' : 'EventShutdown',
'POWERDOWN' : 'EventPowerdown'
}
}
By default 'QmpEvent' will generate a hidden enum type 'QmpEventKind'.
but the hidden type define is needed by query-event, so there is two way
to archieve it:
1 just use the hidden type in qapi-schema.json.
2 modified the script to support use predefined enum type.
In my draft code, both can work, but which one do you prefer?
I'd like to see the addition of an enum-typed discriminator, rather than
forcing the discriminator to be string-only.
--
Eric Blake eblake redhat com+1-919-301-3266
Libvirt virtualization library http://libvirt.org
signature.asc
Description: OpenPGP digital signature
[Qemu-devel] [PATCH v2 05/10] pci-host: Consistently set cannot_instantiate_with_device_add_yet
From: Markus Armbruster arm...@redhat.com
Many PCI host bridges consist of a sysbus device and a PCI device.
You need both for the thing to work. Arguably, these bridges should
be modelled as a single, composite devices instead of pairs of
seemingly independent devices you can only use together, but we're not
there, yet.
Since the sysbus part can't be instantiated with device_add, yet,
permitting it with the PCI part is useless. We shouldn't offer
useless options to the user, so let's set
cannot_instantiate_with_device_add_yet for them.
It's already set for Bonito, grackle, i440FX, and raven. Document
why.
Set it for the others: dec-21154, e500-host-bridge, gt64120_pci, mch,
pbm-pci, ppc4xx-host-bridge, sh_pci_host, u3-agp, uni-north-agp,
uni-north-internal-pci, uni-north-pci, and versatile_pci_host.
Signed-off-by: Markus Armbruster arm...@redhat.com
---
hw/mips/gt64xxx_pci.c | 6 ++
hw/pci-bridge/dec.c | 6 ++
hw/pci-host/apb.c | 6 ++
hw/pci-host/bonito.c| 6 +-
hw/pci-host/grackle.c | 6 +-
hw/pci-host/piix.c | 6 +-
hw/pci-host/ppce500.c | 5 +
hw/pci-host/prep.c | 6 +-
hw/pci-host/q35.c | 5 +
hw/pci-host/uninorth.c | 24
hw/pci-host/versatile.c | 6 ++
hw/ppc/ppc4xx_pci.c | 5 +
hw/sh4/sh_pci.c | 6 ++
13 files changed, 89 insertions(+), 4 deletions(-)
diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c
index 3da2e67..6398514 100644
--- a/hw/mips/gt64xxx_pci.c
+++ b/hw/mips/gt64xxx_pci.c
@@ -1151,12 +1151,18 @@ static int gt64120_pci_init(PCIDevice *d)
static void gt64120_pci_class_init(ObjectClass *klass, void *data)
{
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+DeviceClass *dc = DEVICE_CLASS(klass);
k-init = gt64120_pci_init;
k-vendor_id = PCI_VENDOR_ID_MARVELL;
k-device_id = PCI_DEVICE_ID_MARVELL_GT6412X;
k-revision = 0x10;
k-class_id = PCI_CLASS_BRIDGE_HOST;
+/*
+ * PCI-facing part of the host bridge, not usable without the
+ * host-facing part, which can't be device_add'ed, yet.
+ */
+dc-cannot_instantiate_with_device_add_yet = true;
}
static const TypeInfo gt64120_pci_info = {
diff --git a/hw/pci-bridge/dec.c b/hw/pci-bridge/dec.c
index e5e3be8..a6ca940 100644
--- a/hw/pci-bridge/dec.c
+++ b/hw/pci-bridge/dec.c
@@ -116,6 +116,7 @@ static int dec_21154_pci_host_init(PCIDevice *d)
static void dec_21154_pci_host_class_init(ObjectClass *klass, void *data)
{
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+DeviceClass *dc = DEVICE_CLASS(klass);
k-init = dec_21154_pci_host_init;
k-vendor_id = PCI_VENDOR_ID_DEC;
@@ -123,6 +124,11 @@ static void dec_21154_pci_host_class_init(ObjectClass
*klass, void *data)
k-revision = 0x02;
k-class_id = PCI_CLASS_BRIDGE_PCI;
k-is_bridge = 1;
+/*
+ * PCI-facing part of the host bridge, not usable without the
+ * host-facing part, which can't be device_add'ed, yet.
+ */
+dc-cannot_instantiate_with_device_add_yet = true;
}
static const TypeInfo dec_21154_pci_host_info = {
diff --git a/hw/pci-host/apb.c b/hw/pci-host/apb.c
index 92f289f..1b399dd 100644
--- a/hw/pci-host/apb.c
+++ b/hw/pci-host/apb.c
@@ -516,11 +516,17 @@ static int pbm_pci_host_init(PCIDevice *d)
static void pbm_pci_host_class_init(ObjectClass *klass, void *data)
{
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+DeviceClass *dc = DEVICE_CLASS(klass);
k-init = pbm_pci_host_init;
k-vendor_id = PCI_VENDOR_ID_SUN;
k-device_id = PCI_DEVICE_ID_SUN_SABRE;
k-class_id = PCI_CLASS_BRIDGE_HOST;
+/*
+ * PCI-facing part of the host bridge, not usable without the
+ * host-facing part, which can't be device_add'ed, yet.
+ */
+dc-cannot_instantiate_with_device_add_yet = true;
}
static const TypeInfo pbm_pci_host_info = {
diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index bfb9820..902441f 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -806,8 +806,12 @@ static void bonito_class_init(ObjectClass *klass, void
*data)
k-revision = 0x01;
k-class_id = PCI_CLASS_BRIDGE_HOST;
dc-desc = Host bridge;
-dc-cannot_instantiate_with_device_add_yet = true; /* FIXME explain why */
dc-vmsd = vmstate_bonito;
+/*
+ * PCI-facing part of the host bridge, not usable without the
+ * host-facing part, which can't be device_add'ed, yet.
+ */
+dc-cannot_instantiate_with_device_add_yet = true;
}
static const TypeInfo bonito_info = {
diff --git a/hw/pci-host/grackle.c b/hw/pci-host/grackle.c
index c178375..7d95821 100644
--- a/hw/pci-host/grackle.c
+++ b/hw/pci-host/grackle.c
@@ -130,7 +130,11 @@ static void grackle_pci_class_init(ObjectClass *klass,
void *data)
k-device_id = PCI_DEVICE_ID_MOTOROLA_MPC106;
k-revision = 0x00;
k-class_id = PCI_CLASS_BRIDGE_HOST;
-dc-cannot_instantiate_with_device_add_yet = true; /* FIXME explain
[Qemu-devel] [PATCH v2 07/10] piix3 piix4: Clean up use of cannot_instantiate_with_device_add_yet
From: Markus Armbruster arm...@redhat.com
A PIIX3/PIIX4 southbridge has multiple functions. We model each
function as a separate qdev. Two of them need some special wiring set
up in pc_init1() or mips_malta_init() to work: the ISA bridge at 01.0,
and the SMBus controller at 01.3.
The IDE controller at 01.1 (piix3-ide, piix3-ide-xen, piix4-ide) has
always had cannot_instantiate_with_device_add_yet set, but there is no
obvious reason why device_add could not work for them. Drop it.
Signed-off-by: Markus Armbruster arm...@redhat.com
---
hw/acpi/piix4.c| 7 ++-
hw/ide/piix.c | 3 ---
hw/isa/piix4.c | 6 +-
hw/pci-host/piix.c | 12 ++--
4 files changed, 21 insertions(+), 7 deletions(-)
diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c
index c29a703..c0ad010 100644
--- a/hw/acpi/piix4.c
+++ b/hw/acpi/piix4.c
@@ -508,9 +508,14 @@ static void piix4_pm_class_init(ObjectClass *klass, void
*data)
k-revision = 0x03;
k-class_id = PCI_CLASS_BRIDGE_OTHER;
dc-desc = PM;
-dc-cannot_instantiate_with_device_add_yet = true; /* FIXME explain why */
+dc-cannot_instantiate_with_device_add_yet = true;
dc-vmsd = vmstate_acpi;
dc-props = piix4_pm_properties;
+/*
+ * Reason: part of PIIX4 southbridge, needs to be wired up,
+ * e.g. by mips_malta_init()
+ */
+dc-cannot_instantiate_with_device_add_yet = true;
}
static const TypeInfo piix4_pm_info = {
diff --git a/hw/ide/piix.c b/hw/ide/piix.c
index 27b08e1..9b5960b 100644
--- a/hw/ide/piix.c
+++ b/hw/ide/piix.c
@@ -248,7 +248,6 @@ static void piix3_ide_class_init(ObjectClass *klass, void
*data)
k-device_id = PCI_DEVICE_ID_INTEL_82371SB_1;
k-class_id = PCI_CLASS_STORAGE_IDE;
set_bit(DEVICE_CATEGORY_STORAGE, dc-categories);
-dc-cannot_instantiate_with_device_add_yet = true; /* FIXME explain why */
}
static const TypeInfo piix3_ide_info = {
@@ -267,7 +266,6 @@ static void piix3_ide_xen_class_init(ObjectClass *klass,
void *data)
k-device_id = PCI_DEVICE_ID_INTEL_82371SB_1;
k-class_id = PCI_CLASS_STORAGE_IDE;
set_bit(DEVICE_CATEGORY_STORAGE, dc-categories);
-dc-cannot_instantiate_with_device_add_yet = true; /* FIXME explain why */
dc-unplug = pci_piix3_xen_ide_unplug;
}
@@ -289,7 +287,6 @@ static void piix4_ide_class_init(ObjectClass *klass, void
*data)
k-device_id = PCI_DEVICE_ID_INTEL_82371AB;
k-class_id = PCI_CLASS_STORAGE_IDE;
set_bit(DEVICE_CATEGORY_STORAGE, dc-categories);
-dc-cannot_instantiate_with_device_add_yet = true; /* FIXME explain why */
}
static const TypeInfo piix4_ide_info = {
diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c
index d9dac61..def6fe3 100644
--- a/hw/isa/piix4.c
+++ b/hw/isa/piix4.c
@@ -113,8 +113,12 @@ static void piix4_class_init(ObjectClass *klass, void
*data)
k-device_id = PCI_DEVICE_ID_INTEL_82371AB_0;
k-class_id = PCI_CLASS_BRIDGE_ISA;
dc-desc = ISA bridge;
-dc-cannot_instantiate_with_device_add_yet = true; /* FIXME explain why */
dc-vmsd = vmstate_piix4;
+/*
+ * Reason: part of PIIX4 southbridge, needs to be wired up,
+ * e.g. by mips_malta_init()
+ */
+dc-cannot_instantiate_with_device_add_yet = true;
}
static const TypeInfo piix4_info = {
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index 8089fd6..1526fd4 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -644,7 +644,6 @@ static void piix3_class_init(ObjectClass *klass, void *data)
dc-desc= ISA bridge;
dc-vmsd= vmstate_piix3;
-dc-cannot_instantiate_with_device_add_yet = true; /* FIXME explain why */
k-no_hotplug = 1;
k-init = piix3_initfn;
k-config_write = piix3_write_config;
@@ -652,6 +651,11 @@ static void piix3_class_init(ObjectClass *klass, void
*data)
/* 82371SB PIIX3 PCI-to-ISA bridge (Step A1) */
k-device_id= PCI_DEVICE_ID_INTEL_82371SB_0;
k-class_id = PCI_CLASS_BRIDGE_ISA;
+/*
+ * Reason: part of PIIX3 southbridge, needs to be wired up by
+ * pc_piix.c's pc_init1()
+ */
+dc-cannot_instantiate_with_device_add_yet = true;
}
static const TypeInfo piix3_info = {
@@ -668,7 +672,6 @@ static void piix3_xen_class_init(ObjectClass *klass, void
*data)
dc-desc= ISA bridge;
dc-vmsd= vmstate_piix3;
-dc-cannot_instantiate_with_device_add_yet = true; /* FIXME explain why */
k-no_hotplug = 1;
k-init = piix3_initfn;
k-config_write = piix3_write_config_xen;
@@ -676,6 +679,11 @@ static void piix3_xen_class_init(ObjectClass *klass, void
*data)
/* 82371SB PIIX3 PCI-to-ISA bridge (Step A1) */
k-device_id= PCI_DEVICE_ID_INTEL_82371SB_0;
k-class_id = PCI_CLASS_BRIDGE_ISA;
+/*
+ * Reason: part of PIIX3 southbridge, needs to be wired up by
+ * pc_piix.c's pc_init1()
+ */
+dc-cannot_instantiate_with_device_add_yet = true;
};
static const TypeInfo piix3_xen_info = {
--
1.8.1.4
Re: [Qemu-devel] [PATCH] arm_gic: Keep track of GICD_CPENDR and GICD_SPENDR
Hi Christoffer,
Not related to the patch, for edge type of interrupt, will setting bit in
ICD_SPENDR generate interrupt?
Thanks
-Bharat
-Original Message-
From: Christoffer Dall [mailto:christoffer.d...@linaro.org]
Sent: Wednesday, October 23, 2013 8:57 PM
To: peter.mayd...@linaro.org
Cc: patc...@linaro.org; qemu-devel@nongnu.org; kvm...@lists.cs.columbia.edu
Subject: [PATCH] arm_gic: Keep track of GICD_CPENDR and GICD_SPENDR
If software writes to the ISPENDR and sets the pending state of a level-
triggered interrupt, the falling edge of the hardware input must not clear the
pending state. Conversely, if software writes to the ICPENDR, the pending
state
of a level-triggered interrupt should only be cleared if the hardware input is
not asserted.
This requires an extra state variable to keep track of software writes.
Signed-off-by: Christoffer Dall christoffer.d...@linaro.org
---
hw/intc/arm_gic.c| 20 +---
hw/intc/arm_gic_common.c | 5 +++--
hw/intc/gic_internal.h | 4
3 files changed, 24 insertions(+), 5 deletions(-)
diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index d1ddac1..db54061
100644
--- a/hw/intc/arm_gic.c
+++ b/hw/intc/arm_gic.c
@@ -101,6 +101,12 @@ static void gic_clear_pending(GICState *s, int irq, int
cm,
uint8_t src) {
unsigned cpu;
+/* If a level-triggered interrupt has been set to pending through the
+ * GICD_SPENDR, then a falling edge does not clear the pending state.
+ */
+if (GIC_TEST_SW_PENDING(irq, cm))
+return;
+
GIC_CLEAR_PENDING(irq, cm);
if (irq GIC_NR_SGIS) {
cpu = (unsigned)ffs(cm) - 1;
@@ -177,8 +183,9 @@ uint32_t gic_acknowledge_irq(GICState *s, int cpu)
s-last_active[new_irq][cpu] = s-running_irq[cpu];
/* Clear pending flags for both level and edge triggered interrupts.
Level triggered IRQs will be reasserted once they become inactive. */
-gic_clear_pending(s, new_irq, GIC_TEST_MODEL(new_irq) ? ALL_CPU_MASK :
cm,
- GIC_SGI_SRC(new_irq, cpu));
+cm = GIC_TEST_MODEL(new_irq) ? ALL_CPU_MASK : cm;
+GIC_CLEAR_SW_PENDING(new_irq, cm);
+gic_clear_pending(s, new_irq, cm, GIC_SGI_SRC(new_irq, cpu));
gic_set_running_irq(s, cpu, new_irq);
DPRINTF(ACK %d\n, new_irq);
return new_irq;
@@ -445,16 +452,23 @@ static void gic_dist_writeb(void *opaque, hwaddr offset,
for (i = 0; i 8; i++) {
if (value (1 i)) {
GIC_SET_PENDING(irq + i, GIC_TARGET(irq + i));
+if (!GIC_TEST_TRIGGER(irq + i)) {
+GIC_SET_SW_PENDING(irq + i, GIC_TARGET(irq + i));
+}
}
}
} else if (offset 0x300) {
+int cm = (1 cpu);
/* Interrupt Clear Pending. */
irq = (offset - 0x280) * 8 + GIC_BASE_IRQ;
if (irq = s-num_irq)
goto bad_reg;
for (i = 0; i 8; i++, irq++) {
if (irq GIC_NR_SGIS value (1 i)) {
-gic_clear_pending(s, irq, 1 cpu, 0);
+GIC_CLEAR_SW_PENDING(irq, cm);
+if (GIC_TEST_TRIGGER(irq + i) || !GIC_TEST_LEVEL(irq, cm)) {
+GIC_CLEAR_PENDING(irq, cm);
+}
}
}
} else if (offset 0x400) {
diff --git a/hw/intc/arm_gic_common.c b/hw/intc/arm_gic_common.c index
1d3b738..7f0615f 100644
--- a/hw/intc/arm_gic_common.c
+++ b/hw/intc/arm_gic_common.c
@@ -43,11 +43,12 @@ static int gic_post_load(void *opaque, int version_id)
static const VMStateDescription vmstate_gic_irq_state = {
.name = arm_gic_irq_state,
-.version_id = 1,
-.minimum_version_id = 1,
+.version_id = 2,
+.minimum_version_id = 2,
.fields = (VMStateField[]) {
VMSTATE_UINT8(enabled, gic_irq_state),
VMSTATE_UINT8(pending, gic_irq_state),
+VMSTATE_UINT8(sw_pending, gic_irq_state),
VMSTATE_UINT8(active, gic_irq_state),
VMSTATE_UINT8(level, gic_irq_state),
VMSTATE_BOOL(model, gic_irq_state), diff --git
a/hw/intc/gic_internal.h
b/hw/intc/gic_internal.h index f9133b9..173c607 100644
--- a/hw/intc/gic_internal.h
+++ b/hw/intc/gic_internal.h
@@ -43,6 +43,9 @@
#define GIC_SET_PENDING(irq, cm) s-irq_state[irq].pending |= (cm) #define
GIC_CLEAR_PENDING(irq, cm) s-irq_state[irq].pending = ~(cm) #define
GIC_TEST_PENDING(irq, cm) ((s-irq_state[irq].pending (cm)) != 0)
+#define GIC_SET_SW_PENDING(irq, cm) s-irq_state[irq].sw_pending |=
+(cm) #define GIC_CLEAR_SW_PENDING(irq, cm) s-irq_state[irq].sw_pending
+= ~(cm) #define GIC_TEST_SW_PENDING(irq, cm)
+((s-irq_state[irq].sw_pending (cm)) != 0)
#define GIC_SET_ACTIVE(irq, cm) s-irq_state[irq].active |= (cm) #define
GIC_CLEAR_ACTIVE(irq, cm) s-irq_state[irq].active = ~(cm) #define
GIC_TEST_ACTIVE(irq, cm) ((s-irq_state[irq].active (cm)) != 0) @@
Re: [Qemu-devel] [PATCH v2 07/10] piix3 piix4: Clean up use of cannot_instantiate_with_device_add_yet
On 10/29/2013 10:08 AM, arm...@redhat.com wrote: From: Markus Armbruster arm...@redhat.com A PIIX3/PIIX4 southbridge has multiple functions. We model each function as a separate qdev. Two of them need some special wiring set up in pc_init1() or mips_malta_init() to work: the ISA bridge at 01.0, and the SMBus controller at 01.3. The IDE controller at 01.1 (piix3-ide, piix3-ide-xen, piix4-ide) has always had cannot_instantiate_with_device_add_yet set, but there is no obvious reason why device_add could not work for them. Drop it. +++ b/hw/acpi/piix4.c @@ -508,9 +508,14 @@ static void piix4_pm_class_init(ObjectClass *klass, void *data) k-revision = 0x03; k-class_id = PCI_CLASS_BRIDGE_OTHER; dc-desc = PM; -dc-cannot_instantiate_with_device_add_yet = true; /* FIXME explain why */ +dc-cannot_instantiate_with_device_add_yet = true; dc-vmsd = vmstate_acpi; dc-props = piix4_pm_properties; +/* + * Reason: part of PIIX4 southbridge, needs to be wired up, + * e.g. by mips_malta_init() + */ +dc-cannot_instantiate_with_device_add_yet = true; Is it intentional that you initialize the field twice to the same value? -- Eric Blake eblake redhat com+1-919-301-3266 Libvirt virtualization library http://libvirt.org signature.asc Description: OpenPGP digital signature
