Re: [Qemu-devel] [PATCH v2 8/8] ovmf: add DxeTpm2MeasureBootLib
(Jiewen, below I have a question for you as well; please help with that.) On 03/07/18 16:57, marcandre.lur...@redhat.com wrote: > From: Marc-André Lureau > > The library registers a security management handler, to measure images > that are not measure in PEI phase. > > This seems to work for example with the qemu PXE rom: > > Loading driver at 0x0003E6C2000 EntryPoint=0x0003E6C9076 8086100e.efi > > And the following binary_bios_measurements log entry seems to be > added: > > PCR: 2type: EV_EFI_BOOT_SERVICES_DRIVER size: 0x4e digest: > 70a22475e9f18806d2ed9193b48d80d26779d9a4 > > Cc: Laszlo Ersek > Cc: Stefan Berger > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Marc-André Lureau > --- > OvmfPkg/OvmfPkgX64.dsc | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc > index 7753852144fb..9db1712e3623 100644 > --- a/OvmfPkg/OvmfPkgX64.dsc > +++ b/OvmfPkg/OvmfPkgX64.dsc > @@ -662,6 +662,9 @@ [Components] > > !if $(SECURE_BOOT_ENABLE) == TRUE > > NULL|SecurityPkg/Library/DxeImageVerificationLib/DxeImageVerificationLib.inf > +!endif > +!if $(TPM2_ENABLE) == TRUE > + > NULL|SecurityPkg/Library/DxeTpm2MeasureBootLib/DxeTpm2MeasureBootLib.inf > !endif >} > > (1) Marc-André, please change the subject line to: OvmfPkg: plug DxeTpm2MeasureBootLib into SecurityStubDxe (2) I have a question for Jiewen: DxeTpm2MeasureBootLib consumes the TCG2 protocol, but it does not depend on it with a DEPEX. Instead, DxeTpm2MeasureBootHandler() tries to locate the protocol on every invocation. This means that SecurityStubDxe may produce the Security and Security2 Architectural Protocols before measurements into the TPM2 device are possible. Therefore, UEFI_DRIVER modules (which depend on all of the Arch protocols) may be started before they can be measured into the TPM. Now, this is likely no problem for UEFI_DRIVER modules that are built into the firmware volume(s), because those are measured by Tcg2Pei anyway. However, it would be a problem for UEFI_DRIVER modules / apps that come from external media (disk, network, PCI oprom, etc). However, such are loaded only in the BDS phase, and BDS is only entered after all of the DXE drivers are dispatched from the firmware volumes. In other words, the ordering between Tcg2Dxe and external UEFI_DRIVER / UEFI_APPLICATION modules is ensured that Tcg2Dxe will be dispatched in the DXE phase, while the latter will only be loaded in BDS. Is this intentional? Is my understanding correct? (3) If that's the case, then Marc-André, please add the following to the commit message: Hooking DxeTpm2MeasureBootLib into SecurityStubDxe ensures that the Security and Security2 Arch protocols will entail, by the time of entering the BDS phase, the measuring of UEFI binaries into the TPM. Thus, external UEFI_DRIVER and UEFI_APPLICATION modules (which are loaded in the BDS phase, from disk, network, PCI oprom, etc) will be measured. Drivers dispatched in the DXE phase before Tcg2Dxe will not be measured individually; however such drivers come from the firmware volume(s), and those are measured in the PEI phase by Tcg2Pei. Thanks! Laszlo
Re: [Qemu-devel] [PATCH v2 8/8] ovmf: add DxeTpm2MeasureBootLib
On 03/08/18 20:54, Laszlo Ersek wrote: > In other words, the ordering between Tcg2Dxe and external UEFI_DRIVER / > UEFI_APPLICATION modules is ensured that Tcg2Dxe will be dispatched in > the DXE phase, while the latter will only be loaded in BDS. Sigh, I meant: The ordering between Tcg2Dxe and external UEFI_DRIVER / UEFI_APPLICATION modules is ensured *by the fact* that Tcg2Dxe will be dispatched in the DXE phase, while the latter will only be loaded in BDS. Thanks, Laszlo
[Qemu-devel] [PATCH v4 01/29] migrate: Update ram_block_discard_range for shared
From: "Dr. David Alan Gilbert"
The choice of call to discard a block is getting more complicated
for other cases. We use fallocate PUNCH_HOLE in any file cases;
it works for both hugepage and for tmpfs.
We use the DONTNEED for non-hugepage cases either where they're
anonymous or where they're private.
Care should be taken when trying other backing files.
Signed-off-by: Dr. David Alan Gilbert
Reviewed-by: Peter Xu
---
exec.c | 60 ++--
trace-events | 3 ++-
2 files changed, 48 insertions(+), 15 deletions(-)
diff --git a/exec.c b/exec.c
index 604f03c535..77313bc4cd 100644
--- a/exec.c
+++ b/exec.c
@@ -3722,6 +3722,7 @@ int ram_block_discard_range(RAMBlock *rb, uint64_t start,
size_t length)
}
if ((start + length) <= rb->used_length) {
+bool need_madvise, need_fallocate;
uint8_t *host_endaddr = host_startaddr + length;
if ((uintptr_t)host_endaddr & (rb->page_size - 1)) {
error_report("ram_block_discard_range: Unaligned end address: %p",
@@ -3731,29 +3732,60 @@ int ram_block_discard_range(RAMBlock *rb, uint64_t
start, size_t length)
errno = ENOTSUP; /* If we are missing MADVISE etc */
-if (rb->page_size == qemu_host_page_size) {
-#if defined(CONFIG_MADVISE)
-/* Note: We need the madvise MADV_DONTNEED behaviour of definitely
- * freeing the page.
- */
-ret = madvise(host_startaddr, length, MADV_DONTNEED);
-#endif
-} else {
-/* Huge page case - unfortunately it can't do DONTNEED, but
- * it can do the equivalent by FALLOC_FL_PUNCH_HOLE in the
- * huge page file.
+/* The logic here is messy;
+ *madvise DONTNEED fails for hugepages
+ *fallocate works on hugepages and shmem
+ */
+need_madvise = (rb->page_size == qemu_host_page_size);
+need_fallocate = rb->fd != -1;
+if (need_fallocate) {
+/* For a file, this causes the area of the file to be zero'd
+ * if read, and for hugetlbfs also causes it to be unmapped
+ * so a userfault will trigger.
*/
#ifdef CONFIG_FALLOCATE_PUNCH_HOLE
ret = fallocate(rb->fd, FALLOC_FL_PUNCH_HOLE | FALLOC_FL_KEEP_SIZE,
start, length);
+if (ret) {
+ret = -errno;
+error_report("ram_block_discard_range: Failed to fallocate "
+ "%s:%" PRIx64 " +%zx (%d)",
+ rb->idstr, start, length, ret);
+goto err;
+}
+#else
+ret = -ENOSYS;
+error_report("ram_block_discard_range: fallocate not
available/file"
+ "%s:%" PRIx64 " +%zx (%d)",
+ rb->idstr, start, length, ret);
+goto err;
#endif
}
-if (ret) {
-ret = -errno;
-error_report("ram_block_discard_range: Failed to discard range "
+if (need_madvise) {
+/* For normal RAM this causes it to be unmapped,
+ * for shared memory it causes the local mapping to disappear
+ * and to fall back on the file contents (which we just
+ * fallocate'd away).
+ */
+#if defined(CONFIG_MADVISE)
+ret = madvise(host_startaddr, length, MADV_DONTNEED);
+if (ret) {
+ret = -errno;
+error_report("ram_block_discard_range: Failed to discard range
"
+ "%s:%" PRIx64 " +%zx (%d)",
+ rb->idstr, start, length, ret);
+goto err;
+}
+#else
+ret = -ENOSYS;
+error_report("ram_block_discard_range: MADVISE not available"
"%s:%" PRIx64 " +%zx (%d)",
rb->idstr, start, length, ret);
+goto err;
+#endif
}
+trace_ram_block_discard_range(rb->idstr, host_startaddr, length,
+ need_madvise, need_fallocate, ret);
} else {
error_report("ram_block_discard_range: Overrun block '%s' (%" PRIu64
"/%zx/" RAM_ADDR_FMT")",
diff --git a/trace-events b/trace-events
index 89fcad0fd1..196598a6f8 100644
--- a/trace-events
+++ b/trace-events
@@ -55,9 +55,10 @@ dma_complete(void *dbs, int ret, void *cb) "dbs=%p ret=%d
cb=%p"
dma_blk_cb(void *dbs, int ret) "dbs=%p ret=%d"
dma_map_wait(void *dbs) "dbs=%p"
-# # exec.c
+# exec.c
find_ram_offset(uint64_t size, uint64_t offset) "size: 0x%" PRIx64 " @ 0x%"
PRIx64
find_ram_offset_loop(uint64_t size, uint64_t candidate, uint64_t offset,
uint64_t next, uint64_t mingap) "trying size: 0x%" PRIx64 " @ 0x%" PRIx64 ",
offset: 0x%" PRIx64" next: 0x%" PRIx64 " mingap: 0x%" PRIx64
+ram_block_discard_range(const char *rbname, void *hva, size_t length, bool
need_
[Qemu-devel] [PATCH v4 03/29] postcopy: use UFFDIO_ZEROPAGE only when available
From: "Dr. David Alan Gilbert"
Use a flag on the RAMBlock to state whether it has the
UFFDIO_ZEROPAGE capability, use it when it's available.
This allows the use of postcopy on tmpfs as well as hugepage
backed files.
Signed-off-by: Dr. David Alan Gilbert
Reviewed-by: Peter Xu
---
exec.c| 16
include/exec/cpu-common.h | 3 +++
migration/postcopy-ram.c | 13 ++---
3 files changed, 29 insertions(+), 3 deletions(-)
diff --git a/exec.c b/exec.c
index 7187bff683..be6f99e11d 100644
--- a/exec.c
+++ b/exec.c
@@ -99,6 +99,11 @@ static MemoryRegion io_mem_unassigned;
*/
#define RAM_RESIZEABLE (1 << 2)
+/* UFFDIO_ZEROPAGE is available on this RAMBlock to atomically
+ * zero the page and wake waiting processes.
+ * (Set during postcopy)
+ */
+#define RAM_UF_ZEROPAGE (1 << 3)
#endif
#ifdef TARGET_PAGE_BITS_VARY
@@ -1767,6 +1772,17 @@ bool qemu_ram_is_shared(RAMBlock *rb)
return rb->flags & RAM_SHARED;
}
+/* Note: Only set at the start of postcopy */
+bool qemu_ram_is_uf_zeroable(RAMBlock *rb)
+{
+return rb->flags & RAM_UF_ZEROPAGE;
+}
+
+void qemu_ram_set_uf_zeroable(RAMBlock *rb)
+{
+rb->flags |= RAM_UF_ZEROPAGE;
+}
+
/* Called with iothread lock held. */
void qemu_ram_set_idstr(RAMBlock *new_block, const char *name, DeviceState
*dev)
{
diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h
index 0d861a6289..24d335f95d 100644
--- a/include/exec/cpu-common.h
+++ b/include/exec/cpu-common.h
@@ -73,6 +73,9 @@ void qemu_ram_set_idstr(RAMBlock *block, const char *name,
DeviceState *dev);
void qemu_ram_unset_idstr(RAMBlock *block);
const char *qemu_ram_get_idstr(RAMBlock *rb);
bool qemu_ram_is_shared(RAMBlock *rb);
+bool qemu_ram_is_uf_zeroable(RAMBlock *rb);
+void qemu_ram_set_uf_zeroable(RAMBlock *rb);
+
size_t qemu_ram_pagesize(RAMBlock *block);
size_t qemu_ram_pagesize_largest(void);
diff --git a/migration/postcopy-ram.c b/migration/postcopy-ram.c
index 032abfbf1a..a75b5d393f 100644
--- a/migration/postcopy-ram.c
+++ b/migration/postcopy-ram.c
@@ -481,6 +481,10 @@ static int ram_block_enable_notify(const char *block_name,
void *host_addr,
error_report("%s userfault: Region doesn't support COPY", __func__);
return -1;
}
+if (reg_struct.ioctls & ((__u64)1 << _UFFDIO_ZEROPAGE)) {
+RAMBlock *rb = qemu_ram_block_by_name(block_name);
+qemu_ram_set_uf_zeroable(rb);
+}
return 0;
}
@@ -700,11 +704,14 @@ int postcopy_place_page(MigrationIncomingState *mis, void
*host, void *from,
int postcopy_place_page_zero(MigrationIncomingState *mis, void *host,
RAMBlock *rb)
{
+size_t pagesize = qemu_ram_pagesize(rb);
trace_postcopy_place_page_zero(host);
-if (qemu_ram_pagesize(rb) == getpagesize()) {
-if (qemu_ufd_copy_ioctl(mis->userfault_fd, host, NULL, getpagesize(),
-rb)) {
+/* Normal RAMBlocks can zero a page using UFFDIO_ZEROPAGE
+ * but it's not available for everything (e.g. hugetlbpages)
+ */
+if (qemu_ram_is_uf_zeroable(rb)) {
+if (qemu_ufd_copy_ioctl(mis->userfault_fd, host, NULL, pagesize, rb)) {
int e = errno;
error_report("%s: %s zero host: %p",
__func__, strerror(e), host);
--
2.14.3
[Qemu-devel] [PATCH v4 04/29] postcopy: Add notifier chain
From: "Dr. David Alan Gilbert"
Add a notifier chain for postcopy with a 'reason' flag
and an opportunity for a notifier member to return an error.
Call it when enabling postcopy.
This will initially used to enable devices to declare they're unable
to postcopy and later to notify of devices of stages within postcopy.
Signed-off-by: Dr. David Alan Gilbert
Reviewed-by: Peter Xu
---
migration/postcopy-ram.c | 36
migration/postcopy-ram.h | 26 ++
vl.c | 2 ++
3 files changed, 64 insertions(+)
diff --git a/migration/postcopy-ram.c b/migration/postcopy-ram.c
index a75b5d393f..1089814d54 100644
--- a/migration/postcopy-ram.c
+++ b/migration/postcopy-ram.c
@@ -23,6 +23,8 @@
#include "savevm.h"
#include "postcopy-ram.h"
#include "ram.h"
+#include "qapi/error.h"
+#include "qemu/notify.h"
#include "sysemu/sysemu.h"
#include "sysemu/balloon.h"
#include "qemu/error-report.h"
@@ -45,6 +47,33 @@ struct PostcopyDiscardState {
unsigned int nsentcmds;
};
+static NotifierWithReturnList postcopy_notifier_list;
+
+void postcopy_infrastructure_init(void)
+{
+notifier_with_return_list_init(&postcopy_notifier_list);
+}
+
+void postcopy_add_notifier(NotifierWithReturn *nn)
+{
+notifier_with_return_list_add(&postcopy_notifier_list, nn);
+}
+
+void postcopy_remove_notifier(NotifierWithReturn *n)
+{
+notifier_with_return_remove(n);
+}
+
+int postcopy_notify(enum PostcopyNotifyReason reason, Error **errp)
+{
+struct PostcopyNotifyData pnd;
+pnd.reason = reason;
+pnd.errp = errp;
+
+return notifier_with_return_list_notify(&postcopy_notifier_list,
+&pnd);
+}
+
/* Postcopy needs to detect accesses to pages that haven't yet been copied
* across, and efficiently map new pages in, the techniques for doing this
* are target OS specific.
@@ -215,6 +244,7 @@ bool postcopy_ram_supported_by_host(MigrationIncomingState
*mis)
struct uffdio_register reg_struct;
struct uffdio_range range_struct;
uint64_t feature_mask;
+Error *local_err = NULL;
if (qemu_target_page_size() > pagesize) {
error_report("Target page size bigger than host page size");
@@ -228,6 +258,12 @@ bool postcopy_ram_supported_by_host(MigrationIncomingState
*mis)
goto out;
}
+/* Give devices a chance to object */
+if (postcopy_notify(POSTCOPY_NOTIFY_PROBE, &local_err)) {
+error_report_err(local_err);
+goto out;
+}
+
/* Version and features check */
if (!ufd_check_and_apply(ufd, mis)) {
goto out;
diff --git a/migration/postcopy-ram.h b/migration/postcopy-ram.h
index 14f6cadcbd..2e879bbacb 100644
--- a/migration/postcopy-ram.h
+++ b/migration/postcopy-ram.h
@@ -116,4 +116,30 @@ PostcopyState postcopy_state_set(PostcopyState new_state);
void postcopy_fault_thread_notify(MigrationIncomingState *mis);
+/*
+ * To be called once at the start before any device initialisation
+ */
+void postcopy_infrastructure_init(void);
+
+/* Add a notifier to a list to be called when checking whether the devices
+ * can support postcopy.
+ * It's data is a *PostcopyNotifyData
+ * It should return 0 if OK, or a negative value on failure.
+ * On failure it must set the data->errp to an error.
+ *
+ */
+enum PostcopyNotifyReason {
+POSTCOPY_NOTIFY_PROBE = 0,
+};
+
+struct PostcopyNotifyData {
+enum PostcopyNotifyReason reason;
+Error **errp;
+};
+
+void postcopy_add_notifier(NotifierWithReturn *nn);
+void postcopy_remove_notifier(NotifierWithReturn *n);
+/* Call the notifier list set by postcopy_add_start_notifier */
+int postcopy_notify(enum PostcopyNotifyReason reason, Error **errp);
+
#endif
diff --git a/vl.c b/vl.c
index dae986b352..55c8d692e8 100644
--- a/vl.c
+++ b/vl.c
@@ -94,6 +94,7 @@ int main(int argc, char **argv)
#include "audio/audio.h"
#include "sysemu/cpus.h"
#include "migration/colo.h"
+#include "migration/postcopy-ram.h"
#include "sysemu/kvm.h"
#include "sysemu/hax.h"
#include "qapi/qobject-input-visitor.h"
@@ -3101,6 +3102,7 @@ int main(int argc, char **argv, char **envp)
module_call_init(MODULE_INIT_OPTS);
runstate_init();
+postcopy_infrastructure_init();
if (qcrypto_init(&err) < 0) {
error_reportf_err(err, "cannot initialize crypto: ");
--
2.14.3
[Qemu-devel] [PATCH v4 06/29] vhost-user: Add 'VHOST_USER_POSTCOPY_ADVISE' message
From: "Dr. David Alan Gilbert"
Wire up a notifier to send a VHOST_USER_POSTCOPY_ADVISE
message on an incoming advise.
Later patches will fill in the behaviour/contents of the
message.
Signed-off-by: Dr. David Alan Gilbert
Reviewed-by: Marc-André Lureau
---
contrib/libvhost-user/libvhost-user.c | 14 ++
contrib/libvhost-user/libvhost-user.h | 3 +++
docs/interop/vhost-user.txt | 10
hw/virtio/vhost-user.c| 48 +++
migration/postcopy-ram.h | 1 +
migration/savevm.c| 6 +
6 files changed, 82 insertions(+)
diff --git a/contrib/libvhost-user/libvhost-user.c
b/contrib/libvhost-user/libvhost-user.c
index 2e358b5bce..71825d2dde 100644
--- a/contrib/libvhost-user/libvhost-user.c
+++ b/contrib/libvhost-user/libvhost-user.c
@@ -86,6 +86,7 @@ vu_request_to_string(unsigned int req)
REQ(VHOST_USER_SET_VRING_ENDIAN),
REQ(VHOST_USER_GET_CONFIG),
REQ(VHOST_USER_SET_CONFIG),
+REQ(VHOST_USER_POSTCOPY_ADVISE),
REQ(VHOST_USER_MAX),
};
#undef REQ
@@ -856,6 +857,17 @@ vu_set_config(VuDev *dev, VhostUserMsg *vmsg)
return false;
}
+static bool
+vu_set_postcopy_advise(VuDev *dev, VhostUserMsg *vmsg)
+{
+/* TODO: Open ufd, pass it back in the request
+ * TODO: Add addresses
+ */
+vmsg->payload.u64 = 0xcafe;
+vmsg->size = sizeof(vmsg->payload.u64);
+return true; /* = send a reply */
+}
+
static bool
vu_process_message(VuDev *dev, VhostUserMsg *vmsg)
{
@@ -927,6 +939,8 @@ vu_process_message(VuDev *dev, VhostUserMsg *vmsg)
return vu_set_config(dev, vmsg);
case VHOST_USER_NONE:
break;
+case VHOST_USER_POSTCOPY_ADVISE:
+return vu_set_postcopy_advise(dev, vmsg);
default:
vmsg_close_fds(vmsg);
vu_panic(dev, "Unhandled request: %d", vmsg->request);
diff --git a/contrib/libvhost-user/libvhost-user.h
b/contrib/libvhost-user/libvhost-user.h
index 96db29c4ce..00d78a8810 100644
--- a/contrib/libvhost-user/libvhost-user.h
+++ b/contrib/libvhost-user/libvhost-user.h
@@ -83,6 +83,9 @@ typedef enum VhostUserRequest {
VHOST_USER_SET_VRING_ENDIAN = 23,
VHOST_USER_GET_CONFIG = 24,
VHOST_USER_SET_CONFIG = 25,
+VHOST_USER_CREATE_CRYPTO_SESSION = 26,
+VHOST_USER_CLOSE_CRYPTO_SESSION = 27,
+VHOST_USER_POSTCOPY_ADVISE = 28,
VHOST_USER_MAX
} VhostUserRequest;
diff --git a/docs/interop/vhost-user.txt b/docs/interop/vhost-user.txt
index 91a572d781..acc4186c79 100644
--- a/docs/interop/vhost-user.txt
+++ b/docs/interop/vhost-user.txt
@@ -699,6 +699,16 @@ Master message types
feature has been successfully negotiated.
It's a required feature for crypto devices.
+ * VHOST_USER_POSTCOPY_ADVISE
+ Id: 28
+ Master payload: N/A
+ Slave payload: userfault fd + u64
+
+ When VHOST_USER_PROTOCOL_F_PAGEFAULT is supported, the
+ master advises slave that a migration with postcopy enabled is underway,
+ the slave must open a userfaultfd for later use.
+ Note that at this stage the migration is still in precopy mode.
+
Slave message types
---
diff --git a/hw/virtio/vhost-user.c b/hw/virtio/vhost-user.c
index aab35c4845..431858b219 100644
--- a/hw/virtio/vhost-user.c
+++ b/hw/virtio/vhost-user.c
@@ -78,6 +78,7 @@ typedef enum VhostUserRequest {
VHOST_USER_SET_CONFIG = 25,
VHOST_USER_CREATE_CRYPTO_SESSION = 26,
VHOST_USER_CLOSE_CRYPTO_SESSION = 27,
+VHOST_USER_POSTCOPY_ADVISE = 28,
VHOST_USER_MAX
} VhostUserRequest;
@@ -795,6 +796,50 @@ out:
return ret;
}
+/*
+ * Called at the start of an inbound postcopy on reception of the
+ * 'advise' command.
+ */
+static int vhost_user_postcopy_advise(struct vhost_dev *dev, Error **errp)
+{
+struct vhost_user *u = dev->opaque;
+CharBackend *chr = u->chr;
+int ufd;
+VhostUserMsg msg = {
+.hdr.request = VHOST_USER_POSTCOPY_ADVISE,
+.hdr.flags = VHOST_USER_VERSION,
+};
+
+if (vhost_user_write(dev, &msg, NULL, 0) < 0) {
+error_setg(errp, "Failed to send postcopy_advise to vhost");
+return -1;
+}
+
+if (vhost_user_read(dev, &msg) < 0) {
+error_setg(errp, "Failed to get postcopy_advise reply from vhost");
+return -1;
+}
+
+if (msg.hdr.request != VHOST_USER_POSTCOPY_ADVISE) {
+error_setg(errp, "Unexpected msg type. Expected %d received %d",
+ VHOST_USER_POSTCOPY_ADVISE, msg.hdr.request);
+return -1;
+}
+
+if (msg.hdr.size != sizeof(msg.payload.u64)) {
+error_setg(errp, "Received bad msg size.");
+return -1;
+}
+ufd = qemu_chr_fe_get_msgfd(chr);
+if (ufd < 0) {
+error_setg(errp, "%s: Failed to get ufd", __func__);
+return -1;
+}
+
+/* TODO: register ufd with userfault thread */
+return 0;
+}
+
static int vhost_user_postcopy_notifier(NotifierWithReturn *notifier,
[Qemu-devel] [PATCH v4 00/29] postcopy+vhost-user/shared ram
From: "Dr. David Alan Gilbert" This set enables postcopy migration with shared memory to a vhost user process. It's based off current head. Testing is mostly performed with dpdk, with corresponding modifications by Maxime. v4 is mostly just fixes from comments received during review of v3, and the normal updating of all the virtio enum's to catch up with other things getting in before us. Dave Dr. David Alan Gilbert (29): migrate: Update ram_block_discard_range for shared qemu_ram_block_host_offset postcopy: use UFFDIO_ZEROPAGE only when available postcopy: Add notifier chain postcopy: Add vhost-user flag for postcopy and check it vhost-user: Add 'VHOST_USER_POSTCOPY_ADVISE' message libvhost-user: Support sending fds back to qemu libvhost-user: Open userfaultfd postcopy: Allow registering of fd handler vhost+postcopy: Register shared ufd with postcopy vhost+postcopy: Transmit 'listen' to client postcopy+vhost-user: Split set_mem_table for postcopy migration/ram: ramblock_recv_bitmap_test_byte_offset libvhost-user+postcopy: Register new regions with the ufd vhost+postcopy: Send address back to qemu vhost+postcopy: Stash RAMBlock and offset vhost+postcopy: Send requests to source for shared pages vhost+postcopy: Resolve client address postcopy: helper for waking shared postcopy: postcopy_notify_shared_wake vhost+postcopy: Add vhost waker vhost+postcopy: Call wakeups libvhost-user: mprotect & madvises for postcopy vhost-user: Add VHOST_USER_POSTCOPY_END message vhost+postcopy: Wire up POSTCOPY_END notify vhost: Huge page align and merge postcopy: Allow shared memory libvhost-user: Claim support for postcopy postcopy shared docs contrib/libvhost-user/libvhost-user.c | 303 - contrib/libvhost-user/libvhost-user.h | 11 + docs/devel/migration.rst | 41 docs/interop/vhost-user.txt | 51 + exec.c| 86 +-- hw/virtio/trace-events| 16 +- hw/virtio/vhost-user.c| 411 +- hw/virtio/vhost.c | 66 +- include/exec/cpu-common.h | 4 + migration/migration.c | 6 + migration/migration.h | 4 + migration/postcopy-ram.c | 354 +++-- migration/postcopy-ram.h | 69 ++ migration/ram.c | 5 + migration/ram.h | 1 + migration/savevm.c| 13 ++ migration/trace-events| 6 + trace-events | 3 +- vl.c | 2 + 19 files changed, 1354 insertions(+), 98 deletions(-) -- 2.14.3
[Qemu-devel] [PATCH v4 11/29] vhost+postcopy: Transmit 'listen' to client
From: "Dr. David Alan Gilbert"
Notify the vhost-user client on reception of the 'postcopy-listen'
event from the source.
Signed-off-by: Dr. David Alan Gilbert
Reviewed-by: Marc-André Lureau
Reviewed-by: Peter Xu
---
contrib/libvhost-user/libvhost-user.c | 19 +++
contrib/libvhost-user/libvhost-user.h | 2 ++
docs/interop/vhost-user.txt | 11 +++
hw/virtio/trace-events| 3 +++
hw/virtio/vhost-user.c| 34 ++
migration/postcopy-ram.h | 1 +
migration/savevm.c| 7 +++
7 files changed, 77 insertions(+)
diff --git a/contrib/libvhost-user/libvhost-user.c
b/contrib/libvhost-user/libvhost-user.c
index 0b563fc5ae..beec7695a8 100644
--- a/contrib/libvhost-user/libvhost-user.c
+++ b/contrib/libvhost-user/libvhost-user.c
@@ -98,6 +98,7 @@ vu_request_to_string(unsigned int req)
REQ(VHOST_USER_GET_CONFIG),
REQ(VHOST_USER_SET_CONFIG),
REQ(VHOST_USER_POSTCOPY_ADVISE),
+REQ(VHOST_USER_POSTCOPY_LISTEN),
REQ(VHOST_USER_MAX),
};
#undef REQ
@@ -933,6 +934,22 @@ out:
return true; /* = send a reply */
}
+static bool
+vu_set_postcopy_listen(VuDev *dev, VhostUserMsg *vmsg)
+{
+vmsg->payload.u64 = -1;
+vmsg->size = sizeof(vmsg->payload.u64);
+
+if (dev->nregions) {
+vu_panic(dev, "Regions already registered at postcopy-listen");
+return true;
+}
+dev->postcopy_listening = true;
+
+vmsg->flags = VHOST_USER_VERSION | VHOST_USER_REPLY_MASK;
+vmsg->payload.u64 = 0; /* Success */
+return true;
+}
static bool
vu_process_message(VuDev *dev, VhostUserMsg *vmsg)
{
@@ -1006,6 +1023,8 @@ vu_process_message(VuDev *dev, VhostUserMsg *vmsg)
break;
case VHOST_USER_POSTCOPY_ADVISE:
return vu_set_postcopy_advise(dev, vmsg);
+case VHOST_USER_POSTCOPY_LISTEN:
+return vu_set_postcopy_listen(dev, vmsg);
default:
vmsg_close_fds(vmsg);
vu_panic(dev, "Unhandled request: %d", vmsg->request);
diff --git a/contrib/libvhost-user/libvhost-user.h
b/contrib/libvhost-user/libvhost-user.h
index 074b7860f6..ed505cf0c1 100644
--- a/contrib/libvhost-user/libvhost-user.h
+++ b/contrib/libvhost-user/libvhost-user.h
@@ -86,6 +86,7 @@ typedef enum VhostUserRequest {
VHOST_USER_CREATE_CRYPTO_SESSION = 26,
VHOST_USER_CLOSE_CRYPTO_SESSION = 27,
VHOST_USER_POSTCOPY_ADVISE = 28,
+VHOST_USER_POSTCOPY_LISTEN = 29,
VHOST_USER_MAX
} VhostUserRequest;
@@ -285,6 +286,7 @@ struct VuDev {
/* Postcopy data */
int postcopy_ufd;
+bool postcopy_listening;
};
typedef struct VuVirtqElement {
diff --git a/docs/interop/vhost-user.txt b/docs/interop/vhost-user.txt
index acc4186c79..7cc7006ef3 100644
--- a/docs/interop/vhost-user.txt
+++ b/docs/interop/vhost-user.txt
@@ -709,6 +709,17 @@ Master message types
the slave must open a userfaultfd for later use.
Note that at this stage the migration is still in precopy mode.
+ * VHOST_USER_POSTCOPY_LISTEN
+ Id: 29
+ Master payload: N/A
+
+ Master advises slave that a transition to postcopy mode has happened.
+ The slave must ensure that shared memory is registered with userfaultfd
+ to cause faulting of non-present pages.
+
+ This is always sent sometime after a VHOST_USER_POSTCOPY_ADVISE, and
+ thus only when VHOST_USER_PROTOCOL_F_PAGEFAULT is supported.
+
Slave message types
---
diff --git a/hw/virtio/trace-events b/hw/virtio/trace-events
index 742ff0f90b..06ec03d6e7 100644
--- a/hw/virtio/trace-events
+++ b/hw/virtio/trace-events
@@ -6,6 +6,9 @@ vhost_region_add_section(const char *name, uint64_t gpa,
uint64_t size, uint64_t
vhost_region_add_section_abut(const char *name, uint64_t new_size) "%s:
0x%"PRIx64
vhost_section(const char *name, int r) "%s:%d"
+# hw/virtio/vhost-user.c
+vhost_user_postcopy_listen(void) ""
+
# hw/virtio/virtio.c
virtqueue_alloc_element(void *elem, size_t sz, unsigned in_num, unsigned
out_num) "elem %p size %zd in_num %u out_num %u"
virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx)
"vq %p elem %p len %u idx %u"
diff --git a/hw/virtio/vhost-user.c b/hw/virtio/vhost-user.c
index 9f74111e92..ee200f703e 100644
--- a/hw/virtio/vhost-user.c
+++ b/hw/virtio/vhost-user.c
@@ -20,6 +20,7 @@
#include "sysemu/cryptodev.h"
#include "migration/migration.h"
#include "migration/postcopy-ram.h"
+#include "trace.h"
#include
#include
@@ -79,6 +80,7 @@ typedef enum VhostUserRequest {
VHOST_USER_CREATE_CRYPTO_SESSION = 26,
VHOST_USER_CLOSE_CRYPTO_SESSION = 27,
VHOST_USER_POSTCOPY_ADVISE = 28,
+VHOST_USER_POSTCOPY_LISTEN = 29,
VHOST_USER_MAX
} VhostUserRequest;
@@ -172,6 +174,8 @@ struct vhost_user {
int slave_fd;
NotifierWithReturn postcopy_notifier;
struct PostCopyFD postcopy_fd;
+/* True once we've entered postcopy_li
[Qemu-devel] [PATCH v4 02/29] qemu_ram_block_host_offset
From: "Dr. David Alan Gilbert"
Utility to give the offset of a host pointer within a RAMBlock
(assuming we already know it's in that RAMBlock)
Signed-off-by: Dr. David Alan Gilbert
Reviewed-by: Peter Xu
---
exec.c| 10 ++
include/exec/cpu-common.h | 1 +
2 files changed, 11 insertions(+)
diff --git a/exec.c b/exec.c
index 77313bc4cd..7187bff683 100644
--- a/exec.c
+++ b/exec.c
@@ -2297,6 +2297,16 @@ static void *qemu_ram_ptr_length(RAMBlock *ram_block,
ram_addr_t addr,
return ramblock_ptr(block, addr);
}
+/* Return the offset of a hostpointer within a ramblock */
+ram_addr_t qemu_ram_block_host_offset(RAMBlock *rb, void *host)
+{
+ram_addr_t res = (uint8_t *)host - (uint8_t *)rb->host;
+assert((uintptr_t)host >= (uintptr_t)rb->host);
+assert(res < rb->max_length);
+
+return res;
+}
+
/*
* Translates a host ptr back to a RAMBlock, a ram_addr and an offset
* in that RAMBlock.
diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h
index 74341b19d2..0d861a6289 100644
--- a/include/exec/cpu-common.h
+++ b/include/exec/cpu-common.h
@@ -68,6 +68,7 @@ ram_addr_t qemu_ram_addr_from_host(void *ptr);
RAMBlock *qemu_ram_block_by_name(const char *name);
RAMBlock *qemu_ram_block_from_host(void *ptr, bool round_offset,
ram_addr_t *offset);
+ram_addr_t qemu_ram_block_host_offset(RAMBlock *rb, void *host);
void qemu_ram_set_idstr(RAMBlock *block, const char *name, DeviceState *dev);
void qemu_ram_unset_idstr(RAMBlock *block);
const char *qemu_ram_get_idstr(RAMBlock *rb);
--
2.14.3
[Qemu-devel] [PATCH v4 05/29] postcopy: Add vhost-user flag for postcopy and check it
From: "Dr. David Alan Gilbert"
Add a vhost feature flag for postcopy support, and
use the postcopy notifier to check it before allowing postcopy.
Signed-off-by: Dr. David Alan Gilbert
Reviewed-by: Peter Xu
---
contrib/libvhost-user/libvhost-user.h | 2 ++
docs/interop/vhost-user.txt | 10 +
hw/virtio/vhost-user.c| 41 ++-
3 files changed, 52 insertions(+), 1 deletion(-)
diff --git a/contrib/libvhost-user/libvhost-user.h
b/contrib/libvhost-user/libvhost-user.h
index 18f95f65d7..96db29c4ce 100644
--- a/contrib/libvhost-user/libvhost-user.h
+++ b/contrib/libvhost-user/libvhost-user.h
@@ -48,6 +48,8 @@ enum VhostUserProtocolFeature {
VHOST_USER_PROTOCOL_F_NET_MTU = 4,
VHOST_USER_PROTOCOL_F_SLAVE_REQ = 5,
VHOST_USER_PROTOCOL_F_CROSS_ENDIAN = 6,
+VHOST_USER_PROTOCOL_F_CRYPTO_SESSION = 7,
+VHOST_USER_PROTOCOL_F_PAGEFAULT = 8,
VHOST_USER_PROTOCOL_F_MAX
};
diff --git a/docs/interop/vhost-user.txt b/docs/interop/vhost-user.txt
index cb3a7595aa..91a572d781 100644
--- a/docs/interop/vhost-user.txt
+++ b/docs/interop/vhost-user.txt
@@ -290,6 +290,15 @@ Once the source has finished migration, rings will be
stopped by
the source. No further update must be done before rings are
restarted.
+In postcopy migration the slave is started before all the memory has been
+received from the source host, and care must be taken to avoid accessing pages
+that have yet to be received. The slave opens a 'userfault'-fd and registers
+the memory with it; this fd is then passed back over to the master.
+The master services requests on the userfaultfd for pages that are accessed
+and when the page is available it performs WAKE ioctl's on the userfaultfd
+to wake the stalled slave. The client indicates support for this via the
+VHOST_USER_PROTOCOL_F_PAGEFAULT feature.
+
Memory access
-
@@ -369,6 +378,7 @@ Protocol features
#define VHOST_USER_PROTOCOL_F_SLAVE_REQ 5
#define VHOST_USER_PROTOCOL_F_CROSS_ENDIAN 6
#define VHOST_USER_PROTOCOL_F_CRYPTO_SESSION 7
+#define VHOST_USER_PROTOCOL_F_PAGEFAULT 8
Master message types
diff --git a/hw/virtio/vhost-user.c b/hw/virtio/vhost-user.c
index 41ff5cff41..aab35c4845 100644
--- a/hw/virtio/vhost-user.c
+++ b/hw/virtio/vhost-user.c
@@ -18,6 +18,8 @@
#include "qemu/error-report.h"
#include "qemu/sockets.h"
#include "sysemu/cryptodev.h"
+#include "migration/migration.h"
+#include "migration/postcopy-ram.h"
#include
#include
@@ -41,7 +43,7 @@ enum VhostUserProtocolFeature {
VHOST_USER_PROTOCOL_F_SLAVE_REQ = 5,
VHOST_USER_PROTOCOL_F_CROSS_ENDIAN = 6,
VHOST_USER_PROTOCOL_F_CRYPTO_SESSION = 7,
-
+VHOST_USER_PROTOCOL_F_PAGEFAULT = 8,
VHOST_USER_PROTOCOL_F_MAX
};
@@ -164,8 +166,10 @@ static VhostUserMsg m __attribute__ ((unused));
#define VHOST_USER_VERSION(0x1)
struct vhost_user {
+struct vhost_dev *dev;
CharBackend *chr;
int slave_fd;
+NotifierWithReturn postcopy_notifier;
};
static bool ioeventfd_enabled(void)
@@ -791,6 +795,33 @@ out:
return ret;
}
+static int vhost_user_postcopy_notifier(NotifierWithReturn *notifier,
+void *opaque)
+{
+struct PostcopyNotifyData *pnd = opaque;
+struct vhost_user *u = container_of(notifier, struct vhost_user,
+ postcopy_notifier);
+struct vhost_dev *dev = u->dev;
+
+switch (pnd->reason) {
+case POSTCOPY_NOTIFY_PROBE:
+if (!virtio_has_feature(dev->protocol_features,
+VHOST_USER_PROTOCOL_F_PAGEFAULT)) {
+/* TODO: Get the device name into this error somehow */
+error_setg(pnd->errp,
+ "vhost-user backend not capable of postcopy");
+return -ENOENT;
+}
+break;
+
+default:
+/* We ignore notifications we don't know */
+break;
+}
+
+return 0;
+}
+
static int vhost_user_init(struct vhost_dev *dev, void *opaque)
{
uint64_t features, protocol_features;
@@ -802,6 +833,7 @@ static int vhost_user_init(struct vhost_dev *dev, void
*opaque)
u = g_new0(struct vhost_user, 1);
u->chr = opaque;
u->slave_fd = -1;
+u->dev = dev;
dev->opaque = u;
err = vhost_user_get_features(dev, &features);
@@ -858,6 +890,9 @@ static int vhost_user_init(struct vhost_dev *dev, void
*opaque)
return err;
}
+u->postcopy_notifier.notify = vhost_user_postcopy_notifier;
+postcopy_add_notifier(&u->postcopy_notifier);
+
return 0;
}
@@ -868,6 +903,10 @@ static int vhost_user_cleanup(struct vhost_dev *dev)
assert(dev->vhost_ops->backend_type == VHOST_BACKEND_TYPE_USER);
u = dev->opaque;
+if (u->postcopy_notifier.notify) {
+postcopy_remove_notifier(&u->postcopy_notifier);
+u->postcopy_notifier.notify = NULL;
+}
if (u->slave_fd >= 0) {
[Qemu-devel] [PATCH v4 14/29] libvhost-user+postcopy: Register new regions with the ufd
From: "Dr. David Alan Gilbert"
When new regions are sent to the client using SET_MEM_TABLE, register
them with the userfaultfd.
Signed-off-by: Dr. David Alan Gilbert
---
contrib/libvhost-user/libvhost-user.c | 34 ++
1 file changed, 34 insertions(+)
diff --git a/contrib/libvhost-user/libvhost-user.c
b/contrib/libvhost-user/libvhost-user.c
index 4922b2c722..a18bc74a7c 100644
--- a/contrib/libvhost-user/libvhost-user.c
+++ b/contrib/libvhost-user/libvhost-user.c
@@ -494,6 +494,40 @@ vu_set_mem_table_exec_postcopy(VuDev *dev, VhostUserMsg
*vmsg)
close(vmsg->fds[i]);
}
+/* TODO: Get address back to QEMU */
+for (i = 0; i < dev->nregions; i++) {
+VuDevRegion *dev_region = &dev->regions[i];
+#ifdef UFFDIO_REGISTER
+/* We should already have an open ufd. Mark each memory
+ * range as ufd.
+ * Note: Do we need any madvises? Well it's not been accessed
+ * yet, still probably need no THP to be safe, discard to be safe?
+ */
+struct uffdio_register reg_struct;
+reg_struct.range.start = (uintptr_t)dev_region->mmap_addr;
+reg_struct.range.len = dev_region->size + dev_region->mmap_offset;
+reg_struct.mode = UFFDIO_REGISTER_MODE_MISSING;
+
+if (ioctl(dev->postcopy_ufd, UFFDIO_REGISTER, ®_struct)) {
+vu_panic(dev, "%s: Failed to userfault region %d "
+ "@%p + size:%zx offset: %zx: (ufd=%d)%s\n",
+ __func__, i,
+ dev_region->mmap_addr,
+ dev_region->size, dev_region->mmap_offset,
+ dev->postcopy_ufd, strerror(errno));
+return false;
+}
+if (!(reg_struct.ioctls & ((__u64)1 << _UFFDIO_COPY))) {
+vu_panic(dev, "%s Region (%d) doesn't support COPY",
+ __func__, i);
+return false;
+}
+DPRINT("%s: region %d: Registered userfault for %llx + %llx\n",
+__func__, i, reg_struct.range.start, reg_struct.range.len);
+/* TODO: Stash 'zero' support flags somewhere */
+#endif
+}
+
return false;
}
--
2.14.3
[Qemu-devel] [PATCH v4 08/29] libvhost-user: Open userfaultfd
From: "Dr. David Alan Gilbert"
Open a userfaultfd (on a postcopy_advise) and send it back in
the reply to the qemu for it to monitor.
Signed-off-by: Dr. David Alan Gilbert
---
contrib/libvhost-user/libvhost-user.c | 45 +++
contrib/libvhost-user/libvhost-user.h | 3 +++
2 files changed, 44 insertions(+), 4 deletions(-)
diff --git a/contrib/libvhost-user/libvhost-user.c
b/contrib/libvhost-user/libvhost-user.c
index eb0ab9338c..0b563fc5ae 100644
--- a/contrib/libvhost-user/libvhost-user.c
+++ b/contrib/libvhost-user/libvhost-user.c
@@ -26,9 +26,20 @@
#include
#include
#include
+#include "qemu/compiler.h"
+
+#if defined(__linux__)
+#include
+#include
+#include
#include
-#include "qemu/compiler.h"
+#ifdef __NR_userfaultfd
+#include
+#endif
+
+#endif
+
#include "qemu/atomic.h"
#include "libvhost-user.h"
@@ -888,11 +899,37 @@ vu_set_config(VuDev *dev, VhostUserMsg *vmsg)
static bool
vu_set_postcopy_advise(VuDev *dev, VhostUserMsg *vmsg)
{
-/* TODO: Open ufd, pass it back in the request
- * TODO: Add addresses
- */
+dev->postcopy_ufd = -1;
+#ifdef UFFDIO_API
+struct uffdio_api api_struct;
+
+dev->postcopy_ufd = syscall(__NR_userfaultfd, O_CLOEXEC | O_NONBLOCK);
+/* TODO: Add addresses */
vmsg->payload.u64 = 0xcafe;
vmsg->size = sizeof(vmsg->payload.u64);
+#endif
+
+if (dev->postcopy_ufd == -1) {
+vu_panic(dev, "Userfaultfd not available: %s", strerror(errno));
+goto out;
+}
+
+#ifdef UFFDIO_API
+api_struct.api = UFFD_API;
+api_struct.features = 0;
+if (ioctl(dev->postcopy_ufd, UFFDIO_API, &api_struct)) {
+vu_panic(dev, "Failed UFFDIO_API: %s", strerror(errno));
+close(dev->postcopy_ufd);
+dev->postcopy_ufd = -1;
+goto out;
+}
+/* TODO: Stash feature flags somewhere */
+#endif
+
+out:
+/* Return a ufd to the QEMU */
+vmsg->fd_num = 1;
+vmsg->fds[0] = dev->postcopy_ufd;
return true; /* = send a reply */
}
diff --git a/contrib/libvhost-user/libvhost-user.h
b/contrib/libvhost-user/libvhost-user.h
index 00d78a8810..074b7860f6 100644
--- a/contrib/libvhost-user/libvhost-user.h
+++ b/contrib/libvhost-user/libvhost-user.h
@@ -282,6 +282,9 @@ struct VuDev {
* re-initialize */
vu_panic_cb panic;
const VuDevIface *iface;
+
+/* Postcopy data */
+int postcopy_ufd;
};
typedef struct VuVirtqElement {
--
2.14.3
[Qemu-devel] [PATCH v4 16/29] vhost+postcopy: Stash RAMBlock and offset
From: "Dr. David Alan Gilbert"
Stash the RAMBlock and offset for later use looking up
addresses.
Signed-off-by: Dr. David Alan Gilbert
---
hw/virtio/trace-events | 1 +
hw/virtio/vhost-user.c | 34 ++
2 files changed, 35 insertions(+)
diff --git a/hw/virtio/trace-events b/hw/virtio/trace-events
index 05d18ada77..d7e9e1084b 100644
--- a/hw/virtio/trace-events
+++ b/hw/virtio/trace-events
@@ -9,6 +9,7 @@ vhost_section(const char *name, int r) "%s:%d"
# hw/virtio/vhost-user.c
vhost_user_postcopy_listen(void) ""
vhost_user_set_mem_table_postcopy(uint64_t client_addr, uint64_t qhva, int
reply_i, int region_i) "client:0x%"PRIx64" for hva: 0x%"PRIx64" reply %d region
%d"
+vhost_user_set_mem_table_withfd(int index, const char *name, uint64_t
memory_size, uint64_t guest_phys_addr, uint64_t userspace_addr, uint64_t
offset) "%d:%s: size:0x%"PRIx64" GPA:0x%"PRIx64" QVA/userspace:0x%"PRIx64" RB
offset:0x%"PRIx64
# hw/virtio/virtio.c
virtqueue_alloc_element(void *elem, size_t sz, unsigned in_num, unsigned
out_num) "elem %p size %zd in_num %u out_num %u"
diff --git a/hw/virtio/vhost-user.c b/hw/virtio/vhost-user.c
index 6875f729e8..fd65616961 100644
--- a/hw/virtio/vhost-user.c
+++ b/hw/virtio/vhost-user.c
@@ -175,6 +175,15 @@ struct vhost_user {
NotifierWithReturn postcopy_notifier;
struct PostCopyFD postcopy_fd;
uint64_t postcopy_client_bases[VHOST_MEMORY_MAX_NREGIONS];
+/* Length of the region_rb and region_rb_offset arrays */
+size_t region_rb_len;
+/* RAMBlock associated with a given region */
+RAMBlock **region_rb;
+/* The offset from the start of the RAMBlock to the start of the
+ * vhost region.
+ */
+ram_addr_t*region_rb_offset;
+
/* True once we've entered postcopy_listen */
bool postcopy_listen;
};
@@ -362,6 +371,17 @@ static int vhost_user_set_mem_table_postcopy(struct
vhost_dev *dev,
msg.hdr.flags |= VHOST_USER_NEED_REPLY_MASK;
}
+if (u->region_rb_len < dev->mem->nregions) {
+u->region_rb = g_renew(RAMBlock*, u->region_rb, dev->mem->nregions);
+u->region_rb_offset = g_renew(ram_addr_t, u->region_rb_offset,
+ dev->mem->nregions);
+memset(&(u->region_rb[u->region_rb_len]), '\0',
+ sizeof(RAMBlock *) * (dev->mem->nregions - u->region_rb_len));
+memset(&(u->region_rb_offset[u->region_rb_len]), '\0',
+ sizeof(ram_addr_t) * (dev->mem->nregions - u->region_rb_len));
+u->region_rb_len = dev->mem->nregions;
+}
+
for (i = 0; i < dev->mem->nregions; ++i) {
struct vhost_memory_region *reg = dev->mem->regions + i;
ram_addr_t offset;
@@ -372,6 +392,12 @@ static int vhost_user_set_mem_table_postcopy(struct
vhost_dev *dev,
&offset);
fd = memory_region_get_fd(mr);
if (fd > 0) {
+trace_vhost_user_set_mem_table_withfd(fd_num, mr->name,
+ reg->memory_size,
+ reg->guest_phys_addr,
+ reg->userspace_addr, offset);
+u->region_rb_offset[i] = offset;
+u->region_rb[i] = mr->ram_block;
msg.payload.memory.regions[fd_num].userspace_addr =
reg->userspace_addr;
msg.payload.memory.regions[fd_num].memory_size = reg->memory_size;
@@ -380,6 +406,9 @@ static int vhost_user_set_mem_table_postcopy(struct
vhost_dev *dev,
msg.payload.memory.regions[fd_num].mmap_offset = offset;
assert(fd_num < VHOST_MEMORY_MAX_NREGIONS);
fds[fd_num++] = fd;
+} else {
+u->region_rb_offset[i] = 0;
+u->region_rb[i] = NULL;
}
}
@@ -1148,6 +1177,11 @@ static int vhost_user_cleanup(struct vhost_dev *dev)
close(u->slave_fd);
u->slave_fd = -1;
}
+g_free(u->region_rb);
+u->region_rb = NULL;
+g_free(u->region_rb_offset);
+u->region_rb_offset = NULL;
+u->region_rb_len = 0;
g_free(u);
dev->opaque = 0;
--
2.14.3
[Qemu-devel] [PATCH v4 07/29] libvhost-user: Support sending fds back to qemu
From: "Dr. David Alan Gilbert"
Allow replies with fds (for postcopy)
Signed-off-by: Dr. David Alan Gilbert
Reviewed-by: Marc-André Lureau
---
contrib/libvhost-user/libvhost-user.c | 30 +-
1 file changed, 29 insertions(+), 1 deletion(-)
diff --git a/contrib/libvhost-user/libvhost-user.c
b/contrib/libvhost-user/libvhost-user.c
index 71825d2dde..eb0ab9338c 100644
--- a/contrib/libvhost-user/libvhost-user.c
+++ b/contrib/libvhost-user/libvhost-user.c
@@ -246,6 +246,31 @@ vu_message_write(VuDev *dev, int conn_fd, VhostUserMsg
*vmsg)
{
int rc;
uint8_t *p = (uint8_t *)vmsg;
+char control[CMSG_SPACE(VHOST_MEMORY_MAX_NREGIONS * sizeof(int))] = { };
+struct iovec iov = {
+.iov_base = (char *)vmsg,
+.iov_len = VHOST_USER_HDR_SIZE,
+};
+struct msghdr msg = {
+.msg_iov = &iov,
+.msg_iovlen = 1,
+.msg_control = control,
+};
+struct cmsghdr *cmsg;
+
+memset(control, 0, sizeof(control));
+assert(vmsg->fd_num <= VHOST_MEMORY_MAX_NREGIONS);
+if (vmsg->fd_num > 0) {
+size_t fdsize = vmsg->fd_num * sizeof(int);
+msg.msg_controllen = CMSG_SPACE(fdsize);
+cmsg = CMSG_FIRSTHDR(&msg);
+cmsg->cmsg_len = CMSG_LEN(fdsize);
+cmsg->cmsg_level = SOL_SOCKET;
+cmsg->cmsg_type = SCM_RIGHTS;
+memcpy(CMSG_DATA(cmsg), vmsg->fds, fdsize);
+} else {
+msg.msg_controllen = 0;
+}
/* Set the version in the flags when sending the reply */
vmsg->flags &= ~VHOST_USER_VERSION_MASK;
@@ -253,7 +278,7 @@ vu_message_write(VuDev *dev, int conn_fd, VhostUserMsg
*vmsg)
vmsg->flags |= VHOST_USER_REPLY_MASK;
do {
-rc = write(conn_fd, p, VHOST_USER_HDR_SIZE);
+rc = sendmsg(conn_fd, &msg, 0);
} while (rc < 0 && (errno == EINTR || errno == EAGAIN));
do {
@@ -346,6 +371,7 @@ vu_get_features_exec(VuDev *dev, VhostUserMsg *vmsg)
}
vmsg->size = sizeof(vmsg->payload.u64);
+vmsg->fd_num = 0;
DPRINT("Sending back to guest u64: 0x%016"PRIx64"\n", vmsg->payload.u64);
@@ -501,6 +527,7 @@ vu_set_log_base_exec(VuDev *dev, VhostUserMsg *vmsg)
dev->log_size = log_mmap_size;
vmsg->size = sizeof(vmsg->payload.u64);
+vmsg->fd_num = 0;
return true;
}
@@ -759,6 +786,7 @@ vu_get_protocol_features_exec(VuDev *dev, VhostUserMsg
*vmsg)
vmsg->payload.u64 = features;
vmsg->size = sizeof(vmsg->payload.u64);
+vmsg->fd_num = 0;
return true;
}
--
2.14.3
[Qemu-devel] [PATCH v4 09/29] postcopy: Allow registering of fd handler
From: "Dr. David Alan Gilbert"
Allow other userfaultfd's to be registered into the fault thread
so that handlers for shared memory can get responses.
Signed-off-by: Dr. David Alan Gilbert
Reviewed-by: Peter Xu
---
migration/migration.c| 6 ++
migration/migration.h| 2 +
migration/postcopy-ram.c | 210 +++
migration/postcopy-ram.h | 21 +
migration/trace-events | 2 +
5 files changed, 188 insertions(+), 53 deletions(-)
diff --git a/migration/migration.c b/migration/migration.c
index e345d0cc7e..e54df10d62 100644
--- a/migration/migration.c
+++ b/migration/migration.c
@@ -155,6 +155,8 @@ MigrationIncomingState *migration_incoming_get_current(void)
if (!once) {
mis_current.state = MIGRATION_STATUS_NONE;
memset(&mis_current, 0, sizeof(MigrationIncomingState));
+mis_current.postcopy_remote_fds = g_array_new(FALSE, TRUE,
+ sizeof(struct PostCopyFD));
qemu_mutex_init(&mis_current.rp_mutex);
qemu_event_init(&mis_current.main_thread_load_event, false);
once = true;
@@ -177,6 +179,10 @@ void migration_incoming_state_destroy(void)
qemu_fclose(mis->from_src_file);
mis->from_src_file = NULL;
}
+if (mis->postcopy_remote_fds) {
+g_array_free(mis->postcopy_remote_fds, TRUE);
+mis->postcopy_remote_fds = NULL;
+}
qemu_event_reset(&mis->main_thread_load_event);
}
diff --git a/migration/migration.h b/migration/migration.h
index 08c5d2ded1..d02a759331 100644
--- a/migration/migration.h
+++ b/migration/migration.h
@@ -51,6 +51,8 @@ struct MigrationIncomingState {
QemuMutex rp_mutex;/* We send replies from multiple threads */
void *postcopy_tmp_page;
void *postcopy_tmp_zero_page;
+/* PostCopyFD's for external userfaultfds & handlers of shared memory */
+GArray *postcopy_remote_fds;
QEMUBH *bh;
diff --git a/migration/postcopy-ram.c b/migration/postcopy-ram.c
index 1089814d54..4ab1b7d36d 100644
--- a/migration/postcopy-ram.c
+++ b/migration/postcopy-ram.c
@@ -533,29 +533,44 @@ static void *postcopy_ram_fault_thread(void *opaque)
MigrationIncomingState *mis = opaque;
struct uffd_msg msg;
int ret;
+size_t index;
RAMBlock *rb = NULL;
RAMBlock *last_rb = NULL; /* last RAMBlock we sent part of */
trace_postcopy_ram_fault_thread_entry();
qemu_sem_post(&mis->fault_thread_sem);
+struct pollfd *pfd;
+size_t pfd_len = 2 + mis->postcopy_remote_fds->len;
+
+pfd = g_new0(struct pollfd, pfd_len);
+
+pfd[0].fd = mis->userfault_fd;
+pfd[0].events = POLLIN;
+pfd[1].fd = mis->userfault_event_fd;
+pfd[1].events = POLLIN; /* Waiting for eventfd to go positive */
+trace_postcopy_ram_fault_thread_fds_core(pfd[0].fd, pfd[1].fd);
+for (index = 0; index < mis->postcopy_remote_fds->len; index++) {
+struct PostCopyFD *pcfd = &g_array_index(mis->postcopy_remote_fds,
+ struct PostCopyFD, index);
+pfd[2 + index].fd = pcfd->fd;
+pfd[2 + index].events = POLLIN;
+trace_postcopy_ram_fault_thread_fds_extra(2 + index, pcfd->idstr,
+ pcfd->fd);
+}
+
while (true) {
ram_addr_t rb_offset;
-struct pollfd pfd[2];
+int poll_result;
/*
* We're mainly waiting for the kernel to give us a faulting HVA,
* however we can be told to quit via userfault_quit_fd which is
* an eventfd
*/
-pfd[0].fd = mis->userfault_fd;
-pfd[0].events = POLLIN;
-pfd[0].revents = 0;
-pfd[1].fd = mis->userfault_event_fd;
-pfd[1].events = POLLIN; /* Waiting for eventfd to go positive */
-pfd[1].revents = 0;
-
-if (poll(pfd, 2, -1 /* Wait forever */) == -1) {
+
+poll_result = poll(pfd, pfd_len, -1 /* Wait forever */);
+if (poll_result == -1) {
error_report("%s: userfault poll: %s", __func__, strerror(errno));
break;
}
@@ -575,57 +590,117 @@ static void *postcopy_ram_fault_thread(void *opaque)
}
}
-ret = read(mis->userfault_fd, &msg, sizeof(msg));
-if (ret != sizeof(msg)) {
-if (errno == EAGAIN) {
-/*
- * if a wake up happens on the other thread just after
- * the poll, there is nothing to read.
- */
-continue;
+if (pfd[0].revents) {
+poll_result--;
+ret = read(mis->userfault_fd, &msg, sizeof(msg));
+if (ret != sizeof(msg)) {
+if (errno == EAGAIN) {
+/*
+ * if a wake up happens on the other thread just after
+ * the poll, there is nothing to read.
+ */
+
[Qemu-devel] [PATCH v4 17/29] vhost+postcopy: Send requests to source for shared pages
From: "Dr. David Alan Gilbert"
Send requests back to the source for shared page requests.
Signed-off-by: Dr. David Alan Gilbert
---
migration/migration.h| 2 ++
migration/postcopy-ram.c | 32 +---
migration/postcopy-ram.h | 3 +++
migration/trace-events | 2 ++
4 files changed, 36 insertions(+), 3 deletions(-)
diff --git a/migration/migration.h b/migration/migration.h
index d02a759331..83dc36b57a 100644
--- a/migration/migration.h
+++ b/migration/migration.h
@@ -49,6 +49,8 @@ struct MigrationIncomingState {
int userfault_event_fd;
QEMUFile *to_src_file;
QemuMutex rp_mutex;/* We send replies from multiple threads */
+/* RAMBlock of last request sent to source */
+RAMBlock *last_rb;
void *postcopy_tmp_page;
void *postcopy_tmp_zero_page;
/* PostCopyFD's for external userfaultfds & handlers of shared memory */
diff --git a/migration/postcopy-ram.c b/migration/postcopy-ram.c
index 4ab1b7d36d..83780576ca 100644
--- a/migration/postcopy-ram.c
+++ b/migration/postcopy-ram.c
@@ -525,6 +525,32 @@ static int ram_block_enable_notify(const char *block_name,
void *host_addr,
return 0;
}
+/*
+ * Callback from shared fault handlers to ask for a page,
+ * the page must be specified by a RAMBlock and an offset in that rb
+ * Note: Only for use by shared fault handlers (in fault thread)
+ */
+int postcopy_request_shared_page(struct PostCopyFD *pcfd, RAMBlock *rb,
+ uint64_t client_addr, uint64_t rb_offset)
+{
+size_t pagesize = qemu_ram_pagesize(rb);
+uint64_t aligned_rbo = rb_offset & ~(pagesize - 1);
+MigrationIncomingState *mis = migration_incoming_get_current();
+
+trace_postcopy_request_shared_page(pcfd->idstr, qemu_ram_get_idstr(rb),
+ rb_offset);
+/* TODO: Check bitmap to see if we already have the page */
+if (rb != mis->last_rb) {
+mis->last_rb = rb;
+migrate_send_rp_req_pages(mis, qemu_ram_get_idstr(rb),
+ aligned_rbo, pagesize);
+} else {
+/* Save some space */
+migrate_send_rp_req_pages(mis, NULL, aligned_rbo, pagesize);
+}
+return 0;
+}
+
/*
* Handle faults detected by the USERFAULT markings
*/
@@ -535,9 +561,9 @@ static void *postcopy_ram_fault_thread(void *opaque)
int ret;
size_t index;
RAMBlock *rb = NULL;
-RAMBlock *last_rb = NULL; /* last RAMBlock we sent part of */
trace_postcopy_ram_fault_thread_entry();
+mis->last_rb = NULL; /* last RAMBlock we sent part of */
qemu_sem_post(&mis->fault_thread_sem);
struct pollfd *pfd;
@@ -636,8 +662,8 @@ static void *postcopy_ram_fault_thread(void *opaque)
* Send the request to the source - we want to request one
* of our host page sizes (which is >= TPS)
*/
-if (rb != last_rb) {
-last_rb = rb;
+if (rb != mis->last_rb) {
+mis->last_rb = rb;
migrate_send_rp_req_pages(mis, qemu_ram_get_idstr(rb),
rb_offset, qemu_ram_pagesize(rb));
} else {
diff --git a/migration/postcopy-ram.h b/migration/postcopy-ram.h
index c8ced3470b..d7afab07d7 100644
--- a/migration/postcopy-ram.h
+++ b/migration/postcopy-ram.h
@@ -164,5 +164,8 @@ struct PostCopyFD {
*/
void postcopy_register_shared_ufd(struct PostCopyFD *pcfd);
void postcopy_unregister_shared_ufd(struct PostCopyFD *pcfd);
+/* Callback from shared fault handlers to ask for a page */
+int postcopy_request_shared_page(struct PostCopyFD *pcfd, RAMBlock *rb,
+ uint64_t client_addr, uint64_t offset);
#endif
diff --git a/migration/trace-events b/migration/trace-events
index 1e617ad7a6..7c910b5479 100644
--- a/migration/trace-events
+++ b/migration/trace-events
@@ -198,6 +198,8 @@ postcopy_ram_incoming_cleanup_closeuf(void) ""
postcopy_ram_incoming_cleanup_entry(void) ""
postcopy_ram_incoming_cleanup_exit(void) ""
postcopy_ram_incoming_cleanup_join(void) ""
+postcopy_request_shared_page(const char *sharer, const char *rb, uint64_t
rb_offset) "for %s in %s offset 0x%"PRIx64
+
save_xbzrle_page_skipping(void) ""
save_xbzrle_page_overflow(void) ""
ram_save_iterate_big_wait(uint64_t milliconds, int iterations) "big wait: %"
PRIu64 " milliseconds, %d iterations"
--
2.14.3
[Qemu-devel] [PATCH v4 21/29] vhost+postcopy: Add vhost waker
From: "Dr. David Alan Gilbert"
Register a waker function in vhost-user code to be notified when
pages arrive or requests to previously mapped pages get requested.
Signed-off-by: Dr. David Alan Gilbert
---
hw/virtio/trace-events | 3 +++
hw/virtio/vhost-user.c | 30 ++
2 files changed, 33 insertions(+)
diff --git a/hw/virtio/trace-events b/hw/virtio/trace-events
index 3afd12cfea..fe5e0ff856 100644
--- a/hw/virtio/trace-events
+++ b/hw/virtio/trace-events
@@ -13,6 +13,9 @@ vhost_user_postcopy_fault_handler_found(int i, uint64_t
region_offset, uint64_t
vhost_user_postcopy_listen(void) ""
vhost_user_set_mem_table_postcopy(uint64_t client_addr, uint64_t qhva, int
reply_i, int region_i) "client:0x%"PRIx64" for hva: 0x%"PRIx64" reply %d region
%d"
vhost_user_set_mem_table_withfd(int index, const char *name, uint64_t
memory_size, uint64_t guest_phys_addr, uint64_t userspace_addr, uint64_t
offset) "%d:%s: size:0x%"PRIx64" GPA:0x%"PRIx64" QVA/userspace:0x%"PRIx64" RB
offset:0x%"PRIx64
+vhost_user_postcopy_waker(const char *rb, uint64_t rb_offset) "%s + 0x%"PRIx64
+vhost_user_postcopy_waker_found(uint64_t client_addr) "0x%"PRIx64
+vhost_user_postcopy_waker_nomatch(const char *rb, uint64_t rb_offset) "%s +
0x%"PRIx64
# hw/virtio/virtio.c
virtqueue_alloc_element(void *elem, size_t sz, unsigned in_num, unsigned
out_num) "elem %p size %zd in_num %u out_num %u"
diff --git a/hw/virtio/vhost-user.c b/hw/virtio/vhost-user.c
index e19b9ef9cf..b304bc475e 100644
--- a/hw/virtio/vhost-user.c
+++ b/hw/virtio/vhost-user.c
@@ -1006,6 +1006,35 @@ static int vhost_user_postcopy_fault_handler(struct
PostCopyFD *pcfd,
return -1;
}
+static int vhost_user_postcopy_waker(struct PostCopyFD *pcfd, RAMBlock *rb,
+ uint64_t offset)
+{
+struct vhost_dev *dev = pcfd->data;
+struct vhost_user *u = dev->opaque;
+int i;
+
+trace_vhost_user_postcopy_waker(qemu_ram_get_idstr(rb), offset);
+
+if (!u) {
+return 0;
+}
+/* Translate the offset into an address in the clients address space */
+for (i = 0; i < MIN(dev->mem->nregions, u->region_rb_len); i++) {
+if (u->region_rb[i] == rb &&
+offset >= u->region_rb_offset[i] &&
+offset < (u->region_rb_offset[i] +
+ dev->mem->regions[i].memory_size)) {
+uint64_t client_addr = (offset - u->region_rb_offset[i]) +
+ u->postcopy_client_bases[i];
+trace_vhost_user_postcopy_waker_found(client_addr);
+return postcopy_wake_shared(pcfd, client_addr, rb);
+}
+}
+
+trace_vhost_user_postcopy_waker_nomatch(qemu_ram_get_idstr(rb), offset);
+return 0;
+}
+
/*
* Called at the start of an inbound postcopy on reception of the
* 'advise' command.
@@ -1051,6 +1080,7 @@ static int vhost_user_postcopy_advise(struct vhost_dev
*dev, Error **errp)
u->postcopy_fd.fd = ufd;
u->postcopy_fd.data = dev;
u->postcopy_fd.handler = vhost_user_postcopy_fault_handler;
+u->postcopy_fd.waker = vhost_user_postcopy_waker;
u->postcopy_fd.idstr = "vhost-user"; /* Need to find unique name */
postcopy_register_shared_ufd(&u->postcopy_fd);
return 0;
--
2.14.3
[Qemu-devel] [PATCH v4 20/29] postcopy: postcopy_notify_shared_wake
From: "Dr. David Alan Gilbert"
Add a hook to allow a client userfaultfd to be 'woken'
when a page arrives, and a walker that calls that
hook for relevant clients given a RAMBlock and offset.
Signed-off-by: Dr. David Alan Gilbert
Reviewed-by: Peter Xu
---
migration/postcopy-ram.c | 16
migration/postcopy-ram.h | 10 ++
2 files changed, 26 insertions(+)
diff --git a/migration/postcopy-ram.c b/migration/postcopy-ram.c
index d3e7f10c5a..585db9467a 100644
--- a/migration/postcopy-ram.c
+++ b/migration/postcopy-ram.c
@@ -827,6 +827,22 @@ static int qemu_ufd_copy_ioctl(int userfault_fd, void
*host_addr,
return ret;
}
+int postcopy_notify_shared_wake(RAMBlock *rb, uint64_t offset)
+{
+int i;
+MigrationIncomingState *mis = migration_incoming_get_current();
+GArray *pcrfds = mis->postcopy_remote_fds;
+
+for (i = 0; i < pcrfds->len; i++) {
+struct PostCopyFD *cur = &g_array_index(pcrfds, struct PostCopyFD, i);
+int ret = cur->waker(cur, rb, offset);
+if (ret) {
+return ret;
+}
+}
+return 0;
+}
+
/*
* Place a host page (from) at (host) atomically
* returns 0 on success
diff --git a/migration/postcopy-ram.h b/migration/postcopy-ram.h
index f02fa36127..fef7448e4b 100644
--- a/migration/postcopy-ram.h
+++ b/migration/postcopy-ram.h
@@ -148,6 +148,10 @@ struct PostCopyFD;
/* ufd is a pointer to the struct uffd_msg *TODO: more Portable! */
typedef int (*pcfdhandler)(struct PostCopyFD *pcfd, void *ufd);
+/* Notification to wake, either on place or on reception of
+ * a fault on something that's already arrived (race)
+ */
+typedef int (*pcfdwake)(struct PostCopyFD *pcfd, RAMBlock *rb, uint64_t
offset);
struct PostCopyFD {
int fd;
@@ -155,6 +159,8 @@ struct PostCopyFD {
void *data;
/* Handler to be called whenever we get a poll event */
pcfdhandler handler;
+/* Notification to wake shared client */
+pcfdwake waker;
/* A string to use in error messages */
const char *idstr;
};
@@ -164,6 +170,10 @@ struct PostCopyFD {
*/
void postcopy_register_shared_ufd(struct PostCopyFD *pcfd);
void postcopy_unregister_shared_ufd(struct PostCopyFD *pcfd);
+/* Call each of the shared 'waker's registerd telling them of
+ * availability of a block.
+ */
+int postcopy_notify_shared_wake(RAMBlock *rb, uint64_t offset);
/* Notify a client ufd that a page is available
* Note: The 'client_address' is in the address space of the client
* program not QEMU
--
2.14.3
[Qemu-devel] [PATCH v4 12/29] postcopy+vhost-user: Split set_mem_table for postcopy
From: "Dr. David Alan Gilbert"
Split the set_mem_table routines in both qemu and libvhost-user
because the postcopy versions are going to be quite different
once changes in the later patches are added.
Signed-off-by: Dr. David Alan Gilbert
---
contrib/libvhost-user/libvhost-user.c | 53
hw/virtio/vhost-user.c| 77 ++-
2 files changed, 128 insertions(+), 2 deletions(-)
diff --git a/contrib/libvhost-user/libvhost-user.c
b/contrib/libvhost-user/libvhost-user.c
index beec7695a8..4922b2c722 100644
--- a/contrib/libvhost-user/libvhost-user.c
+++ b/contrib/libvhost-user/libvhost-user.c
@@ -448,6 +448,55 @@ vu_reset_device_exec(VuDev *dev, VhostUserMsg *vmsg)
return false;
}
+static bool
+vu_set_mem_table_exec_postcopy(VuDev *dev, VhostUserMsg *vmsg)
+{
+int i;
+VhostUserMemory *memory = &vmsg->payload.memory;
+dev->nregions = memory->nregions;
+/* TODO: Postcopy specific code */
+DPRINT("Nregions: %d\n", memory->nregions);
+for (i = 0; i < dev->nregions; i++) {
+void *mmap_addr;
+VhostUserMemoryRegion *msg_region = &memory->regions[i];
+VuDevRegion *dev_region = &dev->regions[i];
+
+DPRINT("Region %d\n", i);
+DPRINT("guest_phys_addr: 0x%016"PRIx64"\n",
+ msg_region->guest_phys_addr);
+DPRINT("memory_size: 0x%016"PRIx64"\n",
+ msg_region->memory_size);
+DPRINT("userspace_addr 0x%016"PRIx64"\n",
+ msg_region->userspace_addr);
+DPRINT("mmap_offset 0x%016"PRIx64"\n",
+ msg_region->mmap_offset);
+
+dev_region->gpa = msg_region->guest_phys_addr;
+dev_region->size = msg_region->memory_size;
+dev_region->qva = msg_region->userspace_addr;
+dev_region->mmap_offset = msg_region->mmap_offset;
+
+/* We don't use offset argument of mmap() since the
+ * mapped address has to be page aligned, and we use huge
+ * pages. */
+mmap_addr = mmap(0, dev_region->size + dev_region->mmap_offset,
+ PROT_READ | PROT_WRITE, MAP_SHARED,
+ vmsg->fds[i], 0);
+
+if (mmap_addr == MAP_FAILED) {
+vu_panic(dev, "region mmap error: %s", strerror(errno));
+} else {
+dev_region->mmap_addr = (uint64_t)(uintptr_t)mmap_addr;
+DPRINT("mmap_addr: 0x%016"PRIx64"\n",
+ dev_region->mmap_addr);
+}
+
+close(vmsg->fds[i]);
+}
+
+return false;
+}
+
static bool
vu_set_mem_table_exec(VuDev *dev, VhostUserMsg *vmsg)
{
@@ -464,6 +513,10 @@ vu_set_mem_table_exec(VuDev *dev, VhostUserMsg *vmsg)
}
dev->nregions = memory->nregions;
+if (dev->postcopy_listening) {
+return vu_set_mem_table_exec_postcopy(dev, vmsg);
+}
+
DPRINT("Nregions: %d\n", memory->nregions);
for (i = 0; i < dev->nregions; i++) {
void *mmap_addr;
diff --git a/hw/virtio/vhost-user.c b/hw/virtio/vhost-user.c
index ee200f703e..311addc33b 100644
--- a/hw/virtio/vhost-user.c
+++ b/hw/virtio/vhost-user.c
@@ -340,15 +340,86 @@ static int vhost_user_set_log_base(struct vhost_dev *dev,
uint64_t base,
return 0;
}
+static int vhost_user_set_mem_table_postcopy(struct vhost_dev *dev,
+ struct vhost_memory *mem)
+{
+int fds[VHOST_MEMORY_MAX_NREGIONS];
+int i, fd;
+size_t fd_num = 0;
+bool reply_supported = virtio_has_feature(dev->protocol_features,
+ VHOST_USER_PROTOCOL_F_REPLY_ACK);
+/* TODO: Add actual postcopy differences */
+VhostUserMsg msg = {
+.hdr.request = VHOST_USER_SET_MEM_TABLE,
+.hdr.flags = VHOST_USER_VERSION,
+};
+
+if (reply_supported) {
+msg.hdr.flags |= VHOST_USER_NEED_REPLY_MASK;
+}
+
+for (i = 0; i < dev->mem->nregions; ++i) {
+struct vhost_memory_region *reg = dev->mem->regions + i;
+ram_addr_t offset;
+MemoryRegion *mr;
+
+assert((uintptr_t)reg->userspace_addr == reg->userspace_addr);
+mr = memory_region_from_host((void *)(uintptr_t)reg->userspace_addr,
+ &offset);
+fd = memory_region_get_fd(mr);
+if (fd > 0) {
+msg.payload.memory.regions[fd_num].userspace_addr =
+reg->userspace_addr;
+msg.payload.memory.regions[fd_num].memory_size = reg->memory_size;
+msg.payload.memory.regions[fd_num].guest_phys_addr =
+reg->guest_phys_addr;
+msg.payload.memory.regions[fd_num].mmap_offset = offset;
+assert(fd_num < VHOST_MEMORY_MAX_NREGIONS);
+fds[fd_num++] = fd;
+}
+}
+
+msg.payload.memory.nregions = fd_num;
+
+if (!fd_num) {
+error_report("Failed initializing vhost-user memory map, "
+ "consid
[Qemu-devel] [PATCH v4 10/29] vhost+postcopy: Register shared ufd with postcopy
From: "Dr. David Alan Gilbert"
Register the UFD that comes in as the response to the 'advise' method
with the postcopy code.
Signed-off-by: Dr. David Alan Gilbert
---
hw/virtio/vhost-user.c | 20 +++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/hw/virtio/vhost-user.c b/hw/virtio/vhost-user.c
index 431858b219..9f74111e92 100644
--- a/hw/virtio/vhost-user.c
+++ b/hw/virtio/vhost-user.c
@@ -171,6 +171,7 @@ struct vhost_user {
CharBackend *chr;
int slave_fd;
NotifierWithReturn postcopy_notifier;
+struct PostCopyFD postcopy_fd;
};
static bool ioeventfd_enabled(void)
@@ -796,6 +797,17 @@ out:
return ret;
}
+/*
+ * Called back from the postcopy fault thread when a fault is received on our
+ * ufd.
+ * TODO: This is Linux specific
+ */
+static int vhost_user_postcopy_fault_handler(struct PostCopyFD *pcfd,
+ void *ufd)
+{
+return 0;
+}
+
/*
* Called at the start of an inbound postcopy on reception of the
* 'advise' command.
@@ -835,8 +847,14 @@ static int vhost_user_postcopy_advise(struct vhost_dev
*dev, Error **errp)
error_setg(errp, "%s: Failed to get ufd", __func__);
return -1;
}
+fcntl(ufd, F_SETFL, O_NONBLOCK);
-/* TODO: register ufd with userfault thread */
+/* register ufd with userfault thread */
+u->postcopy_fd.fd = ufd;
+u->postcopy_fd.data = dev;
+u->postcopy_fd.handler = vhost_user_postcopy_fault_handler;
+u->postcopy_fd.idstr = "vhost-user"; /* Need to find unique name */
+postcopy_register_shared_ufd(&u->postcopy_fd);
return 0;
}
--
2.14.3
[Qemu-devel] [PATCH v4 27/29] postcopy: Allow shared memory
From: "Dr. David Alan Gilbert"
Now that we have the mechanisms in here, allow shared memory in a
postcopy.
Note that QEMU can't tell who all the users of shared regions are
and thus can't tell whether all the users of the shared regions
have appropriate support for postcopy. Those devices that explicitly
support shared memory (e.g. vhost-user) must check, but it doesn't
stop weirder configurations causing problems.
Signed-off-by: Dr. David Alan Gilbert
Reviewed-by: Marc-André Lureau
---
migration/postcopy-ram.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/migration/postcopy-ram.c b/migration/postcopy-ram.c
index 1379923cfc..964eb1c555 100644
--- a/migration/postcopy-ram.c
+++ b/migration/postcopy-ram.c
@@ -215,12 +215,6 @@ static int test_ramblock_postcopiable(const char
*block_name, void *host_addr,
RAMBlock *rb = qemu_ram_block_by_name(block_name);
size_t pagesize = qemu_ram_pagesize(rb);
-if (qemu_ram_is_shared(rb)) {
-error_report("Postcopy on shared RAM (%s) is not yet supported",
- block_name);
-return 1;
-}
-
if (length % pagesize) {
error_report("Postcopy requires RAM blocks to be a page size multiple,"
" block %s is 0x" RAM_ADDR_FMT " bytes with a "
--
2.14.3
[Qemu-devel] [PATCH v4 13/29] migration/ram: ramblock_recv_bitmap_test_byte_offset
From: "Dr. David Alan Gilbert"
Utility for testing the map when you already know the offset
in the RAMBlock.
Signed-off-by: Dr. David Alan Gilbert
Reviewed-by: Peter Xu
---
migration/ram.c | 5 +
migration/ram.h | 1 +
2 files changed, 6 insertions(+)
diff --git a/migration/ram.c b/migration/ram.c
index 3b6c077964..3d754422e8 100644
--- a/migration/ram.c
+++ b/migration/ram.c
@@ -169,6 +169,11 @@ int ramblock_recv_bitmap_test(RAMBlock *rb, void
*host_addr)
rb->receivedmap);
}
+bool ramblock_recv_bitmap_test_byte_offset(RAMBlock *rb, uint64_t byte_offset)
+{
+return test_bit(byte_offset >> TARGET_PAGE_BITS, rb->receivedmap);
+}
+
void ramblock_recv_bitmap_set(RAMBlock *rb, void *host_addr)
{
set_bit_atomic(ramblock_recv_bitmap_offset(host_addr, rb),
rb->receivedmap);
diff --git a/migration/ram.h b/migration/ram.h
index 53f0021c51..5030be110a 100644
--- a/migration/ram.h
+++ b/migration/ram.h
@@ -60,6 +60,7 @@ int ram_postcopy_incoming_init(MigrationIncomingState *mis);
void ram_handle_compressed(void *host, uint8_t ch, uint64_t size);
int ramblock_recv_bitmap_test(RAMBlock *rb, void *host_addr);
+bool ramblock_recv_bitmap_test_byte_offset(RAMBlock *rb, uint64_t byte_offset);
void ramblock_recv_bitmap_set(RAMBlock *rb, void *host_addr);
void ramblock_recv_bitmap_set_range(RAMBlock *rb, void *host_addr, size_t nr);
--
2.14.3
[Qemu-devel] [PATCH v4 15/29] vhost+postcopy: Send address back to qemu
From: "Dr. David Alan Gilbert"
We need a better way, but at the moment we need the address of the
mappings sent back to qemu so it can interpret the messages on the
userfaultfd it reads.
This is done as a 3 stage set:
QEMU -> client
set_mem_table
mmap stuff, get addresses
client -> qemu
here are the addresses
qemu -> client
OK - now you can use them
That ensures that qemu has registered the new addresses in it's
userfault code before the client starts accessing them.
Note: We don't ask for the default 'ack' reply since we've got our own.
Signed-off-by: Dr. David Alan Gilbert
---
contrib/libvhost-user/libvhost-user.c | 24 -
docs/interop/vhost-user.txt | 9 +
hw/virtio/trace-events| 1 +
hw/virtio/vhost-user.c| 67 +--
4 files changed, 98 insertions(+), 3 deletions(-)
diff --git a/contrib/libvhost-user/libvhost-user.c
b/contrib/libvhost-user/libvhost-user.c
index a18bc74a7c..e02e5d6f46 100644
--- a/contrib/libvhost-user/libvhost-user.c
+++ b/contrib/libvhost-user/libvhost-user.c
@@ -491,10 +491,32 @@ vu_set_mem_table_exec_postcopy(VuDev *dev, VhostUserMsg
*vmsg)
dev_region->mmap_addr);
}
+/* Return the address to QEMU so that it can translate the ufd
+ * fault addresses back.
+ */
+msg_region->userspace_addr = (uintptr_t)(mmap_addr +
+ dev_region->mmap_offset);
close(vmsg->fds[i]);
}
-/* TODO: Get address back to QEMU */
+/* Send the message back to qemu with the addresses filled in */
+vmsg->fd_num = 0;
+if (!vu_message_write(dev, dev->sock, vmsg)) {
+vu_panic(dev, "failed to respond to set-mem-table for postcopy");
+return false;
+}
+
+/* Wait for QEMU to confirm that it's registered the handler for the
+ * faults.
+ */
+if (!vu_message_read(dev, dev->sock, vmsg) ||
+vmsg->size != sizeof(vmsg->payload.u64) ||
+vmsg->payload.u64 != 0) {
+vu_panic(dev, "failed to receive valid ack for postcopy
set-mem-table");
+return false;
+}
+
+/* OK, now we can go and register the memory and generate faults */
for (i = 0; i < dev->nregions; i++) {
VuDevRegion *dev_region = &dev->regions[i];
#ifdef UFFDIO_REGISTER
diff --git a/docs/interop/vhost-user.txt b/docs/interop/vhost-user.txt
index 7cc7006ef3..cc049196c9 100644
--- a/docs/interop/vhost-user.txt
+++ b/docs/interop/vhost-user.txt
@@ -455,12 +455,21 @@ Master message types
Id: 5
Equivalent ioctl: VHOST_SET_MEM_TABLE
Master payload: memory regions description
+ Slave payload: (postcopy only) memory regions description
Sets the memory map regions on the slave so it can translate the vring
addresses. In the ancillary data there is an array of file descriptors
for each memory mapped region. The size and ordering of the fds matches
the number and ordering of memory regions.
+ When VHOST_USER_POSTCOPY_LISTEN has been received, SET_MEM_TABLE replies
with
+ the bases of the memory mapped regions to the master. It must have
mmap'd
+ the regions but not yet accessed them and should not yet generate a
userfault
+ event. Note NEED_REPLY_MASK is not set in this case.
+ QEMU will then reply back to the list of mappings with an empty
+ VHOST_USER_SET_MEM_TABLE as an acknolwedgment; only upon reception of
this
+ message may the guest start accessing the memory and generating faults.
+
* VHOST_USER_SET_LOG_BASE
Id: 6
diff --git a/hw/virtio/trace-events b/hw/virtio/trace-events
index 06ec03d6e7..05d18ada77 100644
--- a/hw/virtio/trace-events
+++ b/hw/virtio/trace-events
@@ -8,6 +8,7 @@ vhost_section(const char *name, int r) "%s:%d"
# hw/virtio/vhost-user.c
vhost_user_postcopy_listen(void) ""
+vhost_user_set_mem_table_postcopy(uint64_t client_addr, uint64_t qhva, int
reply_i, int region_i) "client:0x%"PRIx64" for hva: 0x%"PRIx64" reply %d region
%d"
# hw/virtio/virtio.c
virtqueue_alloc_element(void *elem, size_t sz, unsigned in_num, unsigned
out_num) "elem %p size %zd in_num %u out_num %u"
diff --git a/hw/virtio/vhost-user.c b/hw/virtio/vhost-user.c
index 311addc33b..6875f729e8 100644
--- a/hw/virtio/vhost-user.c
+++ b/hw/virtio/vhost-user.c
@@ -174,6 +174,7 @@ struct vhost_user {
int slave_fd;
NotifierWithReturn postcopy_notifier;
struct PostCopyFD postcopy_fd;
+uint64_t postcopy_client_bases[VHOST_MEMORY_MAX_NREGIONS];
/* True once we've entered postcopy_listen */
bool postcopy_listen;
};
@@ -343,12 +344,15 @@ static int vhost_user_set_log_base(struct vhost_dev *dev,
uint64_t base,
static int vhost_user_set_mem_table_postcopy(struct vhost_dev *dev,
struct vhost_memory *mem)
{
+struct vhost_use
[Qemu-devel] [PATCH v4 22/29] vhost+postcopy: Call wakeups
From: "Dr. David Alan Gilbert"
Cause the vhost-user client to be woken up whenever:
a) We place a page in postcopy mode
b) We get a fault and the page has already been received
Signed-off-by: Dr. David Alan Gilbert
---
migration/postcopy-ram.c | 14 ++
migration/trace-events | 1 +
2 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/migration/postcopy-ram.c b/migration/postcopy-ram.c
index 585db9467a..36db900e8f 100644
--- a/migration/postcopy-ram.c
+++ b/migration/postcopy-ram.c
@@ -558,7 +558,11 @@ int postcopy_request_shared_page(struct PostCopyFD *pcfd,
RAMBlock *rb,
trace_postcopy_request_shared_page(pcfd->idstr, qemu_ram_get_idstr(rb),
rb_offset);
-/* TODO: Check bitmap to see if we already have the page */
+if (ramblock_recv_bitmap_test_byte_offset(rb, aligned_rbo)) {
+trace_postcopy_request_shared_page_present(pcfd->idstr,
+qemu_ram_get_idstr(rb), rb_offset);
+return postcopy_wake_shared(pcfd, client_addr, rb);
+}
if (rb != mis->last_rb) {
mis->last_rb = rb;
migrate_send_rp_req_pages(mis, qemu_ram_get_idstr(rb),
@@ -866,7 +870,8 @@ int postcopy_place_page(MigrationIncomingState *mis, void
*host, void *from,
}
trace_postcopy_place_page(host);
-return 0;
+return postcopy_notify_shared_wake(rb,
+ qemu_ram_block_host_offset(rb, host));
}
/*
@@ -890,6 +895,9 @@ int postcopy_place_page_zero(MigrationIncomingState *mis,
void *host,
return -e;
}
+return postcopy_notify_shared_wake(rb,
+ qemu_ram_block_host_offset(rb,
+ host));
} else {
/* The kernel can't use UFFDIO_ZEROPAGE for hugepages */
if (!mis->postcopy_tmp_zero_page) {
@@ -909,8 +917,6 @@ int postcopy_place_page_zero(MigrationIncomingState *mis,
void *host,
return postcopy_place_page(mis, host, mis->postcopy_tmp_zero_page,
rb);
}
-
-return 0;
}
/*
diff --git a/migration/trace-events b/migration/trace-events
index b0acaaa8a0..1e353a317f 100644
--- a/migration/trace-events
+++ b/migration/trace-events
@@ -199,6 +199,7 @@ postcopy_ram_incoming_cleanup_entry(void) ""
postcopy_ram_incoming_cleanup_exit(void) ""
postcopy_ram_incoming_cleanup_join(void) ""
postcopy_request_shared_page(const char *sharer, const char *rb, uint64_t
rb_offset) "for %s in %s offset 0x%"PRIx64
+postcopy_request_shared_page_present(const char *sharer, const char *rb,
uint64_t rb_offset) "%s already %s offset 0x%"PRIx64
postcopy_wake_shared(uint64_t client_addr, const char *rb) "at 0x%"PRIx64" in
%s"
save_xbzrle_page_skipping(void) ""
--
2.14.3
[Qemu-devel] [PATCH v4 28/29] libvhost-user: Claim support for postcopy
From: "Dr. David Alan Gilbert"
Tell QEMU we understand the protocol features needed for postcopy.
Signed-off-by: Dr. David Alan Gilbert
Reviewed-by: Marc-André Lureau
---
contrib/libvhost-user/libvhost-user.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/contrib/libvhost-user/libvhost-user.c
b/contrib/libvhost-user/libvhost-user.c
index 1f988ab787..8acee9628d 100644
--- a/contrib/libvhost-user/libvhost-user.c
+++ b/contrib/libvhost-user/libvhost-user.c
@@ -185,6 +185,35 @@ vmsg_close_fds(VhostUserMsg *vmsg)
}
}
+/* A test to see if we have userfault available */
+static bool
+have_userfault(void)
+{
+#if defined(__linux__) && defined(__NR_userfaultfd) &&\
+defined(UFFD_FEATURE_MISSING_SHMEM) &&\
+defined(UFFD_FEATURE_MISSING_HUGETLBFS)
+/* Now test the kernel we're running on really has the features */
+int ufd = syscall(__NR_userfaultfd, O_CLOEXEC | O_NONBLOCK);
+struct uffdio_api api_struct;
+if (ufd < 0) {
+return false;
+}
+
+api_struct.api = UFFD_API;
+api_struct.features = UFFD_FEATURE_MISSING_SHMEM |
+ UFFD_FEATURE_MISSING_HUGETLBFS;
+if (ioctl(ufd, UFFDIO_API, &api_struct)) {
+close(ufd);
+return false;
+}
+close(ufd);
+return true;
+
+#else
+return false;
+#endif
+}
+
static bool
vu_message_read(VuDev *dev, int conn_fd, VhostUserMsg *vmsg)
{
@@ -938,6 +967,10 @@ vu_get_protocol_features_exec(VuDev *dev, VhostUserMsg
*vmsg)
uint64_t features = 1ULL << VHOST_USER_PROTOCOL_F_LOG_SHMFD |
1ULL << VHOST_USER_PROTOCOL_F_SLAVE_REQ;
+if (have_userfault()) {
+features |= 1ULL << VHOST_USER_PROTOCOL_F_PAGEFAULT;
+}
+
if (dev->iface->get_protocol_features) {
features |= dev->iface->get_protocol_features(dev);
}
--
2.14.3
[Qemu-devel] [PATCH v4 23/29] libvhost-user: mprotect & madvises for postcopy
From: "Dr. David Alan Gilbert"
Clear the area and turn off THP.
PROT_NONE the area until after we've userfault advised it
to catch any unexpected changes.
Signed-off-by: Dr. David Alan Gilbert
---
contrib/libvhost-user/libvhost-user.c | 46 +++
1 file changed, 41 insertions(+), 5 deletions(-)
diff --git a/contrib/libvhost-user/libvhost-user.c
b/contrib/libvhost-user/libvhost-user.c
index e02e5d6f46..1b224af706 100644
--- a/contrib/libvhost-user/libvhost-user.c
+++ b/contrib/libvhost-user/libvhost-user.c
@@ -454,7 +454,7 @@ vu_set_mem_table_exec_postcopy(VuDev *dev, VhostUserMsg
*vmsg)
int i;
VhostUserMemory *memory = &vmsg->payload.memory;
dev->nregions = memory->nregions;
-/* TODO: Postcopy specific code */
+
DPRINT("Nregions: %d\n", memory->nregions);
for (i = 0; i < dev->nregions; i++) {
void *mmap_addr;
@@ -478,9 +478,12 @@ vu_set_mem_table_exec_postcopy(VuDev *dev, VhostUserMsg
*vmsg)
/* We don't use offset argument of mmap() since the
* mapped address has to be page aligned, and we use huge
- * pages. */
+ * pages.
+ * In postcopy we're using PROT_NONE here to catch anyone
+ * accessing it before we userfault
+ */
mmap_addr = mmap(0, dev_region->size + dev_region->mmap_offset,
- PROT_READ | PROT_WRITE, MAP_SHARED,
+ PROT_NONE, MAP_SHARED,
vmsg->fds[i], 0);
if (mmap_addr == MAP_FAILED) {
@@ -519,12 +522,38 @@ vu_set_mem_table_exec_postcopy(VuDev *dev, VhostUserMsg
*vmsg)
/* OK, now we can go and register the memory and generate faults */
for (i = 0; i < dev->nregions; i++) {
VuDevRegion *dev_region = &dev->regions[i];
+int ret;
#ifdef UFFDIO_REGISTER
/* We should already have an open ufd. Mark each memory
* range as ufd.
- * Note: Do we need any madvises? Well it's not been accessed
- * yet, still probably need no THP to be safe, discard to be safe?
+ * Discard any mapping we have here; note I can't use MADV_REMOVE
+ * or fallocate to make the hole since I don't want to lose
+ * data that's already arrived in the shared process.
+ * TODO: How to do hugepage
*/
+ret = madvise((void *)dev_region->mmap_addr,
+ dev_region->size + dev_region->mmap_offset,
+ MADV_DONTNEED);
+if (ret) {
+fprintf(stderr,
+"%s: Failed to madvise(DONTNEED) region %d: %s\n",
+__func__, i, strerror(errno));
+}
+/* Turn off transparent hugepages so we dont get lose wakeups
+ * in neighbouring pages.
+ * TODO: Turn this backon later.
+ */
+ret = madvise((void *)dev_region->mmap_addr,
+ dev_region->size + dev_region->mmap_offset,
+ MADV_NOHUGEPAGE);
+if (ret) {
+/* Note: This can happen legally on kernels that are configured
+ * without madvise'able hugepages
+ */
+fprintf(stderr,
+"%s: Failed to madvise(NOHUGEPAGE) region %d: %s\n",
+__func__, i, strerror(errno));
+}
struct uffdio_register reg_struct;
reg_struct.range.start = (uintptr_t)dev_region->mmap_addr;
reg_struct.range.len = dev_region->size + dev_region->mmap_offset;
@@ -546,6 +575,13 @@ vu_set_mem_table_exec_postcopy(VuDev *dev, VhostUserMsg
*vmsg)
}
DPRINT("%s: region %d: Registered userfault for %llx + %llx\n",
__func__, i, reg_struct.range.start, reg_struct.range.len);
+/* Now it's registered we can let the client at it */
+if (mprotect((void *)dev_region->mmap_addr,
+ dev_region->size + dev_region->mmap_offset,
+ PROT_READ | PROT_WRITE)) {
+vu_panic(dev, "failed to mprotect region %d for postcopy", i);
+return false;
+}
/* TODO: Stash 'zero' support flags somewhere */
#endif
}
--
2.14.3
[Qemu-devel] [PATCH v4 24/29] vhost-user: Add VHOST_USER_POSTCOPY_END message
From: "Dr. David Alan Gilbert"
This message is sent just before the end of postcopy to get the
client to stop using userfault since we wont respond to any more
requests. It should close userfaultfd so that any other pages
get mapped to the backing file automatically by the kernel, since
at this point we know we've received everything.
Signed-off-by: Dr. David Alan Gilbert
Reviewed-by: Peter Xu
---
contrib/libvhost-user/libvhost-user.c | 23 +++
contrib/libvhost-user/libvhost-user.h | 1 +
docs/interop/vhost-user.txt | 11 +++
hw/virtio/vhost-user.c| 1 +
4 files changed, 36 insertions(+)
diff --git a/contrib/libvhost-user/libvhost-user.c
b/contrib/libvhost-user/libvhost-user.c
index 1b224af706..1f988ab787 100644
--- a/contrib/libvhost-user/libvhost-user.c
+++ b/contrib/libvhost-user/libvhost-user.c
@@ -99,6 +99,7 @@ vu_request_to_string(unsigned int req)
REQ(VHOST_USER_SET_CONFIG),
REQ(VHOST_USER_POSTCOPY_ADVISE),
REQ(VHOST_USER_POSTCOPY_LISTEN),
+REQ(VHOST_USER_POSTCOPY_END),
REQ(VHOST_USER_MAX),
};
#undef REQ
@@ -1095,6 +1096,26 @@ vu_set_postcopy_listen(VuDev *dev, VhostUserMsg *vmsg)
vmsg->payload.u64 = 0; /* Success */
return true;
}
+
+static bool
+vu_set_postcopy_end(VuDev *dev, VhostUserMsg *vmsg)
+{
+DPRINT("%s: Entry\n", __func__);
+dev->postcopy_listening = false;
+if (dev->postcopy_ufd > 0) {
+close(dev->postcopy_ufd);
+dev->postcopy_ufd = -1;
+DPRINT("%s: Done close\n", __func__);
+}
+
+vmsg->fd_num = 0;
+vmsg->payload.u64 = 0;
+vmsg->size = sizeof(vmsg->payload.u64);
+vmsg->flags = VHOST_USER_VERSION | VHOST_USER_REPLY_MASK;
+DPRINT("%s: exit\n", __func__);
+return true;
+}
+
static bool
vu_process_message(VuDev *dev, VhostUserMsg *vmsg)
{
@@ -1170,6 +1191,8 @@ vu_process_message(VuDev *dev, VhostUserMsg *vmsg)
return vu_set_postcopy_advise(dev, vmsg);
case VHOST_USER_POSTCOPY_LISTEN:
return vu_set_postcopy_listen(dev, vmsg);
+case VHOST_USER_POSTCOPY_END:
+return vu_set_postcopy_end(dev, vmsg);
default:
vmsg_close_fds(vmsg);
vu_panic(dev, "Unhandled request: %d", vmsg->request);
diff --git a/contrib/libvhost-user/libvhost-user.h
b/contrib/libvhost-user/libvhost-user.h
index ed505cf0c1..79f7a53ee8 100644
--- a/contrib/libvhost-user/libvhost-user.h
+++ b/contrib/libvhost-user/libvhost-user.h
@@ -87,6 +87,7 @@ typedef enum VhostUserRequest {
VHOST_USER_CLOSE_CRYPTO_SESSION = 27,
VHOST_USER_POSTCOPY_ADVISE = 28,
VHOST_USER_POSTCOPY_LISTEN = 29,
+VHOST_USER_POSTCOPY_END = 30,
VHOST_USER_MAX
} VhostUserRequest;
diff --git a/docs/interop/vhost-user.txt b/docs/interop/vhost-user.txt
index cc049196c9..5a31e4234e 100644
--- a/docs/interop/vhost-user.txt
+++ b/docs/interop/vhost-user.txt
@@ -729,6 +729,17 @@ Master message types
This is always sent sometime after a VHOST_USER_POSTCOPY_ADVISE, and
thus only when VHOST_USER_PROTOCOL_F_PAGEFAULT is supported.
+ * VHOST_USER_POSTCOPY_END
+ Id: 30
+ Slave payload: u64
+
+ Master advises that postcopy migration has now completed. The
+ slave must disable the userfaultfd. The response is an acknowledgement
+ only.
+ When VHOST_USER_PROTOCOL_F_PAGEFAULT is supported, this message
+ is sent at the end of the migration, after VHOST_USER_POSTCOPY_LISTEN
+ was previously sent
+
Slave message types
---
diff --git a/hw/virtio/vhost-user.c b/hw/virtio/vhost-user.c
index b304bc475e..45de6d8a53 100644
--- a/hw/virtio/vhost-user.c
+++ b/hw/virtio/vhost-user.c
@@ -82,6 +82,7 @@ typedef enum VhostUserRequest {
VHOST_USER_CLOSE_CRYPTO_SESSION = 27,
VHOST_USER_POSTCOPY_ADVISE = 28,
VHOST_USER_POSTCOPY_LISTEN = 29,
+VHOST_USER_POSTCOPY_END = 30,
VHOST_USER_MAX
} VhostUserRequest;
--
2.14.3
[Qemu-devel] [PATCH v4 18/29] vhost+postcopy: Resolve client address
From: "Dr. David Alan Gilbert"
Resolve fault addresses read off the clients UFD into RAMBlock
and offset, and call back to the postcopy code to ask for the page.
Signed-off-by: Dr. David Alan Gilbert
Reviewed-by: Peter Xu
---
hw/virtio/trace-events | 3 +++
hw/virtio/vhost-user.c | 31 ++-
2 files changed, 33 insertions(+), 1 deletion(-)
diff --git a/hw/virtio/trace-events b/hw/virtio/trace-events
index d7e9e1084b..3afd12cfea 100644
--- a/hw/virtio/trace-events
+++ b/hw/virtio/trace-events
@@ -7,6 +7,9 @@ vhost_region_add_section_abut(const char *name, uint64_t
new_size) "%s: 0x%"PRIx
vhost_section(const char *name, int r) "%s:%d"
# hw/virtio/vhost-user.c
+vhost_user_postcopy_fault_handler(const char *name, uint64_t fault_address,
int nregions) "%s: @0x%"PRIx64" nregions:%d"
+vhost_user_postcopy_fault_handler_loop(int i, uint64_t client_base, uint64_t
size) "%d: client 0x%"PRIx64" +0x%"PRIx64
+vhost_user_postcopy_fault_handler_found(int i, uint64_t region_offset,
uint64_t rb_offset) "%d: region_offset: 0x%"PRIx64" rb_offset:0x%"PRIx64
vhost_user_postcopy_listen(void) ""
vhost_user_set_mem_table_postcopy(uint64_t client_addr, uint64_t qhva, int
reply_i, int region_i) "client:0x%"PRIx64" for hva: 0x%"PRIx64" reply %d region
%d"
vhost_user_set_mem_table_withfd(int index, const char *name, uint64_t
memory_size, uint64_t guest_phys_addr, uint64_t userspace_addr, uint64_t
offset) "%d:%s: size:0x%"PRIx64" GPA:0x%"PRIx64" QVA/userspace:0x%"PRIx64" RB
offset:0x%"PRIx64
diff --git a/hw/virtio/vhost-user.c b/hw/virtio/vhost-user.c
index fd65616961..e19b9ef9cf 100644
--- a/hw/virtio/vhost-user.c
+++ b/hw/virtio/vhost-user.c
@@ -26,6 +26,7 @@
#include
#include
#include
+#include
#define VHOST_MEMORY_MAX_NREGIONS8
#define VHOST_USER_F_PROTOCOL_FEATURES 30
@@ -974,7 +975,35 @@ out:
static int vhost_user_postcopy_fault_handler(struct PostCopyFD *pcfd,
void *ufd)
{
-return 0;
+struct vhost_dev *dev = pcfd->data;
+struct vhost_user *u = dev->opaque;
+struct uffd_msg *msg = ufd;
+uint64_t faultaddr = msg->arg.pagefault.address;
+RAMBlock *rb = NULL;
+uint64_t rb_offset;
+int i;
+
+trace_vhost_user_postcopy_fault_handler(pcfd->idstr, faultaddr,
+dev->mem->nregions);
+for (i = 0; i < MIN(dev->mem->nregions, u->region_rb_len); i++) {
+trace_vhost_user_postcopy_fault_handler_loop(i,
+u->postcopy_client_bases[i], dev->mem->regions[i].memory_size);
+if (faultaddr >= u->postcopy_client_bases[i]) {
+/* Ofset of the fault address in the vhost region */
+uint64_t region_offset = faultaddr - u->postcopy_client_bases[i];
+if (region_offset < dev->mem->regions[i].memory_size) {
+rb_offset = region_offset + u->region_rb_offset[i];
+trace_vhost_user_postcopy_fault_handler_found(i,
+region_offset, rb_offset);
+rb = u->region_rb[i];
+return postcopy_request_shared_page(pcfd, rb, faultaddr,
+rb_offset);
+}
+}
+}
+error_report("%s: Failed to find region for fault %" PRIx64,
+ __func__, faultaddr);
+return -1;
}
/*
--
2.14.3
[Qemu-devel] [PATCH v4 19/29] postcopy: helper for waking shared
From: "Dr. David Alan Gilbert"
Provide a helper to send a 'wake' request on a userfaultfd for
a shared process.
The address in the clients address space is specified together
with the RAMBlock it was resolved to.
Signed-off-by: Dr. David Alan Gilbert
---
migration/postcopy-ram.c | 26 ++
migration/postcopy-ram.h | 6 ++
migration/trace-events | 1 +
3 files changed, 33 insertions(+)
diff --git a/migration/postcopy-ram.c b/migration/postcopy-ram.c
index 83780576ca..d3e7f10c5a 100644
--- a/migration/postcopy-ram.c
+++ b/migration/postcopy-ram.c
@@ -525,6 +525,25 @@ static int ram_block_enable_notify(const char *block_name,
void *host_addr,
return 0;
}
+int postcopy_wake_shared(struct PostCopyFD *pcfd,
+ uint64_t client_addr,
+ RAMBlock *rb)
+{
+size_t pagesize = qemu_ram_pagesize(rb);
+struct uffdio_range range;
+int ret;
+trace_postcopy_wake_shared(client_addr, qemu_ram_get_idstr(rb));
+range.start = client_addr & ~(pagesize - 1);
+range.len = pagesize;
+ret = ioctl(pcfd->fd, UFFDIO_WAKE, &range);
+if (ret) {
+error_report("%s: Failed to wake: %zx in %s (%s)",
+ __func__, (size_t)client_addr, qemu_ram_get_idstr(rb),
+ strerror(errno));
+}
+return ret;
+}
+
/*
* Callback from shared fault handlers to ask for a page,
* the page must be specified by a RAMBlock and an offset in that rb
@@ -954,6 +973,13 @@ void *postcopy_get_tmp_page(MigrationIncomingState *mis)
return NULL;
}
+int postcopy_wake_shared(struct PostCopyFD *pcfd,
+ uint64_t client_addr,
+ RAMBlock *rb)
+{
+assert(0);
+return -1;
+}
#endif
/* - */
diff --git a/migration/postcopy-ram.h b/migration/postcopy-ram.h
index d7afab07d7..f02fa36127 100644
--- a/migration/postcopy-ram.h
+++ b/migration/postcopy-ram.h
@@ -164,6 +164,12 @@ struct PostCopyFD {
*/
void postcopy_register_shared_ufd(struct PostCopyFD *pcfd);
void postcopy_unregister_shared_ufd(struct PostCopyFD *pcfd);
+/* Notify a client ufd that a page is available
+ * Note: The 'client_address' is in the address space of the client
+ * program not QEMU
+ */
+int postcopy_wake_shared(struct PostCopyFD *pcfd, uint64_t client_addr,
+ RAMBlock *rb);
/* Callback from shared fault handlers to ask for a page */
int postcopy_request_shared_page(struct PostCopyFD *pcfd, RAMBlock *rb,
uint64_t client_addr, uint64_t offset);
diff --git a/migration/trace-events b/migration/trace-events
index 7c910b5479..b0acaaa8a0 100644
--- a/migration/trace-events
+++ b/migration/trace-events
@@ -199,6 +199,7 @@ postcopy_ram_incoming_cleanup_entry(void) ""
postcopy_ram_incoming_cleanup_exit(void) ""
postcopy_ram_incoming_cleanup_join(void) ""
postcopy_request_shared_page(const char *sharer, const char *rb, uint64_t
rb_offset) "for %s in %s offset 0x%"PRIx64
+postcopy_wake_shared(uint64_t client_addr, const char *rb) "at 0x%"PRIx64" in
%s"
save_xbzrle_page_skipping(void) ""
save_xbzrle_page_overflow(void) ""
--
2.14.3
[Qemu-devel] [PATCH v4 29/29] postcopy shared docs
From: "Dr. David Alan Gilbert" Add some notes to the migration documentation for shared memory postcopy. Signed-off-by: Dr. David Alan Gilbert --- docs/devel/migration.rst | 41 + 1 file changed, 41 insertions(+) diff --git a/docs/devel/migration.rst b/docs/devel/migration.rst index 9d1b7657f0..e32b087f6e 100644 --- a/docs/devel/migration.rst +++ b/docs/devel/migration.rst @@ -577,3 +577,44 @@ Postcopy now works with hugetlbfs backed memory: hugepages works well, however 1GB hugepages are likely to be problematic since it takes ~1 second to transfer a 1GB hugepage across a 10Gbps link, and until the full page is transferred the destination thread is blocked. + +Postcopy with shared memory +--- + +Postcopy migration with shared memory needs explicit support from the other +processes that share memory and from QEMU. There are restrictions on the type of +memory that userfault can support shared. + +The Linux kernel userfault support works on `/dev/shm` memory and on `hugetlbfs` +(although the kernel doesn't provide an equivalent to `madvise(MADV_DONTNEED)` +for hugetlbfs which may be a problem in some configurations). + +The vhost-user code in QEMU supports clients that have Postcopy support, +and the `vhost-user-bridge` (in `tests/`) and the DPDK package have changes +to support postcopy. + +The client needs to open a userfaultfd and register the areas +of memory that it maps with userfault. The client must then pass the +userfaultfd back to QEMU together with a mapping table that allows +fault addresses in the clients address space to be converted back to +RAMBlock/offsets. The client's userfaultfd is added to the postcopy +fault-thread and page requests are made on behalf of the client by QEMU. +QEMU performs 'wake' operations on the client's userfaultfd to allow it +to continue after a page has arrived. + +.. note:: + There are two future improvements that would be nice: +a) Some way to make QEMU ignorant of the addresses in the clients + address space +b) Avoiding the need for QEMU to perform ufd-wake calls after the + pages have arrived + +Retro-fitting postcopy to existing clients is possible: + a) A mechanism is needed for the registration with userfault as above, + and the registration needs to be coordinated with the phases of + postcopy. In vhost-user extra messages are added to the existing + control channel. + b) Any thread that can block due to guest memory accesses must be + identified and the implication understood; for example if the + guest memory access is made while holding a lock then all other + threads waiting for that lock will also be blocked. -- 2.14.3
Re: [Qemu-devel] [PATCH v6 00/11] xen: xen-domid-restrict improvements
Hi, This series failed build test on ppcbe host. Please find the details below. Type: series Message-id: 1520530757-4477-1-git-send-email-ian.jack...@eu.citrix.com Subject: [Qemu-devel] [PATCH v6 00/11] xen: xen-domid-restrict improvements === TEST SCRIPT BEGIN === #!/bin/bash # Testing script will be invoked under the git checkout with # HEAD pointing to a commit that has the patches applied on top of "base" # branch set -e echo "=== ENV ===" env echo "=== PACKAGES ===" rpm -qa echo "=== TEST BEGIN ===" INSTALL=$PWD/install BUILD=$PWD/build mkdir -p $BUILD $INSTALL SRC=$PWD cd $BUILD $SRC/configure --prefix=$INSTALL make -j100 # XXX: we need reliable clean up # make check -j100 V=1 make install === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu - [tag update] patchew/1520530757-4477-1-git-send-email-ian.jack...@eu.citrix.com -> patchew/1520530757-4477-1-git-send-email-ian.jack...@eu.citrix.com Submodule 'capstone' (git://git.qemu.org/capstone.git) registered for path 'capstone' Submodule 'dtc' (git://git.qemu-project.org/dtc.git) registered for path 'dtc' Submodule 'roms/QemuMacDrivers' (git://git.qemu.org/QemuMacDrivers.git) registered for path 'roms/QemuMacDrivers' Submodule 'roms/SLOF' (git://git.qemu-project.org/SLOF.git) registered for path 'roms/SLOF' Submodule 'roms/ipxe' (git://git.qemu-project.org/ipxe.git) registered for path 'roms/ipxe' Submodule 'roms/openbios' (git://git.qemu-project.org/openbios.git) registered for path 'roms/openbios' Submodule 'roms/openhackware' (git://git.qemu-project.org/openhackware.git) registered for path 'roms/openhackware' Submodule 'roms/qemu-palcode' (git://github.com/rth7680/qemu-palcode.git) registered for path 'roms/qemu-palcode' Submodule 'roms/seabios' (git://git.qemu-project.org/seabios.git/) registered for path 'roms/seabios' Submodule 'roms/seabios-hppa' (git://github.com/hdeller/seabios-hppa.git) registered for path 'roms/seabios-hppa' Submodule 'roms/sgabios' (git://git.qemu-project.org/sgabios.git) registered for path 'roms/sgabios' Submodule 'roms/skiboot' (git://git.qemu.org/skiboot.git) registered for path 'roms/skiboot' Submodule 'roms/u-boot' (git://git.qemu-project.org/u-boot.git) registered for path 'roms/u-boot' Submodule 'roms/u-boot-sam460ex' (git://github.com/zbalaton/u-boot-sam460ex) registered for path 'roms/u-boot-sam460ex' Submodule 'roms/vgabios' (git://git.qemu-project.org/vgabios.git/) registered for path 'roms/vgabios' Submodule 'ui/keycodemapdb' (git://git.qemu.org/keycodemapdb.git) registered for path 'ui/keycodemapdb' Cloning into 'capstone'... Submodule path 'capstone': checked out '22ead3e0bfdb87516656453336160e0a37b066bf' Cloning into 'dtc'... Submodule path 'dtc': checked out 'e54388015af1fb4bf04d0bca99caba1074d9cc42' Cloning into 'roms/QemuMacDrivers'... Submodule path 'roms/QemuMacDrivers': checked out 'd4e7d7ac663fcb55f1b93575445fcbca372f17a7' Cloning into 'roms/SLOF'... Submodule path 'roms/SLOF': checked out 'fa981320a1e0968d6fc1b8de319723ff8212b337' Cloning into 'roms/ipxe'... Submodule path 'roms/ipxe': checked out '0600d3ae94f93efd10fc6b3c7420a9557a3a1670' Cloning into 'roms/openbios'... Submodule path 'roms/openbios': checked out '54d959d97fb331708767b2fd4a878efd2bbc41bb' Cloning into 'roms/openhackware'... Submodule path 'roms/openhackware': checked out 'c559da7c8eec5e45ef1f67978827af6f0b9546f5' Cloning into 'roms/qemu-palcode'... Submodule path 'roms/qemu-palcode': checked out 'f3c7e44c70254975df2a00af39701eafbac4d471' Cloning into 'roms/seabios'... Submodule path 'roms/seabios': checked out '63451fca13c75870e1703eb3e20584d91179aebc' Cloning into 'roms/seabios-hppa'... Submodule path 'roms/seabios-hppa': checked out '649e6202b8d65d46c69f542b1380f840fbe8ab13' Cloning into 'roms/sgabios'... Submodule path 'roms/sgabios': checked out 'cbaee52287e5f32373181cff50a00b6c4ac9015a' Cloning into 'roms/skiboot'... Submodule path 'roms/skiboot': checked out 'e0ee24c27a172bcf482f6f2bc905e6211c134bcc' Cloning into 'roms/u-boot'... Submodule path 'roms/u-boot': checked out 'd85ca029f257b53a96da6c2fb421e78a003a9943' Cloning into 'roms/u-boot-sam460ex'... Submodule path 'roms/u-boot-sam460ex': checked out '119aa277f74a4a2d3f7ab6c9471292308eba14e4' Cloning into 'roms/vgabios'... Submodule path 'roms/vgabios': checked out '19ea12c230ded95928ecaef0db47a82231c2e485' Cloning into 'ui/keycodemapdb'... Submodule path 'ui/keycodemapdb': checked out '6b3d716e2b6472eb7189d3220552280ef3d832ce' Switched to a new branch 'test' 3ca7aa0 scripts/get_maintainer.pl: Print proper error message for missing $file cd8d608 xen: Expect xenstore write to fail when restricted ba5 xen: Use newly added dmops for mapping VGA memory e0d142e configure: do_compiler: Dump some extra info under bash 40aee2f os-posix: Provide new -runas : facility e772cd9 xen: destroy_hvm_domain: Try xendevicemodel_shutdown dcba1d7 xen: move xc_interface compatibility fal
[Qemu-devel] [PATCH v4 25/29] vhost+postcopy: Wire up POSTCOPY_END notify
From: "Dr. David Alan Gilbert"
Wire up a call to VHOST_USER_POSTCOPY_END message to the vhost clients
right before we ask the listener thread to shutdown.
Signed-off-by: Dr. David Alan Gilbert
---
hw/virtio/trace-events | 2 ++
hw/virtio/vhost-user.c | 34 ++
migration/postcopy-ram.c | 7 +++
migration/postcopy-ram.h | 1 +
4 files changed, 44 insertions(+)
diff --git a/hw/virtio/trace-events b/hw/virtio/trace-events
index fe5e0ff856..857c495e65 100644
--- a/hw/virtio/trace-events
+++ b/hw/virtio/trace-events
@@ -7,6 +7,8 @@ vhost_region_add_section_abut(const char *name, uint64_t
new_size) "%s: 0x%"PRIx
vhost_section(const char *name, int r) "%s:%d"
# hw/virtio/vhost-user.c
+vhost_user_postcopy_end_entry(void) ""
+vhost_user_postcopy_end_exit(void) ""
vhost_user_postcopy_fault_handler(const char *name, uint64_t fault_address,
int nregions) "%s: @0x%"PRIx64" nregions:%d"
vhost_user_postcopy_fault_handler_loop(int i, uint64_t client_base, uint64_t
size) "%d: client 0x%"PRIx64" +0x%"PRIx64
vhost_user_postcopy_fault_handler_found(int i, uint64_t region_offset,
uint64_t rb_offset) "%d: region_offset: 0x%"PRIx64" rb_offset:0x%"PRIx64
diff --git a/hw/virtio/vhost-user.c b/hw/virtio/vhost-user.c
index 45de6d8a53..eb7d753b1a 100644
--- a/hw/virtio/vhost-user.c
+++ b/hw/virtio/vhost-user.c
@@ -1114,6 +1114,37 @@ static int vhost_user_postcopy_listen(struct vhost_dev
*dev, Error **errp)
return 0;
}
+/*
+ * Called at the end of postcopy
+ */
+static int vhost_user_postcopy_end(struct vhost_dev *dev, Error **errp)
+{
+VhostUserMsg msg = {
+.hdr.request = VHOST_USER_POSTCOPY_END,
+.hdr.flags = VHOST_USER_VERSION | VHOST_USER_NEED_REPLY_MASK,
+};
+int ret;
+struct vhost_user *u = dev->opaque;
+
+trace_vhost_user_postcopy_end_entry();
+if (vhost_user_write(dev, &msg, NULL, 0) < 0) {
+error_setg(errp, "Failed to send postcopy_end to vhost");
+return -1;
+}
+
+ret = process_message_reply(dev, &msg);
+if (ret) {
+error_setg(errp, "Failed to receive reply to postcopy_end");
+return ret;
+}
+postcopy_unregister_shared_ufd(&u->postcopy_fd);
+u->postcopy_fd.handler = NULL;
+
+trace_vhost_user_postcopy_end_exit();
+
+return 0;
+}
+
static int vhost_user_postcopy_notifier(NotifierWithReturn *notifier,
void *opaque)
{
@@ -1139,6 +1170,9 @@ static int
vhost_user_postcopy_notifier(NotifierWithReturn *notifier,
case POSTCOPY_NOTIFY_INBOUND_LISTEN:
return vhost_user_postcopy_listen(dev, pnd->errp);
+case POSTCOPY_NOTIFY_INBOUND_END:
+return vhost_user_postcopy_end(dev, pnd->errp);
+
default:
/* We ignore notifications we don't know */
break;
diff --git a/migration/postcopy-ram.c b/migration/postcopy-ram.c
index 36db900e8f..1379923cfc 100644
--- a/migration/postcopy-ram.c
+++ b/migration/postcopy-ram.c
@@ -413,6 +413,13 @@ int postcopy_ram_incoming_cleanup(MigrationIncomingState
*mis)
trace_postcopy_ram_incoming_cleanup_entry();
if (mis->have_fault_thread) {
+Error *local_err = NULL;
+
+if (postcopy_notify(POSTCOPY_NOTIFY_INBOUND_END, &local_err)) {
+error_report_err(local_err);
+return -1;
+}
+
if (qemu_ram_foreach_block(cleanup_range, mis)) {
return -1;
}
diff --git a/migration/postcopy-ram.h b/migration/postcopy-ram.h
index fef7448e4b..1d11276c94 100644
--- a/migration/postcopy-ram.h
+++ b/migration/postcopy-ram.h
@@ -132,6 +132,7 @@ enum PostcopyNotifyReason {
POSTCOPY_NOTIFY_PROBE = 0,
POSTCOPY_NOTIFY_INBOUND_ADVISE,
POSTCOPY_NOTIFY_INBOUND_LISTEN,
+POSTCOPY_NOTIFY_INBOUND_END,
};
struct PostcopyNotifyData {
--
2.14.3
Re: [Qemu-devel] [PATCH v2 0/2] block latency histogram
On Thu, Mar 08, 2018 at 22:07:35 +0300, Vladimir Sementsov-Ogievskiy wrote: > 08.03.2018 21:56, Emilio G. Cota wrote: > > * Binning happens only at print time, so that we retain the flexibility to > > * choose the binning. This might not be ideal for workloads that do not > > care > > * much about precision and insert many samples all with different x values; > > * in that case, pre-binning (e.g. entering both 0.115 and 0.097 as 0.1) > > * should be considered. (snip) > In this case, I'll have to do same bin search (and store same interval > settings) as I already do, on my part, to calculate a parameter for qdist > interface. And I'll have store almost all same data on my part. So, it > doesn't really help. And I need nothing of qdist benefits: I don't need (and > don't want) dynamic allocation of bins on adding an element or any type of > visualization. I see. You require a couple of features that qdist doesn't yet support: - Arbitrarily-sized, pre-defined bins. - Support for querying the data programmatically instead of just printing it out. We could circumvent the first missing feature with pre-binning, but in that case we'd do a bsearch twice as you point out (BTW your concern about memory allocation wouldn't apply though). The second missing feature should be easy to add to qdist. That said, given that you want this in for 2.12, I'd go with your approach for now. In the future we should look into supporting your use case in qdist, since it is likely that there will be more users with a similar need. Thanks, Emilio
Re: [Qemu-devel] [PATCH v12 28/28] tests/qmp-test: blacklist sev specific qmp commands
On 3/8/18 11:08 AM, Daniel P. Berrangé wrote: > On Thu, Mar 08, 2018 at 06:49:01AM -0600, Brijesh Singh wrote: >> Blacklist the following commands to fix the 'make check' failure. >> >> query-sev-launch-measure: it returns meaninful data only when we launch >> SEV guest otherwise the command returns an error. >> >> query-sev: it return an error when SEV is not available on host (e.g non >> X86 platform or KVM is disabled at the build time) >> >> query-sev-capabilities: it returns an error when SEV feature is not >> available on host machine. > We generally expect 'make check' to succeed on every single patch > in a series, so that 'git bisect' doesn't break. > > So you should add each command to the blacklist in the same commit > that introduced the failure in the first place. Sure, I can quickly send the updated patch series to address your this concern, but before spamming everyone's inbox I was wondering if I can get some indication whether this series will make into 2.12 merge. Paolo, Eduardo and Richard, Most of the changes are in x86 directory hence any thought if you are considering this series for 2.12 ? I have been testing the series with and without SEV support and so far have not ran into any issue. if you are not planning to pull this series in 2.12 then I will wait a bit longer to get more feedback before sending the updates to address Daniel's comment. thanks >> Cc: "Daniel P. Berrangé" >> Cc: "Dr. David Alan Gilbert" >> Cc: Markus Armbruster >> Reviewed-by: "Dr. David Alan Gilbert" >> Signed-off-by: Brijesh Singh >> --- >> tests/qmp-test.c | 5 + >> 1 file changed, 5 insertions(+) >> >> diff --git a/tests/qmp-test.c b/tests/qmp-test.c >> index 22445d9ec258..7470c6b754bc 100644 >> --- a/tests/qmp-test.c >> +++ b/tests/qmp-test.c >> @@ -204,6 +204,11 @@ static bool query_is_blacklisted(const char *cmd) >> "query-gic-capabilities", /* arm */ >> /* Success depends on target-specific build configuration: */ >> "query-pci", /* CONFIG_PCI */ >> +/* Success depends on launching SEV guest */ >> +"query-sev-launch-measure", >> +/* Success depends on Host or Hypervisor SEV support */ >> +"query-sev", >> +"query-sev-capabilities", >> NULL >> }; >> int i; >> -- >> 2.14.3 >> > Regards, > Daniel
[Qemu-devel] [PATCH v4 26/29] vhost: Huge page align and merge
From: "Dr. David Alan Gilbert"
Align RAMBlocks to page size alignment, and adjust the merging code
to deal with partial overlap due to that alignment.
This is needed for postcopy so that we can place/fetch whole hugepages
when under userfault.
Signed-off-by: Dr. David Alan Gilbert
---
hw/virtio/trace-events | 3 ++-
hw/virtio/vhost.c | 66 ++
2 files changed, 58 insertions(+), 11 deletions(-)
diff --git a/hw/virtio/trace-events b/hw/virtio/trace-events
index 857c495e65..1422ff03ab 100644
--- a/hw/virtio/trace-events
+++ b/hw/virtio/trace-events
@@ -3,7 +3,8 @@
# hw/virtio/vhost.c
vhost_commit(bool started, bool changed) "Started: %d Changed: %d"
vhost_region_add_section(const char *name, uint64_t gpa, uint64_t size,
uint64_t host) "%s: 0x%"PRIx64"+0x%"PRIx64" @ 0x%"PRIx64
-vhost_region_add_section_abut(const char *name, uint64_t new_size) "%s:
0x%"PRIx64
+vhost_region_add_section_merge(const char *name, uint64_t new_size, uint64_t
gpa, uint64_t owr) "%s: size: 0x%"PRIx64 " gpa: 0x%"PRIx64 " owr: 0x%"PRIx64
+vhost_region_add_section_aligned(const char *name, uint64_t gpa, uint64_t
size, uint64_t host) "%s: 0x%"PRIx64"+0x%"PRIx64" @ 0x%"PRIx64
vhost_section(const char *name, int r) "%s:%d"
# hw/virtio/vhost-user.c
diff --git a/hw/virtio/vhost.c b/hw/virtio/vhost.c
index d8d0ef92e1..250f886acb 100644
--- a/hw/virtio/vhost.c
+++ b/hw/virtio/vhost.c
@@ -522,10 +522,28 @@ static void vhost_region_add_section(struct vhost_dev
*dev,
uint64_t mrs_gpa = section->offset_within_address_space;
uintptr_t mrs_host = (uintptr_t)memory_region_get_ram_ptr(section->mr) +
section->offset_within_region;
+RAMBlock *mrs_rb = section->mr->ram_block;
+size_t mrs_page = qemu_ram_pagesize(mrs_rb);
trace_vhost_region_add_section(section->mr->name, mrs_gpa, mrs_size,
mrs_host);
+/* Round the section to it's page size */
+/* First align the start down to a page boundary */
+uint64_t alignage = mrs_host & (mrs_page - 1);
+if (alignage) {
+mrs_host -= alignage;
+mrs_size += alignage;
+mrs_gpa -= alignage;
+}
+/* Now align the size up to a page boundary */
+alignage = mrs_size & (mrs_page - 1);
+if (alignage) {
+mrs_size += mrs_page - alignage;
+}
+trace_vhost_region_add_section_aligned(section->mr->name, mrs_gpa,
mrs_size,
+ mrs_host);
+
if (dev->n_tmp_sections) {
/* Since we already have at least one section, lets see if
* this extends it; since we're scanning in order, we only
@@ -542,18 +560,46 @@ static void vhost_region_add_section(struct vhost_dev
*dev,
prev_sec->offset_within_region;
uint64_t prev_host_end = range_get_last(prev_host_start, prev_size);
-if (prev_gpa_end + 1 == mrs_gpa &&
-prev_host_end + 1 == mrs_host &&
-section->mr == prev_sec->mr &&
-(!dev->vhost_ops->vhost_backend_can_merge ||
-dev->vhost_ops->vhost_backend_can_merge(dev,
+if (mrs_gpa <= (prev_gpa_end + 1)) {
+/* OK, looks like overlapping/intersecting - it's possible that
+ * the rounding to page sizes has made them overlap, but they
should
+ * match up in the same RAMBlock if they do.
+ */
+if (mrs_gpa < prev_gpa_start) {
+error_report("%s:Section rounded to %"PRIx64
+ " prior to previous %"PRIx64,
+ __func__, mrs_gpa, prev_gpa_start);
+/* A way to cleanly fail here would be better */
+return;
+}
+/* Offset from the start of the previous GPA to this GPA */
+size_t offset = mrs_gpa - prev_gpa_start;
+
+if (prev_host_start + offset == mrs_host &&
+section->mr == prev_sec->mr &&
+(!dev->vhost_ops->vhost_backend_can_merge ||
+ dev->vhost_ops->vhost_backend_can_merge(dev,
mrs_host, mrs_size,
prev_host_start, prev_size))) {
-/* The two sections abut */
-need_add = false;
-prev_sec->size = int128_add(prev_sec->size, section->size);
-trace_vhost_region_add_section_abut(section->mr->name,
-mrs_size + prev_size);
+uint64_t max_end = MAX(prev_host_end, mrs_host + mrs_size);
+need_add = false;
+prev_sec->offset_within_address_space =
+MIN(prev_gpa_start, mrs_gpa);
+prev_sec->offset_within_region =
+MIN(prev_host_start, mrs_host) -
+(uintptr_t)memory_region_get_ram_ptr(prev_sec->mr);
+prev_sec->size = int128_make64(max_end - MIN(prev_host_sta
Re: [Qemu-devel] [PATCH 2/2 v2] slirp: Add classless static routes support to DHCP server
Am Donnerstag, den 08.03.2018, 13:46 -0600 schrieb Eric Blake:
> On 03/08/2018 12:57 PM, Benjamin Drung wrote:
> > This patch will allow the user to specify classless static routes
> > for
> > the replies from the built-in DHCP server.
> >
> > Signed-off-by: Benjamin Drung
> > ---
>
> For future patches, when sending a v2, it's best to document here
> (after
> the --- separator) what changed from v1. It's also a good idea to
> send
> a fresh thread rather than tying your v2 in-reply-to your v1, so that
> it
> doesn't get buried in an old conversation.
>
> More submission hints at https://wiki.qemu.org/Contribute/SubmitAPatch
Thanks. I will do that with the next iteration. Patch v2 addressed all
remarks from Samuel Thibault.
> > +++ b/qapi/net.json
> > @@ -163,6 +163,9 @@
> > # @domainname: guest-visible domain name of the virtual
> > nameserver
> > # (since 2.12)
> > #
> > +# @route: guest-visible static classless route of the virtual
> > nameserver
> > +# (since 2.12)
> > +#
> > # @ipv6-prefix: IPv6 network prefix (default is fec0::) (since
> > # 2.6). The network prefix is given in the usual
> > # hexadecimal IPv6 address notation.
> > @@ -201,6 +204,7 @@
> > '*dns': 'str',
> > '*dnssearch': ['String'],
> > '*domainname': 'str',
> > +'*route': ['String'],
>
> I know we've used ['String'] for previous members, but that's rather
> heavyweight - it transmits over QMP as:
>
> "dnssearch": [ { "str": "foo" }, { "str": "bar" } ]
>
> Nicer is ['str'], which transmits as:
>
> "route": [ "foo", "bar" ]
>
> so the question boils down to whether cross-member consistency is
> more
> important than making your additions concise.
Agreed that ['str'] is nicer. I will update the patch.
> > +++ b/qemu-options.hx
> > @@ -1904,7 +1904,7 @@ DEF("netdev", HAS_ARG, QEMU_OPTION_netdev,
> > " [,ipv6[=on|off]][,ipv6-net=addr[/int]][,ipv6-
> > host=addr]\n"
> > " [,restrict=on|off][,hostname=host][,dhcpstart=addr]
> > \n"
> > " [,dns=addr][,ipv6-
> > dns=addr][,dnssearch=domain][,domainname=domain]\n"
> > -" [,tftp=dir][,bootfile=f][,hostfwd=rule][,guestfwd=ru
> > le]"
> > +" [,route=addr/mask[:gateway]][,tftp=dir][,bootfile=f]
> > [,hostfwd=rule][,guestfwd=rule]"
>
> Urgh - your QMP interface HAS to be further parsed to get to the
> useful
> information. While it's nice to have compact syntax on the command
> line, it is really worth thinking about making information easier to
> consume (that is, NO further parsing required once the information is
> in
> JSON format). Would it be any better to send things over the wire
> as:
>
> "route": [ { "addr": "...", "mask": 24, "gateway": "..." } ]
That's looks good.
> instead of cramming all the information into a single string? But
> based
> on the way this also maps to the command line, you may not have a
> choice
> without a lot more code complexity.
Can you point me to an example where similar parsing is done?
> > #ifndef _WIN32
> >"[,smb=dir[,smbserve
> > r=addr]]\n"
> > #endif
> > @@ -2137,6 +2137,18 @@ qemu -net
> > user,dnssearch=mgmt.example.org,dnssearch=example.org [...]
> > @item domainname=@var{domain}
> > Specifies the client domain name reported by the built-in DHCP
> > server.
> >
> > +@item route=@var{addr}/@var{mask}[:@var{gateway}]
> > +Provides an entry for the classless static routes list sent by the
> > built-in
> > +DHCP server. More than one route can be transmitted by specifying
> > +this option multiple times. If supported, this will cause the
> > guest to
> > +automatically set the given static routes instead of the given
> > default gateway.
> > +If @var{gateway} is not specified, the default gateway will be
> > used.
> > +
> > +Example:
> > +@example
> > +qemu -net user,route=10.0.2.0/24,route=192.168.0.0/16 [...]
> > +@end example
>
> Can we please spell that '--net', along the lines of
> https://wiki.qemu.org/BiteSizedTasks#Consistent_option_usage_in_docum
> entation
I can change it, but then the documentation is inconsistent. There
are 75 lines with '-net' in qemu-options.hx, but only two lines
with '--net'.
--
Benjamin Drung
System Developer
Debian & Ubuntu Developer
ProfitBricks GmbH
Greifswalder Str. 207
D - 10405 Berlin
Email: benjamin.dr...@profitbricks.com
URL: https://www.profitbricks.de
Sitz der Gesellschaft: Berlin
Registergericht: Amtsgericht Charlottenburg, HRB 125506 B
Geschäftsführer: Achim Weiss, Matthias Steinberg
Re: [Qemu-devel] [PULL] RISC-V QEMU Port Submission v8.2
On Fri, Mar 9, 2018 at 12:48 AM, Daniel P. Berrangé wrote: > On Thu, Mar 08, 2018 at 11:18:30AM +, Michael Clark wrote: > > On Fri, 9 Mar 2018 at 12:10 AM, Michael Clark wrote: > > > > > On Thu, 8 Mar 2018 at 11:02 PM, Peter Maydell < > peter.mayd...@linaro.org> > > > wrote: > > > > > >> On 6 March 2018 at 19:46, Michael Clark wrote: > > >> > -BEGIN PGP SIGNED MESSAGE- > > >> > Hash: SHA1 > > >> > > > >> > The following changes since commit > > >> f32408f3b472a088467474ab152be3b6285b2d7b: > > >> > > > >> > misc: don't use hwaddr as a type in trace events (2018-03-06 > 14:24:30 > > >> +) > > >> > > > >> > are available in the git repository at: > > >> > > > >> > https://github.com/riscv/riscv-qemu.git > tags/riscv-qemu-upstream-v8.2 > > >> > > > >> > for you to fetch changes up to 7051b081bf6796e5e84406f6223a7c > 4900bf7298: > > >> > > > >> > RISC-V - Remove support for adhoc non-standard X_COP > local-interrupt > > >> (2018-03-07 08:36:03 +1300) > > >> > > >> > > >> Hi -- I would have applied this, but some of the commits > > >> have no signed-off-by lines. > > >> > > >> This is important, and I've already asked for it once. We cannot > > >> accept anything that doesn't have a clear record in the commit > > >> message of everybody (person or company) who's contributed code > > >> to it, indicating that they're happy for their copyrighted > > >> contributions to be taken into QEMU under our license. Lists > > >> of names without emails in the cover letter are not sufficient. > > >> > > >> In fact a lot of the last part of this patchset looks like > > >> unreviewed changes/fixes that if we were going to have them we > > >> should have squashed into the correct patches and resent the > > >> series for review. Please don't do this. Code review is an > > >> important part of how the QEMU project works. > > > > > > > > > You must be looking at the wrong tag. There are multiple sign-offs in > all > > > 23 commits. The tag is riscv-qemu-upstream-v8.2. Sagar and Bastian > > > contacted me out of band to add their sign-offs. Please look at the > commits > > > again and tell me which commit id doesn’t have a sign-off on that tag > (23 > > > commits iirc) > > > > > > > I can forward you the mail out-of-band. I had to contact contributors to > > get them to agree to change the license from MIT to GPLv2, based on a > > request from Red Hat. > > > > You are making this very hard. Do you work for Arm perchance? I really > > wouldn’t be surprised if our port is being sandbagged by Arm. Apologies > for > > being so direct about this, but things like this happen... > > > > I have complied with practically every review request and the sign-offs > are > > there. It’s a bit ridiculous. > > > > It would be nice to find someone neutral, unrelated to Arm, to merge our > PR > > Please stop with these ridiculous conspiracy theories right away. It is a > totally inappropriate and baseless accusation to make. > My apologies. I do tend towards conspiratorial thinking, and this is related to a pain and anxiety disorder combined with insomnia. It seems the issue is completely my fault and i'll apologise again on this email. I will refrain from making any non-technical comments after this. I'm not trying to make an excuse. I do tend towards conspiratorial thinking. I'm obviously having trouble moving from a Github PR / merge flow, to a Linux git-send-email based flow. The Linux git-send-email based flow has a steeper learning curve... and the mistakes are completely mine... Sorry. I sincerely hope its accepted. Peter is not trying to punish you with extra rules. Over time QEMU has been > raising the bar for *all* contributions with extra code style checks, > automated testing, and review. Unfortunately this does mean that the larger > the patch series / feature, the more work is required to get to a mergable > state, especially if the contributors are not previously familiar with QEMU > development. > > Regards, > Daniel > -- > |: https://berrange.com -o-https://www.flickr.com/photos/ > dberrange :| > |: https://libvirt.org -o- > https://fstop138.berrange.com :| > |: https://entangle-photo.org-o-https://www.instagram.com/ > dberrange :| >
Re: [Qemu-devel] [PATCH 2/2 v2] slirp: Add classless static routes support to DHCP server
On 03/08/2018 02:07 PM, Benjamin Drung wrote:
Am Donnerstag, den 08.03.2018, 13:46 -0600 schrieb Eric Blake:
On 03/08/2018 12:57 PM, Benjamin Drung wrote:
This patch will allow the user to specify classless static routes
for
the replies from the built-in DHCP server.
Signed-off-by: Benjamin Drung
---
For future patches, when sending a v2, it's best to document here
(after
the --- separator) what changed from v1. It's also a good idea to
send
a fresh thread rather than tying your v2 in-reply-to your v1, so that
it
doesn't get buried in an old conversation.
More submission hints at https://wiki.qemu.org/Contribute/SubmitAPatch
Thanks. I will do that with the next iteration. Patch v2 addressed all
remarks from Samuel Thibault.
At this point, since Samuel is the net maintainer, I'll trust his
judgment on what interface works best; my review is only trying to make
sure we don't bake in a UI mistake at the last minute (although we can
adjust things during soft freeze, if needed).
'*dnssearch': ['String'],
'*domainname': 'str',
+'*route': ['String'],
I know we've used ['String'] for previous members, but that's rather
heavyweight - it transmits over QMP as:
"dnssearch": [ { "str": "foo" }, { "str": "bar" } ]
Nicer is ['str'], which transmits as:
"route": [ "foo", "bar" ]
so the question boils down to whether cross-member consistency is
more
important than making your additions concise.
Agreed that ['str'] is nicer. I will update the patch.
The problem is that ['str'] might not work easily for the command line
glue; I'm more familiar with how QMP exposes things than with the
command line parsing, and Markus, who is trying to improve command line
parsing to share more common infrastructure with QMP, might have better
comments on the topic, except that he's on leave for a few weeks and
won't respond until after 2.12 is frozen. Using ['String'] for
consistency is therefore okay, if you can't get ['str'] working quickly.
@@ -1904,7 +1904,7 @@ DEF("netdev", HAS_ARG, QEMU_OPTION_netdev,
" [,ipv6[=on|off]][,ipv6-net=addr[/int]][,ipv6-
host=addr]\n"
Here's an example where we made the command line smart. ipv6-net takes
TWO pieces of information: addr/int; on the QMP side, we spelled it
'*ipv6-prefix':'str' + 'ipv6-prefixlen':'int'. So somewhere in the
command line parsing code for --net (which I'm less familiar with),
there is some glue code taking the compact representation and splitting
it into the more verbose but more direct QMP representation - well, that
is, if we are converting it into QMP form at all (part of the problem is
that our command line and runtime control don't always share code,
although we're trying to get better at that).
+" [,route=addr/mask[:gateway]][,tftp=dir][,bootfile=f]
[,hostfwd=rule][,guestfwd=rule]"
Urgh - your QMP interface HAS to be further parsed to get to the
useful
information. While it's nice to have compact syntax on the command
line, it is really worth thinking about making information easier to
consume (that is, NO further parsing required once the information is
in
JSON format). Would it be any better to send things over the wire
as:
"route": [ { "addr": "...", "mask": 24, "gateway": "..." } ]
That's looks good.
Okay, doing that would mean using something like:
{ 'struct': 'RouteEntry', 'data': { 'addr': 'str', '*mask': 'int',
'*gateway': 'str' } }
...
'route': [ 'RouteEntry' ]
(but reuse, rather than inventing a new type, if one of the existing QMP
types already resembles what I proposed for RouteEntry)
The command line can still use route=addr/mask:gateway syntax, parse it
down into components, then compile the QMP array of already-parsed
structs (rather than making QMP take a direct ['String'] that still
needs further parsing). It may take more glue code, but the idea is
that all the glue code should live on the front end, so that the QMP
backend should be easy to work with.
instead of cramming all the information into a single string? But
based
on the way this also maps to the command line, you may not have a
choice
without a lot more code complexity.
Can you point me to an example where similar parsing is done?
Hopefully my hint about command-line ipv6-net gets you started (as I
said, I'm less familiar with the specifics of net code, so much as
taking the interface point of view here).
+@example
+qemu -net user,route=10.0.2.0/24,route=192.168.0.0/16 [...]
+@end example
Can we please spell that '--net', along the lines of
https://wiki.qemu.org/BiteSizedTasks#Consistent_option_usage_in_docum
entation
I can change it, but then the documentation is inconsistent. There
are 75 lines with '-net' in qemu-options.hx, but only two lines
with '--net'.
Yeah, there's that. But hopefully someone will tackle the bite-sized
task to get things consistent, and once they do, leaving fewer places
that still need to be switched is nice. I can live
Re: [Qemu-devel] [PATCH 03/11] xen: defer call to xen_restrict until just before os_setup_post
On Thu, Mar 08, 2018 at 05:39:09PM +, Ian Jackson wrote: [...] > diff --git a/vl.c b/vl.c > index dae986b..e6e8e1e 100644 > --- a/vl.c > +++ b/vl.c > @@ -4719,6 +4719,7 @@ int main(int argc, char **argv, char **envp) > vm_start(); > } > > +xen_setup_post(); I don't think we should have accelerator-specific code in main(), if we already have accelerator classes that can abstract that out. I suggest adding a AccelClass;:setup_post() method that can be called here. -- Eduardo
Re: [Qemu-devel] [RFC PATCH v2 09/22] hw/isa/superio: Factor out the parallel code from pc87312.c
On 03/05/2018 10:19 PM, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> include/hw/isa/pc87312.h | 4 ---
> include/hw/isa/superio.h | 6 +
> hw/isa/isa-superio.c | 63
>
> hw/isa/pc87312.c | 38 -
> hw/isa/trace-events | 4 ++-
> 5 files changed, 87 insertions(+), 28 deletions(-)
>
> diff --git a/include/hw/isa/pc87312.h b/include/hw/isa/pc87312.h
> index f3761d6fe1..bcc4578479 100644
> --- a/include/hw/isa/pc87312.h
> +++ b/include/hw/isa/pc87312.h
> @@ -39,10 +39,6 @@ typedef struct PC87312State {
> uint16_t iobase;
> uint8_t config; /* initial configuration */
>
> -struct {
> -ISADevice *dev;
> -} parallel;
> -
> struct {
> ISADevice *dev;
> } uart[2];
> diff --git a/include/hw/isa/superio.h b/include/hw/isa/superio.h
> index cff6ad6c08..e9879cfde1 100644
> --- a/include/hw/isa/superio.h
> +++ b/include/hw/isa/superio.h
> @@ -23,7 +23,11 @@
> OBJECT_CLASS_CHECK(ISASuperIOClass, (klass), TYPE_ISA_SUPERIO)
>
> typedef struct ISASuperIODevice {
> +/*< private >*/
> ISADevice parent_obj;
> +/*< public >*/
> +
> +ISADevice *parallel[MAX_PARALLEL_PORTS];
> } ISASuperIODevice;
>
> typedef struct ISASuperIOFuncs {
> @@ -39,6 +43,8 @@ typedef struct ISASuperIOClass {
> ISADeviceClass parent_class;
> /*< public >*/
> DeviceRealize parent_realize;
> +
> +ISASuperIOFuncs parallel;
> } ISASuperIOClass;
>
> #endif /* HW_ISA_SUPERIO_H */
> diff --git a/hw/isa/isa-superio.c b/hw/isa/isa-superio.c
> index f8b9f0..4e0b1af633 100644
> --- a/hw/isa/isa-superio.c
> +++ b/hw/isa/isa-superio.c
> @@ -10,13 +10,76 @@
> * SPDX-License-Identifier: GPL-2.0-or-later
> */
> #include "qemu/osdep.h"
> +#include "qemu/error-report.h"
> +#include "sysemu/sysemu.h"
> +#include "chardev/char.h"
> #include "hw/isa/superio.h"
> #include "trace.h"
>
> +static void isa_superio_realize(DeviceState *dev, Error **errp)
> +{
> +ISASuperIODevice *sio = ISA_SUPERIO(dev);
> +ISASuperIOClass *k = ISA_SUPERIO_GET_CLASS(sio);
> +ISABus *bus = isa_bus_from_device(ISA_DEVICE(dev));
> +ISADevice *isa;
> +DeviceState *d;
> +Chardev *chr;
> +char *name;
> +int i;
> +
> +/* Parallel port */
> +for (i = 0; i < k->parallel.count; i++) {
> +if (i >= ARRAY_SIZE(sio->parallel)) {
> +warn_report("superio: ignoring %ld parallel controllers",
> +k->parallel.count - ARRAY_SIZE(sio->parallel));
> +break;
> +}
> +if (!k->parallel.is_enabled || k->parallel.is_enabled(sio, i)) {
> +name = g_strdup_printf("discarding-parallel%d", i);
> +/* FIXME use a qdev chardev prop instead of parallel_hds[] */
> +chr = parallel_hds[i];
> +if (chr == NULL || chr->be) {
> +chr = qemu_chr_new(name, "null");
> +}
> +isa = isa_create(bus, "isa-parallel");
> +d = DEVICE(isa);
> +qdev_prop_set_uint32(d, "index", i);
> +if (k->parallel.get_iobase) {
> +qdev_prop_set_uint32(d, "iobase",
> + k->parallel.get_iobase(sio, i));
> +}
> +if (k->parallel.get_irq) {
> +qdev_prop_set_uint32(d, "irq", k->parallel.get_irq(sio, i));
> +}
> +qdev_prop_set_chr(d, "chardev", chr);
> +qdev_init_nofail(d);
> +sio->parallel[i] = isa;
> +trace_superio_create_parallel(i,
> + k->parallel.get_iobase ?
> + k->parallel.get_iobase(sio, i) :
> -1,
> + k->parallel.get_irq ?
> + k->parallel.get_irq(sio, i) : -1);
> +object_property_add_child(OBJECT(dev), name,
> + OBJECT(sio->parallel[i]), NULL);
> +g_free(name);
> +}
> +}
> +}
> +
> +static void isa_superio_class_init(ObjectClass *oc, void *data)
> +{
> +DeviceClass *dc = DEVICE_CLASS(oc);
> +
> +dc->realize = isa_superio_realize;
> +/* Reason: Uses parallel_hds[0] in realize(), so it can't be used twice
> */
> +dc->user_creatable = false;
> +}
> +
> static const TypeInfo isa_superio_type_info = {
> .name = TYPE_ISA_SUPERIO,
> .parent = TYPE_ISA_DEVICE,
> .abstract = true,
I missed here:
.class_size = sizeof(ISASuperIOClass),
> +.class_init = isa_superio_class_init,
> };
>
> static void isa_superio_register_types(void)
> diff --git a/hw/isa/pc87312.c b/hw/isa/pc87312.c
> index 6b8100ff56..1c15715c69 100644
> --- a/hw/isa/pc87312.c
> +++ b/hw/isa/pc87312.c
> @@ -64,22 +64,25 @@
>
> /* Parallel port */
>
> -static inline bool is_parallel_enabled(PC87312State *s
Re: [Qemu-devel] [RFC PATCH v2 21/22] hw/alpha/dp264: Use the TYPE_SMC37C669_SUPERIO
On 03/05/2018 10:19 PM, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> default-configs/alpha-softmmu.mak | 3 +++
> hw/alpha/dp264.c | 10 --
> 2 files changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/default-configs/alpha-softmmu.mak
> b/default-configs/alpha-softmmu.mak
> index 3740adc5e9..bbe361f01a 100644
> --- a/default-configs/alpha-softmmu.mak
> +++ b/default-configs/alpha-softmmu.mak
> @@ -7,6 +7,9 @@ CONFIG_SERIAL_ISA=y
> CONFIG_I82374=y
> CONFIG_I8254=y
> CONFIG_I8257=y
> +CONFIG_PARALLEL=y
> +CONFIG_PARALLEL_ISA=y
> +CONFIG_FDC=y
> CONFIG_PCKBD=y
> CONFIG_VGA_CIRRUS=y
> CONFIG_IDE_CORE=y
> diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c
> index ffad678ea7..80b987f7fb 100644
> --- a/hw/alpha/dp264.c
> +++ b/hw/alpha/dp264.c
> @@ -19,8 +19,7 @@
> #include "hw/timer/mc146818rtc.h"
> #include "hw/ide.h"
> #include "hw/timer/i8254.h"
> -#include "hw/input/i8042.h"
> -#include "hw/char/serial.h"
> +#include "hw/isa/superio.h"
> #include "hw/dma/i8257.h"
> #include "qemu/cutils.h"
>
> @@ -83,14 +82,10 @@ static void clipper_init(MachineState *machine)
> mc146818_rtc_init(isa_bus, 1900, rtc_irq);
>
> i8254_pit_init(isa_bus, 0x40, 0, NULL);
> -isa_create_simple(isa_bus, TYPE_I8042);
>
> /* VGA setup. Don't bother loading the bios. */
> pci_vga_init(pci_bus);
>
> -/* Serial code setup. */
> -serial_hds_isa_init(isa_bus, 0, MAX_SERIAL_PORTS);
> -
> /* Network setup. e1000 is good enough, failing Tulip support. */
> for (i = 0; i < nb_nics; i++) {
> pci_nic_init_nofail(&nd_table[i], pci_bus, "e1000", NULL);
> @@ -99,6 +94,9 @@ static void clipper_init(MachineState *machine)
> /* 2 82C37 (dma) */
> isa_create_simple(isa_bus, "i82374");
>
> +/* Super I/O */
> +isa_create_simple(isa_bus, TYPE_SMC37C669_SUPERIO);
> +
> /* IDE disk setup. */
> {
> DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
>
Booting linux with:
qemu-system-alpha -kernel vmlinux-smp -nographic -append 'console=srm
printk.time=0'
diffing the console before/after (master/series):
platform rtc-alpha: rtc core: registered rtc-alpha as rtc0
Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
serial8250: ttyS0 at I/O 0x3f8 (irq = 4, base_baud = 115200) is a 16550A
+ serial8250: ttyS1 at I/O 0x2f8 (irq = 3, base_baud = 115200) is a 16550A
serio: i8042 KBD port at 0x60,0x64 irq 1
serio: i8042 AUX port at 0x60,0x64 irq 12
mousedev: PS/2 mouse device common for all mice
input: AT Translated Set 2 keyboard as
/devices/platform/i8042/serio0/input/input0
The only diff is the 2nd uart discovered (ttyS1), since the SMC37C669
provides 2 (everything else is exactly the same - except the RTC time).
So alpha-softmmu behaves correctly.
Re: [Qemu-devel] [RFC PATCH v2 15/22] hw/isa/superio: Factor out the FDC37M817 Super I/O from mips_malta.c
On 03/05/2018 10:19 PM, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> include/hw/isa/superio.h | 2 ++
> hw/isa/isa-superio.c | 20
> hw/mips/mips_malta.c | 35 ++-
> 3 files changed, 32 insertions(+), 25 deletions(-)
>
> diff --git a/include/hw/isa/superio.h b/include/hw/isa/superio.h
> index 3dd5448f8c..b47aac3cf8 100644
> --- a/include/hw/isa/superio.h
> +++ b/include/hw/isa/superio.h
> @@ -54,4 +54,6 @@ typedef struct ISASuperIOClass {
> ISASuperIOFuncs ide;
> } ISASuperIOClass;
>
> +#define TYPE_FDC37M81X_SUPERIO "fdc37m81x-superio"
> +
> #endif /* HW_ISA_SUPERIO_H */
> diff --git a/hw/isa/isa-superio.c b/hw/isa/isa-superio.c
> index 88d254a602..f1f699fc2f 100644
> --- a/hw/isa/isa-superio.c
> +++ b/hw/isa/isa-superio.c
> @@ -182,9 +182,29 @@ static const TypeInfo isa_superio_type_info = {
> .class_init = isa_superio_class_init,
> };
>
> +/* SMS FDC37M817 Super I/O */
> +static void fdc37m81x_class_init(ObjectClass *klass, void *data)
> +{
> +ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass);
> +
> +sc->serial.count = 2; /* NS16C550A */
> +sc->parallel.count = 1;
> +sc->floppy.count = 1; /* SMSC 82077AA Compatible */
> +sc->ide.count = 0;
> +}
> +
> +static const TypeInfo fdc37m81x_type_info = {
> +.name = TYPE_FDC37M81X_SUPERIO,
> +.parent= TYPE_ISA_SUPERIO,
> +.instance_size = sizeof(ISASuperIODevice),
> +.class_size= sizeof(ISASuperIOClass),
> +.class_init= fdc37m81x_class_init,
> +};
> +
> static void isa_superio_register_types(void)
> {
> type_register_static(&isa_superio_type_info);
> +type_register_static(&fdc37m81x_type_info);
> }
>
> type_init(isa_superio_register_types)
> diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
> index 9e0724ca5a..f6513a4fd5 100644
> --- a/hw/mips/mips_malta.c
> +++ b/hw/mips/mips_malta.c
> @@ -27,14 +27,12 @@
> #include "cpu.h"
> #include "hw/hw.h"
> #include "hw/i386/pc.h"
> +#include "hw/isa/superio.h"
> #include "hw/dma/i8257.h"
> #include "hw/char/serial.h"
> -#include "hw/char/parallel.h"
> -#include "hw/block/fdc.h"
> #include "net/net.h"
> #include "hw/boards.h"
> #include "hw/i2c/smbus.h"
> -#include "sysemu/block-backend.h"
> #include "hw/block/flash.h"
> #include "hw/mips/mips.h"
> #include "hw/mips/cpudevs.h"
> @@ -47,7 +45,6 @@
> #include "hw/loader.h"
> #include "elf.h"
> #include "hw/timer/mc146818rtc.h"
> -#include "hw/input/i8042.h"
> #include "hw/timer/i8254.h"
> #include "sysemu/blockdev.h"
> #include "exec/address-spaces.h"
> @@ -1005,10 +1002,8 @@ void mips_malta_init(MachineState *machine)
> qemu_irq cbus_irq, i8259_irq;
> int piix4_devfn;
> I2CBus *smbus;
> -int i;
> DriveInfo *dinfo;
> DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
> -DriveInfo *fd[MAX_FD];
> int fl_idx = 0;
> int fl_sectors = bios_size >> 16;
> int be;
> @@ -1023,15 +1018,6 @@ void mips_malta_init(MachineState *machine)
>
> qdev_init_nofail(dev);
>
> -/* Make sure the first 3 serial ports are associated with a device. */
> -for(i = 0; i < 3; i++) {
> -if (!serial_hds[i]) {
> -char label[32];
> -snprintf(label, sizeof(label), "serial%d", i);
> -serial_hds[i] = qemu_chr_new(label, "null");
> -}
> -}
> -
> /* create CPU */
> mips_create_cpu(s, machine->cpu_type, &cbus_irq, &i8259_irq);
>
> @@ -1067,7 +1053,14 @@ void mips_malta_init(MachineState *machine)
> #else
> be = 0;
> #endif
> +
> /* FPGA */
> +
> +/* Make sure the second serial port is associated with a device. */
> +if (!serial_hds[2]) {
> +serial_hds[2] = qemu_chr_new("fpga-uart", "null");
> +}
> +
> /* The CBUS UART is attached to the MIPS CPU INT2 pin, ie interrupt 4 */
> malta_fpga_init(system_memory, FPGA_ADDRESS, cbus_irq, serial_hds[2]);
>
> @@ -1214,16 +1207,8 @@ void mips_malta_init(MachineState *machine)
> smbus_eeprom_init(smbus, 8, smbus_eeprom_buf, smbus_eeprom_size);
> g_free(smbus_eeprom_buf);
>
> -/* Super I/O */
> -isa_create_simple(isa_bus, TYPE_I8042);
> -
> -serial_hds_isa_init(isa_bus, 0, 2);
> -parallel_hds_isa_init(isa_bus, 1);
> -
> -for(i = 0; i < MAX_FD; i++) {
> -fd[i] = drive_get(IF_FLOPPY, 0, i);
> -}
> -fdctrl_init_isa(isa_bus, fd);
> +/* Super I/O: SMS FDC37M817 */
> +isa_create_simple(isa_bus, TYPE_FDC37M81X_SUPERIO);
>
> /* Network card */
> network_init(pci_bus);
>
Booting Aurelien Malta Linux image with this series applied, the console
is identical (also 'info mtree' in monitor).
Re: [Qemu-devel] [RFC] Defining firmware (OVMF, et al) metadata format & file
On 03/08/18 16:47, Daniel P. Berrangé wrote:
> On Thu, Mar 08, 2018 at 12:10:30PM +0100, Laszlo Ersek wrote:
>> I suggest (or agree) that the property list be composed of free-form
>> name=value pairs (at least conceptually). I understand Gerd is proposing
>> a QAPI schema for this, so maybe do { property_name : "foo",
>> property_value : "bar" }, or similar. The registry of properties (names,
>> possible values, meanings) should be kept separate (although possibly
>> still under QEMU).
>>
>> For OVMF (x86), I guess the initial set of properties should come from
>> the "-D FOO[=BAR]" build flags that OVMF currently supports. (The list
>> might grow or change incompatibly over time, so this is just a raw
>> starter idea.)
>
> I really don't want to see us using firmware implementation specific
> property names in these files. It means libvirt will require knowledge
> of what each different firmware's property names mean.
>
> We need to have some core standardized set of property names that can
> be provided by any firmware implementation using the same terminology.
>
> If we want to /also/ provide some extra firmeware-specific property
> names that would be ok for informative purposes, but when lbivirt is
> picking which firmware file to use, it would only ever look at the
> standardized property names/values.
This is a reasonable requirement from the libvirt side.
Unfortunately (or not), it requires someone (or a tight group of people)
to collect the features of all virtual firmwares in existence, and
extract a common set of properties that maps back to each firmware one
way or another. This is not unusual (basically this is how all standards
bodies work that intend to codify existing practice), it just needs a
bunch of work and coordination. We'll have to maintain a registry.
Personally I can't comment on anything else than OVMF and the ArmVirt
firmwares.
Thanks,
Laszlo
Re: [Qemu-devel] [PATCH v12 28/28] tests/qmp-test: blacklist sev specific qmp commands
On Thu, Mar 08, 2018 at 02:18:55PM -0600, Brijesh Singh wrote: > > > On 3/8/18 11:08 AM, Daniel P. Berrangé wrote: > > On Thu, Mar 08, 2018 at 06:49:01AM -0600, Brijesh Singh wrote: > >> Blacklist the following commands to fix the 'make check' failure. > >> > >> query-sev-launch-measure: it returns meaninful data only when we launch > >> SEV guest otherwise the command returns an error. > >> > >> query-sev: it return an error when SEV is not available on host (e.g non > >> X86 platform or KVM is disabled at the build time) > >> > >> query-sev-capabilities: it returns an error when SEV feature is not > >> available on host machine. > > We generally expect 'make check' to succeed on every single patch > > in a series, so that 'git bisect' doesn't break. > > > > So you should add each command to the blacklist in the same commit > > that introduced the failure in the first place. > > > Sure, I can quickly send the updated patch series to address your this > concern, but before spamming everyone's inbox I was wondering if I can > get some indication whether this series will make into 2.12 merge. > > Paolo, Eduardo and Richard, > > Most of the changes are in x86 directory hence any thought if you are > considering this series for 2.12 ? I have been testing the series with > and without SEV support and so far have not ran into any issue. if you > are not planning to pull this series in 2.12 then I will wait a bit > longer to get more feedback before sending the updates to address > Daniel's comment. thanks Trying to merge it before 2.12 soft freeze (next Tuesday) still looks like a reasonable goal to me. What do others think? -- Eduardo
Re: [Qemu-devel] [RFC PATCH v2 21/22] hw/alpha/dp264: Use the TYPE_SMC37C669_SUPERIO
On 03/08/2018 09:39 PM, Philippe Mathieu-Daudé wrote:
> On 03/05/2018 10:19 PM, Philippe Mathieu-Daudé wrote:
>> Signed-off-by: Philippe Mathieu-Daudé
>> ---
>> default-configs/alpha-softmmu.mak | 3 +++
>> hw/alpha/dp264.c | 10 --
>> 2 files changed, 7 insertions(+), 6 deletions(-)
>>
>> diff --git a/default-configs/alpha-softmmu.mak
>> b/default-configs/alpha-softmmu.mak
>> index 3740adc5e9..bbe361f01a 100644
>> --- a/default-configs/alpha-softmmu.mak
>> +++ b/default-configs/alpha-softmmu.mak
>> @@ -7,6 +7,9 @@ CONFIG_SERIAL_ISA=y
>> CONFIG_I82374=y
>> CONFIG_I8254=y
>> CONFIG_I8257=y
>> +CONFIG_PARALLEL=y
>> +CONFIG_PARALLEL_ISA=y
>> +CONFIG_FDC=y
>> CONFIG_PCKBD=y
>> CONFIG_VGA_CIRRUS=y
>> CONFIG_IDE_CORE=y
>> diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c
>> index ffad678ea7..80b987f7fb 100644
>> --- a/hw/alpha/dp264.c
>> +++ b/hw/alpha/dp264.c
>> @@ -19,8 +19,7 @@
>> #include "hw/timer/mc146818rtc.h"
>> #include "hw/ide.h"
>> #include "hw/timer/i8254.h"
>> -#include "hw/input/i8042.h"
>> -#include "hw/char/serial.h"
>> +#include "hw/isa/superio.h"
>> #include "hw/dma/i8257.h"
>> #include "qemu/cutils.h"
>>
>> @@ -83,14 +82,10 @@ static void clipper_init(MachineState *machine)
>> mc146818_rtc_init(isa_bus, 1900, rtc_irq);
>>
>> i8254_pit_init(isa_bus, 0x40, 0, NULL);
>> -isa_create_simple(isa_bus, TYPE_I8042);
>>
>> /* VGA setup. Don't bother loading the bios. */
>> pci_vga_init(pci_bus);
>>
>> -/* Serial code setup. */
>> -serial_hds_isa_init(isa_bus, 0, MAX_SERIAL_PORTS);
>> -
>> /* Network setup. e1000 is good enough, failing Tulip support. */
>> for (i = 0; i < nb_nics; i++) {
>> pci_nic_init_nofail(&nd_table[i], pci_bus, "e1000", NULL);
>> @@ -99,6 +94,9 @@ static void clipper_init(MachineState *machine)
>> /* 2 82C37 (dma) */
>> isa_create_simple(isa_bus, "i82374");
>>
>> +/* Super I/O */
>> +isa_create_simple(isa_bus, TYPE_SMC37C669_SUPERIO);
>> +
>> /* IDE disk setup. */
>> {
>> DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
>>
>
> Booting linux with:
>
> qemu-system-alpha -kernel vmlinux-smp -nographic -append 'console=srm
> printk.time=0'
>
> diffing the console before/after (master/series):
>
> platform rtc-alpha: rtc core: registered rtc-alpha as rtc0
> Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
> serial8250: ttyS0 at I/O 0x3f8 (irq = 4, base_baud = 115200) is a 16550A
> + serial8250: ttyS1 at I/O 0x2f8 (irq = 3, base_baud = 115200) is a 16550A
> serio: i8042 KBD port at 0x60,0x64 irq 1
> serio: i8042 AUX port at 0x60,0x64 irq 12
> mousedev: PS/2 mouse device common for all mice
> input: AT Translated Set 2 keyboard as
> /devices/platform/i8042/serio0/input/input0
>
> The only diff is the 2nd uart discovered (ttyS1), since the SMC37C669
> provides 2 (everything else is exactly the same - except the RTC time).
>
> So alpha-softmmu behaves correctly.
And the "info qtree" diff:
dev: isabus-bridge, id ""
bus: isa.0
type ISA
+ dev: i8042, id ""
+gpio-out "a20" 1
+isa irqs 1,12
+ dev: isa-fdc, id ""
+iobase = 1008 (0x3f0)
+irq = 6 (0x6)
+dma = 2 (0x2)
+driveA = ""
+driveB = ""
+check_media_rate = true
+fdtypeA = "auto"
+fdtypeB = "auto"
+fallback = "288"
+isa irq 6
+bus: floppy-bus.0
+ type floppy-bus
+ dev: floppy, id ""
+unit = 0 (0x0)
+drive = "floppy0"
+logical_block_size = 512 (0x200)
+physical_block_size = 512 (0x200)
+min_io_size = 0 (0x0)
+opt_io_size = 0 (0x0)
+discard_granularity = 4294967295 (0x)
+write-cache = "auto"
+share-rw = false
+drive-type = "288"
+ dev: isa-serial, id ""
+index = 1 (0x1)
+iobase = 760 (0x2f8)
+irq = 3 (0x3)
+chardev = "discarding-serial1"
+wakeup = 0 (0x0)
+isa irq 3
dev: isa-serial, id ""
index = 0 (0x0)
iobase = 1016 (0x3f8)
@@ -13,9 +47,25 @@
chardev = "serial0"
wakeup = 0 (0x0)
isa irq 4
- dev: i8042, id ""
-gpio-out "a20" 1
-isa irqs 1,12
+ dev: isa-parallel, id ""
+index = 0 (0x0)
+iobase = 956 (0x3bc)
+irq = 7 (0x7)
+chardev = "parallel0"
+isa irq 7
+ dev: smc37c669-superio, id ""
+ dev: i8257, id ""
+base = 192 (0xc0)
+page-base = 136 (0x88)
+pageh-base = 1160 (0x488)
+dshift = 1 (0x1)
+ dev: i8257, id ""
+base = 0 (0x0)
+page-base = 128 (0x80)
+pageh-base = 1152 (0x480)
+dshift = 0 (0x0)
+ dev: i82374, id ""
+iobase = 1024 (0x400)
dev: isa-pit, id ""
gpio-in "" 1
gpio-out "" 1
...
and "info mtree":
08
Re: [Qemu-devel] [PATCH v12 08/28] target/i386: add Secure Encrypted Virtulization (SEV) object
On 3/8/18 10:49 AM, Daniel P. Berrangé wrote:
> On Thu, Mar 08, 2018 at 06:48:41AM -0600, Brijesh Singh wrote:
>> Add a new memory encryption object 'sev-guest'. The object will be used
>> to create enrypted VMs on AMD EPYC CPU. The object provides the properties
>> to pass guest owner's public Diffie-hellman key, guest policy and session
>> information required to create the memory encryption context within the
>> SEV firmware.
>>
>> e.g to launch SEV guest
>> # $QEMU \
>> -object sev-guest,id=sev0 \
>> -machine ,memory-encryption=sev0
>>
>> Cc: Paolo Bonzini
>> Cc: Richard Henderson
>> Cc: Eduardo Habkost
>> Signed-off-by: Brijesh Singh
>
>> diff --git a/qemu-options.hx b/qemu-options.hx
>> index 4c280142c52c..6113bce08a8c 100644
>> --- a/qemu-options.hx
>> +++ b/qemu-options.hx
>> @@ -4353,6 +4353,50 @@ contents of @code{iv.b64} to the second secret
>> data=$SECRET,iv=$(> @end example
>>
>> +@item -object
>> sev-guest,id=@var{id},cbitpos=@var{cbitpos},reduced-phys-bits=@var{val},[sev-device=@var{string},policy=@var{policy},handle=@var{handle},dh-cert-file=@var{file},session-file=@var{file}]
>> +
>> +Create a Secure Encrypted Virtualization (SEV) guest object, which can be
>> used
>> +to provide the guest memory encryption support on AMD processors.
>> +
>> +When memory encryption is enabled, one of the physical address bit (aka the
>> +C-bit) is utilized to mark if a memory page is protected. The
>> @option{cbitpos}
>> +is used to provide the C-bit position. The C-bit position is Host family
>> dependent
>> +hence user must provide this value. On EPYC, the value should be 47.
>> +
>> +When memory encryption is enabled, we loose certain bits in physical
>> address space.
>> +The @option{reduced-phys-bits} is used to provide the number of bits we
>> loose in
>> +physical address space. Similar to C-bit, the value is Host family
>> dependent.
>> +On EPYC, the value should be 5.
> Is it valid to specify a different value for either of these properties ?
> eg what happens if I pass cbitpos=45 instead of 47 on an EPYC host ?
On EPYC, passing anything other than 47 will trigger error during SEV
guest initialization. The value of Cbit position is host dependent, the
value is readonly and can be obtained through the host CPUID. The
cbitpos must be same between guest and host. Please note that the pte's
in guest page table will need to use the cbitpos information to mark
the pages as encrypted. If cbit position given to the guest is different
from the host then guest will fail to execute.
>
> In particular I thinking about possible migration scenario, where EPYC
> uses 47 by default but some $NEXT AMD CPU uses 48 by default. In that
> case we might want to use '47' on both CPUs if we need ability to live
> migrate between different host CPU generations. Would that be valid ?
We will not be able to migrate SEV guests if cbit position does not
match between the source and destination hosts. Since during migration,
the destination guest is launched with same QEMU cli as source hence
cbitpos check in QEMU will catch it and fail the new launch. Optionally,
user can call query-sev-capabilities on both source and destination to
see if cbitpos is compatible before attempting to migrate the guest.
> On the flip side, if the value really it strictly tied to the host
> CPU family and no deviation is permitted, could the kernel not just
> pick the right value automatically avoiding the config option ?
>
I think doing so will be an issue for the migration. Consider your above
use case, a SEV guest is running on EPYC with cbitpos=47 and if we
migrate to some $NEXT AMD CPU which uses need to use cbitpos=48 and we
will fail to resume the guest on destination after migrating.
>
> Regards,
> Daniel
Re: [Qemu-devel] [PATCH v6 00/11] xen: xen-domid-restrict improvements
no-re...@patchew.org writes ("Re: [Qemu-devel] [PATCH v6 00/11] xen:
xen-domid-restrict improvements"):
> This series seems to have some coding style problems. See output below for
> more information:
Obviously I should have run checkpatch myself. I will send a v6.1.
Ian.
Re: [Qemu-devel] [PATCH v6 00/11] xen: xen-domid-restrict improvements
For reasons I still don't quite understand, this cover letter was not
sent to the whole CC list so I am doing that by hand now.
Ian Jackson writes ("[PATCH v6 00/11] xen: xen-domid-restrict improvements"):
> This series provides necessary support for running qemu as a Xen
> device model without power equivalent to root. In particular, it
> makes -xen-domid-restrict effective.
>
> I have taken into account all the comments from v5 (from October!) and
> there are also two new patches from Ross Lagerwall.
>
> m a [PATCH 01/11] xen: link against xentoolcore
> a [PATCH 02/11] xen: restrict: use xentoolcore_restrict_all
> r [PATCH 03/11] xen: defer call to xen_restrict until just before
> a [PATCH 04/11] xen: destroy_hvm_domain: Move reason into a variable
> ra [PATCH 05/11] xen: move xc_interface compatibility fallback further
> * r [PATCH 06/11] xen: destroy_hvm_domain: Try xendevicemodel_shutdown
> * r [PATCH 07/11] os-posix: Provide new -runas : facility
> m[PATCH 08/11] configure: do_compiler: Dump some extra info under bash
> +[PATCH 09/11] xen: Use newly added dmops for mapping VGA memory
> +[PATCH 10/11] xen: Expect xenstore write to fail when restricted
> +[PATCH 11/11] scripts/get_maintainer.pl: Print proper error message
>
> m = commit message (only) changed in v6 of the series
> * = patch changed in v6 of the series
> + = new patch
> r = reviewed (by someone other than me)
> a = acked
>
> Thanks for your attention.
>
> Regards,
> Ian.
Re: [Qemu-devel] [PATCH v6 00/11] xen: xen-domid-restrict improvements
Hi, This series failed build test on ppcle host. Please find the details below. Message-id: 1520530757-4477-1-git-send-email-ian.jack...@eu.citrix.com Subject: [Qemu-devel] [PATCH v6 00/11] xen: xen-domid-restrict improvements Type: series === TEST SCRIPT BEGIN === #!/bin/bash # Testing script will be invoked under the git checkout with # HEAD pointing to a commit that has the patches applied on top of "base" # branch set -e echo "=== ENV ===" env echo "=== PACKAGES ===" rpm -qa echo "=== TEST BEGIN ===" INSTALL=$PWD/install BUILD=$PWD/build mkdir -p $BUILD $INSTALL SRC=$PWD cd $BUILD $SRC/configure --prefix=$INSTALL make -j100 # XXX: we need reliable clean up # make check -j100 V=1 make install === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 Submodule 'capstone' (git://git.qemu.org/capstone.git) registered for path 'capstone' Submodule 'dtc' (git://git.qemu-project.org/dtc.git) registered for path 'dtc' Submodule 'roms/QemuMacDrivers' (git://git.qemu.org/QemuMacDrivers.git) registered for path 'roms/QemuMacDrivers' Submodule 'roms/SLOF' (git://git.qemu-project.org/SLOF.git) registered for path 'roms/SLOF' Submodule 'roms/ipxe' (git://git.qemu-project.org/ipxe.git) registered for path 'roms/ipxe' Submodule 'roms/openbios' (git://git.qemu-project.org/openbios.git) registered for path 'roms/openbios' Submodule 'roms/openhackware' (git://git.qemu-project.org/openhackware.git) registered for path 'roms/openhackware' Submodule 'roms/qemu-palcode' (git://github.com/rth7680/qemu-palcode.git) registered for path 'roms/qemu-palcode' Submodule 'roms/seabios' (git://git.qemu-project.org/seabios.git/) registered for path 'roms/seabios' Submodule 'roms/seabios-hppa' (git://github.com/hdeller/seabios-hppa.git) registered for path 'roms/seabios-hppa' Submodule 'roms/sgabios' (git://git.qemu-project.org/sgabios.git) registered for path 'roms/sgabios' Submodule 'roms/skiboot' (git://git.qemu.org/skiboot.git) registered for path 'roms/skiboot' Submodule 'roms/u-boot' (git://git.qemu-project.org/u-boot.git) registered for path 'roms/u-boot' Submodule 'roms/u-boot-sam460ex' (git://github.com/zbalaton/u-boot-sam460ex) registered for path 'roms/u-boot-sam460ex' Submodule 'roms/vgabios' (git://git.qemu-project.org/vgabios.git/) registered for path 'roms/vgabios' Submodule 'ui/keycodemapdb' (git://git.qemu.org/keycodemapdb.git) registered for path 'ui/keycodemapdb' Cloning into 'capstone'... Submodule path 'capstone': checked out '22ead3e0bfdb87516656453336160e0a37b066bf' Cloning into 'dtc'... Submodule path 'dtc': checked out 'e54388015af1fb4bf04d0bca99caba1074d9cc42' Cloning into 'roms/QemuMacDrivers'... Submodule path 'roms/QemuMacDrivers': checked out 'd4e7d7ac663fcb55f1b93575445fcbca372f17a7' Cloning into 'roms/SLOF'... Submodule path 'roms/SLOF': checked out 'fa981320a1e0968d6fc1b8de319723ff8212b337' Cloning into 'roms/ipxe'... Submodule path 'roms/ipxe': checked out '0600d3ae94f93efd10fc6b3c7420a9557a3a1670' Cloning into 'roms/openbios'... Submodule path 'roms/openbios': checked out '54d959d97fb331708767b2fd4a878efd2bbc41bb' Cloning into 'roms/openhackware'... Submodule path 'roms/openhackware': checked out 'c559da7c8eec5e45ef1f67978827af6f0b9546f5' Cloning into 'roms/qemu-palcode'... Submodule path 'roms/qemu-palcode': checked out 'f3c7e44c70254975df2a00af39701eafbac4d471' Cloning into 'roms/seabios'... Submodule path 'roms/seabios': checked out '63451fca13c75870e1703eb3e20584d91179aebc' Cloning into 'roms/seabios-hppa'... Submodule path 'roms/seabios-hppa': checked out '649e6202b8d65d46c69f542b1380f840fbe8ab13' Cloning into 'roms/sgabios'... Submodule path 'roms/sgabios': checked out 'cbaee52287e5f32373181cff50a00b6c4ac9015a' Cloning into 'roms/skiboot'... Submodule path 'roms/skiboot': checked out 'e0ee24c27a172bcf482f6f2bc905e6211c134bcc' Cloning into 'roms/u-boot'... Submodule path 'roms/u-boot': checked out 'd85ca029f257b53a96da6c2fb421e78a003a9943' Cloning into 'roms/u-boot-sam460ex'... Submodule path 'roms/u-boot-sam460ex': checked out '119aa277f74a4a2d3f7ab6c9471292308eba14e4' Cloning into 'roms/vgabios'... Submodule path 'roms/vgabios': checked out '19ea12c230ded95928ecaef0db47a82231c2e485' Cloning into 'ui/keycodemapdb'... Submodule path 'ui/keycodemapdb': checked out '6b3d716e2b6472eb7189d3220552280ef3d832ce' Switched to a new branch 'test' 3ca7aa0 scripts/get_maintainer.pl: Print proper error message for missing $file cd8d608 xen: Expect xenstore write to fail when restricted ba5 xen: Use newly added dmops for mapping VGA memory e0d142e configure: do_compiler: Dump some extra info under bash 40aee2f os-posix: Provide new -runas : facility e772cd9 xen: destroy_hvm_domain: Try xendevicemodel_shutdown dcba1d7 xen: move xc_interface compatibility fallback further up the file 214d2ff xen: destroy_hvm_domain: Move reason into a variable ba73bde xen: defer call to xen_restrict until just before os_setup_post b1eed69 xen: restrict: use xentoolcore_restric
[Qemu-devel] [PATCH 00/25] remove i386/pc dependency: generic SuperIO
Hi Paolo, Michael, Hervé and Yongbok. This series could be the 'part 2' of my previous "remove i386/pc dependency from non-PC world" I started around 2.9. The goal is to unify the Super I/O device pattern. In this rewrite I: - extract the common SuperIO code from pc87312.c - use it in few MIPS boards - as example, easily add a new SuperIO chipset (SMC37C669) to the DP264 machine. The SMC37C669 is very easily modeled and understandable in the "Add the SMC FDC37C669 Super I/O" patch. Once used by the DP264 machine, the machine direcly inherits of the parallel port and two floppy drives without any effort in the machine code (therefore, easier to qtest and maintain). The emphasis of the differences is show in the link [2]. Since RFC v2: - fixed missing .class_size of abstract class in "Add a Super I/O template" - fixed ptrdiff_t Werror=format string (patchew) - fixed incorrect/missing MAINTAINERS entries - only use "discarded-" in device name when no backend provided - added R-b tags (David Gibson) tested on: - Q35 - alpha DP264 [1], [2] - mips Malta - mips Fuloong (only monitor, no image to test) [3] - PReP (only monitor, no image to test) Paolo: I tested the series and think it is ready to go and shouldn't break upstream, but I'd like more testing for the Fuloong/PReP machines and eventually an Ack-by from Michael S. Tsirkin since his area is well touched by this series. diff between master and this series here replied to previous thread there: [1] http://lists.nongnu.org/archive/html/qemu-devel/2018-03/msg02510.html [2] http://lists.nongnu.org/archive/html/qemu-devel/2018-03/msg02516.html [3] http://lists.nongnu.org/archive/html/qemu-devel/2018-03/msg02515.html Since RFC v1: - complete rewrite, split out the PIIX devices for another series More devices are being converted but I'm running out of time for the soft freeze (mips_r4k, hppa_dino, and the PC ones). Regards, Phil. $ git backport-diff -u rfc_v2 [] : patches are identical [] : number of functional differences between upstream/downstream patch [down] : patch is downstream-only The flags [FC] indicate (F)unctional and (C)ontextual differences, respectively 001/25:[] [--] 'hw/isa: Move parallel_hds_isa_init() to hw/char/parallel-isa.c' 002/25:[] [--] 'hw/dma/i8257: Rename DMA_init() to i8257_dma_init()' 003/25:[] [--] 'hw/input/i8042: Extract declarations from i386/pc.h into input/i8042.h' 004/25:[down] 'MAINTAINERS: Fix the PC87312 include path' 005/25:[] [--] 'hw/isa/pc87312: Rename the device type as TYPE_PC87312_SUPERIO' 006/25:[] [--] 'hw/isa/pc87312: Use uint16_t for the ISA I/O base address' 007/25:[] [--] 'hw/isa/pc87312: Use 'unsigned int' for the irq value' 008/25:[0003] [FC] 'hw/isa/superio: Add a Super I/O template based on the PC87312 device' 009/25:[] [--] 'hw/isa/pc87312: Inherit from the abstract TYPE_ISA_SUPERIO' 010/25:[0006] [FC] 'hw/isa/superio: Factor out the parallel code from pc87312.c' 011/25:[0006] [FC] 'hw/isa/superio: Factor out the serial code from pc87312.c' 012/25:[] [--] 'hw/isa/superio: Factor out the floppy disc controller code from pc87312.c' 013/25:[] [--] 'hw/isa/superio: Add a keyboard/mouse controller (8042)' 014/25:[] [--] 'hw/isa/superio: Factor out the IDE code from pc87312.c' 015/25:[] [--] 'hw/mips/malta: Code movement' 016/25:[0001] [FC] 'hw/isa/superio: Factor out the FDC37M817 Super I/O from mips_malta.c' 017/25:[] [--] 'hw/mips/mips_fulong2e: Factor out vt82c686b_southbridge_init()' 018/25:[] [--] 'hw/isa/vt82c686: Rename vt82c686b_init() -> vt82c686b_isa_init()' 019/25:[] [--] 'hw/isa/vt82c686: Add the TYPE_VT82C686B_SUPERIO' 020/25:[down] 'MAINTAINERS: Add entries for the VT82C686B Super I/O' 021/25:[down] 'MAINTAINERS: Split the Alpha TCG/machine section' 022/25:[0001] [FC] 'hw/isa/superio: Add the SMC FDC37C669 Super I/O' 023/25:[] [--] 'hw/alpha/dp264: Add the ISA DMA controller' 024/25:[] [--] 'hw/alpha/dp264: Use the TYPE_SMC37C669_SUPERIO' 025/25:[] [--] 'hw/i386/pc: Factor out the superio code' Philippe Mathieu-Daudé (25): hw/isa: Move parallel_hds_isa_init() to hw/char/parallel-isa.c hw/dma/i8257: Rename DMA_init() to i8257_dma_init() hw/input/i8042: Extract declarations from i386/pc.h into input/i8042.h MAINTAINERS: Fix the PC87312 include path hw/isa/pc87312: Rename the device type as TYPE_PC87312_SUPERIO hw/isa/pc87312: Use uint16_t for the ISA I/O base address hw/isa/pc87312: Use 'unsigned int' for the irq value hw/isa/superio: Add a Super I/O template based on the PC87312 device hw/isa/pc87312: Inherit from the abstract TYPE_ISA_SUPERIO hw/isa/superio: Factor out the parallel code from pc87312.c hw/isa/superio: Factor out the serial code from pc87312.c hw/isa/superio: Factor out the floppy disc controller code from pc87312.c hw/isa/superio: Add a keyboard/mouse controller (8042) hw/isa/superio: Factor out the IDE code from pc87312.c hw/mips/malta: Code movement h
[Qemu-devel] [PATCH 03/25] hw/input/i8042: Extract declarations from i386/pc.h into input/i8042.h
Signed-off-by: Philippe Mathieu-Daudé
Acked-by: David Gibson (hw/ppc)
---
include/hw/i386/pc.h | 9 -
include/hw/input/i8042.h | 24
hw/alpha/dp264.c | 3 ++-
hw/i386/pc.c | 1 +
hw/i386/vmmouse.c| 1 +
hw/i386/vmport.c | 1 +
hw/input/pckbd.c | 2 +-
hw/mips/mips_fulong2e.c | 3 ++-
hw/mips/mips_jazz.c | 1 +
hw/mips/mips_malta.c | 3 ++-
hw/mips/mips_r4k.c | 3 ++-
hw/ppc/prep.c| 5 +++--
hw/sparc64/sun4u.c | 1 +
hw/unicore32/puv3.c | 1 +
MAINTAINERS | 1 +
15 files changed, 43 insertions(+), 16 deletions(-)
create mode 100644 include/hw/input/i8042.h
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index f1feb18c3c..1638618dfc 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -188,15 +188,6 @@ void vmport_register(unsigned char command, VMPortReadFunc
*func, void *opaque);
void vmmouse_get_data(uint32_t *data);
void vmmouse_set_data(const uint32_t *data);
-/* pckbd.c */
-#define I8042_A20_LINE "a20"
-
-void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
- MemoryRegion *region, ram_addr_t size,
- hwaddr mask);
-void i8042_isa_mouse_fake_event(void *opaque);
-void i8042_setup_a20_line(ISADevice *dev, qemu_irq a20_out);
-
/* pc.c */
extern int fd_bootchk;
diff --git a/include/hw/input/i8042.h b/include/hw/input/i8042.h
new file mode 100644
index 00..f6ff146364
--- /dev/null
+++ b/include/hw/input/i8042.h
@@ -0,0 +1,24 @@
+/*
+ * QEMU PS/2 Controller
+ *
+ * Copyright (c) 2003 Fabrice Bellard
+ *
+ * SPDX-License-Identifier: MIT
+ */
+#ifndef HW_INPUT_I8042_H
+#define HW_INPUT_I8042_H
+
+#include "hw/hw.h"
+#include "hw/isa/isa.h"
+
+#define TYPE_I8042 "i8042"
+
+#define I8042_A20_LINE "a20"
+
+void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
+ MemoryRegion *region, ram_addr_t size,
+ hwaddr mask);
+void i8042_isa_mouse_fake_event(void *opaque);
+void i8042_setup_a20_line(ISADevice *dev, qemu_irq a20_out);
+
+#endif /* HW_INPUT_I8042_H */
diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c
index 766373eec7..e13cb576fd 100644
--- a/hw/alpha/dp264.c
+++ b/hw/alpha/dp264.c
@@ -19,6 +19,7 @@
#include "hw/timer/mc146818rtc.h"
#include "hw/ide.h"
#include "hw/timer/i8254.h"
+#include "hw/input/i8042.h"
#include "hw/char/serial.h"
#include "qemu/cutils.h"
@@ -81,7 +82,7 @@ static void clipper_init(MachineState *machine)
mc146818_rtc_init(isa_bus, 1900, rtc_irq);
i8254_pit_init(isa_bus, 0x40, 0, NULL);
-isa_create_simple(isa_bus, "i8042");
+isa_create_simple(isa_bus, TYPE_I8042);
/* VGA setup. Don't bother loading the bios. */
pci_vga_init(pci_bus);
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index ec75b09a8f..cdcdfafe8e 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -43,6 +43,7 @@
#include "hw/timer/mc146818rtc.h"
#include "hw/dma/i8257.h"
#include "hw/timer/i8254.h"
+#include "hw/input/i8042.h"
#include "hw/audio/pcspk.h"
#include "hw/pci/msi.h"
#include "hw/sysbus.h"
diff --git a/hw/i386/vmmouse.c b/hw/i386/vmmouse.c
index 65ef55329e..5d2d278be4 100644
--- a/hw/i386/vmmouse.c
+++ b/hw/i386/vmmouse.c
@@ -25,6 +25,7 @@
#include "hw/hw.h"
#include "ui/console.h"
#include "hw/i386/pc.h"
+#include "hw/input/i8042.h"
#include "hw/qdev.h"
/* debug only vmmouse */
diff --git a/hw/i386/vmport.c b/hw/i386/vmport.c
index 116aa09819..3bf8cfe041 100644
--- a/hw/i386/vmport.c
+++ b/hw/i386/vmport.c
@@ -25,6 +25,7 @@
#include "hw/hw.h"
#include "hw/isa/isa.h"
#include "hw/i386/pc.h"
+#include "hw/input/i8042.h"
#include "sysemu/hw_accel.h"
#include "hw/qdev.h"
#include "qemu/log.h"
diff --git a/hw/input/pckbd.c b/hw/input/pckbd.c
index c479f827b6..f17f18e51b 100644
--- a/hw/input/pckbd.c
+++ b/hw/input/pckbd.c
@@ -26,6 +26,7 @@
#include "hw/isa/isa.h"
#include "hw/i386/pc.h"
#include "hw/input/ps2.h"
+#include "hw/input/i8042.h"
#include "sysemu/sysemu.h"
/* debug PC keyboard */
@@ -480,7 +481,6 @@ void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
qemu_register_reset(kbd_reset, s);
}
-#define TYPE_I8042 "i8042"
#define I8042(obj) OBJECT_CHECK(ISAKBDState, (obj), TYPE_I8042)
typedef struct ISAKBDState {
diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c
index 0545fcd899..9339e02120 100644
--- a/hw/mips/mips_fulong2e.c
+++ b/hw/mips/mips_fulong2e.c
@@ -44,6 +44,7 @@
#include "hw/isa/vt82c686.h"
#include "hw/timer/mc146818rtc.h"
#include "hw/timer/i8254.h"
+#include "hw/input/i8042.h"
#include "sysemu/blockdev.h"
#include "exec/address-spaces.h"
#include "sysemu/qtest.h"
@@ -364,7 +365,7 @@ static void mips_fulong2e_init(MachineState *machine)
i8257_dma_init(isa_bus, 0);
/* Super I/O */
-isa_create_simple(isa_bus, "i8042");
+isa_create_simple(isa_bus, TYPE_I8042);
mc146818_rtc_init(isa_bus, 2000, NULL);
diff --git a/hw/mips/mips_ja
[Qemu-devel] [PATCH 01/25] hw/isa: Move parallel_hds_isa_init() to hw/char/parallel-isa.c
Again... (after 07dc788054d7 and 9157eee1b1c0).
We now extract the ISA bus specific helpers.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/char/parallel.h | 14 ++
include/hw/i386/pc.h | 8
hw/char/parallel-isa.c | 36
hw/char/parallel.c | 2 +-
hw/i386/pc.c | 1 +
hw/isa/isa-bus.c | 26 --
hw/mips/mips_fulong2e.c| 1 +
hw/mips/mips_jazz.c| 1 +
hw/mips/mips_malta.c | 1 +
hw/sparc64/sun4u.c | 1 +
MAINTAINERS| 3 ++-
hw/char/Makefile.objs | 1 +
12 files changed, 59 insertions(+), 36 deletions(-)
create mode 100644 include/hw/char/parallel.h
create mode 100644 hw/char/parallel-isa.c
diff --git a/include/hw/char/parallel.h b/include/hw/char/parallel.h
new file mode 100644
index 00..d6dd62fb9f
--- /dev/null
+++ b/include/hw/char/parallel.h
@@ -0,0 +1,14 @@
+#ifndef HW_PARALLEL_H
+#define HW_PARALLEL_H
+
+#include "exec/memory.h"
+#include "hw/isa/isa.h"
+#include "chardev/char.h"
+
+void parallel_hds_isa_init(ISABus *bus, int n);
+
+bool parallel_mm_init(MemoryRegion *address_space,
+ hwaddr base, int it_shift, qemu_irq irq,
+ Chardev *chr);
+
+#endif
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index bb49165fe0..f1feb18c3c 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -151,14 +151,6 @@ struct PCMachineClass {
#define PC_MACHINE_CLASS(klass) \
OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE)
-/* parallel.c */
-
-void parallel_hds_isa_init(ISABus *bus, int n);
-
-bool parallel_mm_init(MemoryRegion *address_space,
- hwaddr base, int it_shift, qemu_irq irq,
- Chardev *chr);
-
/* i8259.c */
extern DeviceState *isa_pic;
diff --git a/hw/char/parallel-isa.c b/hw/char/parallel-isa.c
new file mode 100644
index 00..639e179585
--- /dev/null
+++ b/hw/char/parallel-isa.c
@@ -0,0 +1,36 @@
+/*
+ * QEMU Parallel PORT (ISA bus helpers)
+ *
+ * Copyright (c) 2003 Fabrice Bellard
+ *
+ * SPDX-License-Identifier: MIT
+ */
+#include "qemu/osdep.h"
+#include "sysemu/sysemu.h"
+#include "hw/isa/isa.h"
+#include "hw/char/parallel.h"
+
+static void parallel_init(ISABus *bus, int index, Chardev *chr)
+{
+DeviceState *dev;
+ISADevice *isadev;
+
+isadev = isa_create(bus, "isa-parallel");
+dev = DEVICE(isadev);
+qdev_prop_set_uint32(dev, "index", index);
+qdev_prop_set_chr(dev, "chardev", chr);
+qdev_init_nofail(dev);
+}
+
+void parallel_hds_isa_init(ISABus *bus, int n)
+{
+int i;
+
+assert(n <= MAX_PARALLEL_PORTS);
+
+for (i = 0; i < n; i++) {
+if (parallel_hds[i]) {
+parallel_init(bus, i, parallel_hds[i]);
+}
+}
+}
diff --git a/hw/char/parallel.c b/hw/char/parallel.c
index f79dc76543..1542d62201 100644
--- a/hw/char/parallel.c
+++ b/hw/char/parallel.c
@@ -28,7 +28,7 @@
#include "chardev/char-parallel.h"
#include "chardev/char-fe.h"
#include "hw/isa/isa.h"
-#include "hw/i386/pc.h"
+#include "hw/char/parallel.h"
#include "sysemu/sysemu.h"
//#define DEBUG_PARALLEL
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 35fcb6efdf..81364932d3 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -26,6 +26,7 @@
#include "hw/hw.h"
#include "hw/i386/pc.h"
#include "hw/char/serial.h"
+#include "hw/char/parallel.h"
#include "hw/i386/apic.h"
#include "hw/i386/topology.h"
#include "sysemu/cpus.h"
diff --git a/hw/isa/isa-bus.c b/hw/isa/isa-bus.c
index 0f2e426d02..63fa77effc 100644
--- a/hw/isa/isa-bus.c
+++ b/hw/isa/isa-bus.c
@@ -24,7 +24,6 @@
#include "hw/sysbus.h"
#include "sysemu/sysemu.h"
#include "hw/isa/isa.h"
-#include "hw/i386/pc.h"
static ISABus *isabus;
@@ -288,28 +287,3 @@ MemoryRegion *isa_address_space_io(ISADevice *dev)
}
type_init(isabus_register_types)
-
-static void parallel_init(ISABus *bus, int index, Chardev *chr)
-{
-DeviceState *dev;
-ISADevice *isadev;
-
-isadev = isa_create(bus, "isa-parallel");
-dev = DEVICE(isadev);
-qdev_prop_set_uint32(dev, "index", index);
-qdev_prop_set_chr(dev, "chardev", chr);
-qdev_init_nofail(dev);
-}
-
-void parallel_hds_isa_init(ISABus *bus, int n)
-{
-int i;
-
-assert(n <= MAX_PARALLEL_PORTS);
-
-for (i = 0; i < n; i++) {
-if (parallel_hds[i]) {
-parallel_init(bus, i, parallel_hds[i]);
-}
-}
-}
diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c
index f68c625666..dc77b55755 100644
--- a/hw/mips/mips_fulong2e.c
+++ b/hw/mips/mips_fulong2e.c
@@ -23,6 +23,7 @@
#include "hw/hw.h"
#include "hw/i386/pc.h"
#include "hw/char/serial.h"
+#include "hw/char/parallel.h"
#include "hw/block/fdc.h"
#include "net/net.h"
#include "hw/boards.h"
diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c
index b09871a814..b24305b7b4 100644
--- a/hw/mips/mips_jazz.c
+++ b/hw/mips/mips_jazz.c
@@ -28,6 +28,7 @@
[Qemu-devel] [PATCH 08/25] hw/isa/superio: Add a Super I/O template based on the PC87312 device
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/isa/superio.h | 44
hw/isa/isa-superio.c | 28
MAINTAINERS | 2 ++
hw/isa/Makefile.objs | 1 +
4 files changed, 75 insertions(+)
create mode 100644 include/hw/isa/superio.h
create mode 100644 hw/isa/isa-superio.c
diff --git a/include/hw/isa/superio.h b/include/hw/isa/superio.h
new file mode 100644
index 00..cff6ad6c08
--- /dev/null
+++ b/include/hw/isa/superio.h
@@ -0,0 +1,44 @@
+/*
+ * Generic ISA Super I/O
+ *
+ * Copyright (c) 2018 Philippe Mathieu-Daudé
+ *
+ * This code is licensed under the GNU GPLv2 and later.
+ * See the COPYING file in the top-level directory.
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+#ifndef HW_ISA_SUPERIO_H
+#define HW_ISA_SUPERIO_H
+
+#include "qemu-common.h"
+#include "sysemu/sysemu.h"
+#include "hw/isa/isa.h"
+
+#define TYPE_ISA_SUPERIO "isa-superio"
+#define ISA_SUPERIO(obj) \
+OBJECT_CHECK(ISASuperIODevice, (obj), TYPE_ISA_SUPERIO)
+#define ISA_SUPERIO_GET_CLASS(obj) \
+OBJECT_GET_CLASS(ISASuperIOClass, (obj), TYPE_ISA_SUPERIO)
+#define ISA_SUPERIO_CLASS(klass) \
+OBJECT_CLASS_CHECK(ISASuperIOClass, (klass), TYPE_ISA_SUPERIO)
+
+typedef struct ISASuperIODevice {
+ISADevice parent_obj;
+} ISASuperIODevice;
+
+typedef struct ISASuperIOFuncs {
+size_t count;
+bool (*is_enabled)(ISASuperIODevice *sio, uint8_t index);
+uint16_t (*get_iobase)(ISASuperIODevice *sio, uint8_t index);
+unsigned int (*get_irq)(ISASuperIODevice *sio, uint8_t index);
+unsigned int (*get_dma)(ISASuperIODevice *sio, uint8_t index);
+} ISASuperIOFuncs;
+
+typedef struct ISASuperIOClass {
+/*< private >*/
+ISADeviceClass parent_class;
+/*< public >*/
+DeviceRealize parent_realize;
+} ISASuperIOClass;
+
+#endif /* HW_ISA_SUPERIO_H */
diff --git a/hw/isa/isa-superio.c b/hw/isa/isa-superio.c
new file mode 100644
index 00..14ec16f831
--- /dev/null
+++ b/hw/isa/isa-superio.c
@@ -0,0 +1,28 @@
+/*
+ * Generic ISA Super I/O
+ *
+ * Copyright (c) 2010-2012 Herve Poussineau
+ * Copyright (c) 2011-2012 Andreas Färber
+ * Copyright (c) 2018 Philippe Mathieu-Daudé
+ *
+ * This code is licensed under the GNU GPLv2 and later.
+ * See the COPYING file in the top-level directory.
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+#include "qemu/osdep.h"
+#include "hw/isa/superio.h"
+#include "trace.h"
+
+static const TypeInfo isa_superio_type_info = {
+.name = TYPE_ISA_SUPERIO,
+.parent = TYPE_ISA_DEVICE,
+.abstract = true,
+.class_size = sizeof(ISASuperIOClass),
+};
+
+static void isa_superio_register_types(void)
+{
+type_register_static(&isa_superio_type_info);
+}
+
+type_init(isa_superio_register_types)
diff --git a/MAINTAINERS b/MAINTAINERS
index 212eaa836a..98a8918c20 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -922,6 +922,7 @@ F: hw/input/pckbd.c
F: hw/intc/apic*
F: hw/intc/ioapic*
F: hw/intc/i8259*
+F: hw/isa/isa-superio.c
F: hw/misc/debugexit.c
F: hw/misc/pc-testdev.c
F: hw/timer/hpet*
@@ -933,6 +934,7 @@ F: include/hw/char/parallel.h
F: include/hw/dma/i8257.h
F: include/hw/i2c/pm_smbus.h
F: include/hw/input/i8042.h
+F: include/hw/isa/superio.h
F: include/hw/timer/hpet.h
F: include/hw/timer/i8254*
F: include/hw/timer/mc146818rtc*
diff --git a/hw/isa/Makefile.objs b/hw/isa/Makefile.objs
index fb37c55cf2..cac655ba58 100644
--- a/hw/isa/Makefile.objs
+++ b/hw/isa/Makefile.objs
@@ -1,4 +1,5 @@
common-obj-$(CONFIG_ISA_BUS) += isa-bus.o
+common-obj-$(CONFIG_ISA_BUS) += isa-superio.o
common-obj-$(CONFIG_APM) += apm.o
common-obj-$(CONFIG_I82378) += i82378.o
common-obj-$(CONFIG_PC87312) += pc87312.o
--
2.16.2
[Qemu-devel] [PATCH 02/25] hw/dma/i8257: Rename DMA_init() to i8257_dma_init()
- Move the header from hw/isa/ to hw/dma/
- Remove the old i386/pc dependency
- use a bool type for the high_page_enable argument
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/{isa => dma}/i8257.h | 6 ++
include/hw/isa/isa.h| 2 --
hw/dma/i82374.c | 3 ++-
hw/dma/i8257.c | 4 ++--
hw/i386/pc.c| 3 ++-
hw/mips/mips_fulong2e.c | 3 ++-
hw/mips/mips_jazz.c | 3 ++-
hw/mips/mips_malta.c| 3 ++-
hw/sparc/sun4m.c| 4
hw/sparc64/sun4u.c | 4
MAINTAINERS | 2 +-
11 files changed, 19 insertions(+), 18 deletions(-)
rename include/hw/{isa => dma}/i8257.h (86%)
diff --git a/include/hw/isa/i8257.h b/include/hw/dma/i8257.h
similarity index 86%
rename from include/hw/isa/i8257.h
rename to include/hw/dma/i8257.h
index 88a2766a3f..2cab50bb6c 100644
--- a/include/hw/isa/i8257.h
+++ b/include/hw/dma/i8257.h
@@ -1,6 +1,10 @@
#ifndef HW_I8257_H
#define HW_I8257_H
+#include "hw/hw.h"
+#include "hw/isa/isa.h"
+#include "exec/ioport.h"
+
#define TYPE_I8257 "i8257"
typedef struct I8257Regs {
@@ -40,4 +44,6 @@ typedef struct I8257State {
PortioList portio_pageh;
} I8257State;
+void i8257_dma_init(ISABus *bus, bool high_page_enable);
+
#endif
diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h
index 95593408ef..b9dbab24b4 100644
--- a/include/hw/isa/isa.h
+++ b/include/hw/isa/isa.h
@@ -151,6 +151,4 @@ static inline ISABus *isa_bus_from_device(ISADevice *d)
return ISA_BUS(qdev_get_parent_bus(DEVICE(d)));
}
-/* i8257.c */
-void DMA_init(ISABus *bus, int high_page_enable);
#endif
diff --git a/hw/dma/i82374.c b/hw/dma/i82374.c
index 6c0f975df0..83c87d92e0 100644
--- a/hw/dma/i82374.c
+++ b/hw/dma/i82374.c
@@ -24,6 +24,7 @@
#include "qemu/osdep.h"
#include "hw/isa/isa.h"
+#include "hw/dma/i8257.h"
#define TYPE_I82374 "i82374"
#define I82374(obj) OBJECT_CHECK(I82374State, (obj), TYPE_I82374)
@@ -123,7 +124,7 @@ static void i82374_realize(DeviceState *dev, Error **errp)
portio_list_add(&s->port_list, isa_address_space_io(&s->parent_obj),
s->iobase);
-DMA_init(isa_bus_from_device(ISA_DEVICE(dev)), 1);
+i8257_dma_init(isa_bus_from_device(ISA_DEVICE(dev)), true);
memset(s->commands, 0, sizeof(s->commands));
}
diff --git a/hw/dma/i8257.c b/hw/dma/i8257.c
index bd23e893bf..52675e97c9 100644
--- a/hw/dma/i8257.c
+++ b/hw/dma/i8257.c
@@ -24,7 +24,7 @@
#include "qemu/osdep.h"
#include "hw/hw.h"
#include "hw/isa/isa.h"
-#include "hw/isa/i8257.h"
+#include "hw/dma/i8257.h"
#include "qemu/main-loop.h"
#include "trace.h"
@@ -622,7 +622,7 @@ static void i8257_register_types(void)
type_init(i8257_register_types)
-void DMA_init(ISABus *bus, int high_page_enable)
+void i8257_dma_init(ISABus *bus, bool high_page_enable)
{
ISADevice *isa1, *isa2;
DeviceState *d;
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 81364932d3..ec75b09a8f 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -41,6 +41,7 @@
#include "elf.h"
#include "multiboot.h"
#include "hw/timer/mc146818rtc.h"
+#include "hw/dma/i8257.h"
#include "hw/timer/i8254.h"
#include "hw/audio/pcspk.h"
#include "hw/pci/msi.h"
@@ -1609,7 +1610,7 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
port92_init(port92, a20_line[1]);
g_free(a20_line);
-DMA_init(isa_bus, 0);
+i8257_dma_init(isa_bus, 0);
for(i = 0; i < MAX_FD; i++) {
fd[i] = drive_get(IF_FLOPPY, 0, i);
diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c
index dc77b55755..0545fcd899 100644
--- a/hw/mips/mips_fulong2e.c
+++ b/hw/mips/mips_fulong2e.c
@@ -22,6 +22,7 @@
#include "qapi/error.h"
#include "hw/hw.h"
#include "hw/i386/pc.h"
+#include "hw/dma/i8257.h"
#include "hw/char/serial.h"
#include "hw/char/parallel.h"
#include "hw/block/fdc.h"
@@ -360,7 +361,7 @@ static void mips_fulong2e_init(MachineState *machine)
/* init other devices */
pit = i8254_pit_init(isa_bus, 0x40, 0, NULL);
-DMA_init(isa_bus, 0);
+i8257_dma_init(isa_bus, 0);
/* Super I/O */
isa_create_simple(isa_bus, "i8042");
diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c
index b24305b7b4..827ffdcd4a 100644
--- a/hw/mips/mips_jazz.c
+++ b/hw/mips/mips_jazz.c
@@ -27,6 +27,7 @@
#include "hw/mips/mips.h"
#include "hw/mips/cpudevs.h"
#include "hw/i386/pc.h"
+#include "hw/dma/i8257.h"
#include "hw/char/serial.h"
#include "hw/char/parallel.h"
#include "hw/isa/isa.h"
@@ -220,7 +221,7 @@ static void mips_jazz_init(MachineState *machine,
/* ISA devices */
i8259 = i8259_init(isa_bus, env->irq[4]);
isa_bus_irqs(isa_bus, i8259);
-DMA_init(isa_bus, 0);
+i8257_dma_init(isa_bus, 0);
pit = i8254_pit_init(isa_bus, 0x40, 0, NULL);
pcspk_init(isa_bus, pit);
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index c74882c7e9..9cb86c432e 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips
[Qemu-devel] [PATCH 06/25] hw/isa/pc87312: Use uint16_t for the ISA I/O base address
This matches the isa_register_ioport() prototype.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/isa/pc87312.h | 2 +-
hw/isa/pc87312.c | 14 +++---
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/include/hw/isa/pc87312.h b/include/hw/isa/pc87312.h
index 710eb1c807..b65b219a8a 100644
--- a/include/hw/isa/pc87312.h
+++ b/include/hw/isa/pc87312.h
@@ -34,7 +34,7 @@
typedef struct PC87312State {
ISADevice dev;
-uint32_t iobase;
+uint16_t iobase;
uint8_t config; /* initial configuration */
struct {
diff --git a/hw/isa/pc87312.c b/hw/isa/pc87312.c
index e9edbc6c50..105c23e680 100644
--- a/hw/isa/pc87312.c
+++ b/hw/isa/pc87312.c
@@ -69,9 +69,9 @@ static inline bool is_parallel_enabled(PC87312State *s)
return s->regs[REG_FER] & FER_PARALLEL_EN;
}
-static const uint32_t parallel_base[] = { 0x378, 0x3bc, 0x278, 0x00 };
+static const uint16_t parallel_base[] = { 0x378, 0x3bc, 0x278, 0x00 };
-static inline uint32_t get_parallel_iobase(PC87312State *s)
+static inline uint16_t get_parallel_iobase(PC87312State *s)
{
return parallel_base[s->regs[REG_FAR] & FAR_PARALLEL_ADDR];
}
@@ -92,12 +92,12 @@ static inline uint32_t get_parallel_irq(PC87312State *s)
/* UARTs */
-static const uint32_t uart_base[2][4] = {
+static const uint16_t uart_base[2][4] = {
{ 0x3e8, 0x338, 0x2e8, 0x220 },
{ 0x2e8, 0x238, 0x2e0, 0x228 }
};
-static inline uint32_t get_uart_iobase(PC87312State *s, int i)
+static inline uint16_t get_uart_iobase(PC87312State *s, int i)
{
int idx;
idx = (s->regs[REG_FAR] >> (2 * i + 2)) & 0x3;
@@ -130,7 +130,7 @@ static inline bool is_fdc_enabled(PC87312State *s)
return s->regs[REG_FER] & FER_FDC_EN;
}
-static inline uint32_t get_fdc_iobase(PC87312State *s)
+static inline uint16_t get_fdc_iobase(PC87312State *s)
{
return (s->regs[REG_FER] & FER_FDC_ADDR) ? 0x370 : 0x3f0;
}
@@ -143,7 +143,7 @@ static inline bool is_ide_enabled(PC87312State *s)
return s->regs[REG_FER] & FER_IDE_EN;
}
-static inline uint32_t get_ide_iobase(PC87312State *s)
+static inline uint16_t get_ide_iobase(PC87312State *s)
{
return (s->regs[REG_FER] & FER_IDE_ADDR) ? 0x170 : 0x1f0;
}
@@ -373,7 +373,7 @@ static const VMStateDescription vmstate_pc87312 = {
};
static Property pc87312_properties[] = {
-DEFINE_PROP_UINT32("iobase", PC87312State, iobase, 0x398),
+DEFINE_PROP_UINT16("iobase", PC87312State, iobase, 0x398),
DEFINE_PROP_UINT8("config", PC87312State, config, 1),
DEFINE_PROP_END_OF_LIST()
};
--
2.16.2
[Qemu-devel] [PATCH 04/25] MAINTAINERS: Fix the PC87312 include path
Missed while moving it in 0d09e41a51aa. Signed-off-by: Philippe Mathieu-Daudé --- MAINTAINERS | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 6622efc1da..212eaa836a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -765,9 +765,10 @@ F: hw/ppc/prep_systemio.c F: hw/ppc/rs6000_mc.c F: hw/pci-host/prep.[hc] F: hw/isa/i82378.c -F: hw/isa/pc87312.[hc] +F: hw/isa/pc87312.c F: hw/dma/i82374.c F: hw/timer/m48t59-isa.c +F: include/hw/isa/pc87312.h F: include/hw/timer/m48t59.h F: pc-bios/ppc_rom.bin -- 2.16.2
[Qemu-devel] [PATCH 13/25] hw/isa/superio: Add a keyboard/mouse controller (8042)
Since the PC87312 inherits this abstract model, we remove the I8042
instance in the PREP machine.
Signed-off-by: Philippe Mathieu-Daudé
Acked-by: David Gibson
---
include/hw/isa/superio.h | 1 +
hw/isa/isa-superio.c | 3 +++
hw/ppc/prep.c| 1 -
3 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/include/hw/isa/superio.h b/include/hw/isa/superio.h
index e8007b9eee..2fc33bf3d3 100644
--- a/include/hw/isa/superio.h
+++ b/include/hw/isa/superio.h
@@ -30,6 +30,7 @@ typedef struct ISASuperIODevice {
ISADevice *parallel[MAX_PARALLEL_PORTS];
ISADevice *serial[MAX_SERIAL_PORTS];
ISADevice *floppy;
+ISADevice *kbc;
} ISASuperIODevice;
typedef struct ISASuperIOFuncs {
diff --git a/hw/isa/isa-superio.c b/hw/isa/isa-superio.c
index 4b5e280b38..041b47bdbf 100644
--- a/hw/isa/isa-superio.c
+++ b/hw/isa/isa-superio.c
@@ -17,6 +17,7 @@
#include "sysemu/blockdev.h"
#include "chardev/char.h"
#include "hw/isa/superio.h"
+#include "hw/input/i8042.h"
#include "hw/char/serial.h"
#include "trace.h"
@@ -143,6 +144,8 @@ static void isa_superio_realize(DeviceState *dev, Error
**errp)
k->floppy.get_irq(sio, 0) : -1);
}
+/* Keyboard, mouse */
+sio->kbc = isa_create_simple(bus, TYPE_I8042);
}
static void isa_superio_class_init(ObjectClass *oc, void *data)
diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
index 610ec7ec32..96d319b87c 100644
--- a/hw/ppc/prep.c
+++ b/hw/ppc/prep.c
@@ -642,7 +642,6 @@ static void ppc_prep_init(MachineState *machine)
hd[2 * i],
hd[2 * i + 1]);
}
-isa_create_simple(isa_bus, TYPE_I8042);
cpu = POWERPC_CPU(first_cpu);
sysctrl->reset_irq = cpu->env.irq_inputs[PPC6xx_INPUT_HRESET];
--
2.16.2
[Qemu-devel] [PATCH 07/25] hw/isa/pc87312: Use 'unsigned int' for the irq value
Signed-off-by: Philippe Mathieu-Daudé
---
hw/isa/pc87312.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/isa/pc87312.c b/hw/isa/pc87312.c
index 105c23e680..fda91fed21 100644
--- a/hw/isa/pc87312.c
+++ b/hw/isa/pc87312.c
@@ -76,9 +76,9 @@ static inline uint16_t get_parallel_iobase(PC87312State *s)
return parallel_base[s->regs[REG_FAR] & FAR_PARALLEL_ADDR];
}
-static const uint32_t parallel_irq[] = { 5, 7, 5, 0 };
+static const unsigned int parallel_irq[] = { 5, 7, 5, 0 };
-static inline uint32_t get_parallel_irq(PC87312State *s)
+static inline unsigned int get_parallel_irq(PC87312State *s)
{
int idx;
idx = (s->regs[REG_FAR] & FAR_PARALLEL_ADDR);
@@ -110,7 +110,7 @@ static inline uint16_t get_uart_iobase(PC87312State *s, int
i)
}
}
-static inline uint32_t get_uart_irq(PC87312State *s, int i)
+static inline unsigned int get_uart_irq(PC87312State *s, int i)
{
int idx;
idx = (s->regs[REG_FAR] >> (2 * i + 2)) & 0x3;
--
2.16.2
[Qemu-devel] [PATCH 05/25] hw/isa/pc87312: Rename the device type as TYPE_PC87312_SUPERIO
Signed-off-by: Philippe Mathieu-Daudé
Acked-by: David Gibson (hw/ppc)
---
include/hw/isa/pc87312.h | 4 ++--
hw/isa/pc87312.c | 2 +-
hw/ppc/prep.c| 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/include/hw/isa/pc87312.h b/include/hw/isa/pc87312.h
index bf74470d40..710eb1c807 100644
--- a/include/hw/isa/pc87312.h
+++ b/include/hw/isa/pc87312.h
@@ -28,8 +28,8 @@
#include "hw/isa/isa.h"
-#define TYPE_PC87312 "pc87312"
-#define PC87312(obj) OBJECT_CHECK(PC87312State, (obj), TYPE_PC87312)
+#define TYPE_PC87312_SUPERIO "pc87312"
+#define PC87312(obj) OBJECT_CHECK(PC87312State, (obj), TYPE_PC87312_SUPERIO)
typedef struct PC87312State {
ISADevice dev;
diff --git a/hw/isa/pc87312.c b/hw/isa/pc87312.c
index 48b29e3c3c..e9edbc6c50 100644
--- a/hw/isa/pc87312.c
+++ b/hw/isa/pc87312.c
@@ -391,7 +391,7 @@ static void pc87312_class_init(ObjectClass *klass, void
*data)
}
static const TypeInfo pc87312_type_info = {
-.name = TYPE_PC87312,
+.name = TYPE_PC87312_SUPERIO,
.parent= TYPE_ISA_DEVICE,
.instance_size = sizeof(PC87312State),
.instance_init = pc87312_initfn,
diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
index ae724b0613..610ec7ec32 100644
--- a/hw/ppc/prep.c
+++ b/hw/ppc/prep.c
@@ -613,7 +613,7 @@ static void ppc_prep_init(MachineState *machine)
isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(pci), "isa.0"));
/* Super I/O (parallel + serial ports) */
-isa = isa_create(isa_bus, TYPE_PC87312);
+isa = isa_create(isa_bus, TYPE_PC87312_SUPERIO);
dev = DEVICE(isa);
qdev_prop_set_uint8(dev, "config", 13); /* fdc, ser0, ser1, par0 */
qdev_init_nofail(dev);
--
2.16.2
[Qemu-devel] [PATCH 09/25] hw/isa/pc87312: Inherit from the abstract TYPE_ISA_SUPERIO
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/isa/pc87312.h | 6 --
hw/isa/pc87312.c | 11 ++-
2 files changed, 14 insertions(+), 3 deletions(-)
diff --git a/include/hw/isa/pc87312.h b/include/hw/isa/pc87312.h
index b65b219a8a..f3761d6fe1 100644
--- a/include/hw/isa/pc87312.h
+++ b/include/hw/isa/pc87312.h
@@ -25,14 +25,16 @@
#ifndef QEMU_PC87312_H
#define QEMU_PC87312_H
-#include "hw/isa/isa.h"
+#include "hw/isa/superio.h"
#define TYPE_PC87312_SUPERIO "pc87312"
#define PC87312(obj) OBJECT_CHECK(PC87312State, (obj), TYPE_PC87312_SUPERIO)
typedef struct PC87312State {
-ISADevice dev;
+/*< private >*/
+ISASuperIODevice parent_dev;
+/*< public >*/
uint16_t iobase;
uint8_t config; /* initial configuration */
diff --git a/hw/isa/pc87312.c b/hw/isa/pc87312.c
index fda91fed21..6b8100ff56 100644
--- a/hw/isa/pc87312.c
+++ b/hw/isa/pc87312.c
@@ -270,6 +270,7 @@ static void pc87312_realize(DeviceState *dev, Error **errp)
ISABus *bus;
Chardev *chr;
DriveInfo *drive;
+Error *local_err = NULL;
char name[5];
int i;
@@ -279,6 +280,12 @@ static void pc87312_realize(DeviceState *dev, Error **errp)
isa_register_ioport(isa, &s->io, s->iobase);
pc87312_hard_reset(s);
+ISA_SUPERIO_GET_CLASS(dev)->parent_realize(dev, &local_err);
+if (local_err) {
+error_propagate(errp, local_err);
+return;
+}
+
if (is_parallel_enabled(s)) {
/* FIXME use a qdev chardev prop instead of parallel_hds[] */
chr = parallel_hds[0];
@@ -381,7 +388,9 @@ static Property pc87312_properties[] = {
static void pc87312_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass);
+sc->parent_realize = dc->realize;
dc->realize = pc87312_realize;
dc->reset = pc87312_reset;
dc->vmsd = &vmstate_pc87312;
@@ -392,7 +401,7 @@ static void pc87312_class_init(ObjectClass *klass, void
*data)
static const TypeInfo pc87312_type_info = {
.name = TYPE_PC87312_SUPERIO,
-.parent= TYPE_ISA_DEVICE,
+.parent= TYPE_ISA_SUPERIO,
.instance_size = sizeof(PC87312State),
.instance_init = pc87312_initfn,
.class_init= pc87312_class_init,
--
2.16.2
[Qemu-devel] [PATCH 16/25] hw/isa/superio: Factor out the FDC37M817 Super I/O from mips_malta.c
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/isa/superio.h | 2 ++
hw/isa/isa-superio.c | 19 +++
hw/mips/mips_malta.c | 35 ++-
3 files changed, 31 insertions(+), 25 deletions(-)
diff --git a/include/hw/isa/superio.h b/include/hw/isa/superio.h
index 3dd5448f8c..b47aac3cf8 100644
--- a/include/hw/isa/superio.h
+++ b/include/hw/isa/superio.h
@@ -54,4 +54,6 @@ typedef struct ISASuperIOClass {
ISASuperIOFuncs ide;
} ISASuperIOClass;
+#define TYPE_FDC37M81X_SUPERIO "fdc37m81x-superio"
+
#endif /* HW_ISA_SUPERIO_H */
diff --git a/hw/isa/isa-superio.c b/hw/isa/isa-superio.c
index f98711beff..b95608a003 100644
--- a/hw/isa/isa-superio.c
+++ b/hw/isa/isa-superio.c
@@ -187,9 +187,28 @@ static const TypeInfo isa_superio_type_info = {
.class_init = isa_superio_class_init,
};
+/* SMS FDC37M817 Super I/O */
+static void fdc37m81x_class_init(ObjectClass *klass, void *data)
+{
+ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass);
+
+sc->serial.count = 2; /* NS16C550A */
+sc->parallel.count = 1;
+sc->floppy.count = 1; /* SMSC 82077AA Compatible */
+sc->ide.count = 0;
+}
+
+static const TypeInfo fdc37m81x_type_info = {
+.name = TYPE_FDC37M81X_SUPERIO,
+.parent= TYPE_ISA_SUPERIO,
+.instance_size = sizeof(ISASuperIODevice),
+.class_init= fdc37m81x_class_init,
+};
+
static void isa_superio_register_types(void)
{
type_register_static(&isa_superio_type_info);
+type_register_static(&fdc37m81x_type_info);
}
type_init(isa_superio_register_types)
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index 9e0724ca5a..f6513a4fd5 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -27,14 +27,12 @@
#include "cpu.h"
#include "hw/hw.h"
#include "hw/i386/pc.h"
+#include "hw/isa/superio.h"
#include "hw/dma/i8257.h"
#include "hw/char/serial.h"
-#include "hw/char/parallel.h"
-#include "hw/block/fdc.h"
#include "net/net.h"
#include "hw/boards.h"
#include "hw/i2c/smbus.h"
-#include "sysemu/block-backend.h"
#include "hw/block/flash.h"
#include "hw/mips/mips.h"
#include "hw/mips/cpudevs.h"
@@ -47,7 +45,6 @@
#include "hw/loader.h"
#include "elf.h"
#include "hw/timer/mc146818rtc.h"
-#include "hw/input/i8042.h"
#include "hw/timer/i8254.h"
#include "sysemu/blockdev.h"
#include "exec/address-spaces.h"
@@ -1005,10 +1002,8 @@ void mips_malta_init(MachineState *machine)
qemu_irq cbus_irq, i8259_irq;
int piix4_devfn;
I2CBus *smbus;
-int i;
DriveInfo *dinfo;
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
-DriveInfo *fd[MAX_FD];
int fl_idx = 0;
int fl_sectors = bios_size >> 16;
int be;
@@ -1023,15 +1018,6 @@ void mips_malta_init(MachineState *machine)
qdev_init_nofail(dev);
-/* Make sure the first 3 serial ports are associated with a device. */
-for(i = 0; i < 3; i++) {
-if (!serial_hds[i]) {
-char label[32];
-snprintf(label, sizeof(label), "serial%d", i);
-serial_hds[i] = qemu_chr_new(label, "null");
-}
-}
-
/* create CPU */
mips_create_cpu(s, machine->cpu_type, &cbus_irq, &i8259_irq);
@@ -1067,7 +1053,14 @@ void mips_malta_init(MachineState *machine)
#else
be = 0;
#endif
+
/* FPGA */
+
+/* Make sure the second serial port is associated with a device. */
+if (!serial_hds[2]) {
+serial_hds[2] = qemu_chr_new("fpga-uart", "null");
+}
+
/* The CBUS UART is attached to the MIPS CPU INT2 pin, ie interrupt 4 */
malta_fpga_init(system_memory, FPGA_ADDRESS, cbus_irq, serial_hds[2]);
@@ -1214,16 +1207,8 @@ void mips_malta_init(MachineState *machine)
smbus_eeprom_init(smbus, 8, smbus_eeprom_buf, smbus_eeprom_size);
g_free(smbus_eeprom_buf);
-/* Super I/O */
-isa_create_simple(isa_bus, TYPE_I8042);
-
-serial_hds_isa_init(isa_bus, 0, 2);
-parallel_hds_isa_init(isa_bus, 1);
-
-for(i = 0; i < MAX_FD; i++) {
-fd[i] = drive_get(IF_FLOPPY, 0, i);
-}
-fdctrl_init_isa(isa_bus, fd);
+/* Super I/O: SMS FDC37M817 */
+isa_create_simple(isa_bus, TYPE_FDC37M81X_SUPERIO);
/* Network card */
network_init(pci_bus);
--
2.16.2
[Qemu-devel] [PATCH 14/25] hw/isa/superio: Factor out the IDE code from pc87312.c
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/isa/superio.h | 2 ++
hw/isa/isa-superio.c | 22 ++
hw/isa/pc87312.c | 36
hw/isa/trace-events | 2 +-
4 files changed, 45 insertions(+), 17 deletions(-)
diff --git a/include/hw/isa/superio.h b/include/hw/isa/superio.h
index 2fc33bf3d3..3dd5448f8c 100644
--- a/include/hw/isa/superio.h
+++ b/include/hw/isa/superio.h
@@ -31,6 +31,7 @@ typedef struct ISASuperIODevice {
ISADevice *serial[MAX_SERIAL_PORTS];
ISADevice *floppy;
ISADevice *kbc;
+ISADevice *ide;
} ISASuperIODevice;
typedef struct ISASuperIOFuncs {
@@ -50,6 +51,7 @@ typedef struct ISASuperIOClass {
ISASuperIOFuncs parallel;
ISASuperIOFuncs serial;
ISASuperIOFuncs floppy;
+ISASuperIOFuncs ide;
} ISASuperIOClass;
#endif /* HW_ISA_SUPERIO_H */
diff --git a/hw/isa/isa-superio.c b/hw/isa/isa-superio.c
index 041b47bdbf..f98711beff 100644
--- a/hw/isa/isa-superio.c
+++ b/hw/isa/isa-superio.c
@@ -146,6 +146,28 @@ static void isa_superio_realize(DeviceState *dev, Error
**errp)
/* Keyboard, mouse */
sio->kbc = isa_create_simple(bus, TYPE_I8042);
+
+/* IDE */
+if (k->ide.count && (!k->ide.is_enabled || k->ide.is_enabled(sio, 0))) {
+isa = isa_create(bus, "isa-ide");
+d = DEVICE(isa);
+if (k->ide.get_iobase) {
+qdev_prop_set_uint32(d, "iobase", k->ide.get_iobase(sio, 0));
+}
+if (k->ide.get_iobase) {
+qdev_prop_set_uint32(d, "iobase2", k->ide.get_iobase(sio, 1));
+}
+if (k->ide.get_irq) {
+qdev_prop_set_uint32(d, "irq", k->ide.get_irq(sio, 0));
+}
+qdev_init_nofail(d);
+sio->ide = isa;
+trace_superio_create_ide(0,
+ k->ide.get_iobase ?
+ k->ide.get_iobase(sio, 0) : -1,
+ k->ide.get_irq ?
+ k->ide.get_irq(sio, 0) : -1);
+}
}
static void isa_superio_class_init(ObjectClass *oc, void *data)
diff --git a/hw/isa/pc87312.c b/hw/isa/pc87312.c
index a1845a91c3..5cf64505fe 100644
--- a/hw/isa/pc87312.c
+++ b/hw/isa/pc87312.c
@@ -150,16 +150,28 @@ static unsigned int get_fdc_irq(ISASuperIODevice *sio,
uint8_t index)
/* IDE controller */
-static inline bool is_ide_enabled(PC87312State *s)
+static bool is_ide_enabled(ISASuperIODevice *sio, uint8_t index)
{
+PC87312State *s = PC87312(sio);
+
return s->regs[REG_FER] & FER_IDE_EN;
}
-static inline uint16_t get_ide_iobase(PC87312State *s)
+static uint16_t get_ide_iobase(ISASuperIODevice *sio, uint8_t index)
{
+PC87312State *s = PC87312(sio);
+
+if (index == 1) {
+return get_ide_iobase(sio, 0) + 0x206;
+}
return (s->regs[REG_FER] & FER_IDE_ADDR) ? 0x170 : 0x1f0;
}
+static unsigned int get_ide_irq(ISASuperIODevice *sio, uint8_t index)
+{
+assert(index == 0);
+return 14;
+}
static void reconfigure_devices(PC87312State *s)
{
@@ -277,14 +289,11 @@ static void pc87312_reset(DeviceState *d)
static void pc87312_realize(DeviceState *dev, Error **errp)
{
PC87312State *s;
-DeviceState *d;
ISADevice *isa;
-ISABus *bus;
Error *local_err = NULL;
s = PC87312(dev);
isa = ISA_DEVICE(dev);
-bus = isa_bus_from_device(isa);
isa_register_ioport(isa, &s->io, s->iobase);
pc87312_hard_reset(s);
@@ -293,17 +302,6 @@ static void pc87312_realize(DeviceState *dev, Error **errp)
error_propagate(errp, local_err);
return;
}
-
-if (is_ide_enabled(s)) {
-isa = isa_create(bus, "isa-ide");
-d = DEVICE(isa);
-qdev_prop_set_uint32(d, "iobase", get_ide_iobase(s));
-qdev_prop_set_uint32(d, "iobase2", get_ide_iobase(s) + 0x206);
-qdev_prop_set_uint32(d, "irq", 14);
-qdev_init_nofail(d);
-s->ide.dev = isa;
-trace_pc87312_info_ide(get_ide_iobase(s));
-}
}
static void pc87312_initfn(Object *obj)
@@ -361,6 +359,12 @@ static void pc87312_class_init(ObjectClass *klass, void
*data)
.get_iobase = get_fdc_iobase,
.get_irq= get_fdc_irq,
};
+sc->ide = (ISASuperIOFuncs){
+.count = 1,
+.is_enabled = is_ide_enabled,
+.get_iobase = get_ide_iobase,
+.get_irq= get_ide_irq,
+};
}
static const TypeInfo pc87312_type_info = {
diff --git a/hw/isa/trace-events b/hw/isa/trace-events
index 8d9900882f..80ac6175d6 100644
--- a/hw/isa/trace-events
+++ b/hw/isa/trace-events
@@ -4,8 +4,8 @@
superio_create_parallel(int id, uint16_t base, unsigned int irq) "id=%d, base
0x%03x, irq %u"
superio_create_serial(int id, uint16_t base, unsigned int irq) "id=%d, base
0x%03x, irq %u"
superio_create_floppy(int id, uint16_t base, unsigned int irq) "id=%d, base
0x%03x, irq %u"
+superio_create_ide(int id, uint16_t base, unsigned int irq) "id=%d, base
0x%03x, irq %u"
#
[Qemu-devel] [PATCH 18/25] hw/isa/vt82c686: Rename vt82c686b_init() -> vt82c686b_isa_init()
This function only initialize the ISA bus.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/isa/vt82c686.h | 2 +-
hw/isa/vt82c686.c | 2 +-
hw/mips/mips_fulong2e.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/hw/isa/vt82c686.h b/include/hw/isa/vt82c686.h
index 471b5e9e53..db97c8ed7a 100644
--- a/include/hw/isa/vt82c686.h
+++ b/include/hw/isa/vt82c686.h
@@ -2,7 +2,7 @@
#define HW_VT82C686_H
/* vt82c686.c */
-ISABus *vt82c686b_init(PCIBus * bus, int devfn);
+ISABus *vt82c686b_isa_init(PCIBus * bus, int devfn);
void vt82c686b_ac97_init(PCIBus *bus, int devfn);
void vt82c686b_mc97_init(PCIBus *bus, int devfn);
I2CBus *vt82c686b_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
index 070cc1889f..7eaf3c7e8f 100644
--- a/hw/isa/vt82c686.c
+++ b/hw/isa/vt82c686.c
@@ -478,7 +478,7 @@ static void vt82c686b_realize(PCIDevice *d, Error **errp)
qemu_register_reset(vt82c686b_reset, d);
}
-ISABus *vt82c686b_init(PCIBus *bus, int devfn)
+ISABus *vt82c686b_isa_init(PCIBus *bus, int devfn)
{
PCIDevice *d;
diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c
index ca1f76a724..9ebc225d3b 100644
--- a/hw/mips/mips_fulong2e.c
+++ b/hw/mips/mips_fulong2e.c
@@ -237,7 +237,7 @@ static void vt82c686b_southbridge_init(PCIBus *pci_bus, int
slot, qemu_irq intc,
ISABus *isa_bus;
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
-isa_bus = vt82c686b_init(pci_bus, PCI_DEVFN(slot, 0));
+isa_bus = vt82c686b_isa_init(pci_bus, PCI_DEVFN(slot, 0));
if (!isa_bus) {
fprintf(stderr, "vt82c686b_init error\n");
exit(1);
--
2.16.2
[Qemu-devel] [PATCH 11/25] hw/isa/superio: Factor out the serial code from pc87312.c
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/isa/pc87312.h | 4
include/hw/isa/superio.h | 2 ++
hw/isa/isa-superio.c | 41 +
hw/isa/pc87312.c | 43 ---
hw/isa/trace-events | 2 +-
5 files changed, 56 insertions(+), 36 deletions(-)
diff --git a/include/hw/isa/pc87312.h b/include/hw/isa/pc87312.h
index bcc4578479..1480615a2c 100644
--- a/include/hw/isa/pc87312.h
+++ b/include/hw/isa/pc87312.h
@@ -39,10 +39,6 @@ typedef struct PC87312State {
uint16_t iobase;
uint8_t config; /* initial configuration */
-struct {
-ISADevice *dev;
-} uart[2];
-
struct {
ISADevice *dev;
} fdc;
diff --git a/include/hw/isa/superio.h b/include/hw/isa/superio.h
index e9879cfde1..0b516721c3 100644
--- a/include/hw/isa/superio.h
+++ b/include/hw/isa/superio.h
@@ -28,6 +28,7 @@ typedef struct ISASuperIODevice {
/*< public >*/
ISADevice *parallel[MAX_PARALLEL_PORTS];
+ISADevice *serial[MAX_SERIAL_PORTS];
} ISASuperIODevice;
typedef struct ISASuperIOFuncs {
@@ -45,6 +46,7 @@ typedef struct ISASuperIOClass {
DeviceRealize parent_realize;
ISASuperIOFuncs parallel;
+ISASuperIOFuncs serial;
} ISASuperIOClass;
#endif /* HW_ISA_SUPERIO_H */
diff --git a/hw/isa/isa-superio.c b/hw/isa/isa-superio.c
index eb263fcc3a..6962421aad 100644
--- a/hw/isa/isa-superio.c
+++ b/hw/isa/isa-superio.c
@@ -14,6 +14,7 @@
#include "sysemu/sysemu.h"
#include "chardev/char.h"
#include "hw/isa/superio.h"
+#include "hw/char/serial.h"
#include "trace.h"
static void isa_superio_realize(DeviceState *dev, Error **errp)
@@ -66,6 +67,46 @@ static void isa_superio_realize(DeviceState *dev, Error
**errp)
g_free(name);
}
}
+
+/* Serial */
+for (i = 0; i < k->serial.count; i++) {
+if (i >= ARRAY_SIZE(sio->serial)) {
+warn_report("superio: ignoring %td serial controllers",
+k->serial.count - ARRAY_SIZE(sio->serial));
+break;
+}
+if (!k->serial.is_enabled || k->serial.is_enabled(sio, i)) {
+/* FIXME use a qdev chardev prop instead of serial_hds[] */
+chr = serial_hds[i];
+if (chr == NULL || chr->be) {
+name = g_strdup_printf("discarding-serial%d", i);
+chr = qemu_chr_new(name, "null");
+} else {
+name = g_strdup_printf("serial%d", i);
+}
+isa = isa_create(bus, TYPE_ISA_SERIAL);
+d = DEVICE(isa);
+qdev_prop_set_uint32(d, "index", i);
+if (k->serial.get_iobase) {
+qdev_prop_set_uint32(d, "iobase",
+ k->serial.get_iobase(sio, i));
+}
+if (k->serial.get_irq) {
+qdev_prop_set_uint32(d, "irq", k->serial.get_irq(sio, i));
+}
+qdev_prop_set_chr(d, "chardev", chr);
+qdev_init_nofail(d);
+sio->serial[i] = isa;
+trace_superio_create_serial(i,
+k->serial.get_iobase ?
+k->serial.get_iobase(sio, i) : -1,
+k->serial.get_irq ?
+k->serial.get_irq(sio, i) : -1);
+object_property_add_child(OBJECT(dev), name,
+ OBJECT(sio->serial[0]), NULL);
+g_free(name);
+}
+}
}
static void isa_superio_class_init(ObjectClass *oc, void *data)
diff --git a/hw/isa/pc87312.c b/hw/isa/pc87312.c
index 1c15715c69..c2837bca43 100644
--- a/hw/isa/pc87312.c
+++ b/hw/isa/pc87312.c
@@ -29,8 +29,6 @@
#include "qemu/error-report.h"
#include "sysemu/block-backend.h"
#include "sysemu/blockdev.h"
-#include "sysemu/sysemu.h"
-#include "chardev/char.h"
#include "trace.h"
@@ -100,8 +98,9 @@ static const uint16_t uart_base[2][4] = {
{ 0x2e8, 0x238, 0x2e0, 0x228 }
};
-static inline uint16_t get_uart_iobase(PC87312State *s, int i)
+static uint16_t get_uart_iobase(ISASuperIODevice *sio, uint8_t i)
{
+PC87312State *s = PC87312(sio);
int idx;
idx = (s->regs[REG_FAR] >> (2 * i + 2)) & 0x3;
if (idx == 0) {
@@ -113,15 +112,17 @@ static inline uint16_t get_uart_iobase(PC87312State *s,
int i)
}
}
-static inline unsigned int get_uart_irq(PC87312State *s, int i)
+static unsigned int get_uart_irq(ISASuperIODevice *sio, uint8_t i)
{
+PC87312State *s = PC87312(sio);
int idx;
idx = (s->regs[REG_FAR] >> (2 * i + 2)) & 0x3;
return (idx & 1) ? 3 : 4;
}
-static inline bool is_uart_enabled(PC87312State *s, int i)
+static bool is_uart_enabled(ISASuperIODevice *sio, uint8_t i)
{
+PC87312State *s = PC87312(sio);
return s->regs[REG_FER] & (FER_UART1_EN << i);
}
@@ -271,11 +272,8 @@ static void pc87312_realize(DeviceState *dev, Error
Re: [Qemu-devel] [RFC PATCH v2 18/22] hw/isa/vt82c686: Add the TYPE_VT82C686B_SUPERIO
On 03/05/2018 10:19 PM, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> include/hw/isa/vt82c686.h | 2 ++
> hw/isa/vt82c686.c | 20
> hw/mips/mips_fulong2e.c | 15 +++
> 3 files changed, 25 insertions(+), 12 deletions(-)
>
> diff --git a/include/hw/isa/vt82c686.h b/include/hw/isa/vt82c686.h
> index db97c8ed7a..c3c2b6e786 100644
> --- a/include/hw/isa/vt82c686.h
> +++ b/include/hw/isa/vt82c686.h
> @@ -1,6 +1,8 @@
> #ifndef HW_VT82C686_H
> #define HW_VT82C686_H
>
> +#define TYPE_VT82C686B_SUPERIO "vt82c686b-superio"
> +
> /* vt82c686.c */
> ISABus *vt82c686b_isa_init(PCIBus * bus, int devfn);
> void vt82c686b_ac97_init(PCIBus *bus, int devfn);
> diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
> index 7eaf3c7e8f..cff1946232 100644
> --- a/hw/isa/vt82c686.c
> +++ b/hw/isa/vt82c686.c
> @@ -17,6 +17,7 @@
> #include "hw/i2c/smbus.h"
> #include "hw/pci/pci.h"
> #include "hw/isa/isa.h"
> +#include "hw/isa/superio.h"
> #include "hw/sysbus.h"
> #include "hw/mips/mips.h"
> #include "hw/isa/apm.h"
> @@ -519,11 +520,30 @@ static const TypeInfo via_info = {
> },
> };
>
> +static void vt82c686b_superio_class_init(ObjectClass *klass, void *data)
> +{
> +ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass);
> +
> +sc->serial.count = 2;
> +sc->parallel.count = 1;
> +sc->ide.count = 0;
> +sc->floppy.count = 1;
> +}
> +
> +static const TypeInfo via_superio_info = {
> +.name = TYPE_VT82C686B_SUPERIO,
> +.parent= TYPE_ISA_SUPERIO,
> +.instance_size = sizeof(ISASuperIODevice),
> +.class_size= sizeof(ISASuperIOClass),
> +.class_init= vt82c686b_superio_class_init,
> +};
> +
> static void vt82c686b_register_types(void)
> {
> type_register_static(&via_ac97_info);
> type_register_static(&via_mc97_info);
> type_register_static(&via_pm_info);
> +type_register_static(&via_superio_info);
> type_register_static(&via_info);
> }
>
> diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c
> index 9ebc225d3b..d608f17e1e 100644
> --- a/hw/mips/mips_fulong2e.c
> +++ b/hw/mips/mips_fulong2e.c
> @@ -23,9 +23,7 @@
> #include "hw/hw.h"
> #include "hw/i386/pc.h"
> #include "hw/dma/i8257.h"
> -#include "hw/char/serial.h"
> -#include "hw/char/parallel.h"
> -#include "hw/block/fdc.h"
> +#include "hw/isa/superio.h"
> #include "net/net.h"
> #include "hw/boards.h"
> #include "hw/i2c/smbus.h"
> @@ -34,7 +32,6 @@
> #include "hw/mips/mips.h"
> #include "hw/mips/cpudevs.h"
> #include "hw/pci/pci.h"
> -#include "sysemu/sysemu.h"
> #include "audio/audio.h"
> #include "qemu/log.h"
> #include "hw/loader.h"
> @@ -44,8 +41,6 @@
> #include "hw/isa/vt82c686.h"
> #include "hw/timer/mc146818rtc.h"
> #include "hw/timer/i8254.h"
> -#include "hw/input/i8042.h"
> -#include "sysemu/blockdev.h"
> #include "exec/address-spaces.h"
> #include "sysemu/qtest.h"
> #include "qemu/error-report.h"
> @@ -250,6 +245,8 @@ static void vt82c686b_southbridge_init(PCIBus *pci_bus,
> int slot, qemu_irq intc,
> /* init other devices */
> i8254_pit_init(isa_bus, 0x40, 0, NULL);
> i8257_dma_init(isa_bus, 0);
> +/* Super I/O */
> +isa_create_simple(isa_bus, TYPE_VT82C686B_SUPERIO);
>
> ide_drive_get(hd, ARRAY_SIZE(hd));
> vt82c686b_ide_init(pci_bus, hd, PCI_DEVFN(slot, 1));
> @@ -262,12 +259,6 @@ static void vt82c686b_southbridge_init(PCIBus *pci_bus,
> int slot, qemu_irq intc,
> /* Audio support */
> vt82c686b_ac97_init(pci_bus, PCI_DEVFN(slot, 5));
> vt82c686b_mc97_init(pci_bus, PCI_DEVFN(slot, 6));
> -
> -/* Super I/O */
> -isa_create_simple(isa_bus, TYPE_I8042);
> -
> -serial_hds_isa_init(isa_bus, 0, MAX_SERIAL_PORTS);
> -parallel_hds_isa_init(isa_bus, 1);
> }
>
> /* Network support */
I don't have Fuloong 2e image at hand, but the monitor "info qtree" diff
without/with TYPE_VT82C686B_SUPERIO is:
bus: isa.0
type ISA
+ dev: isa-fdc, id ""
+iobase = 1008 (0x3f0)
+irq = 6 (0x6)
+dma = 2 (0x2)
+driveA = ""
+driveB = ""
+check_media_rate = true
+fdtypeA = "auto"
+fdtypeB = "auto"
+fallback = "288"
+isa irq 6
+bus: floppy-bus.0
+ type floppy-bus
+ dev: floppy, id ""
+unit = 0 (0x0)
+drive = "floppy0"
+logical_block_size = 512 (0x200)
+physical_block_size = 512 (0x200)
+min_io_size = 0 (0x0)
+opt_io_size = 0 (0x0)
+discard_granularity = 4294967295 (0x)
+write-cache = "auto"
+share-rw = false
+drive-type = "288"
+ dev: isa-serial, id ""
+index = 1 (0x1)
+iobase = 760 (0x2f8)
+irq = 3 (0x3)
+chardev = "discarding-s
[Qemu-devel] [PATCH 25/25] hw/i386/pc: Factor out the superio code
Signed-off-by: Philippe Mathieu-Daudé
---
hw/i386/pc.c | 72 ++--
1 file changed, 41 insertions(+), 31 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index cdcdfafe8e..20fa62f5d6 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1519,6 +1519,44 @@ static const MemoryRegionOps ioportF0_io_ops = {
},
};
+static void pc_superio_init(ISABus *isa_bus, bool create_fdctrl, bool
no_vmport)
+{
+int i;
+DriveInfo *fd[MAX_FD];
+qemu_irq *a20_line;
+ISADevice *i8042, *port92, *vmmouse;
+
+serial_hds_isa_init(isa_bus, 0, MAX_SERIAL_PORTS);
+parallel_hds_isa_init(isa_bus, MAX_PARALLEL_PORTS);
+
+for (i = 0; i < MAX_FD; i++) {
+fd[i] = drive_get(IF_FLOPPY, 0, i);
+create_fdctrl |= !!fd[i];
+}
+if (create_fdctrl) {
+fdctrl_init_isa(isa_bus, fd);
+}
+
+i8042 = isa_create_simple(isa_bus, "i8042");
+if (!no_vmport) {
+vmport_init(isa_bus);
+vmmouse = isa_try_create(isa_bus, "vmmouse");
+} else {
+vmmouse = NULL;
+}
+if (vmmouse) {
+DeviceState *dev = DEVICE(vmmouse);
+qdev_prop_set_ptr(dev, "ps2_mouse", i8042);
+qdev_init_nofail(dev);
+}
+port92 = isa_create_simple(isa_bus, "port92");
+
+a20_line = qemu_allocate_irqs(handle_a20_line_change, first_cpu, 2);
+i8042_setup_a20_line(i8042, a20_line[0]);
+port92_init(port92, a20_line[1]);
+g_free(a20_line);
+}
+
void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
ISADevice **rtc_state,
bool create_fdctrl,
@@ -1527,13 +1565,11 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq
*gsi,
uint32_t hpet_irqs)
{
int i;
-DriveInfo *fd[MAX_FD];
DeviceState *hpet = NULL;
int pit_isa_irq = 0;
qemu_irq pit_alt_irq = NULL;
qemu_irq rtc_irq = NULL;
-qemu_irq *a20_line;
-ISADevice *i8042, *port92, *vmmouse, *pit = NULL;
+ISADevice *pit = NULL;
MemoryRegion *ioport80_io = g_new(MemoryRegion, 1);
MemoryRegion *ioportF0_io = g_new(MemoryRegion, 1);
@@ -1590,36 +1626,10 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq
*gsi,
pcspk_init(isa_bus, pit);
}
-serial_hds_isa_init(isa_bus, 0, MAX_SERIAL_PORTS);
-parallel_hds_isa_init(isa_bus, MAX_PARALLEL_PORTS);
-
-a20_line = qemu_allocate_irqs(handle_a20_line_change, first_cpu, 2);
-i8042 = isa_create_simple(isa_bus, "i8042");
-i8042_setup_a20_line(i8042, a20_line[0]);
-if (!no_vmport) {
-vmport_init(isa_bus);
-vmmouse = isa_try_create(isa_bus, "vmmouse");
-} else {
-vmmouse = NULL;
-}
-if (vmmouse) {
-DeviceState *dev = DEVICE(vmmouse);
-qdev_prop_set_ptr(dev, "ps2_mouse", i8042);
-qdev_init_nofail(dev);
-}
-port92 = isa_create_simple(isa_bus, "port92");
-port92_init(port92, a20_line[1]);
-g_free(a20_line);
-
i8257_dma_init(isa_bus, 0);
-for(i = 0; i < MAX_FD; i++) {
-fd[i] = drive_get(IF_FLOPPY, 0, i);
-create_fdctrl |= !!fd[i];
-}
-if (create_fdctrl) {
-fdctrl_init_isa(isa_bus, fd);
-}
+/* Super I/O */
+pc_superio_init(isa_bus, create_fdctrl, no_vmport);
}
void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus)
--
2.16.2
[Qemu-devel] [PATCH 24/25] hw/alpha/dp264: Use the TYPE_SMC37C669_SUPERIO
Signed-off-by: Philippe Mathieu-Daudé
---
default-configs/alpha-softmmu.mak | 3 +++
hw/alpha/dp264.c | 10 --
2 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/default-configs/alpha-softmmu.mak
b/default-configs/alpha-softmmu.mak
index 3740adc5e9..bbe361f01a 100644
--- a/default-configs/alpha-softmmu.mak
+++ b/default-configs/alpha-softmmu.mak
@@ -7,6 +7,9 @@ CONFIG_SERIAL_ISA=y
CONFIG_I82374=y
CONFIG_I8254=y
CONFIG_I8257=y
+CONFIG_PARALLEL=y
+CONFIG_PARALLEL_ISA=y
+CONFIG_FDC=y
CONFIG_PCKBD=y
CONFIG_VGA_CIRRUS=y
CONFIG_IDE_CORE=y
diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c
index ffad678ea7..80b987f7fb 100644
--- a/hw/alpha/dp264.c
+++ b/hw/alpha/dp264.c
@@ -19,8 +19,7 @@
#include "hw/timer/mc146818rtc.h"
#include "hw/ide.h"
#include "hw/timer/i8254.h"
-#include "hw/input/i8042.h"
-#include "hw/char/serial.h"
+#include "hw/isa/superio.h"
#include "hw/dma/i8257.h"
#include "qemu/cutils.h"
@@ -83,14 +82,10 @@ static void clipper_init(MachineState *machine)
mc146818_rtc_init(isa_bus, 1900, rtc_irq);
i8254_pit_init(isa_bus, 0x40, 0, NULL);
-isa_create_simple(isa_bus, TYPE_I8042);
/* VGA setup. Don't bother loading the bios. */
pci_vga_init(pci_bus);
-/* Serial code setup. */
-serial_hds_isa_init(isa_bus, 0, MAX_SERIAL_PORTS);
-
/* Network setup. e1000 is good enough, failing Tulip support. */
for (i = 0; i < nb_nics; i++) {
pci_nic_init_nofail(&nd_table[i], pci_bus, "e1000", NULL);
@@ -99,6 +94,9 @@ static void clipper_init(MachineState *machine)
/* 2 82C37 (dma) */
isa_create_simple(isa_bus, "i82374");
+/* Super I/O */
+isa_create_simple(isa_bus, TYPE_SMC37C669_SUPERIO);
+
/* IDE disk setup. */
{
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
--
2.16.2
[Qemu-devel] [PATCH 17/25] hw/mips/mips_fulong2e: Factor out vt82c686b_southbridge_init()
Signed-off-by: Philippe Mathieu-Daudé
---
hw/mips/mips_fulong2e.c | 83 -
1 file changed, 41 insertions(+), 42 deletions(-)
diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c
index 9339e02120..ca1f76a724 100644
--- a/hw/mips/mips_fulong2e.c
+++ b/hw/mips/mips_fulong2e.c
@@ -78,8 +78,6 @@
#define FULONG2E_ATI_SLOT6
#define FULONG2E_RTL8139_SLOT7
-static ISADevice *pit;
-
static struct _loaderparams {
int ram_size;
const char *kernel_filename;
@@ -232,11 +230,44 @@ static const uint8_t eeprom_spd[0x80] = {
0x20,0x30,0x20
};
-/* Audio support */
-static void audio_init (PCIBus *pci_bus)
+static void vt82c686b_southbridge_init(PCIBus *pci_bus, int slot, qemu_irq
intc,
+ I2CBus **i2c_bus, ISABus **p_isa_bus)
{
-vt82c686b_ac97_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 5));
-vt82c686b_mc97_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 6));
+qemu_irq *i8259;
+ISABus *isa_bus;
+DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
+
+isa_bus = vt82c686b_init(pci_bus, PCI_DEVFN(slot, 0));
+if (!isa_bus) {
+fprintf(stderr, "vt82c686b_init error\n");
+exit(1);
+}
+*p_isa_bus = isa_bus;
+/* Interrupt controller */
+/* The 8259 -> IP5 */
+i8259 = i8259_init(isa_bus, intc);
+isa_bus_irqs(isa_bus, i8259);
+/* init other devices */
+i8254_pit_init(isa_bus, 0x40, 0, NULL);
+i8257_dma_init(isa_bus, 0);
+
+ide_drive_get(hd, ARRAY_SIZE(hd));
+vt82c686b_ide_init(pci_bus, hd, PCI_DEVFN(slot, 1));
+
+pci_create_simple(pci_bus, PCI_DEVFN(slot, 2), "vt82c686b-usb-uhci");
+pci_create_simple(pci_bus, PCI_DEVFN(slot, 3), "vt82c686b-usb-uhci");
+
+*i2c_bus = vt82c686b_pm_init(pci_bus, PCI_DEVFN(slot, 4), 0xeee1, NULL);
+
+/* Audio support */
+vt82c686b_ac97_init(pci_bus, PCI_DEVFN(slot, 5));
+vt82c686b_mc97_init(pci_bus, PCI_DEVFN(slot, 6));
+
+/* Super I/O */
+isa_create_simple(isa_bus, TYPE_I8042);
+
+serial_hds_isa_init(isa_bus, 0, MAX_SERIAL_PORTS);
+parallel_hds_isa_init(isa_bus, 1);
}
/* Network support */
@@ -269,11 +300,9 @@ static void mips_fulong2e_init(MachineState *machine)
MemoryRegion *bios = g_new(MemoryRegion, 1);
long bios_size;
int64_t kernel_entry;
-qemu_irq *i8259;
PCIBus *pci_bus;
ISABus *isa_bus;
I2CBus *smbus;
-DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
MIPSCPU *cpu;
CPUMIPSState *env;
@@ -335,46 +364,16 @@ static void mips_fulong2e_init(MachineState *machine)
/* North bridge, Bonito --> IP2 */
pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
-/* South bridge */
-ide_drive_get(hd, ARRAY_SIZE(hd));
-
-isa_bus = vt82c686b_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 0));
-if (!isa_bus) {
-error_report("vt82c686b_init error");
-exit(1);
-}
-
-/* Interrupt controller */
-/* The 8259 -> IP5 */
-i8259 = i8259_init(isa_bus, env->irq[5]);
-isa_bus_irqs(isa_bus, i8259);
-
-vt82c686b_ide_init(pci_bus, hd, PCI_DEVFN(FULONG2E_VIA_SLOT, 1));
-pci_create_simple(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 2),
- "vt82c686b-usb-uhci");
-pci_create_simple(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 3),
- "vt82c686b-usb-uhci");
+/* South bridge -> IP5 */
+vt82c686b_southbridge_init(pci_bus, FULONG2E_VIA_SLOT, env->irq[5],
+ &smbus, &isa_bus);
-smbus = vt82c686b_pm_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 4),
- 0xeee1, NULL);
/* TODO: Populate SPD eeprom data. */
smbus_eeprom_init(smbus, 1, eeprom_spd, sizeof(eeprom_spd));
-/* init other devices */
-pit = i8254_pit_init(isa_bus, 0x40, 0, NULL);
-i8257_dma_init(isa_bus, 0);
-
-/* Super I/O */
-isa_create_simple(isa_bus, TYPE_I8042);
-
mc146818_rtc_init(isa_bus, 2000, NULL);
-serial_hds_isa_init(isa_bus, 0, MAX_SERIAL_PORTS);
-parallel_hds_isa_init(isa_bus, 1);
-
-/* Sound card */
-audio_init(pci_bus);
-/* Network card */
+/* Network card: RTL8139D */
network_init(pci_bus);
}
--
2.16.2
[Qemu-devel] [PATCH 10/25] hw/isa/superio: Factor out the parallel code from pc87312.c
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/isa/pc87312.h | 4 ---
include/hw/isa/superio.h | 6 +
hw/isa/isa-superio.c | 65
hw/isa/pc87312.c | 38 +++-
hw/isa/trace-events | 4 ++-
5 files changed, 89 insertions(+), 28 deletions(-)
diff --git a/include/hw/isa/pc87312.h b/include/hw/isa/pc87312.h
index f3761d6fe1..bcc4578479 100644
--- a/include/hw/isa/pc87312.h
+++ b/include/hw/isa/pc87312.h
@@ -39,10 +39,6 @@ typedef struct PC87312State {
uint16_t iobase;
uint8_t config; /* initial configuration */
-struct {
-ISADevice *dev;
-} parallel;
-
struct {
ISADevice *dev;
} uart[2];
diff --git a/include/hw/isa/superio.h b/include/hw/isa/superio.h
index cff6ad6c08..e9879cfde1 100644
--- a/include/hw/isa/superio.h
+++ b/include/hw/isa/superio.h
@@ -23,7 +23,11 @@
OBJECT_CLASS_CHECK(ISASuperIOClass, (klass), TYPE_ISA_SUPERIO)
typedef struct ISASuperIODevice {
+/*< private >*/
ISADevice parent_obj;
+/*< public >*/
+
+ISADevice *parallel[MAX_PARALLEL_PORTS];
} ISASuperIODevice;
typedef struct ISASuperIOFuncs {
@@ -39,6 +43,8 @@ typedef struct ISASuperIOClass {
ISADeviceClass parent_class;
/*< public >*/
DeviceRealize parent_realize;
+
+ISASuperIOFuncs parallel;
} ISASuperIOClass;
#endif /* HW_ISA_SUPERIO_H */
diff --git a/hw/isa/isa-superio.c b/hw/isa/isa-superio.c
index 14ec16f831..eb263fcc3a 100644
--- a/hw/isa/isa-superio.c
+++ b/hw/isa/isa-superio.c
@@ -10,14 +10,79 @@
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#include "qemu/osdep.h"
+#include "qemu/error-report.h"
+#include "sysemu/sysemu.h"
+#include "chardev/char.h"
#include "hw/isa/superio.h"
#include "trace.h"
+static void isa_superio_realize(DeviceState *dev, Error **errp)
+{
+ISASuperIODevice *sio = ISA_SUPERIO(dev);
+ISASuperIOClass *k = ISA_SUPERIO_GET_CLASS(sio);
+ISABus *bus = isa_bus_from_device(ISA_DEVICE(dev));
+ISADevice *isa;
+DeviceState *d;
+Chardev *chr;
+char *name;
+int i;
+
+/* Parallel port */
+for (i = 0; i < k->parallel.count; i++) {
+if (i >= ARRAY_SIZE(sio->parallel)) {
+warn_report("superio: ignoring %td parallel controllers",
+k->parallel.count - ARRAY_SIZE(sio->parallel));
+break;
+}
+if (!k->parallel.is_enabled || k->parallel.is_enabled(sio, i)) {
+/* FIXME use a qdev chardev prop instead of parallel_hds[] */
+chr = parallel_hds[i];
+if (chr == NULL || chr->be) {
+name = g_strdup_printf("discarding-parallel%d", i);
+chr = qemu_chr_new(name, "null");
+} else {
+name = g_strdup_printf("parallel%d", i);
+}
+isa = isa_create(bus, "isa-parallel");
+d = DEVICE(isa);
+qdev_prop_set_uint32(d, "index", i);
+if (k->parallel.get_iobase) {
+qdev_prop_set_uint32(d, "iobase",
+ k->parallel.get_iobase(sio, i));
+}
+if (k->parallel.get_irq) {
+qdev_prop_set_uint32(d, "irq", k->parallel.get_irq(sio, i));
+}
+qdev_prop_set_chr(d, "chardev", chr);
+qdev_init_nofail(d);
+sio->parallel[i] = isa;
+trace_superio_create_parallel(i,
+ k->parallel.get_iobase ?
+ k->parallel.get_iobase(sio, i) : -1,
+ k->parallel.get_irq ?
+ k->parallel.get_irq(sio, i) : -1);
+object_property_add_child(OBJECT(dev), name,
+ OBJECT(sio->parallel[i]), NULL);
+g_free(name);
+}
+}
+}
+
+static void isa_superio_class_init(ObjectClass *oc, void *data)
+{
+DeviceClass *dc = DEVICE_CLASS(oc);
+
+dc->realize = isa_superio_realize;
+/* Reason: Uses parallel_hds[0] in realize(), so it can't be used twice */
+dc->user_creatable = false;
+}
+
static const TypeInfo isa_superio_type_info = {
.name = TYPE_ISA_SUPERIO,
.parent = TYPE_ISA_DEVICE,
.abstract = true,
.class_size = sizeof(ISASuperIOClass),
+.class_init = isa_superio_class_init,
};
static void isa_superio_register_types(void)
diff --git a/hw/isa/pc87312.c b/hw/isa/pc87312.c
index 6b8100ff56..1c15715c69 100644
--- a/hw/isa/pc87312.c
+++ b/hw/isa/pc87312.c
@@ -64,22 +64,25 @@
/* Parallel port */
-static inline bool is_parallel_enabled(PC87312State *s)
+static bool is_parallel_enabled(ISASuperIODevice *sio, uint8_t index)
{
-return s->regs[REG_FER] & FER_PARALLEL_EN;
+PC87312State *s = PC87312(sio);
+return index ? false : s->regs[REG_FER] & FER_PARALLEL_EN;
}
static const uint16_t parallel_base[] = { 0x378
Re: [Qemu-devel] [PATCH v12 26/28] qmp: add query-sev-capabilities command
On 3/8/18 11:05 AM, Daniel P. Berrangé wrote:
> On Thu, Mar 08, 2018 at 06:48:59AM -0600, Brijesh Singh wrote:
>> The command can be used by libvirt to query the SEV capabilities.
>>
>> Cc: "Daniel P. Berrangé"
>> Cc: "Dr. David Alan Gilbert"
>> Cc: Markus Armbruster
>> Signed-off-by: Brijesh Singh
>> ---
>> monitor.c | 7 +++
>> qapi/misc.json| 42 ++
>> target/i386/monitor.c | 6 ++
>> 3 files changed, 55 insertions(+)
>>
>> diff --git a/monitor.c b/monitor.c
>> index d53ecc5ddab3..29ce695a80d5 100644
>> --- a/monitor.c
>> +++ b/monitor.c
>> @@ -985,6 +985,7 @@ static void qmp_unregister_commands_hack(void)
>> qmp_unregister_command(&qmp_commands, "rtc-reset-reinjection");
>> qmp_unregister_command(&qmp_commands, "query-sev");
>> qmp_unregister_command(&qmp_commands, "query-sev-launch-measure");
>> +qmp_unregister_command(&qmp_commands, "query-sev-capabilities");
>> #endif
>> #ifndef TARGET_S390X
>> qmp_unregister_command(&qmp_commands, "dump-skeys");
>> @@ -4117,6 +4118,12 @@ SevLaunchMeasureInfo
>> *qmp_query_sev_launch_measure(Error **errp)
>> error_setg(errp, QERR_FEATURE_DISABLED, "query-sev-launch-measure");
>> return NULL;
>> }
>> +
>> +SevCapability *qmp_query_sev_capabilities(Error **errp)
>> +{
>> +error_setg(errp, QERR_FEATURE_DISABLED, "query-sev-capabilities");
>> +return NULL;
>> +}
>> #endif
>>
>> #ifndef TARGET_S390X
>> diff --git a/qapi/misc.json b/qapi/misc.json
>> index a39c43aa64b1..37c89663d8f4 100644
>> --- a/qapi/misc.json
>> +++ b/qapi/misc.json
>> @@ -3306,3 +3306,45 @@
>> #
>> ##
>> { 'command': 'query-sev-launch-measure', 'returns': 'SevLaunchMeasureInfo' }
>> +
>> +##
>> +# @SevCapability:
>> +#
>> +# The struct describes capability for a Secure Encrypted Virtualization
>> +# feature.
>> +#
>> +# @pdh: Platform Diffie-Hellman key
>> +#
>> +# @cert-chain: PDH certificate chain
> Are either of these base64 encoded ? If so nice to document that.
Yep, they are base64 encoded, I will update the doc.
>
>> +#
>> +# @cbitpos: C-bit location in page table entry
>> +#
>> +# @reduced-phys-bits: Number of physical Address bit reduction when SEV is
>> +# enabled
>> +#
>> +# Since: 2.12
>> +##
>> +{ 'struct': 'SevCapability',
>> + 'data': { 'pdh': 'str',
>> +'cert-chain': 'str',
>> +'cbitpos': 'int',
>> +'reduced-phys-bits': 'int'} }
> Regardless of answer to above Q,
>
> Reviewed-by: Daniel P. Berrangé
>
>
> Regards,
> Daniel
[Qemu-devel] [PATCH 19/25] hw/isa/vt82c686: Add the TYPE_VT82C686B_SUPERIO
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/isa/vt82c686.h | 2 ++
hw/isa/vt82c686.c | 20
hw/mips/mips_fulong2e.c | 15 +++
3 files changed, 25 insertions(+), 12 deletions(-)
diff --git a/include/hw/isa/vt82c686.h b/include/hw/isa/vt82c686.h
index db97c8ed7a..c3c2b6e786 100644
--- a/include/hw/isa/vt82c686.h
+++ b/include/hw/isa/vt82c686.h
@@ -1,6 +1,8 @@
#ifndef HW_VT82C686_H
#define HW_VT82C686_H
+#define TYPE_VT82C686B_SUPERIO "vt82c686b-superio"
+
/* vt82c686.c */
ISABus *vt82c686b_isa_init(PCIBus * bus, int devfn);
void vt82c686b_ac97_init(PCIBus *bus, int devfn);
diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
index 7eaf3c7e8f..cff1946232 100644
--- a/hw/isa/vt82c686.c
+++ b/hw/isa/vt82c686.c
@@ -17,6 +17,7 @@
#include "hw/i2c/smbus.h"
#include "hw/pci/pci.h"
#include "hw/isa/isa.h"
+#include "hw/isa/superio.h"
#include "hw/sysbus.h"
#include "hw/mips/mips.h"
#include "hw/isa/apm.h"
@@ -519,11 +520,30 @@ static const TypeInfo via_info = {
},
};
+static void vt82c686b_superio_class_init(ObjectClass *klass, void *data)
+{
+ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass);
+
+sc->serial.count = 2;
+sc->parallel.count = 1;
+sc->ide.count = 0;
+sc->floppy.count = 1;
+}
+
+static const TypeInfo via_superio_info = {
+.name = TYPE_VT82C686B_SUPERIO,
+.parent= TYPE_ISA_SUPERIO,
+.instance_size = sizeof(ISASuperIODevice),
+.class_size= sizeof(ISASuperIOClass),
+.class_init= vt82c686b_superio_class_init,
+};
+
static void vt82c686b_register_types(void)
{
type_register_static(&via_ac97_info);
type_register_static(&via_mc97_info);
type_register_static(&via_pm_info);
+type_register_static(&via_superio_info);
type_register_static(&via_info);
}
diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c
index 9ebc225d3b..d608f17e1e 100644
--- a/hw/mips/mips_fulong2e.c
+++ b/hw/mips/mips_fulong2e.c
@@ -23,9 +23,7 @@
#include "hw/hw.h"
#include "hw/i386/pc.h"
#include "hw/dma/i8257.h"
-#include "hw/char/serial.h"
-#include "hw/char/parallel.h"
-#include "hw/block/fdc.h"
+#include "hw/isa/superio.h"
#include "net/net.h"
#include "hw/boards.h"
#include "hw/i2c/smbus.h"
@@ -34,7 +32,6 @@
#include "hw/mips/mips.h"
#include "hw/mips/cpudevs.h"
#include "hw/pci/pci.h"
-#include "sysemu/sysemu.h"
#include "audio/audio.h"
#include "qemu/log.h"
#include "hw/loader.h"
@@ -44,8 +41,6 @@
#include "hw/isa/vt82c686.h"
#include "hw/timer/mc146818rtc.h"
#include "hw/timer/i8254.h"
-#include "hw/input/i8042.h"
-#include "sysemu/blockdev.h"
#include "exec/address-spaces.h"
#include "sysemu/qtest.h"
#include "qemu/error-report.h"
@@ -250,6 +245,8 @@ static void vt82c686b_southbridge_init(PCIBus *pci_bus, int
slot, qemu_irq intc,
/* init other devices */
i8254_pit_init(isa_bus, 0x40, 0, NULL);
i8257_dma_init(isa_bus, 0);
+/* Super I/O */
+isa_create_simple(isa_bus, TYPE_VT82C686B_SUPERIO);
ide_drive_get(hd, ARRAY_SIZE(hd));
vt82c686b_ide_init(pci_bus, hd, PCI_DEVFN(slot, 1));
@@ -262,12 +259,6 @@ static void vt82c686b_southbridge_init(PCIBus *pci_bus,
int slot, qemu_irq intc,
/* Audio support */
vt82c686b_ac97_init(pci_bus, PCI_DEVFN(slot, 5));
vt82c686b_mc97_init(pci_bus, PCI_DEVFN(slot, 6));
-
-/* Super I/O */
-isa_create_simple(isa_bus, TYPE_I8042);
-
-serial_hds_isa_init(isa_bus, 0, MAX_SERIAL_PORTS);
-parallel_hds_isa_init(isa_bus, 1);
}
/* Network support */
--
2.16.2
[Qemu-devel] [PATCH 12/25] hw/isa/superio: Factor out the floppy disc controller code from pc87312.c
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/isa/pc87312.h | 4
include/hw/isa/superio.h | 2 ++
hw/isa/isa-superio.c | 36
hw/isa/pc87312.c | 46 +++---
hw/isa/trace-events | 2 +-
5 files changed, 58 insertions(+), 32 deletions(-)
diff --git a/include/hw/isa/pc87312.h b/include/hw/isa/pc87312.h
index 1480615a2c..e16263d4b1 100644
--- a/include/hw/isa/pc87312.h
+++ b/include/hw/isa/pc87312.h
@@ -39,10 +39,6 @@ typedef struct PC87312State {
uint16_t iobase;
uint8_t config; /* initial configuration */
-struct {
-ISADevice *dev;
-} fdc;
-
struct {
ISADevice *dev;
} ide;
diff --git a/include/hw/isa/superio.h b/include/hw/isa/superio.h
index 0b516721c3..e8007b9eee 100644
--- a/include/hw/isa/superio.h
+++ b/include/hw/isa/superio.h
@@ -29,6 +29,7 @@ typedef struct ISASuperIODevice {
ISADevice *parallel[MAX_PARALLEL_PORTS];
ISADevice *serial[MAX_SERIAL_PORTS];
+ISADevice *floppy;
} ISASuperIODevice;
typedef struct ISASuperIOFuncs {
@@ -47,6 +48,7 @@ typedef struct ISASuperIOClass {
ISASuperIOFuncs parallel;
ISASuperIOFuncs serial;
+ISASuperIOFuncs floppy;
} ISASuperIOClass;
#endif /* HW_ISA_SUPERIO_H */
diff --git a/hw/isa/isa-superio.c b/hw/isa/isa-superio.c
index 6962421aad..4b5e280b38 100644
--- a/hw/isa/isa-superio.c
+++ b/hw/isa/isa-superio.c
@@ -11,7 +11,10 @@
*/
#include "qemu/osdep.h"
#include "qemu/error-report.h"
+#include "qapi/error.h"
#include "sysemu/sysemu.h"
+#include "sysemu/block-backend.h"
+#include "sysemu/blockdev.h"
#include "chardev/char.h"
#include "hw/isa/superio.h"
#include "hw/char/serial.h"
@@ -25,6 +28,7 @@ static void isa_superio_realize(DeviceState *dev, Error
**errp)
ISADevice *isa;
DeviceState *d;
Chardev *chr;
+DriveInfo *drive;
char *name;
int i;
@@ -107,6 +111,38 @@ static void isa_superio_realize(DeviceState *dev, Error
**errp)
g_free(name);
}
}
+
+/* Floppy disc */
+if (!k->floppy.is_enabled || k->floppy.is_enabled(sio, 0)) {
+isa = isa_create(bus, "isa-fdc");
+d = DEVICE(isa);
+if (k->floppy.get_iobase) {
+qdev_prop_set_uint32(d, "iobase", k->floppy.get_iobase(sio, 0));
+}
+if (k->floppy.get_irq) {
+qdev_prop_set_uint32(d, "irq", k->floppy.get_irq(sio, 0));
+}
+/* FIXME use a qdev drive property instead of drive_get() */
+drive = drive_get(IF_FLOPPY, 0, 0);
+if (drive != NULL) {
+qdev_prop_set_drive(d, "driveA", blk_by_legacy_dinfo(drive),
+&error_fatal);
+}
+/* FIXME use a qdev drive property instead of drive_get() */
+drive = drive_get(IF_FLOPPY, 0, 1);
+if (drive != NULL) {
+qdev_prop_set_drive(d, "driveB", blk_by_legacy_dinfo(drive),
+&error_fatal);
+}
+qdev_init_nofail(d);
+sio->floppy = isa;
+trace_superio_create_floppy(0,
+k->floppy.get_iobase ?
+k->floppy.get_iobase(sio, 0) : -1,
+k->floppy.get_irq ?
+k->floppy.get_irq(sio, 0) : -1);
+}
+
}
static void isa_superio_class_init(ObjectClass *oc, void *data)
diff --git a/hw/isa/pc87312.c b/hw/isa/pc87312.c
index c2837bca43..a1845a91c3 100644
--- a/hw/isa/pc87312.c
+++ b/hw/isa/pc87312.c
@@ -27,8 +27,6 @@
#include "hw/isa/pc87312.h"
#include "qapi/error.h"
#include "qemu/error-report.h"
-#include "sysemu/block-backend.h"
-#include "sysemu/blockdev.h"
#include "trace.h"
@@ -129,16 +127,26 @@ static bool is_uart_enabled(ISASuperIODevice *sio,
uint8_t i)
/* Floppy controller */
-static inline bool is_fdc_enabled(PC87312State *s)
+static bool is_fdc_enabled(ISASuperIODevice *sio, uint8_t index)
{
+PC87312State *s = PC87312(sio);
+assert(!index);
return s->regs[REG_FER] & FER_FDC_EN;
}
-static inline uint16_t get_fdc_iobase(PC87312State *s)
+static uint16_t get_fdc_iobase(ISASuperIODevice *sio, uint8_t index)
{
+PC87312State *s = PC87312(sio);
+assert(!index);
return (s->regs[REG_FER] & FER_FDC_ADDR) ? 0x370 : 0x3f0;
}
+static unsigned int get_fdc_irq(ISASuperIODevice *sio, uint8_t index)
+{
+assert(!index);
+return 6;
+}
+
/* IDE controller */
@@ -272,7 +280,6 @@ static void pc87312_realize(DeviceState *dev, Error **errp)
DeviceState *d;
ISADevice *isa;
ISABus *bus;
-DriveInfo *drive;
Error *local_err = NULL;
s = PC87312(dev);
@@ -287,28 +294,6 @@ static void pc87312_realize(DeviceState *dev, Error **errp)
return;
}
-if (is_fdc_enabled(s)) {
-isa = isa_create(bus, "isa-fdc");
-d = DEVICE(isa);
-qdev_prop_set_uint32(d, "iobase",
[Qemu-devel] [PATCH 20/25] MAINTAINERS: Add entries for the VT82C686B Super I/O
So far, it is only used by the MIPS Fulong 2E mini PC. Signed-off-by: Philippe Mathieu-Daudé --- MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 98a8918c20..facdab44e1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -689,6 +689,8 @@ Fulong 2E M: Yongbok Kim S: Odd Fixes F: hw/mips/mips_fulong2e.c +F: hw/isa/vt82c686.c +F: include/hw/isa/vt82c686.h Boston M: Paul Burton -- 2.16.2
[Qemu-devel] [PATCH 15/25] hw/mips/malta: Code movement
Move the SouthBridge peripherals first, and keep the Super I/O peripherals last. Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/mips_malta.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index cd7bd0eef6..9e0724ca5a 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -1062,10 +1062,6 @@ void mips_malta_init(MachineState *machine) memory_region_add_subregion(system_memory, 512 << 20, ram_low_postio); } -/* generate SPD EEPROM data */ -generate_eeprom_spd(&smbus_eeprom_buf[0 * 256], ram_size); -generate_eeprom_serial(&smbus_eeprom_buf[6 * 256]); - #ifdef TARGET_WORDS_BIGENDIAN be = 1; #else @@ -1208,15 +1204,19 @@ void mips_malta_init(MachineState *machine) pci_create_simple(pci_bus, piix4_devfn + 2, "piix4-usb-uhci"); smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100, isa_get_irq(NULL, 9), NULL, 0, NULL); -smbus_eeprom_init(smbus, 8, smbus_eeprom_buf, smbus_eeprom_size); -g_free(smbus_eeprom_buf); pit = i8254_pit_init(isa_bus, 0x40, 0, NULL); i8257_dma_init(isa_bus, 0); +mc146818_rtc_init(isa_bus, 2000, NULL); + +/* generate SPD EEPROM data */ +generate_eeprom_spd(&smbus_eeprom_buf[0 * 256], ram_size); +generate_eeprom_serial(&smbus_eeprom_buf[6 * 256]); +smbus_eeprom_init(smbus, 8, smbus_eeprom_buf, smbus_eeprom_size); +g_free(smbus_eeprom_buf); /* Super I/O */ isa_create_simple(isa_bus, TYPE_I8042); -mc146818_rtc_init(isa_bus, 2000, NULL); serial_hds_isa_init(isa_bus, 0, 2); parallel_hds_isa_init(isa_bus, 1); -- 2.16.2
[Qemu-devel] [PATCH 22/25] hw/isa/superio: Add the SMC FDC37C669 Super I/O
Signed-off-by: Philippe Mathieu-Daudé
---
Richard: I added the smc37c669 device in the Alpha machine, since it is the
only user, as Michael previously suggested the non-PC devices should not be
in the "PC chipset" entry which is already big (that's why some devices got
moved from there to MIPS and PPC).
include/hw/isa/superio.h | 1 +
hw/isa/smc37c669-superio.c | 115 +
MAINTAINERS| 1 +
hw/isa/Makefile.objs | 2 +-
4 files changed, 118 insertions(+), 1 deletion(-)
create mode 100644 hw/isa/smc37c669-superio.c
diff --git a/include/hw/isa/superio.h b/include/hw/isa/superio.h
index b47aac3cf8..f9ba29aa30 100644
--- a/include/hw/isa/superio.h
+++ b/include/hw/isa/superio.h
@@ -55,5 +55,6 @@ typedef struct ISASuperIOClass {
} ISASuperIOClass;
#define TYPE_FDC37M81X_SUPERIO "fdc37m81x-superio"
+#define TYPE_SMC37C669_SUPERIO "smc37c669-superio"
#endif /* HW_ISA_SUPERIO_H */
diff --git a/hw/isa/smc37c669-superio.c b/hw/isa/smc37c669-superio.c
new file mode 100644
index 00..aa233c6967
--- /dev/null
+++ b/hw/isa/smc37c669-superio.c
@@ -0,0 +1,115 @@
+/*
+ * SMC FDC37C669 Super I/O controller
+ *
+ * Copyright (c) 2018 Philippe Mathieu-Daudé
+ *
+ * This code is licensed under the GNU GPLv2 and later.
+ * See the COPYING file in the top-level directory.
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "hw/isa/superio.h"
+
+/* UARTs (compatible with NS16450 or PC16550) */
+
+static bool is_serial_enabled(ISASuperIODevice *sio, uint8_t index)
+{
+return index < 2;
+}
+
+static uint16_t get_serial_iobase(ISASuperIODevice *sio, uint8_t index)
+{
+return index ? 0x2f8 : 0x3f8;
+}
+
+static unsigned int get_serial_irq(ISASuperIODevice *sio, uint8_t index)
+{
+return index ? 3 : 4;
+}
+
+/* Parallel port */
+
+static bool is_parallel_enabled(ISASuperIODevice *sio, uint8_t index)
+{
+return index < 1;
+}
+
+static uint16_t get_parallel_iobase(ISASuperIODevice *sio, uint8_t index)
+{
+return 0x3bc;
+}
+
+static unsigned int get_parallel_irq(ISASuperIODevice *sio, uint8_t index)
+{
+return 7;
+}
+
+static unsigned int get_parallel_dma(ISASuperIODevice *sio, uint8_t index)
+{
+return 3;
+}
+
+/* Diskette controller (Software compatible with the Intel PC8477) */
+
+static bool is_fdc_enabled(ISASuperIODevice *sio, uint8_t index)
+{
+return index < 1;
+}
+
+static uint16_t get_fdc_iobase(ISASuperIODevice *sio, uint8_t index)
+{
+return 0x3f0;
+}
+
+static unsigned int get_fdc_irq(ISASuperIODevice *sio, uint8_t index)
+{
+return 6;
+}
+
+static unsigned int get_fdc_dma(ISASuperIODevice *sio, uint8_t index)
+{
+return 2;
+}
+
+static void smc37c669_class_init(ObjectClass *klass, void *data)
+{
+ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass);
+
+sc->parallel = (ISASuperIOFuncs){
+.count = 1,
+.is_enabled = is_parallel_enabled,
+.get_iobase = get_parallel_iobase,
+.get_irq= get_parallel_irq,
+.get_dma= get_parallel_dma,
+};
+sc->serial = (ISASuperIOFuncs){
+.count = 2,
+.is_enabled = is_serial_enabled,
+.get_iobase = get_serial_iobase,
+.get_irq= get_serial_irq,
+};
+sc->floppy = (ISASuperIOFuncs){
+.count = 1,
+.is_enabled = is_fdc_enabled,
+.get_iobase = get_fdc_iobase,
+.get_irq= get_fdc_irq,
+.get_dma= get_fdc_dma,
+};
+sc->ide.count = 0;
+}
+
+static const TypeInfo smc37c669_type_info = {
+.name = TYPE_SMC37C669_SUPERIO,
+.parent= TYPE_ISA_SUPERIO,
+.instance_size = sizeof(ISASuperIODevice),
+.class_size= sizeof(ISASuperIOClass),
+.class_init= smc37c669_class_init,
+};
+
+static void smc37c669_register_types(void)
+{
+type_register_static(&smc37c669_type_info);
+}
+
+type_init(smc37c669_register_types)
diff --git a/MAINTAINERS b/MAINTAINERS
index e806491d6c..db20e52f5d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -405,6 +405,7 @@ Alpha Machines
M: Richard Henderson
S: Maintained
F: hw/alpha/
+F: hw/isa/smc37c669-superio.c
ARM Machines
diff --git a/hw/isa/Makefile.objs b/hw/isa/Makefile.objs
index cac655ba58..83e06f6c04 100644
--- a/hw/isa/Makefile.objs
+++ b/hw/isa/Makefile.objs
@@ -1,5 +1,5 @@
common-obj-$(CONFIG_ISA_BUS) += isa-bus.o
-common-obj-$(CONFIG_ISA_BUS) += isa-superio.o
+common-obj-$(CONFIG_ISA_BUS) += isa-superio.o smc37c669-superio.o
common-obj-$(CONFIG_APM) += apm.o
common-obj-$(CONFIG_I82378) += i82378.o
common-obj-$(CONFIG_PC87312) += pc87312.o
--
2.16.2
[Qemu-devel] [PATCH 21/25] MAINTAINERS: Split the Alpha TCG/machine section
Signed-off-by: Philippe Mathieu-Daudé --- MAINTAINERS | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index facdab44e1..e806491d6c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -127,7 +127,6 @@ Alpha M: Richard Henderson S: Maintained F: target/alpha/ -F: hw/alpha/ F: tests/tcg/alpha/ F: disas/alpha.c @@ -402,6 +401,11 @@ F: include/*/*win32* X: qga/*win32* F: qemu.nsi +Alpha Machines +M: Richard Henderson +S: Maintained +F: hw/alpha/ + ARM Machines Allwinner-a10 -- 2.16.2
[Qemu-devel] [PATCH 23/25] hw/alpha/dp264: Add the ISA DMA controller
Signed-off-by: Philippe Mathieu-Daudé
---
default-configs/alpha-softmmu.mak | 2 ++
hw/alpha/dp264.c | 4
2 files changed, 6 insertions(+)
diff --git a/default-configs/alpha-softmmu.mak
b/default-configs/alpha-softmmu.mak
index e0d75e3058..3740adc5e9 100644
--- a/default-configs/alpha-softmmu.mak
+++ b/default-configs/alpha-softmmu.mak
@@ -4,7 +4,9 @@ include pci.mak
include usb.mak
CONFIG_SERIAL=y
CONFIG_SERIAL_ISA=y
+CONFIG_I82374=y
CONFIG_I8254=y
+CONFIG_I8257=y
CONFIG_PCKBD=y
CONFIG_VGA_CIRRUS=y
CONFIG_IDE_CORE=y
diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c
index e13cb576fd..ffad678ea7 100644
--- a/hw/alpha/dp264.c
+++ b/hw/alpha/dp264.c
@@ -21,6 +21,7 @@
#include "hw/timer/i8254.h"
#include "hw/input/i8042.h"
#include "hw/char/serial.h"
+#include "hw/dma/i8257.h"
#include "qemu/cutils.h"
#define MAX_IDE_BUS 2
@@ -95,6 +96,9 @@ static void clipper_init(MachineState *machine)
pci_nic_init_nofail(&nd_table[i], pci_bus, "e1000", NULL);
}
+/* 2 82C37 (dma) */
+isa_create_simple(isa_bus, "i82374");
+
/* IDE disk setup. */
{
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
--
2.16.2
Re: [Qemu-devel] [PATCH v12 08/28] target/i386: add Secure Encrypted Virtulization (SEV) object
On Thu, Mar 08, 2018 at 04:22:52PM -0600, Brijesh Singh wrote:
>
>
> On 3/8/18 10:49 AM, Daniel P. Berrangé wrote:
> > On Thu, Mar 08, 2018 at 06:48:41AM -0600, Brijesh Singh wrote:
> >> Add a new memory encryption object 'sev-guest'. The object will be used
> >> to create enrypted VMs on AMD EPYC CPU. The object provides the properties
> >> to pass guest owner's public Diffie-hellman key, guest policy and session
> >> information required to create the memory encryption context within the
> >> SEV firmware.
> >>
> >> e.g to launch SEV guest
> >> # $QEMU \
> >> -object sev-guest,id=sev0 \
> >> -machine ,memory-encryption=sev0
> >>
> >> Cc: Paolo Bonzini
> >> Cc: Richard Henderson
> >> Cc: Eduardo Habkost
> >> Signed-off-by: Brijesh Singh
> >
> >> diff --git a/qemu-options.hx b/qemu-options.hx
> >> index 4c280142c52c..6113bce08a8c 100644
> >> --- a/qemu-options.hx
> >> +++ b/qemu-options.hx
> >> @@ -4353,6 +4353,50 @@ contents of @code{iv.b64} to the second secret
> >> data=$SECRET,iv=$( >> @end example
> >>
> >> +@item -object
> >> sev-guest,id=@var{id},cbitpos=@var{cbitpos},reduced-phys-bits=@var{val},[sev-device=@var{string},policy=@var{policy},handle=@var{handle},dh-cert-file=@var{file},session-file=@var{file}]
> >> +
> >> +Create a Secure Encrypted Virtualization (SEV) guest object, which can be
> >> used
> >> +to provide the guest memory encryption support on AMD processors.
> >> +
> >> +When memory encryption is enabled, one of the physical address bit (aka
> >> the
> >> +C-bit) is utilized to mark if a memory page is protected. The
> >> @option{cbitpos}
> >> +is used to provide the C-bit position. The C-bit position is Host family
> >> dependent
> >> +hence user must provide this value. On EPYC, the value should be 47.
> >> +
> >> +When memory encryption is enabled, we loose certain bits in physical
> >> address space.
> >> +The @option{reduced-phys-bits} is used to provide the number of bits we
> >> loose in
> >> +physical address space. Similar to C-bit, the value is Host family
> >> dependent.
> >> +On EPYC, the value should be 5.
> > Is it valid to specify a different value for either of these properties ?
> > eg what happens if I pass cbitpos=45 instead of 47 on an EPYC host ?
>
> On EPYC, passing anything other than 47 will trigger error during SEV
> guest initialization. The value of Cbit position is host dependent, the
> value is readonly and can be obtained through the host CPUID. The
> cbitpos must be same between guest and host. Please note that the pte's
> in guest page table will need to use the cbitpos information to mark
> the pages as encrypted. If cbit position given to the guest is different
> from the host then guest will fail to execute.
>
> >
> > In particular I thinking about possible migration scenario, where EPYC
> > uses 47 by default but some $NEXT AMD CPU uses 48 by default. In that
> > case we might want to use '47' on both CPUs if we need ability to live
> > migrate between different host CPU generations. Would that be valid ?
>
> We will not be able to migrate SEV guests if cbit position does not
> match between the source and destination hosts. Since during migration,
> the destination guest is launched with same QEMU cli as source hence
> cbitpos check in QEMU will catch it and fail the new launch. Optionally,
> user can call query-sev-capabilities on both source and destination to
> see if cbitpos is compatible before attempting to migrate the guest.
>
> > On the flip side, if the value really it strictly tied to the host
> > CPU family and no deviation is permitted, could the kernel not just
> > pick the right value automatically avoiding the config option ?
> >
>
> I think doing so will be an issue for the migration. Consider your above
> use case, a SEV guest is running on EPYC with cbitpos=47 and if we
> migrate to some $NEXT AMD CPU which uses need to use cbitpos=48 and we
> will fail to resume the guest on destination after migrating.
Exactly, in other words these two options are part of the guest
ABI, and QEMU promises to never make the guest ABI depend on the
host hardware unless you're using "-cpu host".
In theory we could make QEMU choose the right values
automatically if we document very clearly that the default
behavior is unsafe. But I would rather not take that risk and
force management software to be aware of the gotchas involved in
using SEV + live-migration.
--
Eduardo
Re: [Qemu-devel] [PATCH 0/4] qapi: generate a literal qobject for introspection
On 03/05/2018 11:29 AM, Marc-André Lureau wrote: Hi, This is a small series of a few preliminary patches taken off the "[PATCH v4 00/51]" qapi-conditional series that were already reviewed by Markus. They are improvements worthwhile for 2.12 inclusion. Marc-André Lureau (4): qapi2texi: minor python code simplification qlit: use QType instead of int qlit: add qobject_from_qlit() qapi: generate a literal qobject for introspection Thanks; I've queued this on my QAPI tree (with the python 3 fix), and will submit a pull request before soft freeze. -- Eric Blake, Principal Software Engineer Red Hat, Inc. +1-919-301-3266 Virtualization: qemu.org | libvirt.org
Re: [Qemu-devel] [PATCH v12 28/28] tests/qmp-test: blacklist sev specific qmp commands
On Thu, Mar 08, 2018 at 06:45:04PM -0300, Eduardo Habkost wrote: > On Thu, Mar 08, 2018 at 02:18:55PM -0600, Brijesh Singh wrote: > > > > > > On 3/8/18 11:08 AM, Daniel P. Berrangé wrote: > > > On Thu, Mar 08, 2018 at 06:49:01AM -0600, Brijesh Singh wrote: > > >> Blacklist the following commands to fix the 'make check' failure. > > >> > > >> query-sev-launch-measure: it returns meaninful data only when we launch > > >> SEV guest otherwise the command returns an error. > > >> > > >> query-sev: it return an error when SEV is not available on host (e.g non > > >> X86 platform or KVM is disabled at the build time) > > >> > > >> query-sev-capabilities: it returns an error when SEV feature is not > > >> available on host machine. > > > We generally expect 'make check' to succeed on every single patch > > > in a series, so that 'git bisect' doesn't break. > > > > > > So you should add each command to the blacklist in the same commit > > > that introduced the failure in the first place. > > > > > > Sure, I can quickly send the updated patch series to address your this > > concern, but before spamming everyone's inbox I was wondering if I can > > get some indication whether this series will make into 2.12 merge. > > > > Paolo, Eduardo and Richard, > > > > Most of the changes are in x86 directory hence any thought if you are > > considering this series for 2.12 ? I have been testing the series with > > and without SEV support and so far have not ran into any issue. if you > > are not planning to pull this series in 2.12 then I will wait a bit > > longer to get more feedback before sending the updates to address > > Daniel's comment. thanks > > Trying to merge it before 2.12 soft freeze (next Tuesday) still > looks like a reasonable goal to me. What do others think? I've only really looked at the QAPI / QMP bits and they seem fine from pov of libvirt's needs - just very minor comments. So not objection from me on that area of the code. Regards, Daniel -- |: http://berrange.com -o-http://www.flickr.com/photos/dberrange/ :| |: http://libvirt.org -o- http://virt-manager.org :| |: http://entangle-photo.org -o-http://search.cpan.org/~danberr/ :|
Re: [Qemu-devel] [PATCH v2] ppc440_pcix: Change some error_report to qemu_log_mask(LOG_UNIMP, ...)
On Thu, Mar 08, 2018 at 12:08:08PM +0100, BALATON Zoltan wrote:
> Using log unimp is more appropriate for these messages and this also
> silences them by default so they won't clobber make check output when
> tests are added for this board.
>
> Signed-off-by: BALATON Zoltan
> Reviewed-by: Thomas Huth
Applied, thanks.
> ---
> v2: Use defined format string for printing hwaddr instead of casting.
> I guess this does not invalidate the R-b tag of v1 so I've added that too.
>
> hw/ppc/ppc440_pcix.c | 10 ++
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/hw/ppc/ppc440_pcix.c b/hw/ppc/ppc440_pcix.c
> index ab2626a..1dc5d7f 100644
> --- a/hw/ppc/ppc440_pcix.c
> +++ b/hw/ppc/ppc440_pcix.c
> @@ -286,8 +286,9 @@ static void ppc440_pcix_reg_write4(void *opaque, hwaddr
> addr,
> break;
>
> default:
> -error_report("%s: unhandled PCI internal register 0x%lx", __func__,
> - (unsigned long)addr);
> +qemu_log_mask(LOG_UNIMP,
> + "%s: unhandled PCI internal register
> 0x%"HWADDR_PRIx"\n",
> + __func__, addr);
> break;
> }
> }
> @@ -377,8 +378,9 @@ static uint64_t ppc440_pcix_reg_read4(void *opaque,
> hwaddr addr,
> break;
>
> default:
> -error_report("%s: invalid PCI internal register 0x%lx", __func__,
> - (unsigned long)addr);
> +qemu_log_mask(LOG_UNIMP,
> + "%s: invalid PCI internal register 0x%" HWADDR_PRIx
> "\n",
> + __func__, addr);
> val = 0;
> }
>
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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Re: [Qemu-devel] [PATCH v2 8/8] ovmf: add DxeTpm2MeasureBootLib
Very good question. Comment below: > -Original Message- > From: Laszlo Ersek [mailto:ler...@redhat.com] > Sent: Friday, March 9, 2018 3:54 AM > To: marcandre.lur...@redhat.com; edk2-de...@lists.01.org; Yao, Jiewen > > Cc: pjo...@redhat.com; stef...@linux.vnet.ibm.com; > qemu-devel@nongnu.org; javi...@redhat.com > Subject: Re: [PATCH v2 8/8] ovmf: add DxeTpm2MeasureBootLib > > (Jiewen, below I have a question for you as well; please help with that.) > > On 03/07/18 16:57, marcandre.lur...@redhat.com wrote: > > From: Marc-André Lureau > > > > The library registers a security management handler, to measure images > > that are not measure in PEI phase. > > > > This seems to work for example with the qemu PXE rom: > > > > Loading driver at 0x0003E6C2000 EntryPoint=0x0003E6C9076 8086100e.efi > > > > And the following binary_bios_measurements log entry seems to be > > added: > > > > PCR: 2 type: EV_EFI_BOOT_SERVICES_DRIVER size: 0x4e digest: > 70a22475e9f18806d2ed9193b48d80d26779d9a4 > > > > Cc: Laszlo Ersek > > Cc: Stefan Berger > > Contributed-under: TianoCore Contribution Agreement 1.0 > > Signed-off-by: Marc-André Lureau > > --- > > OvmfPkg/OvmfPkgX64.dsc | 3 +++ > > 1 file changed, 3 insertions(+) > > > > diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc > > index 7753852144fb..9db1712e3623 100644 > > --- a/OvmfPkg/OvmfPkgX64.dsc > > +++ b/OvmfPkg/OvmfPkgX64.dsc > > @@ -662,6 +662,9 @@ [Components] > > > > !if $(SECURE_BOOT_ENABLE) == TRUE > > > NULL|SecurityPkg/Library/DxeImageVerificationLib/DxeImageVerificationLib.inf > > +!endif > > +!if $(TPM2_ENABLE) == TRUE > > + > NULL|SecurityPkg/Library/DxeTpm2MeasureBootLib/DxeTpm2MeasureBootLib.i > nf > > !endif > >} > > > > > > (1) Marc-André, please change the subject line to: > > OvmfPkg: plug DxeTpm2MeasureBootLib into SecurityStubDxe > > > (2) I have a question for Jiewen: > > DxeTpm2MeasureBootLib consumes the TCG2 protocol, but it does not depend > on it with a DEPEX. Instead, DxeTpm2MeasureBootHandler() tries to locate > the protocol on every invocation. [Jiewen] Yes. > This means that SecurityStubDxe may produce the Security and Security2 > Architectural Protocols before measurements into the TPM2 device are > possible. [Jiewen] Yes. > Therefore, UEFI_DRIVER modules (which depend on all of the > Arch protocols) may be started before they can be measured into the TPM. > > Now, this is likely no problem for UEFI_DRIVER modules that are built > into the firmware volume(s), because those are measured by Tcg2Pei > anyway. [Jiewen] That is TRUE. However, it would be a problem for UEFI_DRIVER modules / apps > that come from external media (disk, network, PCI oprom, etc). [Jiewen] By design, the 3rd part module should not be invoked before EndOfDxe. All Arch Protocol Ready is not strong enough. :-) Please refer to https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Universal/SecurityStubDxe/Defer3rdPartyImageLoad.c If a non-FV image is loaded before EndOfDxe, it will be queued into mDeferred3rdPartyImage. We also added EfiBootManagerDispatchDeferredImages() API in https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Include/Library/UefiBootManagerLib.h and implemented in https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Library/UefiBootManagerLib/BmMisc.c A platform must call EfiBootManagerDispatchDeferredImages(), if the platform supports PCI OROM. You can find the sample code in https://github.com/tianocore/edk2-platforms/blob/devel-MinPlatform/Platform/Intel/MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/BdsPlatform.c > However, such are loaded only in the BDS phase, and BDS is only entered > after all of the DXE drivers are dispatched from the firmware volumes. > In other words, the ordering between Tcg2Dxe and external UEFI_DRIVER / > UEFI_APPLICATION modules is ensured that Tcg2Dxe will be dispatched in > the DXE phase, while the latter will only be loaded in BDS. > > Is this intentional? Is my understanding correct? [Jiewen] Right. The only assumption is: Tcg2Dxe is included in the firmware volume and it is dispatched before EndOfDxe. > > (3) If that's the case, then Marc-André, please add the following to the > commit message: > > > Hooking DxeTpm2MeasureBootLib into SecurityStubDxe ensures that the > Security and Security2 Arch protocols will entail, by the time of > entering the BDS phase, the measuring of UEFI binaries into the TPM. > Thus, external UEFI_DRIVER and UEFI_APPLICATION modules (which are > loaded in the BDS phase, from disk, network, PCI oprom, etc) will be > measured. > > Drivers dispatched in the DXE phase before Tcg2Dxe will not be measured > individually; however such drivers come from the firmware volume(s), and > those are measured in the PEI phase by Tcg2Pei. > > > Thanks! > Laszlo
Re: [Qemu-devel] [PATCH 03/19] uninorth: QOMify PCI and AGP host bridges
On Tue, Mar 06, 2018 at 08:30:47PM +, Mark Cave-Ayland wrote:
> Signed-off-by: Mark Cave-Ayland
Applied, thanks.
> ---
> hw/pci-host/uninorth.c | 79
> --
> 1 file changed, 32 insertions(+), 47 deletions(-)
>
> diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
> index 710818e355..1d4d3f5705 100644
> --- a/hw/pci-host/uninorth.c
> +++ b/hw/pci-host/uninorth.c
> @@ -129,72 +129,61 @@ static const MemoryRegionOps unin_data_ops = {
> .endianness = DEVICE_LITTLE_ENDIAN,
> };
>
> -static int pci_unin_main_init_device(SysBusDevice *dev)
> +static void pci_unin_main_init(Object *obj)
> {
> -PCIHostState *h;
> +SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
> +PCIHostState *h = PCI_HOST_BRIDGE(obj);
>
> /* Use values found on a real PowerMac */
> /* Uninorth main bus */
> -h = PCI_HOST_BRIDGE(dev);
> -
> memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops,
> - dev, "pci-conf-idx", 0x1000);
> -memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, dev,
> + obj, "pci-conf-idx", 0x1000);
> +memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, obj,
>"pci-conf-data", 0x1000);
> -sysbus_init_mmio(dev, &h->conf_mem);
> -sysbus_init_mmio(dev, &h->data_mem);
> -
> -return 0;
> +sysbus_init_mmio(sbd, &h->conf_mem);
> +sysbus_init_mmio(sbd, &h->data_mem);
> }
>
> -
> -static int pci_u3_agp_init_device(SysBusDevice *dev)
> +static void pci_u3_agp_init(Object *obj)
> {
> -PCIHostState *h;
> +SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
> +PCIHostState *h = PCI_HOST_BRIDGE(obj);
>
> /* Uninorth U3 AGP bus */
> -h = PCI_HOST_BRIDGE(dev);
> -
> memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops,
> - dev, "pci-conf-idx", 0x1000);
> -memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, dev,
> + obj, "pci-conf-idx", 0x1000);
> +memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, obj,
>"pci-conf-data", 0x1000);
> -sysbus_init_mmio(dev, &h->conf_mem);
> -sysbus_init_mmio(dev, &h->data_mem);
> -
> -return 0;
> +sysbus_init_mmio(sbd, &h->conf_mem);
> +sysbus_init_mmio(sbd, &h->data_mem);
> }
>
> -static int pci_unin_agp_init_device(SysBusDevice *dev)
> +static void pci_unin_agp_init(Object *obj)
> {
> -PCIHostState *h;
> +SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
> +PCIHostState *h = PCI_HOST_BRIDGE(obj);
>
> /* Uninorth AGP bus */
> -h = PCI_HOST_BRIDGE(dev);
> -
> memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops,
> - dev, "pci-conf-idx", 0x1000);
> + obj, "pci-conf-idx", 0x1000);
> memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops,
> - dev, "pci-conf-data", 0x1000);
> -sysbus_init_mmio(dev, &h->conf_mem);
> -sysbus_init_mmio(dev, &h->data_mem);
> -return 0;
> + obj, "pci-conf-data", 0x1000);
> +sysbus_init_mmio(sbd, &h->conf_mem);
> +sysbus_init_mmio(sbd, &h->data_mem);
> }
>
> -static int pci_unin_internal_init_device(SysBusDevice *dev)
> +static void pci_unin_internal_init(Object *obj)
> {
> -PCIHostState *h;
> +SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
> +PCIHostState *h = PCI_HOST_BRIDGE(obj);
>
> /* Uninorth internal bus */
> -h = PCI_HOST_BRIDGE(dev);
> -
> memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops,
> - dev, "pci-conf-idx", 0x1000);
> + obj, "pci-conf-idx", 0x1000);
> memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops,
> - dev, "pci-conf-data", 0x1000);
> -sysbus_init_mmio(dev, &h->conf_mem);
> -sysbus_init_mmio(dev, &h->data_mem);
> -return 0;
> + obj, "pci-conf-data", 0x1000);
> +sysbus_init_mmio(sbd, &h->conf_mem);
> +sysbus_init_mmio(sbd, &h->data_mem);
> }
>
> PCIBus *pci_pmac_init(qemu_irq *pic,
> @@ -461,10 +450,8 @@ static const TypeInfo unin_internal_pci_host_info = {
>
> static void pci_unin_main_class_init(ObjectClass *klass, void *data)
> {
> -SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass);
> DeviceClass *dc = DEVICE_CLASS(klass);
>
> -sbc->init = pci_unin_main_init_device;
> set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
> }
>
> @@ -472,15 +459,14 @@ static const TypeInfo pci_unin_main_info = {
> .name = TYPE_UNI_NORTH_PCI_HOST_BRIDGE,
> .parent= TYPE_PCI_HOST_BRIDGE,
> .instance_size = sizeof(UNINState),
> +.instance_init = pci_unin_main_init,
> .class_init= pci_unin_main_class_init,
> };
>
> static void pci_u3_agp_class_init(Obje
Re: [Qemu-devel] [PATCH] PPC e500: Fix gap between u-boot and kernel
On Thu, Mar 08, 2018 at 12:50:36PM +0100, David Engraf wrote:
> This patch moves the gap between u-boot and kernel at the correct location.
>
> Signed-off-by: David Engraf
Applied, thanks.
> ---
> hw/ppc/e500.c | 9 -
> 1 file changed, 4 insertions(+), 5 deletions(-)
>
> diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
> index 43c15d18c4..bdef2bddc6 100644
> --- a/hw/ppc/e500.c
> +++ b/hw/ppc/e500.c
> @@ -1009,6 +1009,10 @@ void ppce500_init(MachineState *machine, PPCE500Params
> *params)
> }
>
> cur_base = loadaddr + payload_size;
> +if (cur_base < (32 * 1024 * 1024)) {
> +/* u-boot occupies memory up to 32MB, so load blobs above */
> +cur_base = (32 * 1024 * 1024);
> +}
>
> /* Load bare kernel only if no bios/u-boot has been provided */
> if (machine->kernel_filename && !kernel_as_payload) {
> @@ -1025,11 +1029,6 @@ void ppce500_init(MachineState *machine, PPCE500Params
> *params)
> cur_base += kernel_size;
> }
>
> -if (cur_base < (32 * 1024 * 1024)) {
> -/* u-boot occupies memory up to 32MB, so load blobs above */
> -cur_base = (32 * 1024 * 1024);
> -}
> -
> /* Load initrd. */
> if (machine->initrd_filename) {
> initrd_base = (cur_base + INITRD_LOAD_PAD) & ~INITRD_PAD_MASK;
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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Description: PGP signature
Re: [Qemu-devel] [PATCH 04/19] uninorth: remove stray PCIBus realize from mac_newworld.c
On Tue, Mar 06, 2018 at 08:30:48PM +, Mark Cave-Ayland wrote: > After QOMification this is clearly no longer needed (and possibly hasn't been > for some time). > > Signed-off-by: Mark Cave-Ayland Applied, thanks. > --- > hw/ppc/mac_newworld.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c > index 1eba79d54b..3410bb13ad 100644 > --- a/hw/ppc/mac_newworld.c > +++ b/hw/ppc/mac_newworld.c > @@ -351,7 +351,6 @@ static void ppc_core99_init(MachineState *machine) > pci_bus = pci_pmac_init(pic, get_system_memory(), get_system_io()); > machine_arch = ARCH_MAC99; > } > -object_property_set_bool(OBJECT(pci_bus), true, "realized", > &error_abort); > > machine->usb |= defaults_enabled() && !machine->usb_disabled; > -- David Gibson| I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson signature.asc Description: PGP signature
Re: [Qemu-devel] [PATCH v2 8/8] ovmf: add DxeTpm2MeasureBootLib
Besides the comment below, I should have used the example in OvmfPkg. Please refer to https://github.com/tianocore/edk2/blob/master/OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c The EfiBootManagerDispatchDeferredImages() API call is added just after gEfiDxeSmmReadyToLockProtocolGuid. So I don’t see any problem in OVMF pkg. Thank you Yao Jiewen > -Original Message- > From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Yao, > Jiewen > Sent: Friday, March 9, 2018 8:39 AM > To: Laszlo Ersek ; marcandre.lur...@redhat.com; > edk2-de...@lists.01.org > Cc: javi...@redhat.com; pjo...@redhat.com; qemu-devel@nongnu.org > Subject: Re: [edk2] [PATCH v2 8/8] ovmf: add DxeTpm2MeasureBootLib > > Very good question. > Comment below: > > > -Original Message- > > From: Laszlo Ersek [mailto:ler...@redhat.com] > > Sent: Friday, March 9, 2018 3:54 AM > > To: marcandre.lur...@redhat.com; edk2-de...@lists.01.org; Yao, Jiewen > > > > Cc: pjo...@redhat.com; stef...@linux.vnet.ibm.com; > > qemu-devel@nongnu.org; javi...@redhat.com > > Subject: Re: [PATCH v2 8/8] ovmf: add DxeTpm2MeasureBootLib > > > > (Jiewen, below I have a question for you as well; please help with that.) > > > > On 03/07/18 16:57, marcandre.lur...@redhat.com wrote: > > > From: Marc-André Lureau > > > > > > The library registers a security management handler, to measure images > > > that are not measure in PEI phase. > > > > > > This seems to work for example with the qemu PXE rom: > > > > > > Loading driver at 0x0003E6C2000 EntryPoint=0x0003E6C9076 8086100e.efi > > > > > > And the following binary_bios_measurements log entry seems to be > > > added: > > > > > > PCR: 2type: EV_EFI_BOOT_SERVICES_DRIVER size: 0x4e digest: > > 70a22475e9f18806d2ed9193b48d80d26779d9a4 > > > > > > Cc: Laszlo Ersek > > > Cc: Stefan Berger > > > Contributed-under: TianoCore Contribution Agreement 1.0 > > > Signed-off-by: Marc-André Lureau > > > --- > > > OvmfPkg/OvmfPkgX64.dsc | 3 +++ > > > 1 file changed, 3 insertions(+) > > > > > > diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc > > > index 7753852144fb..9db1712e3623 100644 > > > --- a/OvmfPkg/OvmfPkgX64.dsc > > > +++ b/OvmfPkg/OvmfPkgX64.dsc > > > @@ -662,6 +662,9 @@ [Components] > > > > > > !if $(SECURE_BOOT_ENABLE) == TRUE > > > > > > NULL|SecurityPkg/Library/DxeImageVerificationLib/DxeImageVerificationLib.inf > > > +!endif > > > +!if $(TPM2_ENABLE) == TRUE > > > + > > > NULL|SecurityPkg/Library/DxeTpm2MeasureBootLib/DxeTpm2MeasureBootLib.i > > nf > > > !endif > > >} > > > > > > > > > > (1) Marc-André, please change the subject line to: > > > > OvmfPkg: plug DxeTpm2MeasureBootLib into SecurityStubDxe > > > > > > (2) I have a question for Jiewen: > > > > DxeTpm2MeasureBootLib consumes the TCG2 protocol, but it does not depend > > on it with a DEPEX. Instead, DxeTpm2MeasureBootHandler() tries to locate > > the protocol on every invocation. > [Jiewen] Yes. > > > This means that SecurityStubDxe may produce the Security and Security2 > > Architectural Protocols before measurements into the TPM2 device are > > possible. > [Jiewen] Yes. > > > Therefore, UEFI_DRIVER modules (which depend on all of the > > Arch protocols) may be started before they can be measured into the TPM. > > > > Now, this is likely no problem for UEFI_DRIVER modules that are built > > into the firmware volume(s), because those are measured by Tcg2Pei > > anyway. > [Jiewen] That is TRUE. > > However, it would be a problem for UEFI_DRIVER modules / apps > > that come from external media (disk, network, PCI oprom, etc). > [Jiewen] By design, the 3rd part module should not be invoked before EndOfDxe. > All Arch Protocol Ready is not strong enough. :-) > Please refer to > https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Universal/Sec > urityStubDxe/Defer3rdPartyImageLoad.c > > If a non-FV image is loaded before EndOfDxe, it will be queued into > mDeferred3rdPartyImage. > > We also added EfiBootManagerDispatchDeferredImages() API in > https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Include/Librar > y/UefiBootManagerLib.h and implemented in > https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Library/UefiB > ootManagerLib/BmMisc.c > A platform must call EfiBootManagerDispatchDeferredImages(), if the platform > supports PCI OROM. > > You can find the sample code in > https://github.com/tianocore/edk2-platforms/blob/devel-MinPlatform/Platform > /Intel/MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/BdsPlatform.c > > > > > However, such are loaded only in the BDS phase, and BDS is only entered > > after all of the DXE drivers are dispatched from the firmware volumes. > > In other words, the ordering between Tcg2Dxe and external UEFI_DRIVER / > > UEFI_APPLICATION modules is ensured that Tcg2Dxe will be dispatched in > > the DXE phase, while the latter will only be loaded in BDS. > > > > Is this intentional? Is my understanding correct? >
Re: [Qemu-devel] [PATCH v4 2/5] qmp: distinguish PC-DIMM and NVDIMM in MemoryDeviceInfoList
On 03/08/18 11:22 -0600, Eric Blake wrote:
> On 03/07/2018 08:33 PM, Haozhong Zhang wrote:
> > It may need to treat PC-DIMM and NVDIMM differently, e.g., when
> > deciding the necessity of non-volatile flag bit in SRAT memory
> > affinity structures.
> >
> > NVDIMMDeviceInfo, which inherits from PCDIMMDeviceInfo, is added to
> > union type MemoryDeviceInfo to record information of NVDIMM devices.
> > The NVDIMM-specific data is currently left empty and will be filled
> > when necessary in the future.
> >
> > It also fixes "info memory-devices"/query-memory-devices which
> > currently show nvdimm devices as dimm devices since
> > object_dynamic_cast(obj, TYPE_PC_DIMM) happily cast nvdimm to
> > TYPE_PC_DIMM which it's been inherited from.
> >
> > Signed-off-by: Haozhong Zhang
> > ---
>
> > +++ b/qapi/misc.json
> > @@ -2830,6 +2830,18 @@
> > }
> > }
> > +##
> > +# @NVDIMMDeviceInfo:
> > +#
> > +# NVDIMMDevice state information
> > +#
> > +# Since: 2.12
> > +##
> > +{ 'struct': 'NVDIMMDeviceInfo',
> > + 'base': 'PCDIMMDeviceInfo',
> > + 'data': {}
> > +}
> > +
>
> As long as you don't have any data members to add, you could omit this
> type...
Sure, I'll change in the next version.
Haozhong
>
> > ##
> > # @MemoryDeviceInfo:
> > #
> > @@ -2837,7 +2849,11 @@
> > #
> > # Since: 2.1
> > ##
> > -{ 'union': 'MemoryDeviceInfo', 'data': {'dimm': 'PCDIMMDeviceInfo'} }
> > +{ 'union': 'MemoryDeviceInfo',
> > + 'data': { 'dimm': 'PCDIMMDeviceInfo',
> > +'nvdimm': 'NVDIMMDeviceInfo'
> > + }
>
> and just write this as
>
> 'data': { 'dimm': 'PCDIMMDeviceInfo',
>'nvdimm': 'PCDIMMDeviceInfo' }
>
> If, down the road, you want to add data members to one but not both of the
> branches, we can add a new (sub-)type at that time, and it won't break
> backwards compatibility.
>
> --
> Eric Blake, Principal Software Engineer
> Red Hat, Inc. +1-919-301-3266
> Virtualization: qemu.org | libvirt.org
Re: [Qemu-devel] [PATCH v2 0/2] slirp: Add query-usernet QMP command
Gentle ping.. On Mon, 02/26 15:58, Fam Zheng wrote: > v2: Fix compiler error. [patchew] > > The command is a counterpart of HMP "info usernet" and is at least very useful > for the VM tests. So add it. > > Fam Zheng (2): > slirp: Add "query-usernet" QMP command > tests: Use query-usernet instead of 'info usernet' > > net/slirp.c| 26 +++ > qapi/net.json | 201 > + > slirp/libslirp.h | 1 + > slirp/misc.c | 156 + > slirp/tcp.h| 15 > tests/vm/basevm.py | 14 ++-- > 6 files changed, 346 insertions(+), 67 deletions(-) > > -- > 2.14.3 >
Re: [Qemu-devel] [edk2] [PATCH v2 0/8] RFC: ovmf: preliminary TPM2 support
Hi Marcandre, Thanks for your command steps and I tried them, but my qemu failed to connect the socket tpmemu.sock. When I added the control channel to the TPM, the swtpm socket command stuck there and never exit. Not sure whether it was successful. Below are the command steps running output in my side > Then you can run: > mkdir tpmstatedir > swtpm_setup.sh --tpm2 --tpm-state tpmstatedir $ swtpm_setup.sh --tpm2 --tpm-state tpmstatedir Starting vTPM manufacturing as jshi19:jshi19 @ 2018年03月09日 星期五 10时28分39秒 TPM is listening on TCP port 47364. Successfully authored TPM state. Ending vTPM manufacturing @ 2018年03月09日 星期五 10时28分39秒 > Run the emulator: > swtpm socket --tpmstate dir=tpmstatedir --ctrl type=unixio,path=tpmemu.sock > --tpm2 $ swtpm socket --tpmstate dir=tpmstatedir --ctrl type=unixio,path=tpmemu.sock --tpm2 (the swtpm socket command stuck there and never exit) > Run qemu (from git) with ovmf (with this series): > qemu ... -chardev socket,id=chrtpm,path=tpmemu.sock -tpmdev > emulator,id=tpm0,chardev=chrtpm -device tpm-crb,tpmdev=tpm0 > -drive if=pflash,format=raw,file=OVMF_CODE.fd,readonly -drive > if=pflash,format=raw,file=OVMF_VARS.fd .. $ qemu-system-x86_64 -serial file:serial.log -m 5120 -hda fat:. -monitor stdio --enable-kvm -smp 4 -bios ../Ovmf3264/NOOPT_GCC5/FV/OVMF.fd -chardev socket,id=chrtpm,path=tpmemu.sock -tpmdev emulator,id=tpm0,chardev=chrtpm -device tpm-crb,tpmdev=tpm0 qemu-system-x86_64: -chardev socket,id=chrtpm,path=tpmemu.sock: Failed to connect socket tpmemu.sock: No such file or directory I use the latest version qemu as below: $ qemu-system-x86_64 --version QEMU emulator version 2.11.50 (v2.10.0-4184-g930b01138b-dirty) Copyright (c) 2003-2017 Fabrice Bellard and the QEMU Project developers Thanks Steven Shi
Re: [Qemu-devel] [PATCH v2] ppc440_pcix: Change some error_report to qemu_log_mask(LOG_UNIMP, ...)
On Fri, Mar 09, 2018 at 10:44:46AM +1100, David Gibson wrote:
> On Thu, Mar 08, 2018 at 12:08:08PM +0100, BALATON Zoltan wrote:
> > Using log unimp is more appropriate for these messages and this also
> > silences them by default so they won't clobber make check output when
> > tests are added for this board.
> >
> > Signed-off-by: BALATON Zoltan
> > Reviewed-by: Thomas Huth
>
> Applied, thanks.
Wait.. I've taken it out again. Under some configurations (exercised
by Travis) qemu_log_mask() is undeclared here you're using it. See
https://travis-ci.org/dgibson/qemu/jobs/351093986 for some more
information.
>
> > ---
> > v2: Use defined format string for printing hwaddr instead of casting.
> > I guess this does not invalidate the R-b tag of v1 so I've added that too.
> >
> > hw/ppc/ppc440_pcix.c | 10 ++
> > 1 file changed, 6 insertions(+), 4 deletions(-)
> >
> > diff --git a/hw/ppc/ppc440_pcix.c b/hw/ppc/ppc440_pcix.c
> > index ab2626a..1dc5d7f 100644
> > --- a/hw/ppc/ppc440_pcix.c
> > +++ b/hw/ppc/ppc440_pcix.c
> > @@ -286,8 +286,9 @@ static void ppc440_pcix_reg_write4(void *opaque, hwaddr
> > addr,
> > break;
> >
> > default:
> > -error_report("%s: unhandled PCI internal register 0x%lx", __func__,
> > - (unsigned long)addr);
> > +qemu_log_mask(LOG_UNIMP,
> > + "%s: unhandled PCI internal register
> > 0x%"HWADDR_PRIx"\n",
> > + __func__, addr);
> > break;
> > }
> > }
> > @@ -377,8 +378,9 @@ static uint64_t ppc440_pcix_reg_read4(void *opaque,
> > hwaddr addr,
> > break;
> >
> > default:
> > -error_report("%s: invalid PCI internal register 0x%lx", __func__,
> > - (unsigned long)addr);
> > +qemu_log_mask(LOG_UNIMP,
> > + "%s: invalid PCI internal register 0x%" HWADDR_PRIx
> > "\n",
> > + __func__, addr);
> > val = 0;
> > }
> >
>
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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[Qemu-devel] [Bug 1754542] [NEW] colo: secondary vm crash when execute x-colo-lost-heartbeat
Public bug reported:
I use Arch Linux x86_64
both qemu 2.11.1 and Zhang
Chen's(https://github.com/zhangckid/qemu/commits/colo-with-virtio-net-internal-jul10)
Following document 'COLO-FT.txt',
I test colo feature on my hosts
I run this command
Primary:
sudo qemu-system-x86_64 -boot c -enable-kvm -m 2048 -smp 2 -qmp stdio -name
primary \
-device piix3-usb-uhci \
-device usb-tablet -netdev tap,id=hn0,vhost=off \
-device virtio-net-pci,id=net-pci0,netdev=hn0 \
-drive
if=virtio,id=colo-disk0,driver=quorum,read-pattern=fifo,vote-threshold=1,children.0.file.filename=/var/lib/libvirt/images/1.raw,children.0.driver=raw
-S
Secondary:
sudo qemu-system-x86_64 -boot c -enable-kvm -m 2048 -smp 2 -qmp stdio -name
secondary \
-device piix3-usb-uhci \
-device usb-tablet -netdev tap,id=hn0,vhost=off \
-device virtio-net-pci,id=net-pci0,netdev=hn0 \
-drive
if=none,id=colo-disk0,file.filename=/var/lib/libvirt/images/2.raw,driver=raw,node-name=node0
\
-drive if=virtio,id=active-disk0,driver=replication,mode=secondary,\
file.driver=qcow2,top-id=active-disk0,\
file.file.filename=/mnt/ramfs/active_disk.img,\
file.backing.driver=qcow2,\
file.backing.file.filename=/mnt/ramfs/hidden_disk.img,\
file.backing.backing=colo-disk0 \
-incoming tcp:0:
Secondary:
{'execute':'qmp_capabilities'}
{ 'execute': 'nbd-server-start',
'arguments': {'addr': {'type': 'inet', 'data': {'host': '192.168.0.33',
'port': '8889'} } }
}
{'execute': 'nbd-server-add', 'arguments': {'device': 'colo-disk0', 'writable':
true } }
Primary:
{'execute':'qmp_capabilities'}
{ 'execute': 'human-monitor-command',
'arguments': {'command-line': 'drive_add -n buddy
driver=replication,mode=primary,file.driver=nbd,file.host=192.168.0.34,file.port=8889,file.export=colo-disk0,node-name=nbd_client0'}}
{ 'execute':'x-blockdev-change', 'arguments':{'parent': 'colo-disk0', 'node':
'nbd_client0' } }
{ 'execute': 'migrate-set-capabilities',
'arguments': {'capabilities': [ {'capability': 'x-colo', 'state': true }
] } }
{ 'execute': 'migrate', 'arguments': {'uri': 'tcp:192.168.0.34:' } }
{ 'execute': 'migrate-set-parameters' , 'arguments':{ 'x-checkpoint-delay':
2000 } }
Above are all OK.Two VM syncing.
Primary:
{ 'execute': 'x-blockdev-change', 'arguments': {'parent': 'colo-disk0',
'child': 'children.1'}}
{ 'execute': 'human-monitor-command','arguments': {'command-line': 'drive_del
blk-buddy0'}}
Secondary:
{ 'execute': 'nbd-server-stop' }
{ 'execute': 'x-colo-lost-heartbeat' }
But When I execute x-colo-lost-heartbeat.Primary run Secondary cash
{ 'execute': 'nbd-server-stop' }
{"return": {}}
qemu-system-x86_64: Disconnect client, due to: Unexpected end-of-file before
all bytes were read
{ 'execute': 'x-colo-lost-heartbeat' }
{"return": {}}
qemu-system-x86_64: Can't receive COLO message: Input/output error
**
ERROR:/build/qemu/src/qemu-2.11.1/qom/object.c:907:object_unref: assertion
failed (obj->ref > 0): (0 > 0)
[1]2972 abort sudo /usr/bin/qemu-system-x86_64 -boot c -enable-kvm -m
2048 -smp 2 -qmp stdi
** Affects: qemu
Importance: Undecided
Status: New
** Tags: colo
** Description changed:
I use Arch Linux x86_64
- both qemu 2.11.1 Zhang
Chen's(https://github.com/zhangckid/qemu/commits/colo-with-virtio-net-internal-jul10)
+ both qemu 2.11.1 and Zhang
Chen's(https://github.com/zhangckid/qemu/commits/colo-with-virtio-net-internal-jul10)
Following document 'COLO-FT.txt',
I test colo feature on my hosts
I run this command
Primary:
sudo qemu-system-x86_64 -boot c -enable-kvm -m 2048 -smp 2 -qmp stdio
-name primary \
-device piix3-usb-uhci \
-device usb-tablet -netdev tap,id=hn0,vhost=off \
-device virtio-net-pci,id=net-pci0,netdev=hn0 \
-drive
if=virtio,id=colo-disk0,driver=quorum,read-pattern=fifo,vote-threshold=1,children.0.file.filename=/var/lib/libvirt/images/1.raw,children.0.driver=raw
-S
Secondary:
sudo qemu-system-x86_64 -boot c -enable-kvm -m 2048 -smp 2 -qmp stdio -name
secondary \
-device piix3-usb-uhci \
-device usb-tablet -netdev tap,id=hn0,vhost=off \
-device virtio-net-pci,id=net-pci0,netdev=hn0 \
-drive
if=none,id=colo-disk0,file.filename=/var/lib/libvirt/images/2.raw,driver=raw,node-name=node0
\
-drive if=virtio,id=active-disk0,driver=replication,mode=secondary,\
file.driver=qcow2,top-id=active-disk0,\
file.file.filename=/mnt/ramfs/active_disk.img,\
file.backing.driver=qcow2,\
file.backing.file.filename=/mnt/ramfs/hidden_disk.img,\
file.backing.backing=colo-disk0 \
-incoming tcp:0:
Secondary:
{'execute':'qmp_capabilities'}
{ 'execute': 'nbd-server-start',
- 'arguments': {'addr': {'type': 'inet', 'data': {'host': '192.168.0.33',
'port': '8889'} } }
+ 'arguments': {'addr': {'type': 'inet', 'data': {'host': '192.168.0.33',
'port': '8889'} } }
}
{'execute': 'nbd-server-add', 'arguments': {'device': 'colo-disk0',
'writable': true } }
Primary:
{'execute':'qmp_capabilities'}
{ 'execute': 'human-monitor-comma
[Qemu-devel] [Bug 1754542] Re: colo: secondary vm crash when execute x-colo-lost-heartbeat
** Description changed:
I use Arch Linux x86_64
both qemu 2.11.1 and Zhang
Chen's(https://github.com/zhangckid/qemu/commits/colo-with-virtio-net-internal-jul10)
Following document 'COLO-FT.txt',
I test colo feature on my hosts
I run this command
Primary:
sudo qemu-system-x86_64 -boot c -enable-kvm -m 2048 -smp 2 -qmp stdio
-name primary \
-device piix3-usb-uhci \
-device usb-tablet -netdev tap,id=hn0,vhost=off \
-device virtio-net-pci,id=net-pci0,netdev=hn0 \
-drive
if=virtio,id=colo-disk0,driver=quorum,read-pattern=fifo,vote-threshold=1,children.0.file.filename=/var/lib/libvirt/images/1.raw,children.0.driver=raw
-S
Secondary:
sudo qemu-system-x86_64 -boot c -enable-kvm -m 2048 -smp 2 -qmp stdio -name
secondary \
-device piix3-usb-uhci \
-device usb-tablet -netdev tap,id=hn0,vhost=off \
-device virtio-net-pci,id=net-pci0,netdev=hn0 \
-drive
if=none,id=colo-disk0,file.filename=/var/lib/libvirt/images/2.raw,driver=raw,node-name=node0
\
-drive if=virtio,id=active-disk0,driver=replication,mode=secondary,\
file.driver=qcow2,top-id=active-disk0,\
file.file.filename=/mnt/ramfs/active_disk.img,\
file.backing.driver=qcow2,\
file.backing.file.filename=/mnt/ramfs/hidden_disk.img,\
file.backing.backing=colo-disk0 \
-incoming tcp:0:
Secondary:
{'execute':'qmp_capabilities'}
{ 'execute': 'nbd-server-start',
'arguments': {'addr': {'type': 'inet', 'data': {'host': '192.168.0.33',
'port': '8889'} } }
}
{'execute': 'nbd-server-add', 'arguments': {'device': 'colo-disk0',
'writable': true } }
Primary:
{'execute':'qmp_capabilities'}
{ 'execute': 'human-monitor-command',
- 'arguments': {'command-line': 'drive_add -n buddy
driver=replication,mode=primary,file.driver=nbd,file.host=192.168.0.33,file.port=8889,file.export=colo-disk0,node-name=nbd_client0'}}
+ 'arguments': {'command-line': 'drive_add -n buddy
driver=replication,mode=primary,file.driver=nbd,file.host=192.168.0.34,file.port=8889,file.export=colo-disk0,node-name=nbd_client0'}}
{ 'execute':'x-blockdev-change', 'arguments':{'parent': 'colo-disk0', 'node':
'nbd_client0' } }
{ 'execute': 'migrate-set-capabilities',
'arguments': {'capabilities': [ {'capability': 'x-colo', 'state': true
} ] } }
- { 'execute': 'migrate', 'arguments': {'uri': 'tcp:192.168.0.33:' } }
+ { 'execute': 'migrate', 'arguments': {'uri': 'tcp:192.168.0.34:' } }
{ 'execute': 'migrate-set-parameters' , 'arguments':{ 'x-checkpoint-delay':
2000 } }
Above are all OK.Two VM syncing.
Primary:
{ 'execute': 'x-blockdev-change', 'arguments': {'parent': 'colo-disk0',
'child': 'children.1'}}
{ 'execute': 'human-monitor-command','arguments': {'command-line': 'drive_del
blk-buddy0'}}
Secondary:
{ 'execute': 'nbd-server-stop' }
{ 'execute': 'x-colo-lost-heartbeat' }
But When I execute x-colo-lost-heartbeat.Primary run Secondary cash
{ 'execute': 'nbd-server-stop' }
{"return": {}}
qemu-system-x86_64: Disconnect client, due to: Unexpected end-of-file before
all bytes were read
{ 'execute': 'x-colo-lost-heartbeat' }
{"return": {}}
qemu-system-x86_64: Can't receive COLO message: Input/output error
**
ERROR:/build/qemu/src/qemu-2.11.1/qom/object.c:907:object_unref: assertion
failed (obj->ref > 0): (0 > 0)
[1]2972 abort sudo /usr/bin/qemu-system-x86_64 -boot c -enable-kvm
-m 2048 -smp 2 -qmp stdi
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1754542
Title:
colo: secondary vm crash when execute x-colo-lost-heartbeat
Status in QEMU:
New
Bug description:
I use Arch Linux x86_64
both qemu 2.11.1 and Zhang
Chen's(https://github.com/zhangckid/qemu/commits/colo-with-virtio-net-internal-jul10)
Following document 'COLO-FT.txt',
I test colo feature on my hosts
I run this command
Primary:
sudo qemu-system-x86_64 -boot c -enable-kvm -m 2048 -smp 2 -qmp stdio
-name primary \
-device piix3-usb-uhci \
-device usb-tablet -netdev tap,id=hn0,vhost=off \
-device virtio-net-pci,id=net-pci0,netdev=hn0 \
-drive
if=virtio,id=colo-disk0,driver=quorum,read-pattern=fifo,vote-threshold=1,children.0.file.filename=/var/lib/libvirt/images/1.raw,children.0.driver=raw
-S
Secondary:
sudo qemu-system-x86_64 -boot c -enable-kvm -m 2048 -smp 2 -qmp stdio -name
secondary \
-device piix3-usb-uhci \
-device usb-tablet -netdev tap,id=hn0,vhost=off \
-device virtio-net-pci,id=net-pci0,netdev=hn0 \
-drive
if=none,id=colo-disk0,file.filename=/var/lib/libvirt/images/2.raw,driver=raw,node-name=node0
\
-drive if=virtio,id=active-disk0,driver=replication,mode=secondary,\
file.driver=qcow2,top-id=active-disk0,\
file.file.filename=/mnt/ramfs/active_disk.img,\
file.backing.driver=qcow2,\
file.backing.file.filename=/mnt/ramfs/hidden_disk.img,\
file.backing.backing=colo-disk0 \
-incoming tcp:0:
Secondary:
{'e
Re: [Qemu-devel] [PATCH v1 11/22] RISC-V: Improve page table walker spec compliance
On Wed, Mar 7, 2018 at 9:43 AM, Michael Clark wrote:
> - Inline PTE_TABLE check for better readability
> - Improve readibility of User page U mode and SUM test
> - Disallow non U mode from fetching from User pages
> - Add reserved PTE flag check: W or W|X
> - Add misaligned PPN check
> - Change access checks from ternary operator to if statements
> - Improves page walker comments
> - No measurable performance impact on dd test
>
> Signed-off-by: Michael Clark
> Signed-off-by: Palmer Dabbelt
> ---
> target/riscv/cpu_bits.h | 2 --
> target/riscv/helper.c | 57 ++
> ---
> 2 files changed, 40 insertions(+), 19 deletions(-)
>
> diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
> index 64aa097..12b4757 100644
> --- a/target/riscv/cpu_bits.h
> +++ b/target/riscv/cpu_bits.h
> @@ -407,5 +407,3 @@
> #define PTE_SOFT 0x300 /* Reserved for Software */
>
> #define PTE_PPN_SHIFT 10
> -
> -#define PTE_TABLE(PTE) (((PTE) & (PTE_V | PTE_R | PTE_W | PTE_X)) ==
> PTE_V)
> diff --git a/target/riscv/helper.c b/target/riscv/helper.c
> index 228933c..2165ecb 100644
> --- a/target/riscv/helper.c
> +++ b/target/riscv/helper.c
> @@ -185,16 +185,36 @@ restart:
> #endif
> target_ulong ppn = pte >> PTE_PPN_SHIFT;
>
> -if (PTE_TABLE(pte)) { /* next level of page table */
> +if (!(pte & PTE_V)) {
> +/* Invalid PTE */
> +return TRANSLATE_FAIL;
> +} else if (!(pte & (PTE_R | PTE_W | PTE_X))) {
> +/* Inner PTE, continue walking */
> base = ppn << PGSHIFT;
> -} else if ((pte & PTE_U) ? (mode == PRV_S) && !sum : !(mode ==
> PRV_S)) {
> -break;
> -} else if (!(pte & PTE_V) || (!(pte & PTE_R) && (pte & PTE_W))) {
> -break;
> -} else if (access_type == MMU_INST_FETCH ? !(pte & PTE_X) :
> - access_type == MMU_DATA_LOAD ? !(pte & PTE_R) &&
> - !(mxr && (pte & PTE_X)) : !((pte & PTE_R) && (pte &
> PTE_W))) {
> -break;
> +} else if ((pte & (PTE_R | PTE_W | PTE_X)) == PTE_W) {
> +/* Reserved leaf PTE flags: PTE_W */
> +return TRANSLATE_FAIL;
> +} else if ((pte & (PTE_R | PTE_W | PTE_X)) == (PTE_W | PTE_X)) {
> +/* Reserved leaf PTE flags: PTE_W + PTE_X */
> +return TRANSLATE_FAIL;
> +} else if ((pte & PTE_U) && ((mode != PRV_U) &&
> + (!sum || access_type == MMU_INST_FETCH))) {
> +/* User PTE flags when not U mode and mstats.SUM is not set,
> + or the access type is an instruction fetch */
> +return TRANSLATE_FAIL;
> +} else if (ppn & ((1ULL << ptshift) - 1)) {
> +/* Misasligned PPN */
> +return TRANSLATE_FAIL;
> +} else if (access_type == MMU_DATA_LOAD && !((pte & PTE_R) ||
> + ((pte & PTE_X) && mxr))) {
>
This should only honor the mstatus.MXR flags if mode != PRV_U
+/* Read access check failed */
> +return TRANSLATE_FAIL;
> +} else if (access_type == MMU_DATA_STORE && !(pte & PTE_W)) {
> +/* Write access check failed */
> +return TRANSLATE_FAIL;
> +} else if (access_type == MMU_INST_FETCH && !(pte & PTE_X)) {
> +/* Fetch access check failed */
> +return TRANSLATE_FAIL;
> } else {
> /* if necessary, set accessed and dirty bits. */
> target_ulong updated_pte = pte | PTE_A |
> @@ -202,11 +222,14 @@ restart:
>
> /* Page table updates need to be atomic with MTTCG enabled */
> if (updated_pte != pte) {
> -/* if accessed or dirty bits need updating, and the PTE is
> - * in RAM, then we do so atomically with a compare and
> swap.
> - * if the PTE is in IO space, then it can't be updated.
> - * if the PTE changed, then we must re-walk the page table
> - as the PTE is no longer valid */
> +/*
> + * - if accessed or dirty bits need updating, and the PTE
> is
> + * in RAM, then we do so atomically with a compare and
> swap.
> + * - if the PTE is in IO space or ROM, then it can't be
> updated
> + * and we return TRANSLATE_FAIL.
> + * - if the PTE changed by the time we went to update it,
> then
> + * it is no longer valid and we must re-walk the page
> table.
> + */
> MemoryRegion *mr;
> hwaddr l = sizeof(target_ulong), addr1;
> rcu_read_lock();
> @@ -243,15 +266,15 @@ restart:
> target_ulong vpn = addr >> PGSHIFT;
> *physical = (ppn | (vpn & ((1L << ptshift) - 1))) << PGSHIFT;
>
> +/* set permissions on the TLB entry */
> if ((pte & PTE_R)) {
> *prot |= PAG
[Qemu-devel] [PATCH v2 00/23] RISC-V Post-merge spec conformance and cleanup
Apparently there is at least one logic bug in amongst this set of 23 patches. I'll shout you a beer if you can find it. I found one myself so there was probably at least two. Hey, it boots SMP Linux here, but I think it needs more testing. This is a series of spec conformance bug fixes and code cleanups. We would like to get this series in after our core changes in v8.2. * Implements WARL behavior for CSRs that don't support writes * Improves specification conformance of the page table walker * Change access checks from ternary operator to if statements * Checks for misaligned PPNs * Disallow M-mode or S-mode from fetching from User pages * Adds reserved PTE flag check: W or W|X * Adds prot read if mode is not U and mstatus.mxr is set * Improves page walker comments and general readability * Several trivial code cleanups to hw/riscv * Replacing hard coded constants with reference to enums or the machine memory maps. * Adds bounds checks when writing device-tree to ROM * Updates the cpu model to use a more modern interface v2 - remove unused class boilerplate retains qom parent_obj - convert cpu definition towards future model - honor mstatus.mxr flag in page table walker Michael Clark (23): RISC-V: Make virt create_fdt interface consistent RISC-V: Replace hardcoded constants with enum values RISC-V: Make virt board description match spike RISC-V: Use ROM base address and size from memmap RISC-V: Remove identity_translate from load_elf RISC-V: Mark ROM read-only after copying in code RISC-V: Remove unused class definitions RISC-V: Make sure rom has space for fdt RISC-V: Include intruction hex in disassembly RISC-V: Hold rcu_read_lock when accessing memory RISC-V: Improve page table walker spec compliance RISC-V: Update E order and I extension order RISC-V: Make some header guards more specific RISC-V: Make virt header comment title consistent RISC-V: Use memory_region_is_ram in pte update RISC-V: Remove EM_RISCV ELF_MACHINE indirection RISC-V: Hardwire satp to 0 for no-mmu case RISC-V: Remove braces from satp case statement RISC-V: riscv-qemu port supports sv39 and sv48 RISC-V: vectored traps are optional RISC-V: No traps on writes to misa,minstret,mcycle RISC-V: Remove support for adhoc X_COP interrupt RISC-V: Convert cpu definition towards future model disas/riscv.c | 39 +++-- hw/riscv/sifive_clint.c | 9 +-- hw/riscv/sifive_e.c | 34 +-- hw/riscv/sifive_u.c | 65 +++-- hw/riscv/spike.c| 65 - hw/riscv/virt.c | 77 + include/hw/riscv/sifive_clint.h | 4 ++ include/hw/riscv/sifive_e.h | 5 -- include/hw/riscv/sifive_u.h | 9 ++- include/hw/riscv/spike.h| 15 ++--- include/hw/riscv/virt.h | 17 +++--- target/riscv/cpu.c | 125 ++-- target/riscv/cpu.h | 6 +- target/riscv/cpu_bits.h | 3 - target/riscv/helper.c | 65 +++-- target/riscv/op_helper.c| 52 - 16 files changed, 263 insertions(+), 327 deletions(-) -- 2.7.0
[Qemu-devel] [PATCH v2 02/23] RISC-V: Replace hardcoded constants with enum values
The RISC-V device-tree code has a number of hard-coded
constants and this change moves them into header enums.
Cc: Sagar Karandikar
Cc: Bastian Koppelmann
Signed-off-by: Michael Clark
Signed-off-by: Palmer Dabbelt
Reviewed-by: Philippe Mathieu-Daudé
---
hw/riscv/sifive_clint.c | 9 +++--
hw/riscv/sifive_u.c | 6 --
hw/riscv/spike.c| 6 --
hw/riscv/virt.c | 6 --
include/hw/riscv/sifive_clint.h | 4
include/hw/riscv/sifive_u.h | 4
include/hw/riscv/spike.h| 4
include/hw/riscv/virt.h | 4
8 files changed, 31 insertions(+), 12 deletions(-)
diff --git a/hw/riscv/sifive_clint.c b/hw/riscv/sifive_clint.c
index 4893453..7cc606e 100644
--- a/hw/riscv/sifive_clint.c
+++ b/hw/riscv/sifive_clint.c
@@ -26,13 +26,10 @@
#include "hw/riscv/sifive_clint.h"
#include "qemu/timer.h"
-/* See: riscv-pk/machine/sbi_entry.S and arch/riscv/kernel/time.c */
-#define TIMER_FREQ (10 * 1000 * 1000)
-
static uint64_t cpu_riscv_read_rtc(void)
{
-return muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), TIMER_FREQ,
-NANOSECONDS_PER_SECOND);
+return muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL),
+SIFIVE_CLINT_TIMEBASE_FREQ, NANOSECONDS_PER_SECOND);
}
/*
@@ -59,7 +56,7 @@ static void sifive_clint_write_timecmp(RISCVCPU *cpu,
uint64_t value)
diff = cpu->env.timecmp - rtc_r;
/* back to ns (note args switched in muldiv64) */
next = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
-muldiv64(diff, NANOSECONDS_PER_SECOND, TIMER_FREQ);
+muldiv64(diff, NANOSECONDS_PER_SECOND, SIFIVE_CLINT_TIMEBASE_FREQ);
timer_mod(cpu->env.timer, next);
}
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 1c2deef..f3f7615 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -122,7 +122,8 @@ static void create_fdt(SiFiveUState *s, const struct
MemmapEntry *memmap,
g_free(nodename);
qemu_fdt_add_subnode(fdt, "/cpus");
-qemu_fdt_setprop_cell(fdt, "/cpus", "timebase-frequency", 1000);
+qemu_fdt_setprop_cell(fdt, "/cpus", "timebase-frequency",
+SIFIVE_CLINT_TIMEBASE_FREQ);
qemu_fdt_setprop_cell(fdt, "/cpus", "#size-cells", 0x0);
qemu_fdt_setprop_cell(fdt, "/cpus", "#address-cells", 0x1);
@@ -131,7 +132,8 @@ static void create_fdt(SiFiveUState *s, const struct
MemmapEntry *memmap,
char *intc = g_strdup_printf("/cpus/cpu@%d/interrupt-controller", cpu);
char *isa = riscv_isa_string(&s->soc.harts[cpu]);
qemu_fdt_add_subnode(fdt, nodename);
-qemu_fdt_setprop_cell(fdt, nodename, "clock-frequency", 10);
+qemu_fdt_setprop_cell(fdt, nodename, "clock-frequency",
+ SIFIVE_U_CLOCK_FREQ);
qemu_fdt_setprop_string(fdt, nodename, "mmu-type", "riscv,sv48");
qemu_fdt_setprop_string(fdt, nodename, "riscv,isa", isa);
qemu_fdt_setprop_string(fdt, nodename, "compatible", "riscv");
diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
index 2d1f114..4c233ec 100644
--- a/hw/riscv/spike.c
+++ b/hw/riscv/spike.c
@@ -115,7 +115,8 @@ static void create_fdt(SpikeState *s, const struct
MemmapEntry *memmap,
g_free(nodename);
qemu_fdt_add_subnode(fdt, "/cpus");
-qemu_fdt_setprop_cell(fdt, "/cpus", "timebase-frequency", 1000);
+qemu_fdt_setprop_cell(fdt, "/cpus", "timebase-frequency",
+SIFIVE_CLINT_TIMEBASE_FREQ);
qemu_fdt_setprop_cell(fdt, "/cpus", "#size-cells", 0x0);
qemu_fdt_setprop_cell(fdt, "/cpus", "#address-cells", 0x1);
@@ -124,7 +125,8 @@ static void create_fdt(SpikeState *s, const struct
MemmapEntry *memmap,
char *intc = g_strdup_printf("/cpus/cpu@%d/interrupt-controller", cpu);
char *isa = riscv_isa_string(&s->soc.harts[cpu]);
qemu_fdt_add_subnode(fdt, nodename);
-qemu_fdt_setprop_cell(fdt, nodename, "clock-frequency", 10);
+qemu_fdt_setprop_cell(fdt, nodename, "clock-frequency",
+ SPIKE_CLOCK_FREQ);
qemu_fdt_setprop_string(fdt, nodename, "mmu-type", "riscv,sv48");
qemu_fdt_setprop_string(fdt, nodename, "riscv,isa", isa);
qemu_fdt_setprop_string(fdt, nodename, "compatible", "riscv");
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 37968d2..a402856 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -145,7 +145,8 @@ static void create_fdt(RISCVVirtState *s, const struct
MemmapEntry *memmap,
g_free(nodename);
qemu_fdt_add_subnode(fdt, "/cpus");
-qemu_fdt_setprop_cell(fdt, "/cpus", "timebase-frequency", 1000);
+qemu_fdt_setprop_cell(fdt, "/cpus", "timebase-frequency",
+ SIFIVE_CLINT_TIMEBASE_FREQ);
qemu_fdt_setprop_cell(fdt, "/cpus", "#size-cells", 0x0);
qemu_fdt_setprop_cell(fdt, "/cpus", "#address-cells", 0x1);
@@ -155,7 +156,8 @@ static void create_fdt(RISCVVirtState *s, const struct
MemmapEntry *memmap,
char
[Qemu-devel] [PATCH v2 01/23] RISC-V: Make virt create_fdt interface consistent
create_fdt sets the fdt variable on RISCVVirtState and this is
used to access the fdt. This reverts a change introduced in
https://github.com/riscv/riscv-qemu/pull/109 which introduced
a redundant return value, overlooking the RISCVVirtState
structure member that made create_fdt inconsistent with the
other RISC-V machines. The other alternative is to change
the other boards to return the fdt. Note: the RISCVVirtState
also contains fdt_size.
Cc: Sagar Karandikar
Cc: Bastian Koppelmann
Signed-off-by: Michael Clark
Signed-off-by: Palmer Dabbelt
---
hw/riscv/virt.c | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index e2c214e..37968d2 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -108,7 +108,7 @@ static hwaddr load_initrd(const char *filename, uint64_t
mem_size,
return *start + size;
}
-static void *create_fdt(RISCVVirtState *s, const struct MemmapEntry *memmap,
+static void create_fdt(RISCVVirtState *s, const struct MemmapEntry *memmap,
uint64_t mem_size, const char *cmdline)
{
void *fdt;
@@ -264,8 +264,6 @@ static void *create_fdt(RISCVVirtState *s, const struct
MemmapEntry *memmap,
qemu_fdt_setprop_string(fdt, "/chosen", "stdout-path", nodename);
qemu_fdt_setprop_string(fdt, "/chosen", "bootargs", cmdline);
g_free(nodename);
-
-return fdt;
}
static void riscv_virt_board_init(MachineState *machine)
@@ -279,7 +277,6 @@ static void riscv_virt_board_init(MachineState *machine)
char *plic_hart_config;
size_t plic_hart_config_len;
int i;
-void *fdt;
/* Initialize SOC */
object_initialize(&s->soc, sizeof(s->soc), TYPE_RISCV_HART_ARRAY);
@@ -299,7 +296,7 @@ static void riscv_virt_board_init(MachineState *machine)
main_mem);
/* create device tree */
-fdt = create_fdt(s, memmap, machine->ram_size, machine->kernel_cmdline);
+create_fdt(s, memmap, machine->ram_size, machine->kernel_cmdline);
/* boot rom */
memory_region_init_ram(boot_rom, NULL, "riscv_virt_board.bootrom",
@@ -314,9 +311,9 @@ static void riscv_virt_board_init(MachineState *machine)
hwaddr end = load_initrd(machine->initrd_filename,
machine->ram_size, kernel_entry,
&start);
-qemu_fdt_setprop_cell(fdt, "/chosen",
- "linux,initrd-start", start);
-qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-end",
+qemu_fdt_setprop_cell(s->fdt, "/chosen", "linux,initrd-start",
+ start);
+qemu_fdt_setprop_cell(s->fdt, "/chosen", "linux,initrd-end",
end);
}
}
--
2.7.0
[Qemu-devel] [PATCH v2 06/23] RISC-V: Mark ROM read-only after copying in code
The sifive_u machine already marks its ROM readonly. This fixes
the remaining boards.
Cc: Sagar Karandikar
Cc: Bastian Koppelmann
Signed-off-by: Michael Clark
Signed-off-by: Palmer Dabbelt
---
hw/riscv/sifive_u.c | 9 +
hw/riscv/spike.c | 18 ++
hw/riscv/virt.c | 7 ---
include/hw/riscv/spike.h | 8
4 files changed, 19 insertions(+), 23 deletions(-)
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 6116c38..25df16c 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -223,7 +223,7 @@ static void riscv_sifive_u_init(MachineState *machine)
SiFiveUState *s = g_new0(SiFiveUState, 1);
MemoryRegion *sys_memory = get_system_memory();
MemoryRegion *main_mem = g_new(MemoryRegion, 1);
-MemoryRegion *boot_rom = g_new(MemoryRegion, 1);
+MemoryRegion *mask_rom = g_new(MemoryRegion, 1);
/* Initialize SOC */
object_initialize(&s->soc, sizeof(s->soc), TYPE_RISCV_HART_ARRAY);
@@ -246,10 +246,10 @@ static void riscv_sifive_u_init(MachineState *machine)
create_fdt(s, memmap, machine->ram_size, machine->kernel_cmdline);
/* boot rom */
-memory_region_init_ram(boot_rom, NULL, "riscv.sifive.u.mrom",
+memory_region_init_ram(mask_rom, NULL, "riscv.sifive.u.mrom",
memmap[SIFIVE_U_MROM].base, &error_fatal);
-memory_region_set_readonly(boot_rom, true);
-memory_region_add_subregion(sys_memory, 0x0, boot_rom);
+memory_region_set_readonly(mask_rom, true);
+memory_region_add_subregion(sys_memory, 0x0, mask_rom);
if (machine->kernel_filename) {
load_kernel(machine->kernel_filename);
@@ -279,6 +279,7 @@ static void riscv_sifive_u_init(MachineState *machine)
qemu_fdt_dumpdtb(s->fdt, s->fdt_size);
cpu_physical_memory_write(memmap[SIFIVE_U_MROM].base +
sizeof(reset_vec), s->fdt, s->fdt_size);
+memory_region_set_readonly(mask_rom, true);
/* MMIO */
s->plic = sifive_plic_create(memmap[SIFIVE_U_PLIC].base,
diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
index 7710333..74edf33 100644
--- a/hw/riscv/spike.c
+++ b/hw/riscv/spike.c
@@ -173,7 +173,7 @@ static void spike_v1_10_0_board_init(MachineState *machine)
SpikeState *s = g_new0(SpikeState, 1);
MemoryRegion *system_memory = get_system_memory();
MemoryRegion *main_mem = g_new(MemoryRegion, 1);
-MemoryRegion *boot_rom = g_new(MemoryRegion, 1);
+MemoryRegion *mask_rom = g_new(MemoryRegion, 1);
/* Initialize SOC */
object_initialize(&s->soc, sizeof(s->soc), TYPE_RISCV_HART_ARRAY);
@@ -196,9 +196,9 @@ static void spike_v1_10_0_board_init(MachineState *machine)
create_fdt(s, memmap, machine->ram_size, machine->kernel_cmdline);
/* boot rom */
-memory_region_init_ram(boot_rom, NULL, "riscv.spike.bootrom",
+memory_region_init_ram(mask_rom, NULL, "riscv.spike.mrom",
s->fdt_size + 0x2000, &error_fatal);
-memory_region_add_subregion(system_memory, 0x0, boot_rom);
+memory_region_add_subregion(system_memory, 0x0, mask_rom);
if (machine->kernel_filename) {
load_kernel(machine->kernel_filename);
@@ -228,9 +228,10 @@ static void spike_v1_10_0_board_init(MachineState *machine)
qemu_fdt_dumpdtb(s->fdt, s->fdt_size);
cpu_physical_memory_write(memmap[SPIKE_MROM].base + sizeof(reset_vec),
s->fdt, s->fdt_size);
+memory_region_set_readonly(mask_rom, true);
/* initialize HTIF using symbols found in load_kernel */
-htif_mm_init(system_memory, boot_rom, &s->soc.harts[0].env, serial_hds[0]);
+htif_mm_init(system_memory, mask_rom, &s->soc.harts[0].env, serial_hds[0]);
/* Core Local Interruptor (timer and IPI) */
sifive_clint_create(memmap[SPIKE_CLINT].base, memmap[SPIKE_CLINT].size,
@@ -244,7 +245,7 @@ static void spike_v1_09_1_board_init(MachineState *machine)
SpikeState *s = g_new0(SpikeState, 1);
MemoryRegion *system_memory = get_system_memory();
MemoryRegion *main_mem = g_new(MemoryRegion, 1);
-MemoryRegion *boot_rom = g_new(MemoryRegion, 1);
+MemoryRegion *mask_rom = g_new(MemoryRegion, 1);
/* Initialize SOC */
object_initialize(&s->soc, sizeof(s->soc), TYPE_RISCV_HART_ARRAY);
@@ -264,9 +265,9 @@ static void spike_v1_09_1_board_init(MachineState *machine)
main_mem);
/* boot rom */
-memory_region_init_ram(boot_rom, NULL, "riscv.spike.bootrom",
+memory_region_init_ram(mask_rom, NULL, "riscv.spike.mrom",
0x4, &error_fatal);
-memory_region_add_subregion(system_memory, 0x0, boot_rom);
+memory_region_add_subregion(system_memory, 0x0, mask_rom);
if (machine->kernel_filename) {
load_kernel(machine->kernel_filename);
@@ -325,9 +326,10 @@ static void spike_v1_09_1_board_init(MachineState *machine)
/* copy in the config string */
cpu_physical_memory_write(memmap[SPIKE_MROM].base + sizeof(reset_vec),
config_st
[Qemu-devel] [PATCH v2 05/23] RISC-V: Remove identity_translate from load_elf
When load_elf is called with NULL as an argument to the
address translate callback, it does an identity translation.
This commit removes the redundant identity_translate callback.
Cc: Sagar Karandikar
Cc: Bastian Koppelmann
Signed-off-by: Michael Clark
Signed-off-by: Palmer Dabbelt
Reviewed-by: Philippe Mathieu-Daudé
---
hw/riscv/sifive_e.c | 7 +--
hw/riscv/sifive_u.c | 7 +--
hw/riscv/spike.c| 7 +--
hw/riscv/virt.c | 7 +--
4 files changed, 4 insertions(+), 24 deletions(-)
diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c
index 19eca36..09c9d49 100644
--- a/hw/riscv/sifive_e.c
+++ b/hw/riscv/sifive_e.c
@@ -82,16 +82,11 @@ static void copy_le32_to_phys(hwaddr pa, uint32_t *rom,
size_t len)
}
}
-static uint64_t identity_translate(void *opaque, uint64_t addr)
-{
-return addr;
-}
-
static uint64_t load_kernel(const char *kernel_filename)
{
uint64_t kernel_entry, kernel_high;
-if (load_elf(kernel_filename, identity_translate, NULL,
+if (load_elf(kernel_filename, NULL, NULL,
&kernel_entry, NULL, &kernel_high,
0, ELF_MACHINE, 1, 0) < 0) {
error_report("qemu: could not load kernel '%s'", kernel_filename);
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index f3f7615..6116c38 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -68,16 +68,11 @@ static void copy_le32_to_phys(hwaddr pa, uint32_t *rom,
size_t len)
}
}
-static uint64_t identity_translate(void *opaque, uint64_t addr)
-{
-return addr;
-}
-
static uint64_t load_kernel(const char *kernel_filename)
{
uint64_t kernel_entry, kernel_high;
-if (load_elf(kernel_filename, identity_translate, NULL,
+if (load_elf(kernel_filename, NULL, NULL,
&kernel_entry, NULL, &kernel_high,
0, ELF_MACHINE, 1, 0) < 0) {
error_report("qemu: could not load kernel '%s'", kernel_filename);
diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
index 4c233ec..7710333 100644
--- a/hw/riscv/spike.c
+++ b/hw/riscv/spike.c
@@ -59,16 +59,11 @@ static void copy_le32_to_phys(hwaddr pa, uint32_t *rom,
size_t len)
}
}
-static uint64_t identity_translate(void *opaque, uint64_t addr)
-{
-return addr;
-}
-
static uint64_t load_kernel(const char *kernel_filename)
{
uint64_t kernel_entry, kernel_high;
-if (load_elf_ram_sym(kernel_filename, identity_translate, NULL,
+if (load_elf_ram_sym(kernel_filename, NULL, NULL,
&kernel_entry, NULL, &kernel_high, 0, ELF_MACHINE, 1, 0,
NULL, true, htif_symbol_callback) < 0) {
error_report("qemu: could not load kernel '%s'", kernel_filename);
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 0d101fc..f8c19b4 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -62,16 +62,11 @@ static void copy_le32_to_phys(hwaddr pa, uint32_t *rom,
size_t len)
}
}
-static uint64_t identity_translate(void *opaque, uint64_t addr)
-{
-return addr;
-}
-
static uint64_t load_kernel(const char *kernel_filename)
{
uint64_t kernel_entry, kernel_high;
-if (load_elf(kernel_filename, identity_translate, NULL,
+if (load_elf(kernel_filename, NULL, NULL,
&kernel_entry, NULL, &kernel_high,
0, ELF_MACHINE, 1, 0) < 0) {
error_report("qemu: could not load kernel '%s'", kernel_filename);
--
2.7.0
[Qemu-devel] [PATCH v2 03/23] RISC-V: Make virt board description match spike
This makes 'qemu-system-riscv64 -machine help' output more tidy
and consistent.
Cc: Sagar Karandikar
Cc: Bastian Koppelmann
Signed-off-by: Michael Clark
Signed-off-by: Palmer Dabbelt
---
hw/riscv/virt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index a402856..0055439 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -404,7 +404,7 @@ static const TypeInfo riscv_virt_board_device = {
static void riscv_virt_board_machine_init(MachineClass *mc)
{
-mc->desc = "RISC-V VirtIO Board (Privileged spec v1.10)";
+mc->desc = "RISC-V VirtIO Board (Privileged ISA v1.10)";
mc->init = riscv_virt_board_init;
mc->max_cpus = 8; /* hardcoded limit in BBL */
}
--
2.7.0
[Qemu-devel] [PATCH v2 09/23] RISC-V: Include intruction hex in disassembly
This was added to help debug issues using -d in_asm. It is
useful to see the instruction bytes, as one can detect if
one is trying to execute ASCII or device-tree magic.
Cc: Sagar Karandikar
Cc: Bastian Koppelmann
Signed-off-by: Michael Clark
Signed-off-by: Palmer Dabbelt
Reviewed-by: Philippe Mathieu-Daudé
---
disas/riscv.c | 39 ---
1 file changed, 20 insertions(+), 19 deletions(-)
diff --git a/disas/riscv.c b/disas/riscv.c
index 3c17501..4580308 100644
--- a/disas/riscv.c
+++ b/disas/riscv.c
@@ -2769,25 +2769,6 @@ static void format_inst(char *buf, size_t buflen, size_t
tab, rv_decode *dec)
char tmp[64];
const char *fmt;
-if (dec->op == rv_op_illegal) {
-size_t len = inst_length(dec->inst);
-switch (len) {
-case 2:
-snprintf(buf, buflen, "(0x%04" PRIx64 ")", dec->inst);
-break;
-case 4:
-snprintf(buf, buflen, "(0x%08" PRIx64 ")", dec->inst);
-break;
-case 6:
-snprintf(buf, buflen, "(0x%012" PRIx64 ")", dec->inst);
-break;
-default:
-snprintf(buf, buflen, "(0x%016" PRIx64 ")", dec->inst);
-break;
-}
-return;
-}
-
fmt = opcode_data[dec->op].format;
while (*fmt) {
switch (*fmt) {
@@ -3004,6 +2985,11 @@ disasm_inst(char *buf, size_t buflen, rv_isa isa,
uint64_t pc, rv_inst inst)
format_inst(buf, buflen, 16, &dec);
}
+#define INST_FMT_2 "%04" PRIx64 " "
+#define INST_FMT_4 "%08" PRIx64 " "
+#define INST_FMT_6 "%012" PRIx64 " "
+#define INST_FMT_8 "%016" PRIx64 " "
+
static int
print_insn_riscv(bfd_vma memaddr, struct disassemble_info *info, rv_isa isa)
{
@@ -3031,6 +3017,21 @@ print_insn_riscv(bfd_vma memaddr, struct
disassemble_info *info, rv_isa isa)
}
}
+switch (len) {
+case 2:
+(*info->fprintf_func)(info->stream, INST_FMT_2, inst);
+break;
+case 4:
+(*info->fprintf_func)(info->stream, INST_FMT_4, inst);
+break;
+case 6:
+(*info->fprintf_func)(info->stream, INST_FMT_6, inst);
+break;
+default:
+(*info->fprintf_func)(info->stream, INST_FMT_8, inst);
+break;
+}
+
disasm_inst(buf, sizeof(buf), isa, memaddr, inst);
(*info->fprintf_func)(info->stream, "%s", buf);
--
2.7.0
