Re: [Qemu-devel] [PATCH v2 0/6] monitor: misc fixes
Hi On Tue, Oct 30, 2018 at 9:48 AM Peter Xu wrote: > > On Mon, Oct 29, 2018 at 04:57:27PM +0400, Marc-André Lureau wrote: > > Hi, > > > > Here is a small series of fixes for the monitor, mostly related to > > threading issues. > > Hi, Marc-André, Markus, > > I'd be glad to know how you think about these monitor series, > considering that I just noticed it's exactly softfreeze for QEMU 3.1 > today... > > I gave a quick look on this series, IMHO patch 1,2,6 could be > candidate for 3.1 (though I'm not sure for patch 6; it seems even fine > to me with some comments there but I'd like to see how other people > think about it too, and whether it's really possible to insert a new > monitor at that time) and I'm not sure whether the rest can be Patch 5 & 6 are the result of the discussion of the previous proposed fixed: https://lists.nongnu.org/archive/html/qemu-devel/2018-08/msg00018.html They fix a dead-lock on cleanup, so it should be considered for 3.1. > postponed (say, patch 3,4,5). Meanwhile, I think we need Wolfgang's Patch 3 & 4 should also be considered, as OOB won't have the expected behaviour with all chardevs. With non-gcontext feature chardev, they will behave more or less like non-oob. > patches to fix the daemonize chaos, and hopefully I also like to know > your thoughts on my oob enablement series (especially Marc-André, > since I talked to Markus face to face during the forum after all :). > I would like it to be in 3.1 as well but I'll see my luck. I acked the series already (except "monitor: resume the monitor earlier if needed" which we agreed could be dropped for now), so it's in Markus hand. Thanks
Re: [Qemu-devel] [PATCH v5 00/11] hw/m68k: add Apple Machintosh Quadra 800 machine
On 10/29/18 1:39 PM, Mark Cave-Ayland wrote: > You can install your own disk using debian-installer, with: > > ... > -M q800 \ > -serial none -serial mon:stdio \ > -m 1000M -drive file=m68k.qcow2,format=qcow2 \ > -net nic,model=dp83932,addr=09:00:07:12:34:57 \ > -append "console=ttyS0 vga=off" \ > -kernel vmlinux-4.15.0-2-m68k \ > -initrd initrd.gz \ > -drive file=debian-9.0-m68k-NETINST-1.iso \ > -drive file=m68k.qcow2,format=qcow2 \ > -nographic I tried this and got Trace 0: 0x7f2e886c7140 [/d404/0xe000] INT 1: Unassigned(0xf4) pc=d404 sp=00393e60 sr=2700 INT 2: Access Fault(0x8) pc= sp=00393e58 sr=2700 ssw: 0506 ea: sfc: 5dfc: 5 which lead straight to buserr and panic. This happens way early in boot -- only 1926 TranslationBlocks generated. Is there some device missing from the command-line that the kernel is expecting? r~
Re: [Qemu-devel] [PATCH 1/3] hw/arm/xilinx_zynq: Use the ARRAY_SIZE macro
On 10/29/18 11:20 PM, Philippe Mathieu-Daudé wrote: > Signed-off-by: Philippe Mathieu-Daudé > --- > hw/arm/xilinx_zynq.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Richard Henderson r~
Re: [Qemu-devel] [PATCH 2/3] hw/dma/pl330: Factor out pl330_init() from hw/arm/xilinx_zynq.c
On 10/29/18 11:20 PM, Philippe Mathieu-Daudé wrote:
> +static inline void pl330_init(uint32_t base, qemu_irq irq, int nreq)
> +{
> +SysBusDevice *busdev;
> +DeviceState *dev;
> +
> +dev = qdev_create(NULL, TYPE_PL330);
> +qdev_prop_set_uint8(dev, "num_chnls", 8);
> +qdev_prop_set_uint8(dev, "num_periph_req", nreq);
> +qdev_prop_set_uint8(dev, "num_events", 16);
> +qdev_prop_set_uint8(dev, "data_width", 64);
> +qdev_prop_set_uint8(dev, "wr_cap", 8);
> +qdev_prop_set_uint8(dev, "wr_q_dep", 16);
> +qdev_prop_set_uint8(dev, "rd_cap", 8);
> +qdev_prop_set_uint8(dev, "rd_q_dep", 16);
> +qdev_prop_set_uint16(dev, "data_buffer_dep", 256);
> +qdev_init_nofail(dev);
> +
> +busdev = SYS_BUS_DEVICE(dev);
> +sysbus_mmio_map(busdev, 0, base);
> +sysbus_connect_irq(busdev, 0, irq);
> +}
Why is this inline instead of in hw/dma/pl300.c?
There should be nothing performance sensative here...
r~
[Qemu-devel] [PATCH] fmops: fix off-by-one in AR_TABLE and DR_TABLE array size
Fixes: CVE-2018-???
Cc: P J P
Reported-by: Wangjunqing
Suggested-by: Paolo Bonzini
Signed-off-by: Gerd Hoffmann
---
hw/audio/fmopl.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/audio/fmopl.h b/hw/audio/fmopl.h
index e7e578a48e..7199afaa3c 100644
--- a/hw/audio/fmopl.h
+++ b/hw/audio/fmopl.h
@@ -72,8 +72,8 @@ typedef struct fm_opl_f {
/* Rhythm sention */
uint8_t rhythm; /* Rhythm mode , key flag */
/* time tables */
- int32_t AR_TABLE[75]; /* atttack rate tables */
- int32_t DR_TABLE[75]; /* decay rate tables */
+ int32_t AR_TABLE[76]; /* atttack rate tables */
+ int32_t DR_TABLE[76]; /* decay rate tables */
uint32_t FN_TABLE[1024]; /* fnumber -> increment counter */
/* LFO */
int32_t *ams_table;
--
2.9.3
Re: [Qemu-devel] [PATCH v2] lsi53c895a: check message length value is valid
On 30/10/2018 07:28, P J P wrote:
> From: Prasad J Pandit
>
> While writing a message in 'lsi_do_msgin', message length value
> in 'msg_len' could be invalid. Add check to avoid OOB access issue.
>
> Signed-off-by: Prasad J Pandit
Reviewed-by: Paolo Bonzini
with one change below:
> ---
> hw/scsi/lsi53c895a.c | 19 +--
> 1 file changed, 17 insertions(+), 2 deletions(-)
>
> Update v2: modify assert()
> -> https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg06273.html
>
> diff --git a/hw/scsi/lsi53c895a.c b/hw/scsi/lsi53c895a.c
> index d1e6534311..dc39f4c3ee 100644
> --- a/hw/scsi/lsi53c895a.c
> +++ b/hw/scsi/lsi53c895a.c
> @@ -861,10 +861,11 @@ static void lsi_do_status(LSIState *s)
>
> static void lsi_do_msgin(LSIState *s)
> {
> -int len;
> +uint8_t len;
> trace_lsi_do_msgin(s->dbc, s->msg_len);
> s->sfbr = s->msg[0];
> len = s->msg_len;
> +assert(len > 0 && len <= LSI_MAX_MSGIN_LEN);
> if (len > s->dbc)
> len = s->dbc;
> pci_dma_write(PCI_DEVICE(s), s->dnad, s->msg, len);
> @@ -1705,8 +1706,10 @@ static uint8_t lsi_reg_readb(LSIState *s, int offset)
> break;
> case 0x58: /* SBDL */
> /* Some drivers peek at the data bus during the MSG IN phase. */
> -if ((s->sstat1 & PHASE_MASK) == PHASE_MI)
> +if ((s->sstat1 & PHASE_MASK) == PHASE_MI) {
> +assert(s->msg_len >= 0);
should be > 0 as well.
Paolo
> return s->msg[0];
> +}
> ret = 0;
> break;
> case 0x59: /* SBDL high */
> @@ -2103,11 +2106,23 @@ static int lsi_pre_save(void *opaque)
> return 0;
> }
>
> +static int lsi_post_load(void *opaque, int version_id)
> +{
> +LSIState *s = opaque;
> +
> +if (s->msg_len < 0 || s->msg_len > LSI_MAX_MSGIN_LEN) {
> +return -EINVAL;
> +}
> +
> +return 0;
> +}
> +
> static const VMStateDescription vmstate_lsi_scsi = {
> .name = "lsiscsi",
> .version_id = 0,
> .minimum_version_id = 0,
> .pre_save = lsi_pre_save,
> +.post_load = lsi_post_load,
> .fields = (VMStateField[]) {
> VMSTATE_PCI_DEVICE(parent_obj, LSIState),
>
>
Re: [Qemu-devel] [RFC v4 05/71] cpu: move run_on_cpu to cpus-common
On 29/10/2018 22:39, Emilio G. Cota wrote:
> I'm not convinced about adding an "assert(!user-mode)" to run_on_cpu.
> Given that now it does not depend on the BQL, it could actually
> work in user-mode if called. If we really wanted to make sure
> that no user-mode would call it, then a compile-time check
> would be better than an assert. But again, I fail to see what
> we'd gain from that.
>
> For context, do_run_on_cpu et al. were moved to cpus-common.c by
> d148d90ee8 ("cpus-common: move CPU work item management to
> common code", 2016-09-27). The point was to consolidate the
> run-on-cpu code in a common (softmmu & user-mode) file, since
> user-mode needed async_run_on_cpu for exclusive work.
>
> Now we can finally make run_on_cpu generic as well.
I agree, the run_on_cpu stuff should not be system-specific at all.
Paolo
Re: [Qemu-devel] [PATCH 2/3] hw/dma/pl330: Factor out pl330_init() from hw/arm/xilinx_zynq.c
On 30/10/18 9:18, Richard Henderson wrote:
On 10/29/18 11:20 PM, Philippe Mathieu-Daudé wrote:
+static inline void pl330_init(uint32_t base, qemu_irq irq, int nreq)
+{
+SysBusDevice *busdev;
+DeviceState *dev;
+
+dev = qdev_create(NULL, TYPE_PL330);
+qdev_prop_set_uint8(dev, "num_chnls", 8);
+qdev_prop_set_uint8(dev, "num_periph_req", nreq);
+qdev_prop_set_uint8(dev, "num_events", 16);
+qdev_prop_set_uint8(dev, "data_width", 64);
+qdev_prop_set_uint8(dev, "wr_cap", 8);
+qdev_prop_set_uint8(dev, "wr_q_dep", 16);
+qdev_prop_set_uint8(dev, "rd_cap", 8);
+qdev_prop_set_uint8(dev, "rd_q_dep", 16);
+qdev_prop_set_uint16(dev, "data_buffer_dep", 256);
+qdev_init_nofail(dev);
+
+busdev = SYS_BUS_DEVICE(dev);
+sysbus_mmio_map(busdev, 0, base);
+sysbus_connect_irq(busdev, 0, irq);
+}
Why is this inline instead of in hw/dma/pl300.c?
There should be nothing performance sensative here...
Yeah I didn't like it much neither and wondered the same :)
I was looking a examples in hw/char:
[phil@x1w qemu]$ git grep -hA 2 'static inline' include/hw/char/
52:static inline DeviceState *cadence_uart_create(hwaddr addr,
53-qemu_irq irq,
54-Chardev *chr)
--
52:static inline DeviceState *cmsdk_apb_uart_create(hwaddr addr,
53- qemu_irq txint,
54- qemu_irq rxint,
--
18:static inline DeviceState *pl011_create(hwaddr addr,
19-qemu_irq irq,
20-Chardev *chr)
--
35:static inline DeviceState *pl011_luminary_create(hwaddr addr,
36- qemu_irq irq,
37- Chardev *chr)
--
18:static inline DeviceState *xilinx_uartlite_create(hwaddr addr,
19-qemu_irq irq,
20-Chardev *chr)
I'll clean it and add a docstring.
Thanks for the review,
Phil.
Re: [Qemu-devel] [PATCH] fmops: fix off-by-one in AR_TABLE and DR_TABLE array size
Hi Gerd,
On 30/10/18 9:23, Gerd Hoffmann wrote:
Can you add your previous patch description,
We have a lovely, guest-triggerable buffer overflow in opl2 emulation.
Reproducer:
outw(0xff60, 0x220);
outw(0x1020, 0x220);
outw(0xffb0, 0x220);
Result:
Will overflow FM_OPL->AR_TABLE[] (see hw/audio/fmopl.[ch])
And Prasad Pandit triggering flow:
In set_ar_dr
SLOT->AR = ar ? &OPL->AR_TABLE[ar<<2] : RATE_0;
SLOT->AR is set to point to OPL->DR_TABLE[60] and while so if s->ksr
is set to 15, in CALC_FCSLOT()
SLOT->evsa = SLOT->AR[ksr]; <= accesses OPL->AR_TABLE[60 + 15];
Thanks.
Fixes: CVE-2018-???
Cc: P J P
Reported-by: Wangjunqing
Suggested-by: Paolo Bonzini
Signed-off-by: Gerd Hoffmann
Reviewed-by: Philippe Mathieu-Daudé
---
hw/audio/fmopl.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/audio/fmopl.h b/hw/audio/fmopl.h
index e7e578a48e..7199afaa3c 100644
--- a/hw/audio/fmopl.h
+++ b/hw/audio/fmopl.h
@@ -72,8 +72,8 @@ typedef struct fm_opl_f {
/* Rhythm sention */
uint8_t rhythm; /* Rhythm mode , key flag */
/* time tables */
- int32_t AR_TABLE[75]; /* atttack rate tables */
- int32_t DR_TABLE[75]; /* decay rate tables */
+ int32_t AR_TABLE[76]; /* atttack rate tables */
+ int32_t DR_TABLE[76]; /* decay rate tables */
uint32_t FN_TABLE[1024]; /* fnumber -> increment counter */
/* LFO */
int32_t *ams_table;
Re: [Qemu-devel] [PATCH 0/2] Deprecate the "collie" machine and Strongarm devices
Guenter Roeck writes: > On 10/29/18 6:24 AM, Peter Maydell wrote: >> On 27 October 2018 at 12:04, Guenter Roeck wrote: >>> On 10/26/18 3:12 AM, Peter Maydell wrote: Hi Guenter; there's a proposal here to deprecate (and eventually remove) the 'collie' board (strongarm) from QEMU. Is that one of the ones you're currently using in your automated testing of Linux kernels on QEMU? >>> >>> Yes. I can run the test with older versions of qemu, so it is ok for me >>> if it is removed (as long as that removal is not backported). >> >> Mmm, but if we have an active user who's testing them then they >> probably shouldn't be in the frontline of boards to remove. >> Which other boards do you test with mainline QEMU? >> > > For arm: > > akita > ast2500-evb > beagle > beaglexm > borzoi > collie > cubieboard > imx25-pdk > integratorcp > kzm > mainstone > midway > mps2-an385 > overo > palmetto-bmc > raspi2 > realview-eb > realview-eb-mpcore > realview-pb-a8 > realview-pbx-a9 > romulus-bmc > sabrelite > smdkc210 > spitz > terrier > tosa > versatileab > versatilepb > vexpress-a15 > vexpress-a15-a7 > vexpress-a9 > witherspoon-bmc > xilinx-zynq-a9 > z2 > > Though not all of them are supported by upstream qemu. For some of them I > carry local patches, > for others I use out-of-tree versions of qemu (beagle/beaglexm). Would it be possible to get useful parts of your automated testing into upstream QEMU's CI? I'm asking because I think we should require at least a smoke test in CI for all machine types, and drop the ones that lack it. Not today, but in the not-too-distant future.
Re: [Qemu-devel] [PATCH 1/9] qom/user-creatable: add a few helper macros
Hi
On Tue, Oct 30, 2018 at 5:37 AM Eduardo Habkost wrote:
>
> On Mon, Oct 29, 2018 at 10:56:57AM +0100, Igor Mammedov wrote:
> > On Fri, 26 Oct 2018 12:13:21 -0300
> > Eduardo Habkost wrote:
> >
> > > On Mon, Oct 22, 2018 at 03:33:30PM +0100, Igor Mammedov wrote:
> > > > On Wed, 12 Sep 2018 16:55:23 +0400
> > > > Marc-André Lureau wrote:
> > > >
> > > > > Improve a bit code readability.
> > > > >
> > > > > Signed-off-by: Marc-André Lureau
> > > > > ---
> > > > > include/qom/object_interfaces.h | 4
> > > > > qom/object.c| 4 ++--
> > > > > qom/object_interfaces.c | 9 +++--
> > > > > 3 files changed, 9 insertions(+), 8 deletions(-)
> > > > >
> > > > > diff --git a/include/qom/object_interfaces.h
> > > > > b/include/qom/object_interfaces.h
> > > > > index 4d513fb329..46b0861457 100644
> > > > > --- a/include/qom/object_interfaces.h
> > > > > +++ b/include/qom/object_interfaces.h
> > > > > @@ -9,9 +9,13 @@
> > > > > #define USER_CREATABLE_CLASS(klass) \
> > > > > OBJECT_CLASS_CHECK(UserCreatableClass, (klass), \
> > > > > TYPE_USER_CREATABLE)
> > > > > +#define IS_USER_CREATABLE_CLASS(klass) \
> > > > > +object_class_dynamic_cast(OBJECT_CLASS(oc), TYPE_USER_CREATABLE)
> > > > > #define USER_CREATABLE_GET_CLASS(obj) \
> > > > > OBJECT_GET_CLASS(UserCreatableClass, (obj), \
> > > > >TYPE_USER_CREATABLE)
> > > > > +#define IS_USER_CREATABLE(obj) \
> > > > > +object_dynamic_cast(OBJECT(obj), TYPE_USER_CREATABLE)
> > > > > #define USER_CREATABLE(obj) \
> > > > > INTERFACE_CHECK(UserCreatable, (obj), \
> > > > > TYPE_USER_CREATABLE)
> > > > > diff --git a/qom/object.c b/qom/object.c
> > > > > index 75d1d48944..0703e8e4ff 100644
> > > > > --- a/qom/object.c
> > > > > +++ b/qom/object.c
> > > > > @@ -424,7 +424,7 @@ void object_initialize_childv(Object *parentobj,
> > > > > const char *propname,
> > > > > goto out;
> > > > > }
> > > > >
> > > > > -if (object_dynamic_cast(obj, TYPE_USER_CREATABLE)) {
> > > > > +if (IS_USER_CREATABLE(obj)) {
> > > > > user_creatable_complete(obj, &local_err);
> > > > > if (local_err) {
> > > > > object_unparent(obj);
> > > > > @@ -605,7 +605,7 @@ Object *object_new_with_propv(const char
> > > > > *typename,
> > > > > goto error;
> > > > > }
> > > > >
> > > > > -if (object_dynamic_cast(obj, TYPE_USER_CREATABLE)) {
> > > > > +if (IS_USER_CREATABLE(obj)) {
> > > > > user_creatable_complete(obj, &local_err);
> > > > > if (local_err) {
> > > > > object_unparent(obj);
> > > > > diff --git a/qom/object_interfaces.c b/qom/object_interfaces.c
> > > > > index 72b97a8bed..e3084bc04a 100644
> > > > > --- a/qom/object_interfaces.c
> > > > > +++ b/qom/object_interfaces.c
> > > > > @@ -10,18 +10,15 @@
> > > > >
> > > > > void user_creatable_complete(Object *obj, Error **errp)
> > > > > {
> > > > > -
> > > > > UserCreatableClass *ucc;
> > > > > -UserCreatable *uc =
> > > > > -(UserCreatable *)object_dynamic_cast(obj,
> > > > > TYPE_USER_CREATABLE);
> > > > >
> > > > > -if (!uc) {
> > > > > +if (!IS_USER_CREATABLE(obj)) {
> > > > > return;
> > > > > }
> > > > >
> > > > > -ucc = USER_CREATABLE_GET_CLASS(uc);
> > > > > +ucc = USER_CREATABLE_GET_CLASS(obj);
> > > > > if (ucc->complete) {
> > > > > -ucc->complete(uc, errp);
> > > > > +ucc->complete(USER_CREATABLE(obj), errp);
> > > > ^^^
> > > > even though function becomes more concise,
> > > > this will call expensive dynamic cast 2nd time (IS_USER_CREATABLE was
> > > > the 1st and discarded)
> > > > so I'm not sure is a good idea to regress startup time for readability.
I hope it's not measurable, unless we create billions of objects. Do
you want some figures?
> > >
> > > (INTERFACE_CHECK is a nop if CONFIG_QOM_CAST_DEBUG is not
> > > enabled, so I don't understand how it would regress startup time.
> > Isn't it enabled by default though?
> > Maybe we should flip default to disabled then cast should be ok and enable
> > it
> > when generic '--debug' is enabled.
>
> This is called only once for each -object option. Even if QOM
> debugging is enabled by default I don't see why it wouldn't be OK
> to call object_dynamic_cast_assert() here.
Yes, imho it's very marginal. Thus I would value more readability.
Alternatively, we can consider replacing
ucc->complete(USER_CREATABLE(obj), errp); by
ucc->complete((UserCreatable*)obj, errp); to get back to the same
number of dynamic_cast calls.
Re: [Qemu-devel] [PATCH 0/4] MAINTAINERS: s390: several updates
On Mon, 29 Oct 2018 22:14:45 +0100 Alexander Graf wrote: > On 29.10.18 16:42, Christian Borntraeger wrote: > > I discussed the following maintainer updates at the kvm forum with > > Conny. This is the first set of changes. > > Can the affected persons please Ack the relevant patches? > > > > PS: Alex, do you still want to be listed? > > No, I've been meaning to remove myself for a while now :) Patches welcome :) [oh, and thx for your past work, certainly]
[Qemu-devel] [PATCH] target/ppc: fix mtmsr instruction for icount
This patch fixes processing of mtmsr instructions in icount mode.
In this mode writing to interrupt/peripheral state is controlled
by can_do_io flag. This flag must be set explicitly before helper
function invocation.
Signed-off-by: Maria Klimushenkova
Signed-off-by: Pavel Dovgalyuk
---
target/ppc/translate.c | 12
1 file changed, 12 insertions(+)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 4e59dd5..987ce6e 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -4257,11 +4257,17 @@ static void gen_mtmsrd(DisasContext *ctx)
* if we enter power saving mode, we will exit the loop
* directly from ppc_store_msr
*/
+if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
+gen_io_start();
+}
gen_update_nip(ctx, ctx->base.pc_next);
gen_helper_store_msr(cpu_env, cpu_gpr[rS(ctx->opcode)]);
/* Must stop the translation as machine state (may have) changed */
/* Note that mtmsr is not always defined as context-synchronizing */
gen_stop_exception(ctx);
+if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
+gen_io_end();
+}
}
#endif /* !defined(CONFIG_USER_ONLY) */
}
@@ -4286,6 +4292,9 @@ static void gen_mtmsr(DisasContext *ctx)
* if we enter power saving mode, we will exit the loop
* directly from ppc_store_msr
*/
+if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
+gen_io_start();
+}
gen_update_nip(ctx, ctx->base.pc_next);
#if defined(TARGET_PPC64)
tcg_gen_deposit_tl(msr, cpu_msr, cpu_gpr[rS(ctx->opcode)], 0, 32);
@@ -4293,6 +4302,9 @@ static void gen_mtmsr(DisasContext *ctx)
tcg_gen_mov_tl(msr, cpu_gpr[rS(ctx->opcode)]);
#endif
gen_helper_store_msr(cpu_env, msr);
+if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
+gen_io_end();
+}
tcg_temp_free(msr);
/* Must stop the translation as machine state (may have) changed */
/* Note that mtmsr is not always defined as context-synchronizing */
Re: [Qemu-devel] qemu3.0.0: Linux on non x86 CPUs run Wine
On 30 October 2018 at 02:16, wj193102 wrote: > Hi, everyone. > When I have installed the QEMU3.0.0 in the Linux on non X86 CPUS, I want > to use user space emulator to run Wine. I can get the source code for Wine > and the RPM file for Wine from the WineHQ web page. > I used to compile Wine in the X86-based Linux system and used it to run most > Win32 programs. Now I want to use it on the non X86 CPUS by QEMU. But I > can't get the function to install and use the Wine. Please give me some advice > or some functions to finish it. Thanks a lot. I'm afraid you will need to provide more detail for us to help here. What exactly are you doing? Which commands are you running? What is the exact error message or failure you see? >Meanwhile, I use the command "qemu-i386/qemu-x86_64 *.sh" to > run the application from the X86 CPUS on non X86 CPUS, I get the > error information:"Invalid ELF image for this architecture". Why > the error is comming? What can I do to resolve this problem? This is probably because you are trying to run a shell script. (I'm guessing this from the '.sh' extension). This won't work. QEMU only runs actual executables (ELF files). Usually the setup is that the host Linux system is set up with binfmt-misc, so that if it encounters a guest-architecture binary it will automatically run it under QEMU. Usually this is done to allow running guest binaries inside a chroot. thanks -- PMM
[Qemu-devel] [PATCH v3] lsi53c895a: check message length value is valid
From: Prasad J Pandit
While writing a message in 'lsi_do_msgin', message length value
in 'msg_len' could be invalid. Add check to avoid OOB access issue.
Signed-off-by: Prasad J Pandit
---
hw/scsi/lsi53c895a.c | 19 +--
1 file changed, 17 insertions(+), 2 deletions(-)
Update v3: modify assert to say s->msg_len > 0
-> https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg06392.html
diff --git a/hw/scsi/lsi53c895a.c b/hw/scsi/lsi53c895a.c
index d1e6534311..3f207f607c 100644
--- a/hw/scsi/lsi53c895a.c
+++ b/hw/scsi/lsi53c895a.c
@@ -861,10 +861,11 @@ static void lsi_do_status(LSIState *s)
static void lsi_do_msgin(LSIState *s)
{
-int len;
+uint8_t len;
trace_lsi_do_msgin(s->dbc, s->msg_len);
s->sfbr = s->msg[0];
len = s->msg_len;
+assert(len > 0 && len <= LSI_MAX_MSGIN_LEN);
if (len > s->dbc)
len = s->dbc;
pci_dma_write(PCI_DEVICE(s), s->dnad, s->msg, len);
@@ -1705,8 +1706,10 @@ static uint8_t lsi_reg_readb(LSIState *s, int offset)
break;
case 0x58: /* SBDL */
/* Some drivers peek at the data bus during the MSG IN phase. */
-if ((s->sstat1 & PHASE_MASK) == PHASE_MI)
+if ((s->sstat1 & PHASE_MASK) == PHASE_MI) {
+assert(s->msg_len > 0);
return s->msg[0];
+}
ret = 0;
break;
case 0x59: /* SBDL high */
@@ -2103,11 +2106,23 @@ static int lsi_pre_save(void *opaque)
return 0;
}
+static int lsi_post_load(void *opaque, int version_id)
+{
+LSIState *s = opaque;
+
+if (s->msg_len < 0 || s->msg_len > LSI_MAX_MSGIN_LEN) {
+return -EINVAL;
+}
+
+return 0;
+}
+
static const VMStateDescription vmstate_lsi_scsi = {
.name = "lsiscsi",
.version_id = 0,
.minimum_version_id = 0,
.pre_save = lsi_pre_save,
+.post_load = lsi_post_load,
.fields = (VMStateField[]) {
VMSTATE_PCI_DEVICE(parent_obj, LSIState),
--
2.17.2
Re: [Qemu-devel] [PATCH v2] lsi53c895a: check message length value is valid
+-- On Tue, 30 Oct 2018, Paolo Bonzini wrote --+
|
| Reviewed-by: Paolo Bonzini
|
| with one change below:
|
| > +if ((s->sstat1 & PHASE_MASK) == PHASE_MI) {
| > +assert(s->msg_len >= 0);
|
| should be > 0 as well.
Sent patch v3. Thank you.
--
Prasad J Pandit / Red Hat Product Security Team
47AF CE69 3A90 54AA 9045 1053 DD13 3D32 FE5B 041F
[Qemu-devel] [PATCH] MAINTAINERS: PPC: Remove myself
I haven't really been maintaining any PowerPC code for quite a while now, so let's reflect reality: David does all the work and embedded PPC is in "Odd Fixes" state rather than supported now. Signed-off-by: Alexander Graf --- MAINTAINERS | 30 ++ 1 file changed, 14 insertions(+), 16 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index d794bd7a66..d1a6d3c740 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -230,7 +230,6 @@ F: tests/tcg/openrisc/ PowerPC M: David Gibson -M: Alexander Graf L: qemu-...@nongnu.org S: Maintained F: target/ppc/ @@ -340,7 +339,7 @@ S: Maintained F: target/mips/kvm.c PPC -M: Alexander Graf +M: David Gibson S: Maintained F: target/ppc/kvm.c @@ -780,21 +779,21 @@ F: hw/openrisc/openrisc_sim.c PowerPC Machines 405 -M: Alexander Graf +M: David Gibson L: qemu-...@nongnu.org S: Odd Fixes F: hw/ppc/ppc405_boards.c Bamboo -M: Alexander Graf +M: David Gibson L: qemu-...@nongnu.org S: Odd Fixes F: hw/ppc/ppc440_bamboo.c e500 -M: Alexander Graf +M: David Gibson L: qemu-...@nongnu.org -S: Supported +S: Odd Fixes F: hw/ppc/e500.[hc] F: hw/ppc/e500plat.c F: include/hw/ppc/ppc_e500.h @@ -802,16 +801,16 @@ F: include/hw/pci-host/ppce500.h F: pc-bios/u-boot.e500 mpc8544ds -M: Alexander Graf +M: David Gibson L: qemu-...@nongnu.org -S: Supported +S: Odd Fixes F: hw/ppc/mpc8544ds.c F: hw/ppc/mpc8544_guts.c New World -M: Alexander Graf +M: David Gibson L: qemu-...@nongnu.org -S: Maintained +S: Odd Fixes F: hw/ppc/mac_newworld.c F: hw/pci-host/uninorth.c F: hw/pci-bridge/dec.[hc] @@ -823,9 +822,9 @@ F: include/hw/misc/mos6522.h F: include/hw/ppc/mac_dbdma.h Old World -M: Alexander Graf +M: David Gibson L: qemu-...@nongnu.org -S: Maintained +S: Odd Fixes F: hw/ppc/mac_oldworld.c F: hw/pci-host/grackle.c F: hw/misc/macio/ @@ -850,7 +849,6 @@ F: pc-bios/ppc_rom.bin sPAPR M: David Gibson -M: Alexander Graf L: qemu-...@nongnu.org S: Supported F: hw/*/spapr* @@ -1117,7 +1115,7 @@ F: tests/bios-tables-test.c F: tests/acpi-utils.[hc] ppc4xx -M: Alexander Graf +M: David Gibson L: qemu-...@nongnu.org S: Odd Fixes F: hw/ppc/ppc4*.c @@ -1126,9 +1124,9 @@ F: include/hw/ppc/ppc4xx.h F: include/hw/i2c/ppc4xx_i2c.h ppce500 -M: Alexander Graf +M: David Gibson L: qemu-...@nongnu.org -S: Supported +S: Odd Fixes F: hw/ppc/e500* F: hw/pci-host/ppce500.c F: hw/net/fsl_etsec/ -- 2.12.3
Re: [Qemu-devel] [PATCH v5 03/11] escc: introduce a selector for the register bit
On 29/10/2018 23:36, Philippe Mathieu-Daudé wrote: > Hi Marc, Laurent. > > On Mon, Oct 29, 2018 at 2:43 PM Mark Cave-Ayland > wrote: >> >> From: Laurent Vivier >> >> On Sparc and PowerMac, the bit 0 of the address >> selects the register type (control or data) and >> bit 1 selects the channel (B or A). >> >> On m68k Macintosh, the bit 0 selects the channel and >> bit 1 the register type. >> >> This patch introduces a new parameter (bit_swap) to >> the device interface to indicate bits usage must >> be swapped between registers and channels. >> >> For the moment all the machines use the bit 0, >> but this change will be needed to emulate Quadra 800. >> >> Signed-off-by: Laurent Vivier >> --- >> hw/char/escc.c | 30 -- >> include/hw/char/escc.h | 1 + >> 2 files changed, 25 insertions(+), 6 deletions(-) >> >> diff --git a/hw/char/escc.c b/hw/char/escc.c >> index 628f5f81f7..cec75b06f9 100644 >> --- a/hw/char/escc.c >> +++ b/hw/char/escc.c >> @@ -42,14 +42,21 @@ >> * mouse and keyboard ports don't implement all functions and they are >> * only asynchronous. There is no DMA. >> * >> - * Z85C30 is also used on PowerMacs. There are some small differences >> - * between Sparc version (sunzilog) and PowerMac (pmac): >> + * Z85C30 is also used on PowerMacs and m68k Macs. >> + * >> + * There are some small differences between Sparc version (sunzilog) >> + * and PowerMac (pmac): >> * Offset between control and data registers >> * There is some kind of lockup bug, but we can ignore it >> * CTS is inverted >> * DMA on pmac using DBDMA chip >> * pmac can do IRDA and faster rates, sunzilog can only do 38400 >> * pmac baud rate generator clock is 3.6864 MHz, sunzilog 4.9152 MHz >> + * >> + * Linux driver for m68k Macs is the same as for PowerMac (pmac_zilog), >> + * but registers are grouped by type and not by channel: >> + * channel is selected by bit 0 of the address (instead of bit 1) >> + * and register is selected by bit 1 of the address (instead of bit 0). > > If I understand the datashit correctly, the case bit_swap=true is the > default implementation of the Z85C30, > and the current QEMU implementation (from this patch view: > bit_swap=false) is not: it is PowerMac specific. > > I think the PowerMac uses an evolved Z85C30 with more precise IRQ lines. > > Anyway, not a blocker, but I wanted to share my view that this model > is eventually going in an incorrect direction. > I'll try to suggest a patch to clean this during the next merge window. Oh I see, so you think that what is currently the swapped version is actually how it is handled in standard hardware? In that case I tend to agree with you that it would make sense to switch the sense of the property around so that the standard behaviour is the default. Also this makes me feel that "bit_swap" isn't a particularly good property name - perhaps something like "pmac_bit_swap" would be clearer? ATB, Mark.
Re: [Qemu-devel] [PATCH 2/3] hw/dma/pl330: Factor out pl330_init() from hw/arm/xilinx_zynq.c
On 29 October 2018 at 23:20, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> MAINTAINERS| 1 +
> hw/arm/xilinx_zynq.c | 18 ++
> hw/dma/pl330.c | 2 +-
> include/hw/dma/pl330.h | 41 +
> 4 files changed, 45 insertions(+), 17 deletions(-)
> create mode 100644 include/hw/dma/pl330.h
> +static inline void pl330_init(uint32_t base, qemu_irq irq, int nreq)
> +{
> +SysBusDevice *busdev;
> +DeviceState *dev;
> +
> +dev = qdev_create(NULL, TYPE_PL330);
> +qdev_prop_set_uint8(dev, "num_chnls", 8);
> +qdev_prop_set_uint8(dev, "num_periph_req", nreq);
> +qdev_prop_set_uint8(dev, "num_events", 16);
> +qdev_prop_set_uint8(dev, "data_width", 64);
> +qdev_prop_set_uint8(dev, "wr_cap", 8);
> +qdev_prop_set_uint8(dev, "wr_q_dep", 16);
> +qdev_prop_set_uint8(dev, "rd_cap", 8);
> +qdev_prop_set_uint8(dev, "rd_q_dep", 16);
> +qdev_prop_set_uint16(dev, "data_buffer_dep", 256);
> +qdev_init_nofail(dev);
These are the settings the Xilinx board uses, but are
they really the settings every SoC that has a PL330 will use ?
thanks
-- PMM
Re: [Qemu-devel] [PULL 0/2] Ui 20181029 patches
On 29 October 2018 at 14:18, Gerd Hoffmann wrote: > The following changes since commit 285278ca785f5fa9a570927e1c0958a2ca2b2150: > > Merge remote-tracking branch 'remotes/famz/tags/testing-pull-request' into > staging (2018-10-27 19:55:08 +0100) > > are available in the git repository at: > > git://git.kraxel.org/qemu tags/ui-20181029-pull-request > > for you to fetch changes up to 9c956e646178fee8c14ce7dfae5a9d7cb901876c: > > spice: prepare for upcoming spice-server change (2018-10-29 14:38:17 +0100) > > > ui: sdl+spice tweaks. > > > > Gerd Hoffmann (1): > spice: prepare for upcoming spice-server change > > Sebastian Krzyszkowiak (1): > SDL: set a hint to not bypass the window compositor > > ui/sdl2.c | 3 +++ > ui/spice-display.c | 26 ++ > 2 files changed, 25 insertions(+), 4 deletions(-) Applied, thanks. -- PMM
[Qemu-devel] [PATCH] MAINTAINERS: DT: Remove myself and degrade
I haven't really maintained the device tree infrastructure in QEMU for a long time by now. I also haven't seen Peter work on the code for the last 2 years, so let's put it into Odd Fixes to make room for others to step up :). Signed-off-by: Alexander Graf --- MAINTAINERS | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 8bc9a594da..08ea12172e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1548,8 +1548,7 @@ F: include/qom/cpu.h Device Tree M: Peter Crosthwaite -M: Alexander Graf -S: Maintained +S: Odd Fixes F: device_tree.c F: include/sysemu/device_tree.h -- 2.12.3
[Qemu-devel] [PATCH] MAINTAINERS: s390: Remove myself
I haven't realistically maintained s390 related parts for quite a while now, so let's remove my name from the MATINAINERS file to reflect reality. Signed-off-by: Alexander Graf --- MAINTAINERS | 4 1 file changed, 4 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index d1a6d3c740..8bc9a594da 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -250,7 +250,6 @@ F: disas/riscv.c S390 M: Richard Henderson -M: Alexander Graf M: David Hildenbrand S: Maintained F: target/s390x/ @@ -346,7 +345,6 @@ F: target/ppc/kvm.c S390 M: Christian Borntraeger M: Cornelia Huck -M: Alexander Graf S: Maintained F: target/s390x/kvm.c F: target/s390x/kvm_s390x.h @@ -931,7 +929,6 @@ S390 Machines S390 Virtio-ccw M: Cornelia Huck M: Christian Borntraeger -M: Alexander Graf S: Supported F: hw/char/sclp*.[hc] F: hw/char/terminal3270.c @@ -1987,7 +1984,6 @@ F: tcg/ppc/ F: disas/ppc.c S390 target -M: Alexander Graf M: Richard Henderson S: Maintained F: tcg/s390/ -- 2.12.3
Re: [Qemu-devel] [PATCH v2 0/4] Adding LZFSE compression support for DMG block driver.
On Thu, Aug 16, 2018 at 10:58:33AM -0300, Julio Faracco wrote: > Since Mac OS X El Capitain (v10.11), Apple uses LZFSE compression to > generate compressed DMGs as an alternative to BZIP2. Possible, Apple > want to keep this algorithm as default in long term. Some years ago, > Apple opened the LZFSE algorithm to opensource and the main source (or > the most active repo), can be found at: https://github.com/lzfse/lzfse > > Julio Faracco (4): > block: adding lzfse decompressing support as a module. > configure: adding support to lzfse library. > dmg: including dmg-lzfse module inside dmg block driver. > dmg: exchanging hardcoded dmg UDIF block types to enum. Hi Julio, Sorry I didn't get to this patch, I was away on leave. Do you have time to rebase it on the latest qemu.git/master and send it again? Thanks, Stefan signature.asc Description: PGP signature
Re: [Qemu-devel] [PATCH v5 00/14] qga: report serial number and disk node
On Mon, 29 Oct 2018 22:27:45 -0500 Michael Roth wrote: > Quoting Tomáš Golembiovský (2018-10-23 06:23:09) > > Note that PCI controller reporting on Windows was and still is broken. > > Unfortunately I don't know how to fix it at the momemnt. See commit message > > and > > code comment. If anyone has environment where the original code works let me > > know. CCing author of the code In case I missed something obvious. > > > > v5: > > - return -1 in PCI info > > I have cherry-picked three commits from Sameeh Jubran and Michael Roth: > > > > https://github.com/mdroth/qemu/commit/89f145d7e90d721dbc7c9d0082e564bad7e88247 > > > > https://github.com/mdroth/qemu/commit/d5f5f7e7dc265a9e62e5f4c2ee342ab7e56cca53 > > > > https://github.com/mdroth/qemu/commit/201db36b56d7d1ba5ff720eedcb3b62b75306fde > > - remove == TRUE from if-conditions > > - separate Linux and Windows changes so that the Linux part can be pushed > > independently; the relevant commits are ordered first. > > - fixed several typos > > > > v4: > > - split changes into more patches > > - fixed UNC for physical drive to use device namespace > > - renamed g_debug_err() to debug_error() > > - fixed build without libudev > > > > v3: > > - fix typos > > - add configure test for libudev > > - change order of patches fixing PCI controller info and build fix to > > avoid > > exposing broken code > > - split reporting of serial number and device node into two separate > > patches > > > > v2: > > - fix checkpatch error > > > > Michael Roth (1): > > *additonal fixup for NULL pci_controller field > > > > Sameeh Jubran (2): > > qga-win: prevent crash when executing fsinfo command > > qga-win: fsinfo: pci-info: allow partial info > > > > Tomáš Golembiovský (11): > > configure: add test for libudev > > qga: linux: report disk serial number > > qga: linux: return disk device in guest-get-fsinfo > > build: rename CONFIG_QGA_NTDDDISK to CONFIG_QGA_NTDDSCSI > > qga-win: add debugging information > > qga-win: refactor disk properties (bus) > > qga-win: report disk serial number > > qga-win: refactor disk info > > qga-win: handle multi-disk volumes > > qga-win: return disk device in guest-get-fsinfo > > qga-win: demystify namespace stripping > > Thanks, applied to qga tree with some small fix-ups: > https://github.com/mdroth/qemu/commits/qga Thank you > > > > > configure| 24 +++- > > dtc | 2 +- > > qga/Makefile.objs| 1 + > > qga/commands-posix.c | 37 +- > > qga/commands-win32.c | 269 +++ > > qga/qapi-schema.json | 5 +- > > 6 files changed, 287 insertions(+), 51 deletions(-) > > > > -- > > 2.19.0 > > -- Tomáš Golembiovský
Re: [Qemu-devel] [PATCH RFC v6 5/7] migration: fix the multifd code when receiving less channels
On 10/30/2018 02:05 PM, Peter Xu wrote:
On Mon, Oct 29, 2018 at 08:58:16PM +0800, Fei Li wrote:
In our current code, when multifd is used during migration, if there
is an error before the destination receives all new channels, the
source keeps running, however the destination does not exit but keeps
waiting until the source is killed deliberately.
Fix this by simply killing the destination when it fails to receive
packet via some channel.
Cc: Dr. David Alan Gilbert
Cc: Peter Xu
Signed-off-by: Fei Li
---
migration/channel.c | 7 ++-
migration/migration.c | 9 +++--
migration/migration.h | 2 +-
migration/ram.c | 17 ++---
migration/ram.h | 2 +-
5 files changed, 29 insertions(+), 8 deletions(-)
diff --git a/migration/channel.c b/migration/channel.c
index 33e0e9b82f..572be4245a 100644
--- a/migration/channel.c
+++ b/migration/channel.c
@@ -44,7 +44,12 @@ void migration_channel_process_incoming(QIOChannel *ioc)
error_report_err(local_err);
[1]
}
} else {
-migration_ioc_process_incoming(ioc);
+Error *local_err = NULL;
+migration_ioc_process_incoming(ioc, &local_err);
+if (local_err) {
+error_report_err(local_err);
+exit(EXIT_FAILURE);
I would still suggest that you don't quit. See TLS error at [1], it
only dumps the error. IMHO users can quit easily for dst vm, I'll
just let them decide if they want.
Then you can merge the error path for both.
Ok, got it, thanks :)
+}
}
}
diff --git a/migration/migration.c b/migration/migration.c
index 8b36e7f184..87dfc7374f 100644
--- a/migration/migration.c
+++ b/migration/migration.c
@@ -541,7 +541,7 @@ void migration_fd_process_incoming(QEMUFile *f)
migration_incoming_process();
}
-void migration_ioc_process_incoming(QIOChannel *ioc)
+void migration_ioc_process_incoming(QIOChannel *ioc, Error **errp)
{
MigrationIncomingState *mis = migration_incoming_get_current();
bool start_migration;
@@ -563,9 +563,14 @@ void migration_ioc_process_incoming(QIOChannel *ioc)
*/
start_migration = !migrate_use_multifd();
} else {
+Error *local_err = NULL;
/* Multiple connections */
assert(migrate_use_multifd());
-start_migration = multifd_recv_new_channel(ioc);
+start_migration = multifd_recv_new_channel(ioc, &local_err);
+if (local_err) {
+error_propagate(errp, local_err);
+return;
+}
}
if (start_migration) {
diff --git a/migration/migration.h b/migration/migration.h
index f7813f8261..7df4d426d0 100644
--- a/migration/migration.h
+++ b/migration/migration.h
@@ -229,7 +229,7 @@ struct MigrationState
void migrate_set_state(int *state, int old_state, int new_state);
void migration_fd_process_incoming(QEMUFile *f);
-void migration_ioc_process_incoming(QIOChannel *ioc);
+void migration_ioc_process_incoming(QIOChannel *ioc, Error **errp);
void migration_incoming_process(void);
bool migration_has_all_channels(void);
diff --git a/migration/ram.c b/migration/ram.c
index 4db3b3e8f4..8f03afe228 100644
--- a/migration/ram.c
+++ b/migration/ram.c
@@ -1072,6 +1072,7 @@ out:
static void multifd_new_send_channel_async(QIOTask *task, gpointer opaque)
{
MultiFDSendParams *p = opaque;
+MigrationState *s = migrate_get_current();
This seems to be the source part, then I'll suggest you split the
patch and keep this patch only touches the dest vm path.
ok
QIOChannel *sioc = QIO_CHANNEL(qio_task_get_source(task));
Error *local_err = NULL;
@@ -1080,6 +1081,7 @@ static void multifd_new_send_channel_async(QIOTask *task, gpointer opaque)
}
if (qio_task_propagate_error(task, &local_err)) {
+migrate_set_state(&s->state, s->state, MIGRATION_STATUS_FAILED);
if (multifd_save_cleanup(&local_err) != 0) {
migrate_set_error(migrate_get_current(), local_err);
}
@@ -1337,16 +1339,20 @@ bool multifd_recv_all_channels_created(void)
}
/* Return true if multifd is ready for the migration, otherwise false */
-bool multifd_recv_new_channel(QIOChannel *ioc)
+bool multifd_recv_new_channel(QIOChannel *ioc, Error **errp)
{
+MigrationIncomingState *mis = migration_incoming_get_current();
MultiFDRecvParams *p;
Error *local_err = NULL;
int id;
id = multifd_recv_initial_packet(ioc, &local_err);
if (id < 0) {
+error_propagate_prepend(errp, local_err,
+"failed to receive packet via multifd channel %x: ",
+multifd_recv_state->count);
multifd_recv_terminate_threads(local_err, false);
-return false;
+goto fail;
}
p = &multifd_recv_state->params[id];
@@ -1354,7 +1360,8 @@ bool multifd_recv_new_channel(QIOChannel *ioc)
error_setg(&local_err, "multifd: received id '%d
Re: [Qemu-devel] [PATCH v5 06/11] esp: add pseudo-DMA as used by Macintosh
On 30/10/2018 06:47, Hervé Poussineau wrote:
> Le 29/10/2018 à 14:39, Mark Cave-Ayland a écrit :
>> From: Laurent Vivier
>>
>> Co-developed-by: Mark Cave-Ayland
>> Signed-off-by: Mark Cave-Ayland
>> Signed-off-by: Laurent Vivier
>> ---
>> hw/scsi/esp.c | 292
>> +-
>> include/hw/scsi/esp.h | 7 ++
>> 2 files changed, 270 insertions(+), 29 deletions(-)
>>
>
> [...]
>
>> @@ -409,6 +564,7 @@ uint64_t esp_reg_read(ESPState *s, uint32_t saddr)
>> s->ti_size--;
>> s->rregs[ESP_FIFO] = s->ti_buf[s->ti_rptr++];
>> }
>> + esp_raise_irq(s);
>> if (s->ti_rptr == s->ti_wptr) {
>> s->ti_rptr = 0;
>> s->ti_wptr = 0;
>
> You're now raising irq (not drq) when reading registers. In my opinion, this
> deserves
> its own patch with an explanation.
Oooh good spot. Laurent, can you explain a bit more as to how the pseudo-DMA is
wired
up for ESP?
ATB,
Mark.
Re: [Qemu-devel] [PATCH v5 07/11] hw/m68k: add Nubus support
On 30/10/2018 06:47, Hervé Poussineau wrote:
> Le 29/10/2018 à 14:39, Mark Cave-Ayland a écrit :
>> From: Laurent Vivier
>>
>> Co-developed-by: Mark Cave-Ayland
>> Signed-off-by: Mark Cave-Ayland
>> Signed-off-by: Laurent Vivier
>> ---
>> hw/Makefile.objs | 1 +
>> hw/nubus/Makefile.objs | 4 +
>> hw/nubus/mac-nubus-bridge.c | 45
>> hw/nubus/nubus-bridge.c | 34 ++
>> hw/nubus/nubus-bus.c | 111 +++
>> hw/nubus/nubus-device.c | 214
>>
>> include/hw/nubus/mac-nubus-bridge.h | 24
>> include/hw/nubus/nubus.h | 69
>> 8 files changed, 502 insertions(+)
>> create mode 100644 hw/nubus/Makefile.objs
>> create mode 100644 hw/nubus/mac-nubus-bridge.c
>> create mode 100644 hw/nubus/nubus-bridge.c
>> create mode 100644 hw/nubus/nubus-bus.c
>> create mode 100644 hw/nubus/nubus-device.c
>> create mode 100644 include/hw/nubus/mac-nubus-bridge.h
>> create mode 100644 include/hw/nubus/nubus.h
>>
>> diff --git a/hw/Makefile.objs b/hw/Makefile.objs
>> index 39d882af6f..92dc338759 100644
>> --- a/hw/Makefile.objs
>> +++ b/hw/Makefile.objs
>> @@ -36,6 +36,7 @@ devices-dirs-$(CONFIG_SOFTMMU) += watchdog/
>> devices-dirs-$(CONFIG_SOFTMMU) += xen/
>> devices-dirs-$(CONFIG_MEM_DEVICE) += mem/
>> devices-dirs-$(CONFIG_SOFTMMU) += smbios/
>> +devices-dirs-$(CONFIG_NUBUS) += nubus/
>> devices-dirs-y += core/
>> common-obj-y += $(devices-dirs-y)
>> obj-y += $(devices-dirs-y)
>> diff --git a/hw/nubus/Makefile.objs b/hw/nubus/Makefile.objs
>> new file mode 100644
>> index 00..ebb050a4ad
>> --- /dev/null
>> +++ b/hw/nubus/Makefile.objs
>> @@ -0,0 +1,4 @@
>> +common-obj-y += nubus-device.o
>> +common-obj-y += nubus-bus.o
>> +common-obj-y += nubus-bridge.o
>> +common-obj-$(CONFIG_MAC) += mac-nubus-bridge.o
>> diff --git a/hw/nubus/mac-nubus-bridge.c b/hw/nubus/mac-nubus-bridge.c
>> new file mode 100644
>> index 00..7c329300b8
>> --- /dev/null
>> +++ b/hw/nubus/mac-nubus-bridge.c
>> @@ -0,0 +1,45 @@
>> +/*
>> + * Copyright (c) 2013-2018 Laurent Vivier
>> + *
>> + * This work is licensed under the terms of the GNU GPL, version 2 or later.
>> + * See the COPYING file in the top-level directory.
>> + *
>> + */
>> +
>> +#include "qemu/osdep.h"
>> +#include "hw/sysbus.h"
>> +#include "hw/nubus/mac-nubus-bridge.h"
>> +
>> +
>> +static void mac_nubus_bridge_init(Object *obj)
>> +{
>> + MacNubusState *s = MAC_NUBUS_BRIDGE(obj);
>> + SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
>> +
>> + s->bus = NUBUS_BUS(qbus_create(TYPE_NUBUS_BUS, DEVICE(s), NULL));
>> +
>> + sysbus_init_mmio(sbd, &s->bus->super_slot_io);
>> + sysbus_init_mmio(sbd, &s->bus->slot_io);
>> +}
>> +
>> +static void mac_nubus_bridge_class_init(ObjectClass *klass, void *data)
>> +{
>> + DeviceClass *dc = DEVICE_CLASS(klass);
>> +
>> + dc->desc = "Nubus bridge";
>> +}
>> +
>> +static const TypeInfo mac_nubus_bridge_info = {
>> + .name = TYPE_MAC_NUBUS_BRIDGE,
>> + .parent = TYPE_NUBUS_BRIDGE,
>> + .instance_init = mac_nubus_bridge_init,
>> + .instance_size = sizeof(MacNubusState),
>> + .class_init = mac_nubus_bridge_class_init,
>> +};
>> +
>> +static void mac_nubus_bridge_register_types(void)
>> +{
>> + type_register_static(&mac_nubus_bridge_info);
>> +}
>> +
>> +type_init(mac_nubus_bridge_register_types)
>> diff --git a/hw/nubus/nubus-bridge.c b/hw/nubus/nubus-bridge.c
>> new file mode 100644
>> index 00..cd8c6a91eb
>> --- /dev/null
>> +++ b/hw/nubus/nubus-bridge.c
>> @@ -0,0 +1,34 @@
>> +/*
>> + * QEMU Macintosh Nubus
>> + *
>> + * Copyright (c) 2013-2018 Laurent Vivier
>> + *
>> + * This work is licensed under the terms of the GNU GPL, version 2 or later.
>> + * See the COPYING file in the top-level directory.
>> + *
>> + */
>> +
>> +#include "qemu/osdep.h"
>> +#include "hw/sysbus.h"
>> +#include "hw/nubus/nubus.h"
>> +
>> +static void nubus_bridge_class_init(ObjectClass *klass, void *data)
>> +{
>> + DeviceClass *dc = DEVICE_CLASS(klass);
>> +
>> + dc->fw_name = "nubus";
>> +}
>> +
>> +static const TypeInfo nubus_bridge_info = {
>> + .name = TYPE_NUBUS_BRIDGE,
>> + .parent = TYPE_SYS_BUS_DEVICE,
>> + .instance_size = sizeof(SysBusDevice),
>> + .class_init = nubus_bridge_class_init,
>> +};
>> +
>> +static void nubus_register_types(void)
>> +{
>> + type_register_static(&nubus_bridge_info);
>> +}
>> +
>> +type_init(nubus_register_types)
>> diff --git a/hw/nubus/nubus-bus.c b/hw/nubus/nubus-bus.c
>> new file mode 100644
>> index 00..448fa95600
>> --- /dev/null
>> +++ b/hw/nubus/nubus-bus.c
>> @@ -0,0 +1,111 @@
>> +/*
>> + * QEMU Macintosh Nubus
>> + *
>> + * Copyright (c) 2013-2018 Laurent Vivier
>> + *
>> + * This work is licensed under the terms of the GNU GPL, version 2 or later.
>> + * See the COPYING file in the top-level directory
Re: [Qemu-devel] [PATCH v5 09/11] hw/m68k: add a dummy SWIM floppy controller
On 30/10/2018 06:48, Hervé Poussineau wrote: > Le 29/10/2018 à 14:39, Mark Cave-Ayland a écrit : >> From: Laurent Vivier >> >> Co-developed-by: Mark Cave-Ayland >> Signed-off-by: Mark Cave-Ayland >> Signed-off-by: Laurent Vivier >> --- >> hw/block/Makefile.objs | 1 + >> hw/block/swim.c | 415 >> >> include/hw/block/swim.h | 76 + >> 3 files changed, 492 insertions(+) >> create mode 100644 hw/block/swim.c >> create mode 100644 include/hw/block/swim.h > > [...] > >> diff --git a/include/hw/block/swim.h b/include/hw/block/swim.h >> new file mode 100644 >> index 00..d6fbdc11ac >> --- /dev/null >> +++ b/include/hw/block/swim.h >> @@ -0,0 +1,76 @@ >> +/* >> + * QEMU Macintosh floppy disk controller emulator (SWIM) >> + * >> + * Copyright (c) 2014-2018 Laurent Vivier >> + * >> + * This work is licensed under the terms of the GNU GPL, version 2. See >> + * the COPYING file in the top-level directory. >> + * >> + */ >> + >> +#ifndef SWIM_H >> +#define SWIM_H >> + >> +#include "qemu/osdep.h" >> +#include "hw/sysbus.h" >> + >> +#define MAX_FD 2 > > Maybe rename MAX_FD to SWIM_MAX_FD, to prevent conflicts with MAX_FD in other > files? > Excepted that: > Reviewed-by: Hervé Poussineau Yes, that's a good idea (I can see this might clash with in-built OS headers). I'll make the change and add your R-B to the next version. ATB, Mark.
Re: [Qemu-devel] [PULL v1 0/5] Merge tpm 2018/10/29 v1
On 29 October 2018 at 15:19, Stefan Berger wrote:
> From: Stefan Berger
>
> This pull request fixes a couple of TPM support related issues,
> such as full initialization of a variable to quiet down valgrind,
> a possible race in the TPM related test cases and marking test
> cases as skipped if swtpm was not found in PATH.
>
>Stefan
>
> The following changes since commit a4d710251fa5aa9ec26de4626f11c78500195d12:
>
> Merge remote-tracking branch
> 'remotes/berrange/tags/qcrypto-next-pull-request' into staging (2018-10-24
> 22:08:42 +0100)
>
> are available in the Git repository at:
>
> git://github.com/stefanberger/qemu-tpm.git tags/pull-tpm-2018-10-29-1
>
> for you to fetch changes up to f9da599490730cf0c3016f15225d7f1ee15bec75:
>
> tpm: Zero-init structure to avoid uninitialized variables in valgrind log
> (2018-10-27 10:33:18 -0400)
>
>
> Marc-André Lureau (2):
> tests/tpm: fix tpm_util_swtpm_has_tpm2()
> tests/tpm: mark swtpm test as skipped instead of successful
>
> Stefan Berger (3):
> docs: tpm: Mention implemented TPM CRB interface emulation and specs
> MAINTAINERS: Change my email address to the new domain
> tpm: Zero-init structure to avoid uninitialized variables in valgrind
> log
Hi; this gives some test failures (all hosts):
TEST: tests/tpm-crb-swtpm-test... (pid=305)
/i386/tpm/crb-swtpm/test:FAIL
GTester: last random seed: R02Sf628ca48da88252a6b95465fef3b855f
/i386/tpm/crb-swtpm-migration/test: FAIL
GTester: last random seed: R02Sf628ca48da88252a6b95465fef3b855f
FAIL: tests/tpm-crb-swtpm-test
TEST: tests/tpm-crb-test... (pid=311)
/i386/tpm-crb/test: OK
PASS: tests/tpm-crb-test
TEST: tests/tpm-tis-swtpm-test... (pid=324)
/i386/tpm/tis-swtpm/test:FAIL
GTester: last random seed: R02Sca4f303959770d4ca9f8f12b784dba0d
/i386/tpm/tis-swtpm-migration/test: FAIL
GTester: last random seed: R02Sca4f303959770d4ca9f8f12b784dba0d
FAIL: tests/tpm-tis-swtpm-test
TEST: tests/tpm-tis-test... (pid=331)
/i386/tpm-tis/test_check_localities: OK
/i386/tpm-tis/test_check_access_reg: OK
/i386/tpm-tis/test_check_access_reg_seize: OK
/i386/tpm-tis/test_check_access_reg_release: OK
/i386/tpm-tis/test_check_transmit: OK
PASS: tests/tpm-tis-test
and a compile failure on OSX:
/Users/pm215/src/qemu-for-merges/hw/tpm/tpm_emulator.c:161:21: error:
suggest braces around initialization of subobject
[-Werror,-Wmissing-braces]
ptm_loc loc = { 0 };
^
{}
(what you want here is just "ptm_loc loc = {};" -- the "{ 0 }" syntax
is the C standard one but not all compilers can handle it without warnings
if the first member in the struct happens to be a substruct.)
thanks
-- PMM
Re: [Qemu-devel] [PATCH v5 05/11] hw/m68k: Apple Sound Chip (ASC) emulation
On 30/10/2018 06:46, Hervé Poussineau wrote: > Le 29/10/2018 à 14:39, Mark Cave-Ayland a écrit : >> From: Laurent Vivier >> >> This is broken as the linux driver seems broken too... >> >> Co-developed-by: Mark Cave-Ayland >> Signed-off-by: Mark Cave-Ayland >> Signed-off-by: Laurent Vivier >> --- >> hw/audio/Makefile.objs | 1 + >> hw/audio/asc.c | 446 >> + >> include/hw/audio/asc.h | 48 ++ >> 3 files changed, 495 insertions(+) >> create mode 100644 hw/audio/asc.c >> create mode 100644 include/hw/audio/asc.h > > According to above comment, this device is broken. > Is it necessary for Q800 emulation? What happens if you remove it? A quick test here shows that I can still boot without it, so it doesn't seem to be essential. Laurent, should we remove this from the next revision of the patchset? The general consensus seems to be that if a device isn't required (for now) then it shouldn't be included. ATB, Mark.
Re: [Qemu-devel] [PATCH v2 2/2] tests: fw_cfg: add reboot_timeout test case
On 30/10/2018 05:28, Li Qiang wrote:
> Signed-off-by: Li Qiang
> ---
> tests/fw_cfg-test.c | 10 ++
> 1 file changed, 10 insertions(+)
>
> diff --git a/tests/fw_cfg-test.c b/tests/fw_cfg-test.c
> index 1c5103fe1c..aeabd17ec0 100644
> --- a/tests/fw_cfg-test.c
> +++ b/tests/fw_cfg-test.c
> @@ -99,6 +99,15 @@ static void test_fw_cfg_boot_menu(void)
> g_assert_cmpint(qfw_cfg_get_u16(fw_cfg, FW_CFG_BOOT_MENU), ==,
> boot_menu);
> }
>
> +static void test_fw_cfg_reboot_timeout(void)
> +{
> +uint32_t reboot_timeout;
> +
> +qfw_cfg_get_file(fw_cfg, "etc/boot-fail-wait",
> + &reboot_timeout, sizeof(reboot_timeout));
> +g_assert_cmpint(reboot_timeout, <=, 65535);
> +}
> +
> int main(int argc, char **argv)
> {
> QTestState *s;
> @@ -125,6 +134,7 @@ int main(int argc, char **argv)
> qtest_add_func("fw_cfg/max_cpus", test_fw_cfg_max_cpus);
> qtest_add_func("fw_cfg/numa", test_fw_cfg_numa);
> qtest_add_func("fw_cfg/boot_menu", test_fw_cfg_boot_menu);
> +qtest_add_func("fw_cfg/reboot_timeout", test_fw_cfg_reboot_timeout);
>
> ret = g_test_run();
This test is not doing much; you could add "-boot reboot-timeout=15" and
check the value.
Paolo
[Qemu-devel] [PATCH 2/4] add QemuSupportState to DeviceClass
So we can tag device support state.
Signed-off-by: Gerd Hoffmann
---
include/hw/qdev-core.h | 2 ++
hw/core/qdev.c | 8 +++-
qdev-monitor.c | 7 +++
3 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h
index a24d0dd566..ff6bd3f08f 100644
--- a/include/hw/qdev-core.h
+++ b/include/hw/qdev-core.h
@@ -3,6 +3,7 @@
#include "qemu/queue.h"
#include "qemu/bitmap.h"
+#include "qemu/support-state.h"
#include "qom/object.h"
#include "hw/irq.h"
#include "hw/hotplug.h"
@@ -105,6 +106,7 @@ typedef struct DeviceClass {
*/
bool user_creatable;
bool hotpluggable;
+QemuSupportState supported;
/* callbacks */
DeviceReset reset;
diff --git a/hw/core/qdev.c b/hw/core/qdev.c
index 6b3cc55b27..e788fca257 100644
--- a/hw/core/qdev.c
+++ b/hw/core/qdev.c
@@ -133,11 +133,17 @@ DeviceState *qdev_create(BusState *bus, const char *name)
DeviceState *qdev_try_create(BusState *bus, const char *type)
{
+DeviceClass *dc;
DeviceState *dev;
-if (object_class_by_name(type) == NULL) {
+dc = DEVICE_CLASS(object_class_by_name(type));
+if (dc == NULL) {
return NULL;
}
+if (qemu_is_deprecated(&dc->supported) ||
+qemu_is_obsolete(&dc->supported)) {
+qemu_warn_support_state("device", type, &dc->supported);
+}
dev = DEVICE(object_new(type));
if (!dev) {
return NULL;
diff --git a/qdev-monitor.c b/qdev-monitor.c
index 802c18a74e..63cb43691c 100644
--- a/qdev-monitor.c
+++ b/qdev-monitor.c
@@ -128,6 +128,9 @@ static void qdev_print_devinfo(DeviceClass *dc)
if (!dc->user_creatable) {
out_printf(", no-user");
}
+if (dc->supported.state != SUPPORT_STATE_UNKNOWN) {
+out_printf(", %s", SupportState_str(dc->supported.state));
+}
out_printf("\n");
}
@@ -579,6 +582,10 @@ DeviceState *qdev_device_add(QemuOpts *opts, Error **errp)
if (!dc) {
return NULL;
}
+if (qemu_is_deprecated(&dc->supported) ||
+qemu_is_obsolete(&dc->supported)) {
+qemu_warn_support_state("device", driver, &dc->supported);
+}
/* find bus */
path = qemu_opt_get(opts, "bus");
--
2.9.3
[Qemu-devel] [PATCH 4/4] switch machine types to QemuSupportState
So we can indicate machine type support state.
For starters switch over the current deprecation_reason users.
Signed-off-by: Gerd Hoffmann
---
include/hw/boards.h | 5 ++---
hw/i386/pc_piix.c | 3 ++-
hw/ppc/prep.c | 3 ++-
vl.c| 6 +++---
4 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/include/hw/boards.h b/include/hw/boards.h
index f82f28468b..25e5d8b292 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -106,8 +106,7 @@ typedef struct {
/**
* MachineClass:
- * @deprecation_reason: If set, the machine is marked as deprecated. The
- *string should provide some clear information about what to use instead.
+ * @supported: support state of the machine type.
* @max_cpus: maximum number of CPUs supported. Default: 1
* @min_cpus: minimum number of CPUs supported. Default: 1
* @default_cpus: number of CPUs instantiated if none are specified. Default: 1
@@ -167,7 +166,7 @@ struct MachineClass {
char *name;
const char *alias;
const char *desc;
-const char *deprecation_reason;
+QemuSupportState supported;
void (*init)(MachineState *state);
void (*reset)(void);
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index dc09466b3e..bc238cc465 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -957,7 +957,8 @@ static void pc_i440fx_0_11_machine_options(MachineClass *m)
{
pc_i440fx_0_12_machine_options(m);
m->hw_version = "0.11";
-m->deprecation_reason = "use a newer machine type instead";
+m->supported.state = SUPPORT_STATE_DEPRECATED;
+m->supported.reason = "use a newer machine type instead";
SET_MACHINE_COMPAT(m, PC_COMPAT_0_11);
}
diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
index 2afb7f437e..ab1c2bcc7d 100644
--- a/hw/ppc/prep.c
+++ b/hw/ppc/prep.c
@@ -588,7 +588,8 @@ static void ppc_prep_init(MachineState *machine)
static void prep_machine_init(MachineClass *mc)
{
-mc->deprecation_reason = "use 40p machine type instead";
+mc->supported.state = SUPPORT_STATE_DEPRECATED;
+mc->supported.reason = "use 40p machine type instead";
mc->desc = "PowerPC PREP platform";
mc->init = ppc_prep_init;
mc->block_default_type = IF_IDE;
diff --git a/vl.c b/vl.c
index 1fcacc5caa..83506de0cc 100644
--- a/vl.c
+++ b/vl.c
@@ -2573,7 +2573,7 @@ static gint machine_class_cmp(gconstpointer a,
gconstpointer b)
}
printf("%-20s %s%s%s\n", mc->name, mc->desc,
mc->is_default ? " (default)" : "",
- mc->deprecation_reason ? " (deprecated)" : "");
+ qemu_is_deprecated(&mc->supported) ? " (deprecated)" : "");
}
}
@@ -4290,9 +4290,9 @@ int main(int argc, char **argv, char **envp)
configure_accelerator(current_machine);
-if (!qtest_enabled() && machine_class->deprecation_reason) {
+if (!qtest_enabled() && qemu_is_deprecated(&machine_class->supported)) {
error_report("Machine type '%s' is deprecated: %s",
- machine_class->name, machine_class->deprecation_reason);
+ machine_class->name, machine_class->supported.reason);
}
/*
--
2.9.3
[Qemu-devel] [PATCH 0/4] Introducing QemuSupportState
Trying to fill the need to be more finegrained on support status ... Any hints/patches how to hook that into introspection so we get machine type / device support status to libvirt are welcome. Gerd Hoffmann (4): add QemuSupportState add QemuSupportState to DeviceClass tag cirrus as obsolete switch machine types to QemuSupportState include/hw/boards.h | 5 ++--- include/hw/qdev-core.h | 2 ++ include/qemu/support-state.h | 17 + hw/core/qdev.c | 8 +++- hw/display/cirrus_vga.c | 3 +++ hw/display/cirrus_vga_isa.c | 3 +++ hw/i386/pc_piix.c| 3 ++- hw/ppc/prep.c| 3 ++- qdev-monitor.c | 7 +++ util/support-state.c | 23 +++ vl.c | 6 +++--- qapi/common.json | 16 util/Makefile.objs | 1 + 13 files changed, 88 insertions(+), 9 deletions(-) create mode 100644 include/qemu/support-state.h create mode 100644 util/support-state.c -- 2.9.3
[Qemu-devel] [PATCH 1/4] add QemuSupportState
Indicates support state for somerhing (device, backend, subsystem, ...)
in qemu. Modeled roughly after the "S:" states we have in MAINTANERS.
Signed-off-by: Gerd Hoffmann
---
include/qemu/support-state.h | 17 +
util/support-state.c | 23 +++
qapi/common.json | 16
util/Makefile.objs | 1 +
4 files changed, 57 insertions(+)
create mode 100644 include/qemu/support-state.h
create mode 100644 util/support-state.c
diff --git a/include/qemu/support-state.h b/include/qemu/support-state.h
new file mode 100644
index 00..5fd3c83eee
--- /dev/null
+++ b/include/qemu/support-state.h
@@ -0,0 +1,17 @@
+#ifndef QEMU_SUPPORT_STATE_H
+#define QEMU_SUPPORT_STATE_H
+
+#include "qapi/qapi-types-common.h"
+
+typedef struct QemuSupportState {
+SupportState state;
+const char *reason;
+} QemuSupportState;
+
+void qemu_warn_support_state(const char *type, const char *name,
+ QemuSupportState *state);
+
+bool qemu_is_deprecated(QemuSupportState *state);
+bool qemu_is_obsolete(QemuSupportState *state);
+
+#endif /* QEMU_SUPPORT_STATE_H */
diff --git a/util/support-state.c b/util/support-state.c
new file mode 100644
index 00..7966fa0fc7
--- /dev/null
+++ b/util/support-state.c
@@ -0,0 +1,23 @@
+#include "qemu/osdep.h"
+#include "qemu/error-report.h"
+#include "qemu/support-state.h"
+
+void qemu_warn_support_state(const char *type, const char *name,
+ QemuSupportState *state)
+{
+warn_report("%s %s is %s%s%s%s", type, name,
+SupportState_str(state->state),
+state->reason ? " (" : "",
+state->reason ? state->reason : "",
+state->reason ? ")" : "");
+}
+
+bool qemu_is_deprecated(QemuSupportState *state)
+{
+return state->state == SUPPORT_STATE_DEPRECATED;
+}
+
+bool qemu_is_obsolete(QemuSupportState *state)
+{
+return state->state == SUPPORT_STATE_OBSOLETE;
+}
diff --git a/qapi/common.json b/qapi/common.json
index 021174f04e..78176151af 100644
--- a/qapi/common.json
+++ b/qapi/common.json
@@ -151,3 +151,19 @@
'ppc64', 'riscv32', 'riscv64', 's390x', 'sh4',
'sh4eb', 'sparc', 'sparc64', 'tricore', 'unicore32',
'x86_64', 'xtensa', 'xtensaeb' ] }
+
+##
+# @SupportState:
+#
+# Indicate Support level of qemu devices, backends, subsystems, ...
+#
+# Since: 3.2
+##
+{ 'enum': 'SupportState',
+ 'data': [ 'unknown',
+'supported',
+'maintained',
+'odd-fixes',
+'orphan',
+'obsolete',
+'deprecated' ] }
diff --git a/util/Makefile.objs b/util/Makefile.objs
index 0820923c18..6e5f8faf82 100644
--- a/util/Makefile.objs
+++ b/util/Makefile.objs
@@ -50,5 +50,6 @@ util-obj-y += range.o
util-obj-y += stats64.o
util-obj-y += systemd.o
util-obj-y += iova-tree.o
+util-obj-y += support-state.o
util-obj-$(CONFIG_LINUX) += vfio-helpers.o
util-obj-$(CONFIG_OPENGL) += drm.o
--
2.9.3
[Qemu-devel] [PATCH 3/4] tag cirrus as obsolete
Standard VGA should be used instead.
Signed-off-by: Gerd Hoffmann
---
hw/display/cirrus_vga.c | 3 +++
hw/display/cirrus_vga_isa.c | 3 +++
2 files changed, 6 insertions(+)
diff --git a/hw/display/cirrus_vga.c b/hw/display/cirrus_vga.c
index d9b854d74d..ec2cefb46f 100644
--- a/hw/display/cirrus_vga.c
+++ b/hw/display/cirrus_vga.c
@@ -3024,6 +3024,9 @@ static void cirrus_vga_class_init(ObjectClass *klass,
void *data)
dc->vmsd = &vmstate_pci_cirrus_vga;
dc->props = pci_vga_cirrus_properties;
dc->hotpluggable = false;
+dc->supported.state = SUPPORT_STATE_OBSOLETE;
+dc->supported.reason = "use \"-vga std\" instead, see "
+
"https://www.kraxel.org/blog/2014/10/qemu-using-cirrus-considered-harmful/";;
}
static const TypeInfo cirrus_vga_info = {
diff --git a/hw/display/cirrus_vga_isa.c b/hw/display/cirrus_vga_isa.c
index fa10b74230..cfe2cad9e0 100644
--- a/hw/display/cirrus_vga_isa.c
+++ b/hw/display/cirrus_vga_isa.c
@@ -81,6 +81,9 @@ static void isa_cirrus_vga_class_init(ObjectClass *klass,
void *data)
dc->realize = isa_cirrus_vga_realizefn;
dc->props = isa_cirrus_vga_properties;
set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
+dc->supported.state = SUPPORT_STATE_OBSOLETE;
+dc->supported.reason = "use \"-vga std\" instead, see "
+
"https://www.kraxel.org/blog/2014/10/qemu-using-cirrus-considered-harmful/";;
}
static const TypeInfo isa_cirrus_vga_info = {
--
2.9.3
Re: [Qemu-devel] [PULL v1 0/5] Merge tpm 2018/10/29 v1
Hi Peter
On Tue, Oct 30, 2018 at 2:45 PM Peter Maydell wrote:
>
> On 29 October 2018 at 15:19, Stefan Berger wrote:
> > From: Stefan Berger
> >
> > This pull request fixes a couple of TPM support related issues,
> > such as full initialization of a variable to quiet down valgrind,
> > a possible race in the TPM related test cases and marking test
> > cases as skipped if swtpm was not found in PATH.
> >
> >Stefan
> >
> > The following changes since commit a4d710251fa5aa9ec26de4626f11c78500195d12:
> >
> > Merge remote-tracking branch
> > 'remotes/berrange/tags/qcrypto-next-pull-request' into staging (2018-10-24
> > 22:08:42 +0100)
> >
> > are available in the Git repository at:
> >
> > git://github.com/stefanberger/qemu-tpm.git tags/pull-tpm-2018-10-29-1
> >
> > for you to fetch changes up to f9da599490730cf0c3016f15225d7f1ee15bec75:
> >
> > tpm: Zero-init structure to avoid uninitialized variables in valgrind log
> > (2018-10-27 10:33:18 -0400)
> >
> >
> > Marc-André Lureau (2):
> > tests/tpm: fix tpm_util_swtpm_has_tpm2()
> > tests/tpm: mark swtpm test as skipped instead of successful
> >
> > Stefan Berger (3):
> > docs: tpm: Mention implemented TPM CRB interface emulation and specs
> > MAINTAINERS: Change my email address to the new domain
> > tpm: Zero-init structure to avoid uninitialized variables in valgrind
> > log
>
> Hi; this gives some test failures (all hosts):
>
> TEST: tests/tpm-crb-swtpm-test... (pid=305)
> /i386/tpm/crb-swtpm/test:FAIL
> GTester: last random seed: R02Sf628ca48da88252a6b95465fef3b855f
> /i386/tpm/crb-swtpm-migration/test: FAIL
> GTester: last random seed: R02Sf628ca48da88252a6b95465fef3b855f
> FAIL: tests/tpm-crb-swtpm-test
> TEST: tests/tpm-crb-test... (pid=311)
> /i386/tpm-crb/test: OK
> PASS: tests/tpm-crb-test
> TEST: tests/tpm-tis-swtpm-test... (pid=324)
> /i386/tpm/tis-swtpm/test:FAIL
> GTester: last random seed: R02Sca4f303959770d4ca9f8f12b784dba0d
> /i386/tpm/tis-swtpm-migration/test: FAIL
> GTester: last random seed: R02Sca4f303959770d4ca9f8f12b784dba0d
> FAIL: tests/tpm-tis-swtpm-test
> TEST: tests/tpm-tis-test... (pid=331)
> /i386/tpm-tis/test_check_localities: OK
> /i386/tpm-tis/test_check_access_reg: OK
> /i386/tpm-tis/test_check_access_reg_seize: OK
> /i386/tpm-tis/test_check_access_reg_release: OK
> /i386/tpm-tis/test_check_transmit: OK
> PASS: tests/tpm-tis-test
>
What version of swtpm & libtpms is installed?
thanks
> and a compile failure on OSX:
> /Users/pm215/src/qemu-for-merges/hw/tpm/tpm_emulator.c:161:21: error:
> suggest braces around initialization of subobject
> [-Werror,-Wmissing-braces]
> ptm_loc loc = { 0 };
> ^
> {}
>
> (what you want here is just "ptm_loc loc = {};" -- the "{ 0 }" syntax
> is the C standard one but not all compilers can handle it without warnings
> if the first member in the struct happens to be a substruct.)
>
> thanks
> -- PMM
>
--
Marc-André Lureau
Re: [Qemu-devel] [PATCH 3/4] tag cirrus as obsolete
On 30/10/2018 12:13, Gerd Hoffmann wrote: > +dc->supported.reason = "use \"-vga std\" instead, see " > + > "https://www.kraxel.org/blog/2014/10/qemu-using-cirrus-considered-harmful/";; Any chance you could update that blog post for the last 4 years and post it on qemu.org? Thanks, Paolo
Re: [Qemu-devel] [PATCH 0/4] Introducing QemuSupportState
On 30/10/2018 12:13, Gerd Hoffmann wrote: > Trying to fill the need to be more finegrained on support status ... > > Any hints/patches how to hook that into introspection so we get > machine type / device support status to libvirt are welcome. Acked-by: Paolo Bonzini > Gerd Hoffmann (4): > add QemuSupportState > add QemuSupportState to DeviceClass > tag cirrus as obsolete > switch machine types to QemuSupportState > > include/hw/boards.h | 5 ++--- > include/hw/qdev-core.h | 2 ++ > include/qemu/support-state.h | 17 + > hw/core/qdev.c | 8 +++- > hw/display/cirrus_vga.c | 3 +++ > hw/display/cirrus_vga_isa.c | 3 +++ > hw/i386/pc_piix.c| 3 ++- > hw/ppc/prep.c| 3 ++- > qdev-monitor.c | 7 +++ > util/support-state.c | 23 +++ > vl.c | 6 +++--- > qapi/common.json | 16 > util/Makefile.objs | 1 + > 13 files changed, 88 insertions(+), 9 deletions(-) > create mode 100644 include/qemu/support-state.h > create mode 100644 util/support-state.c >
[Qemu-devel] [PULL v2 07/20] scripts/decodetree.py: remove unused imports
From: Cleber Rosa Signed-off-by: Cleber Rosa Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20181004161852.11673-8-cr...@redhat.com> Signed-off-by: Laurent Vivier --- scripts/decodetree.py | 2 -- 1 file changed, 2 deletions(-) diff --git a/scripts/decodetree.py b/scripts/decodetree.py index 277f9a9bba..457cffea90 100755 --- a/scripts/decodetree.py +++ b/scripts/decodetree.py @@ -149,12 +149,10 @@ # trans_addl_i(ctx, &arg_opi, insn) # -import io import os import re import sys import getopt -import pdb insnwidth = 32 insnmask = 0x -- 2.17.2
[Qemu-devel] [PULL v2 06/20] docs/devel/testing.rst: add missing newlines after code block
From: Cleber Rosa The line immediate following a ".. code::" block is considered to contains arguments to the "code directive". The lack of a new line gives me during at parse time: testing.rst:63: (ERROR/3) Error in "code" directive: maximum 1 argument(s) allowed, 3 supplied. .. code:: make check-unit V=1 testing.rst:120: (ERROR/3) Error in "code" directive: maximum 1 argument(s) allowed, 3 supplied. .. code:: make check-qtest V=1 Let's add the missing newlines, both for consistency and to avoid the parsing errors. Signed-off-by: Cleber Rosa Reviewed-by: John Snow Message-Id: <20181004161852.11673-6-cr...@redhat.com> Signed-off-by: Laurent Vivier --- docs/devel/testing.rst | 2 ++ 1 file changed, 2 insertions(+) diff --git a/docs/devel/testing.rst b/docs/devel/testing.rst index fcfad87614..a227754f86 100644 --- a/docs/devel/testing.rst +++ b/docs/devel/testing.rst @@ -59,6 +59,7 @@ variable (which affects memory reclamation and catches invalid pointers better) and gtester options. If necessary, you can run .. code:: + make check-unit V=1 and copy the actual command line which executes the unit test, then run @@ -116,6 +117,7 @@ and using gdb on the test is still simple to do: find out the actual command from the output of .. code:: + make check-qtest V=1 which you can run manually. -- 2.17.2
[Qemu-devel] [PULL v2 01/20] configs/alpha: Remove unused CONFIG_PARALLEL_ISA switch
From: Thomas Huth We don't use CONFIG_PARALLEL_ISA in any of our Makefiles, so this is just a dead config option which can be removed. Fixes: a4cb773928e047b137c6998209cf2eec857fac6b Signed-off-by: Thomas Huth Acked-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <1540376314-5727-1-git-send-email-th...@redhat.com> Signed-off-by: Laurent Vivier --- default-configs/alpha-softmmu.mak | 1 - 1 file changed, 1 deletion(-) diff --git a/default-configs/alpha-softmmu.mak b/default-configs/alpha-softmmu.mak index eb58b40254..4d654eaa0b 100644 --- a/default-configs/alpha-softmmu.mak +++ b/default-configs/alpha-softmmu.mak @@ -8,7 +8,6 @@ CONFIG_I82374=y CONFIG_I8254=y CONFIG_I8257=y CONFIG_PARALLEL=y -CONFIG_PARALLEL_ISA=y CONFIG_FDC=y CONFIG_PCKBD=y CONFIG_VGA_CIRRUS=y -- 2.17.2
Re: [Qemu-devel] [PULL v2 00/28] pci, pc, virtio: fixes, features
On 27 October 2018 at 19:53, Peter Maydell wrote: > It looks like the test/acpi-test-data/ in the build directory > has not been populated with the MCFG.mmio64 file -- some of > the data files have symlinks from that directory back to the > source directory, but some do not. This seems to be done in > configure, but there is nothing in the makefile rules which > causes configure to be rerun because there is a new file > in your test data directory. A manual rerun of configure > adds the missing symlinks and causes the test to pass. > > So I would characterise this as a makefile issue. Is there a reason why we need to symlink all the data files in tests/acpi-test-data/ individually, rather than just having tests/acpi-test-data itself be a symlink back to the directory in the source tree ? That would avoid this problem; it's how we handle tests/acceptance and tests/data. thanks -- PMM
[Qemu-devel] [PULL v2 19/20] ppc: move at24c to its own CONFIG_ symbol
From: Paolo Bonzini AT24c EEPROM is currently gated by CONFIG_I2C, and as such it is being included in all emulators that use I2C, even if they do not really need it. Separate it and, since it was added for the e500 machines, add it to qemu-system-ppc and qemu-system-ppc64. Signed-off-by: Paolo Bonzini Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Message-Id: <20180522191743.12872-1-pbonz...@redhat.com> [lv: rebase] Signed-off-by: Laurent Vivier --- default-configs/ppc-softmmu.mak | 1 + hw/nvram/Makefile.objs | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/default-configs/ppc-softmmu.mak b/default-configs/ppc-softmmu.mak index 3181bbf163..23d871fb3e 100644 --- a/default-configs/ppc-softmmu.mak +++ b/default-configs/ppc-softmmu.mak @@ -28,6 +28,7 @@ CONFIG_SM501=y CONFIG_DDC=y CONFIG_IDE_SII3112=y CONFIG_I2C=y +CONFIG_AT24C=y CONFIG_BITBANG_I2C=y CONFIG_M41T80=y CONFIG_VGA_CIRRUS=y diff --git a/hw/nvram/Makefile.objs b/hw/nvram/Makefile.objs index a912d25391..b318e53a43 100644 --- a/hw/nvram/Makefile.objs +++ b/hw/nvram/Makefile.objs @@ -1,6 +1,6 @@ common-obj-$(CONFIG_DS1225Y) += ds1225y.o common-obj-y += eeprom93xx.o -common-obj-$(CONFIG_I2C) += eeprom_at24c.o +common-obj-$(CONFIG_AT24C) += eeprom_at24c.o common-obj-y += fw_cfg.o common-obj-y += chrp_nvram.o common-obj-$(CONFIG_MAC_NVRAM) += mac_nvram.o -- 2.17.2
[Qemu-devel] [PULL v2 09/20] qemu-iotests: make 218 executable
From: Cleber Rosa Commit 990dc39c made all tests executable at the time, but 218 came in later, and missing those permissions. Signed-off-by: Cleber Rosa Message-Id: <20181004161852.11673-4-cr...@redhat.com> Signed-off-by: Laurent Vivier --- tests/qemu-iotests/218 | 0 1 file changed, 0 insertions(+), 0 deletions(-) mode change 100644 => 100755 tests/qemu-iotests/218 diff --git a/tests/qemu-iotests/218 b/tests/qemu-iotests/218 old mode 100644 new mode 100755 -- 2.17.2
[Qemu-devel] [PULL v2 08/20] scripts/qemu.py: remove trailing quotes on docstring
From: Cleber Rosa Signed-off-by: Cleber Rosa Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20181004161852.11673-11-cr...@redhat.com> Signed-off-by: Laurent Vivier --- scripts/qemu.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/scripts/qemu.py b/scripts/qemu.py index f099ce7278..b0b2f12ce6 100644 --- a/scripts/qemu.py +++ b/scripts/qemu.py @@ -87,7 +87,7 @@ class QEMUMachine(object): @param name: prefix for socket and log file names (default: qemu-PID) @param test_dir: where to create socket and log file @param monitor_address: address for QMP monitor -@param socket_scm_helper: helper program, required for send_fd_scm()" +@param socket_scm_helper: helper program, required for send_fd_scm() @note: Qemu process is not started until launch() is used. ''' if args is None: -- 2.17.2
[Qemu-devel] [PULL v2 11/20] cpu.h: fix a typo in comment
From: Li Qiang Found by reading the code. Signed-off-by: Li Qiang Message-Id: <1536150548-2797-1-git-send-email-liq...@gmail.com> Signed-off-by: Laurent Vivier --- include/qom/cpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/qom/cpu.h b/include/qom/cpu.h index 4e238b0d9f..def0c64308 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -852,7 +852,7 @@ extern CPUInterruptHandler cpu_interrupt_handler; /** * cpu_interrupt: * @cpu: The CPU to set an interrupt on. - * @mask: The interupts to set. + * @mask: The interrupts to set. * * Invokes the interrupt handler. */ -- 2.17.2
[Qemu-devel] [PULL v2 14/20] qobject: Catch another straggler for use of qdict_put_str()
From: Philippe Mathieu-Daudé
Patch created mechanically by rerunning:
$ spatch --sp-file scripts/coccinelle/qobject.cocci \
--macro-file scripts/cocci-macro-file.h \
--dir . --in-place
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Markus Armbruster
Acked-by: Michael S. Tsirkin
Message-Id: <20180705155811.20366-2-f4...@amsat.org>
Signed-off-by: Laurent Vivier
---
qobject/block-qdict.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/qobject/block-qdict.c b/qobject/block-qdict.c
index 42054cc274..1487cc5dd8 100644
--- a/qobject/block-qdict.c
+++ b/qobject/block-qdict.c
@@ -577,7 +577,7 @@ static QObject *qdict_crumple_for_keyval_qiv(QDict *src,
Error **errp)
if (!tmp) {
tmp = qdict_clone_shallow(src);
}
-qdict_put(tmp, ent->key, qstring_from_str(s));
+qdict_put_str(tmp, ent->key, s);
g_free(buf);
}
--
2.17.2
[Qemu-devel] [PULL v2 10/20] linux-user: fix comment s/atomic_write/atomic_set/
From: "Emilio G. Cota"
Signed-off-by: Emilio G. Cota
Message-Id: <20180811211011.6277-1-c...@braap.org>
Signed-off-by: Laurent Vivier
---
linux-user/qemu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/linux-user/qemu.h b/linux-user/qemu.h
index 1beb6a2cfc..dde3f26f5a 100644
--- a/linux-user/qemu.h
+++ b/linux-user/qemu.h
@@ -143,7 +143,7 @@ typedef struct TaskState {
/* Nonzero if process_pending_signals() needs to do something (either
* handle a pending signal or unblock signals).
* This flag is written from a signal handler so should be accessed via
- * the atomic_read() and atomic_write() functions. (It is not accessed
+ * the atomic_read() and atomic_set() functions. (It is not accessed
* from multiple threads.)
*/
int signal_pending;
--
2.17.2
[Qemu-devel] [PULL v2 12/20] tests: Fix typos in comments and help message (found by codespell)
From: Stefan Weil
Fix also a grammar issue.
Signed-off-by: Stefan Weil
Reviewed-by: Alex Bennée
Message-Id: <20180713054755.23323-1...@weilnetz.de>
Signed-off-by: Laurent Vivier
---
tests/bios-tables-test.c | 2 +-
tests/docker/Makefile.include | 2 +-
tests/docker/docker.py| 4 ++--
tests/guest-debug/test-gdbstub.py | 2 +-
tests/qemu-iotests/common.qemu| 2 +-
tests/tcg/Makefile.include| 2 +-
tests/tcg/Makefile.probe | 2 +-
tests/tcg/mips/mips64-dsp/subq_s_pw.c | 2 +-
8 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/tests/bios-tables-test.c b/tests/bios-tables-test.c
index 4e24930c4b..af4b1fb6bd 100644
--- a/tests/bios-tables-test.c
+++ b/tests/bios-tables-test.c
@@ -390,7 +390,7 @@ try_again:
if (g_file_test(aml_file, G_FILE_TEST_EXISTS)) {
exp_sdt.aml_file = aml_file;
} else if (*ext != '\0') {
-/* try fallback to generic (extention less) expected file */
+/* try fallback to generic (extension less) expected file */
ext = "";
g_free(aml_file);
goto try_again;
diff --git a/tests/docker/Makefile.include b/tests/docker/Makefile.include
index 6e03235ab9..9467e9d088 100644
--- a/tests/docker/Makefile.include
+++ b/tests/docker/Makefile.include
@@ -41,7 +41,7 @@ docker-qemu-src: $(DOCKER_SRC_COPY)
docker-image: ${DOCKER_TARGETS}
# General rule for building docker images. If we are a sub-make
-# invoked with SKIP_DOCKER_BUILD we still check the image is upto date
+# invoked with SKIP_DOCKER_BUILD we still check the image is up to date
# though
ifdef SKIP_DOCKER_BUILD
docker-image-%: $(DOCKER_FILES_DIR)/%.docker
diff --git a/tests/docker/docker.py b/tests/docker/docker.py
index 44d5f7493b..02d8a83847 100755
--- a/tests/docker/docker.py
+++ b/tests/docker/docker.py
@@ -97,7 +97,7 @@ def _get_so_libs(executable):
return libs
def _copy_binary_with_libs(src, dest_dir):
-"""Copy a binary executable and all its dependant libraries.
+"""Copy a binary executable and all its dependent libraries.
This does rely on the host file-system being fairly multi-arch
aware so the file don't clash with the guests layout."""
@@ -284,7 +284,7 @@ class SubCommand(object):
name = None # Subcommand name
def shared_args(self, parser):
parser.add_argument("--quiet", action="store_true",
-help="Run quietly unless an error occured")
+help="Run quietly unless an error occurred")
def args(self, parser):
"""Setup argument parser"""
diff --git a/tests/guest-debug/test-gdbstub.py
b/tests/guest-debug/test-gdbstub.py
index 474d2c5c65..0e4ac01426 100644
--- a/tests/guest-debug/test-gdbstub.py
+++ b/tests/guest-debug/test-gdbstub.py
@@ -122,7 +122,7 @@ class CatchBreakpoint(gdb.Breakpoint):
def run_test():
-"Run throught the tests one by one"
+"Run through the tests one by one"
print ("Checking we can step the first few instructions")
step_ok = 0
diff --git a/tests/qemu-iotests/common.qemu b/tests/qemu-iotests/common.qemu
index f285484951..dadde2a266 100644
--- a/tests/qemu-iotests/common.qemu
+++ b/tests/qemu-iotests/common.qemu
@@ -257,7 +257,7 @@ function _launch_qemu()
}
-# Silenty kills the QEMU process
+# Silently kills the QEMU process
#
# If $wait is set to anything other than the empty string, the process will not
# be killed but only waited for, and any output will be forwarded to stdout. If
diff --git a/tests/tcg/Makefile.include b/tests/tcg/Makefile.include
index 57470b2a2c..c581bd6ffc 100644
--- a/tests/tcg/Makefile.include
+++ b/tests/tcg/Makefile.include
@@ -2,7 +2,7 @@
#
# TCG tests (per-target rules)
#
-# This Makefile fragement is included from the per-target
+# This Makefile fragment is included from the per-target
# Makefile.target so will be invoked for each linux-user program we
# build. We have two options for compiling, either using a configured
# guest compiler or calling one of our docker images to do it for us.
diff --git a/tests/tcg/Makefile.probe b/tests/tcg/Makefile.probe
index 15c0412657..9dc654663d 100644
--- a/tests/tcg/Makefile.probe
+++ b/tests/tcg/Makefile.probe
@@ -2,7 +2,7 @@
#
# TCG Compiler Probe
#
-# This Makefile fragement is included multiple times in the main make
+# This Makefile fragment is included multiple times in the main make
# script to probe for available compilers. This is used to build up a
# selection of required docker targets before we invoke a sub-make for
# each target.
diff --git a/tests/tcg/mips/mips64-dsp/subq_s_pw.c
b/tests/tcg/mips/mips64-dsp/subq_s_pw.c
index e8e0b0567e..4c080b785a 100644
--- a/tests/tcg/mips/mips64-dsp/subq_s_pw.c
+++ b/tests/tcg/mips/mips64-dsp/subq_s_pw.c
@@ -24,7 +24,7 @@ int main(void)
rt = 0x123456789ABCDEF1;
rs = 0x123456789ABCDEF2;
result = 0x0001;
-/* This time we do
[Qemu-devel] [PULL v2 02/20] vga_int: remove unused function protype
From: yuchenlin Signed-off-by: yuchenlin Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20181022080053.9379-1-yuchen...@synology.com> Signed-off-by: Laurent Vivier --- hw/display/vga_int.h | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/display/vga_int.h b/hw/display/vga_int.h index 6e4fa48a79..55c418eab5 100644 --- a/hw/display/vga_int.h +++ b/hw/display/vga_int.h @@ -166,7 +166,6 @@ MemoryRegion *vga_init_io(VGACommonState *s, Object *obj, const MemoryRegionPortio **vbe_ports); void vga_common_reset(VGACommonState *s); -void vga_sync_dirty_bitmap(VGACommonState *s); void vga_dirty_log_start(VGACommonState *s); void vga_dirty_log_stop(VGACommonState *s); -- 2.17.2
[Qemu-devel] [PULL v2 18/20] hw/intc/gicv3: Remove useless parenthesis around DIV_ROUND_UP macro
From: Philippe Mathieu-Daudé Patch created mechanically by rerunning: $ spatch --sp-file scripts/coccinelle/round.cocci \ --macro-file scripts/cocci-macro-file.h \ --dir . --in-place Signed-off-by: Philippe Mathieu-Daudé Acked-by: Michael S. Tsirkin Message-Id: <20180705155811.20366-8-f4...@amsat.org> Signed-off-by: Laurent Vivier --- include/hw/intc/arm_gicv3_common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/hw/intc/arm_gicv3_common.h b/include/hw/intc/arm_gicv3_common.h index b798486ecf..31ec9a1ae4 100644 --- a/include/hw/intc/arm_gicv3_common.h +++ b/include/hw/intc/arm_gicv3_common.h @@ -62,7 +62,7 @@ * avoids bugs where we forget to subtract GIC_INTERNAL from an * interrupt number. */ -#define GICV3_BMP_SIZE (DIV_ROUND_UP(GICV3_MAXIRQ, 32)) +#define GICV3_BMP_SIZE DIV_ROUND_UP(GICV3_MAXIRQ, 32) #define GIC_DECLARE_BITMAP(name) \ uint32_t name[GICV3_BMP_SIZE] -- 2.17.2
[Qemu-devel] [PULL v2 03/20] memory.h: fix typos in comments
From: Li Qiang Signed-off-by: Li Qiang Reviewed-by: Peter Maydell Message-Id: <1539080467-2976-1-git-send-email-liq...@gmail.com> [lv: s/types/typos/] Signed-off-by: Laurent Vivier --- include/exec/memory.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/exec/memory.h b/include/exec/memory.h index 667466b8f3..d0c7f0d9e9 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -935,7 +935,7 @@ uint64_t memory_region_size(MemoryRegion *mr); /** * memory_region_is_ram: check whether a memory region is random access * - * Returns %true is a memory region is random access. + * Returns %true if a memory region is random access. * * @mr: the memory region being queried */ @@ -947,7 +947,7 @@ static inline bool memory_region_is_ram(MemoryRegion *mr) /** * memory_region_is_ram_device: check whether a memory region is a ram device * - * Returns %true is a memory region is a device backed ram region + * Returns %true if a memory region is a device backed ram region * * @mr: the memory region being queried */ @@ -1161,7 +1161,7 @@ uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr); /** * memory_region_is_rom: check whether a memory region is ROM * - * Returns %true is a memory region is read-only memory. + * Returns %true if a memory region is read-only memory. * * @mr: the memory region being queried */ -- 2.17.2
[Qemu-devel] [PULL v2 00/20] Qemu trivial for 3.1 patches
The following changes since commit 808ebd66e467f77c0d1f8c6346235f81e9c99cf2: Merge remote-tracking branch 'remotes/riscv/tags/riscv-for-master-3.1-sf0' into staging (2018-10-25 17:41:03 +0100) are available in the Git repository at: git://github.com/vivier/qemu.git tags/qemu-trivial-for-3.1-pull-request for you to fetch changes up to 7b2b797cf0addac789ba858fdbd95c55128d72d5: milkymist-minimac2: Use qemu_log_mask(GUEST_ERROR) instead of error_report (2018-10-30 09:13:31 +0100) QEMU trivial patches collected between June and October 2018 (Thank you to Thomas Huth) v2: fix 32bit build with updated patch (v3) from Philippe Mathieu-Daudé built in a 32bit debian sid chroot Cleber Rosa (6): tests/tcg/README: fix location for lm32 tests qemu-iotests: fix filename containing checks docs/devel/testing.rst: add missing newlines after code block scripts/decodetree.py: remove unused imports scripts/qemu.py: remove trailing quotes on docstring qemu-iotests: make 218 executable Emilio G. Cota (1): linux-user: fix comment s/atomic_write/atomic_set/ Li Qiang (2): memory.h: fix typos in comments cpu.h: fix a typo in comment Paolo Bonzini (1): ppc: move at24c to its own CONFIG_ symbol Philippe Mathieu-Daudé (6): qobject: Catch another straggler for use of qdict_put_str() xen: Use the PCI_DEVICE macro tests/bios-tables-test: Remove an useless cast hw/pci-host: Remove useless parenthesis around DIV_ROUND_UP macro hw/intc/gicv3: Remove useless parenthesis around DIV_ROUND_UP macro milkymist-minimac2: Use qemu_log_mask(GUEST_ERROR) instead of error_report Stefan Weil (2): tests: Fix typos in comments and help message (found by codespell) configure: Support pkg-config for zlib Thomas Huth (1): configs/alpha: Remove unused CONFIG_PARALLEL_ISA switch yuchenlin (1): vga_int: remove unused function protype configure | 40 +++ default-configs/alpha-softmmu.mak | 1 - default-configs/ppc-softmmu.mak | 1 + docs/devel/testing.rst| 2 ++ hw/display/vga_int.h | 1 - hw/net/milkymist-minimac2.c | 15 ++ hw/nvram/Makefile.objs| 2 +- hw/pci-host/piix.c| 2 +- hw/pci-host/q35.c | 2 +- hw/xen/xen_pt_config_init.c | 8 +++--- include/exec/memory.h | 6 ++-- include/hw/intc/arm_gicv3_common.h| 2 +- include/qom/cpu.h | 2 +- linux-user/qemu.h | 2 +- qobject/block-qdict.c | 2 +- scripts/decodetree.py | 2 -- scripts/qemu.py | 2 +- tests/bios-tables-test.c | 4 +-- tests/docker/Makefile.include | 2 +- tests/docker/docker.py| 4 +-- tests/guest-debug/test-gdbstub.py | 2 +- tests/qemu-iotests/218| 0 tests/qemu-iotests/common.qemu| 2 +- tests/qemu-iotests/common.rc | 4 +-- tests/tcg/Makefile.include| 2 +- tests/tcg/Makefile.probe | 2 +- tests/tcg/README | 2 +- tests/tcg/mips/mips64-dsp/subq_s_pw.c | 2 +- 28 files changed, 64 insertions(+), 54 deletions(-) mode change 100644 => 100755 tests/qemu-iotests/218 -- 2.17.2
[Qemu-devel] [PULL v2 15/20] xen: Use the PCI_DEVICE macro
From: Philippe Mathieu-Daudé
TYPE_XEN_PT_DEVICE is a subclass of TYPE_PCI_DEVICE, the clean way
to access the PCIDevice pointer is using the PCI_DEVICE() macro.
Suggested-by: Peter Maydell
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Markus Armbruster
Acked-by: Anthony PERARD
Acked-by: Michael S. Tsirkin
Message-Id: <20180705155811.20366-4-f4...@amsat.org>
Signed-off-by: Laurent Vivier
---
hw/xen/xen_pt_config_init.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/xen/xen_pt_config_init.c b/hw/xen/xen_pt_config_init.c
index aee31c62bb..47f9010c75 100644
--- a/hw/xen/xen_pt_config_init.c
+++ b/hw/xen/xen_pt_config_init.c
@@ -358,7 +358,7 @@ static uint64_t xen_pt_get_bar_size(PCIIORegion *r)
static XenPTBarFlag xen_pt_bar_reg_parse(XenPCIPassthroughState *s,
int index)
{
-PCIDevice *d = &s->dev;
+PCIDevice *d = PCI_DEVICE(s);
XenPTRegion *region = NULL;
PCIIORegion *r;
@@ -469,7 +469,7 @@ static int xen_pt_bar_reg_write(XenPCIPassthroughState *s,
XenPTReg *cfg_entry,
{
XenPTRegInfo *reg = cfg_entry->reg;
XenPTRegion *base = NULL;
-PCIDevice *d = &s->dev;
+PCIDevice *d = PCI_DEVICE(s);
const PCIIORegion *r;
uint32_t writable_mask = 0;
uint32_t bar_emu_mask = 0;
@@ -543,7 +543,7 @@ static int
xen_pt_exp_rom_bar_reg_write(XenPCIPassthroughState *s,
{
XenPTRegInfo *reg = cfg_entry->reg;
XenPTRegion *base = NULL;
-PCIDevice *d = (PCIDevice *)&s->dev;
+PCIDevice *d = PCI_DEVICE(s);
uint32_t writable_mask = 0;
uint32_t throughable_mask = get_throughable_mask(s, reg, valid_mask);
pcibus_t r_size = 0;
@@ -1587,7 +1587,7 @@ static int xen_pt_pcie_size_init(XenPCIPassthroughState
*s,
const XenPTRegGroupInfo *grp_reg,
uint32_t base_offset, uint8_t *size)
{
-PCIDevice *d = &s->dev;
+PCIDevice *d = PCI_DEVICE(s);
uint8_t version = get_capability_version(s, base_offset);
uint8_t type = get_device_type(s, base_offset);
uint8_t pcie_size = 0;
--
2.17.2
[Qemu-devel] [PULL v2 17/20] hw/pci-host: Remove useless parenthesis around DIV_ROUND_UP macro
From: Philippe Mathieu-Daudé
Patch created mechanically by rerunning:
$ spatch --sp-file scripts/coccinelle/round.cocci \
--macro-file scripts/cocci-macro-file.h \
--dir . --in-place
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Markus Armbruster
Acked-by: Michael S. Tsirkin
Message-Id: <20180705155811.20366-7-f4...@amsat.org>
Signed-off-by: Laurent Vivier
---
hw/pci-host/piix.c | 2 +-
hw/pci-host/q35.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index da73743fa2..47293a3915 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -144,7 +144,7 @@ static void i440fx_update_memory_mappings(PCII440FXState *d)
memory_region_transaction_begin();
for (i = 0; i < 13; i++) {
pam_update(&d->pam_regions[i], i,
- pd->config[I440FX_PAM + (DIV_ROUND_UP(i, 2))]);
+ pd->config[I440FX_PAM + DIV_ROUND_UP(i, 2)]);
}
memory_region_set_enabled(&d->smram_region,
!(pd->config[I440FX_SMRAM] & SMRAM_D_OPEN));
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 8ce1e09932..966a7cf92d 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -356,7 +356,7 @@ static void mch_update_pam(MCHPCIState *mch)
memory_region_transaction_begin();
for (i = 0; i < 13; i++) {
pam_update(&mch->pam_regions[i], i,
- pd->config[MCH_HOST_BRIDGE_PAM0 + (DIV_ROUND_UP(i, 2))]);
+ pd->config[MCH_HOST_BRIDGE_PAM0 + DIV_ROUND_UP(i, 2)]);
}
memory_region_transaction_commit();
}
--
2.17.2
[Qemu-devel] [PULL v2 16/20] tests/bios-tables-test: Remove an useless cast
From: Philippe Mathieu-Daudé
Patch created mechanically by rerunning:
$ spatch --sp-file scripts/coccinelle/typecast.cocci \
--macro-file scripts/cocci-macro-file.h \
--dir . --in-place
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Markus Armbruster
Acked-by: Michael S. Tsirkin
Message-Id: <20180705155811.20366-5-f4...@amsat.org>
Signed-off-by: Laurent Vivier
---
tests/bios-tables-test.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/bios-tables-test.c b/tests/bios-tables-test.c
index af4b1fb6bd..02e77ec811 100644
--- a/tests/bios-tables-test.c
+++ b/tests/bios-tables-test.c
@@ -319,7 +319,7 @@ static bool load_asl(GArray *sdts, AcpiSdtTable *sdt)
ret = g_spawn_command_line_sync(command_line->str, &out, &out_err, NULL,
&error);
g_assert_no_error(error);
if (ret) {
-ret = g_file_get_contents(sdt->asl_file, (gchar **)&sdt->asl,
+ret = g_file_get_contents(sdt->asl_file, &sdt->asl,
&sdt->asl_len, &error);
g_assert(ret);
g_assert_no_error(error);
--
2.17.2
[Qemu-devel] [PULL v2 04/20] tests/tcg/README: fix location for lm32 tests
From: Cleber Rosa Point to the right and obvious location for lm32 tests. Signed-off-by: Cleber Rosa Reviewed-by: Thomas Huth Acked-by: Alex Bennée Message-Id: <20181004161852.11673-3-cr...@redhat.com> Signed-off-by: Laurent Vivier --- tests/tcg/README | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/tcg/README b/tests/tcg/README index a5643d33e7..2a58f9a058 100644 --- a/tests/tcg/README +++ b/tests/tcg/README @@ -10,6 +10,6 @@ with "make test-cris". LM32 -The testsuite for LM32 is in tests/tcg/cris. You can run it +The testsuite for LM32 is in tests/tcg/lm32. You can run it with "make test-lm32". -- 2.17.2
Re: [Qemu-devel] [PATCH 2/3] hw/dma/pl330: Factor out pl330_init() from hw/arm/xilinx_zynq.c
On 30/10/18 10:36, Peter Maydell wrote:
On 29 October 2018 at 23:20, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
---
MAINTAINERS| 1 +
hw/arm/xilinx_zynq.c | 18 ++
hw/dma/pl330.c | 2 +-
include/hw/dma/pl330.h | 41 +
4 files changed, 45 insertions(+), 17 deletions(-)
create mode 100644 include/hw/dma/pl330.h
+static inline void pl330_init(uint32_t base, qemu_irq irq, int nreq)
+{
+SysBusDevice *busdev;
+DeviceState *dev;
+
+dev = qdev_create(NULL, TYPE_PL330);
+qdev_prop_set_uint8(dev, "num_chnls", 8);
+qdev_prop_set_uint8(dev, "num_periph_req", nreq);
+qdev_prop_set_uint8(dev, "num_events", 16);
+qdev_prop_set_uint8(dev, "data_width", 64);
+qdev_prop_set_uint8(dev, "wr_cap", 8);
+qdev_prop_set_uint8(dev, "wr_q_dep", 16);
+qdev_prop_set_uint8(dev, "rd_cap", 8);
+qdev_prop_set_uint8(dev, "rd_q_dep", 16);
+qdev_prop_set_uint16(dev, "data_buffer_dep", 256);
+qdev_init_nofail(dev);
These are the settings the Xilinx board uses, but are
they really the settings every SoC that has a PL330 will use ?
Except "num_periph_req", all are pl330_properties defaults.
thanks
-- PMM
[Qemu-devel] [PULL v2 05/20] qemu-iotests: fix filename containing checks
From: Cleber Rosa Commit cce293a2945 moved some functions from common.config to common.rc, but the error messages still reference the old file location. Signed-off-by: Cleber Rosa Reviewed-by: Max Reitz Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20181004161852.11673-5-cr...@redhat.com> Signed-off-by: Laurent Vivier --- tests/qemu-iotests/common.rc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tests/qemu-iotests/common.rc b/tests/qemu-iotests/common.rc index 44bee16a5e..70ca65b49b 100644 --- a/tests/qemu-iotests/common.rc +++ b/tests/qemu-iotests/common.rc @@ -170,7 +170,7 @@ if [ ! -e "$TEST_DIR" ]; then fi if [ ! -d "$TEST_DIR" ]; then -echo "common.config: Error: \$TEST_DIR ($TEST_DIR) is not a directory" +echo "common.rc: Error: \$TEST_DIR ($TEST_DIR) is not a directory" exit 1 fi @@ -179,7 +179,7 @@ if [ -z "$REMOTE_TEST_DIR" ]; then fi if [ ! -d "$SAMPLE_IMG_DIR" ]; then -echo "common.config: Error: \$SAMPLE_IMG_DIR ($SAMPLE_IMG_DIR) is not a directory" +echo "common.rc: Error: \$SAMPLE_IMG_DIR ($SAMPLE_IMG_DIR) is not a directory" exit 1 fi -- 2.17.2
[Qemu-devel] [PULL v2 13/20] configure: Support pkg-config for zlib
From: Stefan Weil
This is needed for builds with the mingw64-* packages from Cygwin,
but also works for Linux.
Move the zlib test also more to the end because users should
get information on the really important missing packages
(which also require zlib) first.
Signed-off-by: Stefan Weil
Reviewed-by: Stefan Hajnoczi
Message-Id: <20180712192603.11599-1...@weilnetz.de>
Signed-off-by: Laurent Vivier
---
configure | 40 +++-
1 file changed, 23 insertions(+), 17 deletions(-)
diff --git a/configure b/configure
index 1ee09bd112..a02df30dde 100755
--- a/configure
+++ b/configure
@@ -2151,23 +2151,6 @@ EOF
fi
fi
-#
-# zlib check
-
-if test "$zlib" != "no" ; then
-cat > $TMPC << EOF
-#include
-int main(void) { zlibVersion(); return 0; }
-EOF
-if compile_prog "" "-lz" ; then
-:
-else
-error_exit "zlib check failed" \
-"Make sure to have the zlib libs and headers installed."
-fi
-fi
-LIBS="$LIBS -lz"
-
##
# lzo check
@@ -3479,6 +3462,29 @@ if ! compile_prog "$glib_cflags -Werror" "$glib_libs" ;
then
fi
fi
+#
+# zlib check
+
+if test "$zlib" != "no" ; then
+if $pkg_config --exists zlib; then
+zlib_cflags=$($pkg_config --cflags zlib)
+zlib_libs=$($pkg_config --libs zlib)
+QEMU_CFLAGS="$zlib_cflags $QEMU_CFLAGS"
+LIBS="$zlib_libs $LIBS"
+else
+cat > $TMPC << EOF
+#include
+int main(void) { zlibVersion(); return 0; }
+EOF
+if compile_prog "" "-lz" ; then
+LIBS="$LIBS -lz"
+else
+error_exit "zlib check failed" \
+"Make sure to have the zlib libs and headers installed."
+fi
+fi
+fi
+
##
# SHA command probe for modules
if test "$modules" = yes; then
--
2.17.2
Re: [Qemu-devel] [PATCH 2/3] hw/dma/pl330: Factor out pl330_init() from hw/arm/xilinx_zynq.c
On 30/10/18 0:20, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
---
MAINTAINERS| 1 +
hw/arm/xilinx_zynq.c | 18 ++
hw/dma/pl330.c | 2 +-
include/hw/dma/pl330.h | 41 +
4 files changed, 45 insertions(+), 17 deletions(-)
create mode 100644 include/hw/dma/pl330.h
diff --git a/MAINTAINERS b/MAINTAINERS
index d794bd7a66..647e2aa0d5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -452,6 +452,7 @@ F: hw/display/pl110*
F: hw/dma/pl080.c
F: include/hw/dma/pl080.h
F: hw/dma/pl330.c
+F: include/hw/dma/pl330.h
F: hw/gpio/pl061.c
F: hw/input/pl050.c
F: hw/intc/pl190.c
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 57497b0c4d..a4c4d44f00 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -34,6 +34,7 @@
#include "hw/char/cadence_uart.h"
#include "hw/net/cadence_gem.h"
#include "hw/cpu/a9mpcore.h"
+#include "hw/dma/pl330.h"
#define NUM_SPI_FLASHES 4
#define NUM_QSPI_FLASHES 2
@@ -278,22 +279,7 @@ static void zynq_init(MachineState *machine)
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xF8007100);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[39-IRQ_OFFSET]);
-dev = qdev_create(NULL, "pl330");
-qdev_prop_set_uint8(dev, "num_chnls", 8);
-qdev_prop_set_uint8(dev, "num_periph_req", 4);
-qdev_prop_set_uint8(dev, "num_events", 16);
-
-qdev_prop_set_uint8(dev, "data_width", 64);
-qdev_prop_set_uint8(dev, "wr_cap", 8);
-qdev_prop_set_uint8(dev, "wr_q_dep", 16);
-qdev_prop_set_uint8(dev, "rd_cap", 8);
-qdev_prop_set_uint8(dev, "rd_q_dep", 16);
-qdev_prop_set_uint16(dev, "data_buffer_dep", 256);
-
-qdev_init_nofail(dev);
-busdev = SYS_BUS_DEVICE(dev);
-sysbus_mmio_map(busdev, 0, 0xF8003000);
-sysbus_connect_irq(busdev, 0, pic[45-IRQ_OFFSET]); /* abort irq line */
+pl330_init(0xf8003000, pic[45 - IRQ_OFFSET], 4); /* abort irq line */
for (n = 0; n < ARRAY_SIZE(dma_irqs); ++n) { /* event irqs */
sysbus_connect_irq(busdev, n + 1, pic[dma_irqs[n] - IRQ_OFFSET]);
Sorry, this is a buggy patch ^ busdev is now invalid.
}
diff --git a/hw/dma/pl330.c b/hw/dma/pl330.c
index d071049233..711cf9a605 100644
--- a/hw/dma/pl330.c
+++ b/hw/dma/pl330.c
@@ -20,6 +20,7 @@
#include "qemu/timer.h"
#include "sysemu/dma.h"
#include "qemu/log.h"
+#include "hw/dma/pl330.h"
#ifndef PL330_ERR_DEBUG
#define PL330_ERR_DEBUG 0
@@ -271,7 +272,6 @@ struct PL330State {
};
-#define TYPE_PL330 "pl330"
#define PL330(obj) OBJECT_CHECK(PL330State, (obj), TYPE_PL330)
static const VMStateDescription vmstate_pl330 = {
diff --git a/include/hw/dma/pl330.h b/include/hw/dma/pl330.h
new file mode 100644
index 00..9a586c0df9
--- /dev/null
+++ b/include/hw/dma/pl330.h
@@ -0,0 +1,41 @@
+/*
+ * ARM PrimeCell PL330 DMA Controller
+ *
+ * Copyright (c) 2009 Samsung Electronics.
+ * Contributed by Kirill Batuzov
+ * Copyright (c) 2012 Peter A.G. Crosthwaite (peter.crosthwa...@petalogix.com)
+ * Copyright (c) 2012 PetaLogix Pty Ltd.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#ifndef HW_DMA_PL330_H
+#define HW_DMA_PL330_H
+
+#include "hw/sysbus.h"
+
+#define TYPE_PL330 "pl330"
+
+static inline void pl330_init(uint32_t base, qemu_irq irq, int nreq)
+{
+SysBusDevice *busdev;
+DeviceState *dev;
+
+dev = qdev_create(NULL, TYPE_PL330);
+qdev_prop_set_uint8(dev, "num_chnls", 8);
+qdev_prop_set_uint8(dev, "num_periph_req", nreq);
+qdev_prop_set_uint8(dev, "num_events", 16);
+qdev_prop_set_uint8(dev, "data_width", 64);
+qdev_prop_set_uint8(dev, "wr_cap", 8);
+qdev_prop_set_uint8(dev, "wr_q_dep", 16);
+qdev_prop_set_uint8(dev, "rd_cap", 8);
+qdev_prop_set_uint8(dev, "rd_q_dep", 16);
+qdev_prop_set_uint16(dev, "data_buffer_dep", 256);
+qdev_init_nofail(dev);
+
+busdev = SYS_BUS_DEVICE(dev);
+sysbus_mmio_map(busdev, 0, base);
+sysbus_connect_irq(busdev, 0, irq);
+}
+
+#endif /* HW_DMA_PL330_H */
[Qemu-devel] [PATCH v2 4/5] target/mips: Misc R5900-related cosmetic changes
From: Aleksandar Markovic
Misc changes in comments and strings for R5900.
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 14 +++---
target/mips/translate_init.inc.c | 12
2 files changed, 7 insertions(+), 19 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 155331f..259ad2b 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -2096,8 +2096,8 @@ enum {
* MTSAH rs, immediate Move Halfword Count to Shift Amount Register
* PROT3W rd, rtParallel Rotate 3 Words
*
- * The TX79-specific Multimedia Instruction encodings
- * ==
+ * Multimedia Instructions (MMI) encodings
+ * ===
*
* MMI Instruction encoding table keys:
*
@@ -24714,7 +24714,7 @@ static void decode_mmi0(CPUMIPSState *env, DisasContext
*ctx)
generate_exception_end(ctx, EXCP_RI); /* TODO: MMI_OPC_CLASS_MMI0 */
break;
default:
-MIPS_INVAL("TX79 MMI class MMI0");
+MIPS_INVAL("MMI class MMI0");
generate_exception_end(ctx, EXCP_RI);
break;
}
@@ -24746,7 +24746,7 @@ static void decode_mmi1(CPUMIPSState *env, DisasContext
*ctx)
generate_exception_end(ctx, EXCP_RI); /* TODO: MMI_OPC_CLASS_MMI1 */
break;
default:
-MIPS_INVAL("TX79 MMI class MMI1");
+MIPS_INVAL("MMI class MMI1");
generate_exception_end(ctx, EXCP_RI);
break;
}
@@ -24782,7 +24782,7 @@ static void decode_mmi2(CPUMIPSState *env, DisasContext
*ctx)
generate_exception_end(ctx, EXCP_RI); /* TODO: MMI_OPC_CLASS_MMI2 */
break;
default:
-MIPS_INVAL("TX79 MMI class MMI2");
+MIPS_INVAL("MMI class MMI2");
generate_exception_end(ctx, EXCP_RI);
break;
}
@@ -24809,7 +24809,7 @@ static void decode_mmi3(CPUMIPSState *env, DisasContext
*ctx)
generate_exception_end(ctx, EXCP_RI); /* TODO: MMI_OPC_CLASS_MMI3 */
break;
default:
-MIPS_INVAL("TX79 MMI class MMI3");
+MIPS_INVAL("MMI class MMI3");
generate_exception_end(ctx, EXCP_RI);
break;
}
@@ -24867,7 +24867,7 @@ static void decode_mmi(CPUMIPSState *env, DisasContext
*ctx)
generate_exception_end(ctx, EXCP_RI);/* TODO: MMI_CLASS_MMI */
break;
default:
-MIPS_INVAL("TX79 MMI class");
+MIPS_INVAL("MMI class");
generate_exception_end(ctx, EXCP_RI);
break;
}
diff --git a/target/mips/translate_init.inc.c b/target/mips/translate_init.inc.c
index 85da4a2..cab2003 100644
--- a/target/mips/translate_init.inc.c
+++ b/target/mips/translate_init.inc.c
@@ -411,18 +411,6 @@ const mips_def_t mips_defs[] =
.mmu_type = MMU_TYPE_R4000,
},
{
-/*
- * The Toshiba TX System RISC TX79 Core Architecture manual
- *
- * https://wiki.qemu.org/File:C790.pdf
- *
- * describes the C790 processor that is a follow-up to the R5900.
- * There are a few notable differences in that the R5900 FPU
- *
- * - is not IEEE 754-1985 compliant,
- * - does not implement double format, and
- * - its machine code is nonstandard.
- */
.name = "R5900",
.CP0_PRid = 0x2E00,
/* No L2 cache, icache size 32k, dcache size 32k, uncached coherency.
*/
--
2.7.4
[Qemu-devel] [PULL v2 20/20] milkymist-minimac2: Use qemu_log_mask(GUEST_ERROR) instead of error_report
From: Philippe Mathieu-Daudé
qemu_log_mask(GUEST_ERROR) is more appropriate:
$ qemu -d help
Log items (comma separated):
guest_errorslog when the guest OS does something invalid (eg accessing a
non-existent register)
Signed-off-by: Philippe Mathieu-Daudé
Acked-by: Michael Walle
Message-Id: <20181029130034.26750-1-f4...@amsat.org>
Signed-off-by: Laurent Vivier
---
hw/net/milkymist-minimac2.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/hw/net/milkymist-minimac2.c b/hw/net/milkymist-minimac2.c
index 3eaa19dfde..664ac34f25 100644
--- a/hw/net/milkymist-minimac2.c
+++ b/hw/net/milkymist-minimac2.c
@@ -30,6 +30,7 @@
#include "hw/sysbus.h"
#include "trace.h"
#include "net/net.h"
+#include "qemu/log.h"
#include "qemu/error-report.h"
#include
@@ -214,7 +215,8 @@ static size_t assemble_frame(uint8_t *buf, size_t size,
uint32_t crc;
if (size < payload_size + 12) {
-error_report("milkymist_minimac2: received too big ethernet frame");
+qemu_log_mask(LOG_GUEST_ERROR, "milkymist_minimac2: frame too big "
+ "(%zd bytes)\n", payload_size);
return 0;
}
@@ -347,8 +349,9 @@ minimac2_read(void *opaque, hwaddr addr, unsigned size)
break;
default:
-error_report("milkymist_minimac2: read access to unknown register 0x"
-TARGET_FMT_plx, addr << 2);
+qemu_log_mask(LOG_GUEST_ERROR,
+ "milkymist_minimac2_rd%d: 0x%" HWADDR_PRIx "\n",
+ size, addr << 2);
break;
}
@@ -413,8 +416,10 @@ minimac2_write(void *opaque, hwaddr addr, uint64_t value,
break;
default:
-error_report("milkymist_minimac2: write access to unknown register 0x"
-TARGET_FMT_plx, addr << 2);
+qemu_log_mask(LOG_GUEST_ERROR,
+ "milkymist_minimac2_wr%d: 0x%" HWADDR_PRIx
+ " = 0x%" PRIx64 "\n",
+ size, addr << 2, value);
break;
}
}
--
2.17.2
[Qemu-devel] [PATCH v2 0/2] hw/arm/exynos4: Add DMA support for SMDKC210 board
Hi, this series is another intent to salvage previous work from Guenter Roeck: https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg06302.html Since v1: https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg06335.html - Do not factor out pl330_init, which resulted in buggy v1, see: https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg06448.html Regards, Phil. Guenter Roeck (1): arm: exynos4: Add dma support for smdkc210 Philippe Mathieu-Daudé (1): hw/arm/xilinx_zynq: Use the ARRAY_SIZE macro hw/arm/exynos4_boards.c | 24 hw/arm/xilinx_zynq.c| 2 +- 2 files changed, 25 insertions(+), 1 deletion(-) -- 2.17.2
[Qemu-devel] [PATCH v2 0/5] target/mips: Renaming and limiting modes for R5900
From: Aleksandar Markovic Rename some code elements related to R5900, and limit supported modes to O32. v1->v2: - added limiting of supported modes - added more cosmetic changes Aleksandar Markovic (5): target/mips: Rename MMI-related masks target/mips: Rename MMI-related opcodes target/mips: Rename MMI-related functions target/mips: Misc R5900-related cosmetic changes target/mips: Enable only tested modes for R5900 target/mips/translate.c | 532 +++ target/mips/translate_init.inc.c | 16 +- 2 files changed, 270 insertions(+), 278 deletions(-) -- 2.7.4
[Qemu-devel] [PATCH v2 2/2] arm: exynos4: Add dma support for smdkc210
From: Guenter Roeck
QEMU already supports pl330. Instantiate it for smdkc210.
Signed-off-by: Guenter Roeck
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
[PMD: Do not set default qdev properties]
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/exynos4_boards.c | 24
1 file changed, 24 insertions(+)
diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c
index 750162cc95..5696b37bf2 100644
--- a/hw/arm/exynos4_boards.c
+++ b/hw/arm/exynos4_boards.c
@@ -49,6 +49,9 @@
#endif
#define SMDK_LAN9118_BASE_ADDR 0x0500
+#define SMDK_PL330_BASE0_ADDR 0x1268
+#define SMDK_PL330_BASE1_ADDR 0x1269
+#define SMDK_PL330_BASE2_ADDR 0x1285
typedef enum Exynos4BoardType {
EXYNOS4_BOARD_NURI,
@@ -102,6 +105,19 @@ static void lan9215_init(uint32_t base, qemu_irq irq)
}
}
+static void pl330_init(uint32_t base, qemu_irq irq, int nreq)
+{
+SysBusDevice *busdev;
+DeviceState *dev;
+
+dev = qdev_create(NULL, "pl330");
+qdev_prop_set_uint8(dev, "num_periph_req", nreq);
+qdev_init_nofail(dev);
+busdev = SYS_BUS_DEVICE(dev);
+sysbus_mmio_map(busdev, 0, base);
+sysbus_connect_irq(busdev, 0, irq);
+}
+
static void exynos4_boards_init_ram(Exynos4BoardState *s,
MemoryRegion *system_mem,
unsigned long ram_size)
@@ -171,6 +187,14 @@ static void smdkc210_init(MachineState *machine)
lan9215_init(SMDK_LAN9118_BASE_ADDR,
qemu_irq_invert(s->soc->irq_table[exynos4210_get_irq(37, 1)]));
+
+pl330_init(SMDK_PL330_BASE0_ADDR,
+qemu_irq_invert(s->soc->irq_table[exynos4210_get_irq(35, 1)]), 32);
+pl330_init(SMDK_PL330_BASE1_ADDR,
+qemu_irq_invert(s->soc->irq_table[exynos4210_get_irq(36, 1)]), 32);
+pl330_init(SMDK_PL330_BASE2_ADDR,
+qemu_irq_invert(s->soc->irq_table[exynos4210_get_irq(34, 1)]), 1);
+
arm_load_kernel(ARM_CPU(first_cpu), &exynos4_board_binfo);
}
--
2.17.2
Re: [Qemu-devel] [PULL v1 0/5] Merge tpm 2018/10/29 v1
On 30 October 2018 at 11:14, Marc-André Lureau wrote: > Hi Peter > > On Tue, Oct 30, 2018 at 2:45 PM Peter Maydell > wrote: >> Hi; this gives some test failures (all hosts): >> >> TEST: tests/tpm-crb-swtpm-test... (pid=305) >> /i386/tpm/crb-swtpm/test:FAIL >> GTester: last random seed: R02Sf628ca48da88252a6b95465fef3b855f >> /i386/tpm/crb-swtpm-migration/test: FAIL >> GTester: last random seed: R02Sf628ca48da88252a6b95465fef3b855f >> FAIL: tests/tpm-crb-swtpm-test >> TEST: tests/tpm-crb-test... (pid=311) >> /i386/tpm-crb/test: OK >> PASS: tests/tpm-crb-test >> TEST: tests/tpm-tis-swtpm-test... (pid=324) >> /i386/tpm/tis-swtpm/test:FAIL >> GTester: last random seed: R02Sca4f303959770d4ca9f8f12b784dba0d >> /i386/tpm/tis-swtpm-migration/test: FAIL >> GTester: last random seed: R02Sca4f303959770d4ca9f8f12b784dba0d >> FAIL: tests/tpm-tis-swtpm-test >> TEST: tests/tpm-tis-test... (pid=331) >> /i386/tpm-tis/test_check_localities: OK >> /i386/tpm-tis/test_check_access_reg: OK >> /i386/tpm-tis/test_check_access_reg_seize: OK >> /i386/tpm-tis/test_check_access_reg_release: OK >> /i386/tpm-tis/test_check_transmit: OK >> PASS: tests/tpm-tis-test >> > > What version of swtpm & libtpms is installed? No idea, how do I tell? On my x86 Ubuntu machine which is one of those which failed there are no packages whose name includes either "swtpm" or "tpms". thanks -- PMM
[Qemu-devel] [PATCH v2 5/5] target/mips: Enable only tested modes for R5900
From: Aleksandar Markovic
Enable MIPS 032 user mode for R5900.
Signed-off-by: Aleksandar Markovic
---
target/mips/translate_init.inc.c | 4
1 file changed, 4 insertions(+)
diff --git a/target/mips/translate_init.inc.c b/target/mips/translate_init.inc.c
index cab2003..d84c58e 100644
--- a/target/mips/translate_init.inc.c
+++ b/target/mips/translate_init.inc.c
@@ -410,6 +410,8 @@ const mips_def_t mips_defs[] =
.insn_flags = CPU_MIPS32R5 | ASE_MSA,
.mmu_type = MMU_TYPE_R4000,
},
+#if defined(CONFIG_USER_ONLY)
+#if !defined(TARGET_MIPS64)
{
.name = "R5900",
.CP0_PRid = 0x2E00,
@@ -457,6 +459,8 @@ const mips_def_t mips_defs[] =
.insn_flags = CPU_R5900 | ASE_MMI,
.mmu_type = MMU_TYPE_R4000,
},
+#endif
+#endif
{
/* A generic CPU supporting MIPS32 Release 6 ISA.
FIXME: Support IEEE 754-2008 FP.
--
2.7.4
[Qemu-devel] [PATCH v2 3/5] target/mips: Rename MMI-related functions
From: Aleksandar Markovic
Rename MMI-related functions.
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 32
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 4b008d8..155331f 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -24681,7 +24681,7 @@ static void decode_opc_special3_legacy(CPUMIPSState
*env, DisasContext *ctx)
}
}
-static void decode_tx79_mmi0(CPUMIPSState *env, DisasContext *ctx)
+static void decode_mmi0(CPUMIPSState *env, DisasContext *ctx)
{
uint32_t opc = MASK_MMI0(ctx->opcode);
@@ -24720,7 +24720,7 @@ static void decode_tx79_mmi0(CPUMIPSState *env,
DisasContext *ctx)
}
}
-static void decode_tx79_mmi1(CPUMIPSState *env, DisasContext *ctx)
+static void decode_mmi1(CPUMIPSState *env, DisasContext *ctx)
{
uint32_t opc = MASK_MMI1(ctx->opcode);
@@ -24752,7 +24752,7 @@ static void decode_tx79_mmi1(CPUMIPSState *env,
DisasContext *ctx)
}
}
-static void decode_tx79_mmi2(CPUMIPSState *env, DisasContext *ctx)
+static void decode_mmi2(CPUMIPSState *env, DisasContext *ctx)
{
uint32_t opc = MASK_MMI2(ctx->opcode);
@@ -24788,7 +24788,7 @@ static void decode_tx79_mmi2(CPUMIPSState *env,
DisasContext *ctx)
}
}
-static void decode_tx79_mmi3(CPUMIPSState *env, DisasContext *ctx)
+static void decode_mmi3(CPUMIPSState *env, DisasContext *ctx)
{
uint32_t opc = MASK_MMI3(ctx->opcode);
@@ -24815,7 +24815,7 @@ static void decode_tx79_mmi3(CPUMIPSState *env,
DisasContext *ctx)
}
}
-static void decode_tx79_mmi(CPUMIPSState *env, DisasContext *ctx)
+static void decode_mmi(CPUMIPSState *env, DisasContext *ctx)
{
uint32_t opc = MASK_MMI(ctx->opcode);
int rs = extract32(ctx->opcode, 21, 5);
@@ -24824,16 +24824,16 @@ static void decode_tx79_mmi(CPUMIPSState *env,
DisasContext *ctx)
switch (opc) {
case MMI_OPC_CLASS_MMI0:
-decode_tx79_mmi0(env, ctx);
+decode_mmi0(env, ctx);
break;
case MMI_OPC_CLASS_MMI1:
-decode_tx79_mmi1(env, ctx);
+decode_mmi1(env, ctx);
break;
case MMI_OPC_CLASS_MMI2:
-decode_tx79_mmi2(env, ctx);
+decode_mmi2(env, ctx);
break;
case MMI_OPC_CLASS_MMI3:
-decode_tx79_mmi3(env, ctx);
+decode_mmi3(env, ctx);
break;
case MMI_OPC_MULT1:
case MMI_OPC_MULTU1:
@@ -24873,12 +24873,12 @@ static void decode_tx79_mmi(CPUMIPSState *env,
DisasContext *ctx)
}
}
-static void decode_tx79_lq(CPUMIPSState *env, DisasContext *ctx)
+static void decode_mmi_lq(CPUMIPSState *env, DisasContext *ctx)
{
generate_exception_end(ctx, EXCP_RI);/* TODO: MMI_LQ */
}
-static void gen_tx79_sq(DisasContext *ctx, int base, int rt, int offset)
+static void gen_mmi_sq(DisasContext *ctx, int base, int rt, int offset)
{
generate_exception_end(ctx, EXCP_RI);/* TODO: MMI_SQ */
}
@@ -24904,7 +24904,7 @@ static void gen_tx79_sq(DisasContext *ctx, int base,
int rt, int offset)
* In user mode, QEMU must verify the upper and lower 11 bits to distinguish
* between SQ and RDHWR, as the Linux kernel does.
*/
-static void decode_tx79_sq(CPUMIPSState *env, DisasContext *ctx)
+static void decode_mmi_sq(CPUMIPSState *env, DisasContext *ctx)
{
int base = extract32(ctx->opcode, 21, 5);
int rt = extract32(ctx->opcode, 16, 5);
@@ -24922,7 +24922,7 @@ static void decode_tx79_sq(CPUMIPSState *env,
DisasContext *ctx)
}
#endif
-gen_tx79_sq(ctx, base, rt, offset);
+gen_mmi_sq(ctx, base, rt, offset);
}
static void decode_opc_special3(CPUMIPSState *env, DisasContext *ctx)
@@ -26231,14 +26231,14 @@ static void decode_opc(CPUMIPSState *env,
DisasContext *ctx)
break;
case OPC_SPECIAL2:
if ((ctx->insn_flags & INSN_R5900) && (ctx->insn_flags & ASE_MMI)) {
-decode_tx79_mmi(env, ctx);
+decode_mmi(env, ctx);
} else {
decode_opc_special2_legacy(env, ctx);
}
break;
case OPC_SPECIAL3:
if (ctx->insn_flags & INSN_R5900) {
-decode_tx79_sq(env, ctx);/* MMI_SQ */
+decode_mmi_sq(env, ctx);/* MMI_SQ */
} else {
decode_opc_special3(env, ctx);
}
@@ -26902,7 +26902,7 @@ static void decode_opc(CPUMIPSState *env, DisasContext
*ctx)
break;
case OPC_MSA: /* OPC_MDMX */
if (ctx->insn_flags & INSN_R5900) {
-decode_tx79_lq(env, ctx);/* MMI_LQ */
+decode_mmi_lq(env, ctx);/* MMI_LQ */
} else {
/* MDMX: Not implemented. */
gen_msa(env, ctx);
--
2.7.4
[Qemu-devel] [PATCH v2 1/5] target/mips: Rename MMI-related masks
From: Aleksandar Markovic
Rename MMI-related masks.
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 51a5488..e38d50d 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -2159,7 +2159,7 @@ enum {
*7 111 | * | * | * | * | PSLLW | * | PSRLW | PSRAW
*/
-#define MASK_TX79_MMI(op) (MASK_OP_MAJOR(op) | ((op) & 0x3F))
+#define MASK_MMI(op) (MASK_OP_MAJOR(op) | ((op) & 0x3F))
enum {
TX79_MMI_MADD = 0x00 | TX79_CLASS_MMI, /* Same as OPC_MADD */
TX79_MMI_MADDU = 0x01 | TX79_CLASS_MMI, /* Same as OPC_MADDU */
@@ -2210,7 +2210,7 @@ enum {
*7 111 | * | * | PEXT5 | PPAC5
*/
-#define MASK_TX79_MMI0(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF))
+#define MASK_MMI0(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF))
enum {
TX79_MMI0_PADDW = (0x00 << 6) | TX79_MMI_CLASS_MMI0,
TX79_MMI0_PSUBW = (0x01 << 6) | TX79_MMI_CLASS_MMI0,
@@ -2261,7 +2261,7 @@ enum {
*7 111 | * | * | * | *
*/
-#define MASK_TX79_MMI1(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF))
+#define MASK_MMI1(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF))
enum {
TX79_MMI1_PABSW = (0x01 << 6) | TX79_MMI_CLASS_MMI1,
TX79_MMI1_PCEQW = (0x02 << 6) | TX79_MMI_CLASS_MMI1,
@@ -2305,7 +2305,7 @@ enum {
*7 111 | PMULTH| PDIVBW| PEXEW | PROT3W
*/
-#define MASK_TX79_MMI2(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF))
+#define MASK_MMI2(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF))
enum {
TX79_MMI2_PMADDW = (0x00 << 6) | TX79_MMI_CLASS_MMI2,
TX79_MMI2_PSLLVW = (0x02 << 6) | TX79_MMI_CLASS_MMI2,
@@ -2353,7 +2353,7 @@ enum {
*7 111 | * | * | PEXCW | *
*/
-#define MASK_TX79_MMI3(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF))
+#define MASK_MMI3(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF))
enum {
TX79_MMI3_PMADDUW = (0x00 << 6) | TX79_MMI_CLASS_MMI3,
TX79_MMI3_PSRAVW = (0x03 << 6) | TX79_MMI_CLASS_MMI3,
@@ -24683,7 +24683,7 @@ static void decode_opc_special3_legacy(CPUMIPSState
*env, DisasContext *ctx)
static void decode_tx79_mmi0(CPUMIPSState *env, DisasContext *ctx)
{
-uint32_t opc = MASK_TX79_MMI0(ctx->opcode);
+uint32_t opc = MASK_MMI0(ctx->opcode);
switch (opc) {
case TX79_MMI0_PADDW: /* TODO: TX79_MMI0_PADDW */
@@ -24722,7 +24722,7 @@ static void decode_tx79_mmi0(CPUMIPSState *env,
DisasContext *ctx)
static void decode_tx79_mmi1(CPUMIPSState *env, DisasContext *ctx)
{
-uint32_t opc = MASK_TX79_MMI1(ctx->opcode);
+uint32_t opc = MASK_MMI1(ctx->opcode);
switch (opc) {
case TX79_MMI1_PABSW: /* TODO: TX79_MMI1_PABSW */
@@ -24754,7 +24754,7 @@ static void decode_tx79_mmi1(CPUMIPSState *env,
DisasContext *ctx)
static void decode_tx79_mmi2(CPUMIPSState *env, DisasContext *ctx)
{
-uint32_t opc = MASK_TX79_MMI2(ctx->opcode);
+uint32_t opc = MASK_MMI2(ctx->opcode);
switch (opc) {
case TX79_MMI2_PMADDW:/* TODO: TX79_MMI2_PMADDW */
@@ -24790,7 +24790,7 @@ static void decode_tx79_mmi2(CPUMIPSState *env,
DisasContext *ctx)
static void decode_tx79_mmi3(CPUMIPSState *env, DisasContext *ctx)
{
-uint32_t opc = MASK_TX79_MMI3(ctx->opcode);
+uint32_t opc = MASK_MMI3(ctx->opcode);
switch (opc) {
case TX79_MMI3_PMADDUW:/* TODO: TX79_MMI3_PMADDUW */
@@ -24817,7 +24817,7 @@ static void decode_tx79_mmi3(CPUMIPSState *env,
DisasContext *ctx)
static void decode_tx79_mmi(CPUMIPSState *env, DisasContext *ctx)
{
-uint32_t opc = MASK_TX79_MMI(ctx->opcode);
+uint32_t opc = MASK_MMI(ctx->opcode);
int rs = extract32(ctx->opcode, 21, 5);
int rt = extract32(ctx->opcode, 16, 5);
int rd = extract32(ctx->opcode, 11, 5);
--
2.7.4
[Qemu-devel] [PATCH v2 2/5] target/mips: Rename MMI-related opcodes
From: Aleksandar Markovic
Rename MMI-related opcodes.
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 470
1 file changed, 235 insertions(+), 235 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index e38d50d..4b008d8 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -2099,7 +2099,7 @@ enum {
* The TX79-specific Multimedia Instruction encodings
* ==
*
- * TX79 Multimedia Instruction encoding table keys:
+ * MMI Instruction encoding table keys:
*
* * This code is reserved for future use. An attempt to execute it
* causes a Reserved Instruction exception.
@@ -2110,7 +2110,7 @@ enum {
* DMULTU, DDIV, DDIVU, LL, LLD, SC, SCD, LWC2 and SWC2. An attempt
* to execute it causes a Reserved Instruction exception.
*
- * TX79 Multimedia Instructions encoded by opcode field (MMI, LQ, SQ):
+ * MMI Instructions encoded by opcode field (MMI, LQ, SQ):
*
* 31260
* +++
@@ -2132,13 +2132,13 @@ enum {
*/
enum {
-TX79_CLASS_MMI = 0x1C << 26,/* Same as OPC_SPECIAL2 */
-TX79_LQ= 0x1E << 26,/* Same as OPC_MSA */
-TX79_SQ= 0x1F << 26,/* Same as OPC_SPECIAL3 */
+MMI_CLASS_MMI = 0x1C << 26,/* Same as OPC_SPECIAL2 */
+MMI_LQ= 0x1E << 26,/* Same as OPC_MSA */
+MMI_SQ= 0x1F << 26,/* Same as OPC_SPECIAL3 */
};
/*
- * TX79 Multimedia Instructions with opcode field = MMI:
+ * MMI Instructions with opcode field = MMI:
*
* 3126 5 0
* ++---++
@@ -2161,35 +2161,35 @@ enum {
#define MASK_MMI(op) (MASK_OP_MAJOR(op) | ((op) & 0x3F))
enum {
-TX79_MMI_MADD = 0x00 | TX79_CLASS_MMI, /* Same as OPC_MADD */
-TX79_MMI_MADDU = 0x01 | TX79_CLASS_MMI, /* Same as OPC_MADDU */
-TX79_MMI_PLZCW = 0x04 | TX79_CLASS_MMI,
-TX79_MMI_CLASS_MMI0 = 0x08 | TX79_CLASS_MMI,
-TX79_MMI_CLASS_MMI2 = 0x09 | TX79_CLASS_MMI,
-TX79_MMI_MFHI1 = 0x10 | TX79_CLASS_MMI, /* Same minor as OPC_MFHI */
-TX79_MMI_MTHI1 = 0x11 | TX79_CLASS_MMI, /* Same minor as OPC_MTHI */
-TX79_MMI_MFLO1 = 0x12 | TX79_CLASS_MMI, /* Same minor as OPC_MFLO */
-TX79_MMI_MTLO1 = 0x13 | TX79_CLASS_MMI, /* Same minor as OPC_MTLO */
-TX79_MMI_MULT1 = 0x18 | TX79_CLASS_MMI, /* Same minor as OPC_MULT */
-TX79_MMI_MULTU1 = 0x19 | TX79_CLASS_MMI, /* Same minor as OPC_MULTU */
-TX79_MMI_DIV1 = 0x1A | TX79_CLASS_MMI, /* Same minor as OPC_DIV */
-TX79_MMI_DIVU1 = 0x1B | TX79_CLASS_MMI, /* Same minor as OPC_DIVU */
-TX79_MMI_MADD1 = 0x20 | TX79_CLASS_MMI,
-TX79_MMI_MADDU1 = 0x21 | TX79_CLASS_MMI,
-TX79_MMI_CLASS_MMI1 = 0x28 | TX79_CLASS_MMI,
-TX79_MMI_CLASS_MMI3 = 0x29 | TX79_CLASS_MMI,
-TX79_MMI_PMFHL = 0x30 | TX79_CLASS_MMI,
-TX79_MMI_PMTHL = 0x31 | TX79_CLASS_MMI,
-TX79_MMI_PSLLH = 0x34 | TX79_CLASS_MMI,
-TX79_MMI_PSRLH = 0x36 | TX79_CLASS_MMI,
-TX79_MMI_PSRAH = 0x37 | TX79_CLASS_MMI,
-TX79_MMI_PSLLW = 0x3C | TX79_CLASS_MMI,
-TX79_MMI_PSRLW = 0x3E | TX79_CLASS_MMI,
-TX79_MMI_PSRAW = 0x3F | TX79_CLASS_MMI,
+MMI_OPC_MADD = 0x00 | MMI_CLASS_MMI, /* Same as OPC_MADD */
+MMI_OPC_MADDU = 0x01 | MMI_CLASS_MMI, /* Same as OPC_MADDU */
+MMI_OPC_PLZCW = 0x04 | MMI_CLASS_MMI,
+MMI_OPC_CLASS_MMI0 = 0x08 | MMI_CLASS_MMI,
+MMI_OPC_CLASS_MMI2 = 0x09 | MMI_CLASS_MMI,
+MMI_OPC_MFHI1 = 0x10 | MMI_CLASS_MMI, /* Same minor as OPC_MFHI */
+MMI_OPC_MTHI1 = 0x11 | MMI_CLASS_MMI, /* Same minor as OPC_MTHI */
+MMI_OPC_MFLO1 = 0x12 | MMI_CLASS_MMI, /* Same minor as OPC_MFLO */
+MMI_OPC_MTLO1 = 0x13 | MMI_CLASS_MMI, /* Same minor as OPC_MTLO */
+MMI_OPC_MULT1 = 0x18 | MMI_CLASS_MMI, /* Same minor as OPC_MULT */
+MMI_OPC_MULTU1 = 0x19 | MMI_CLASS_MMI, /* Same minor as OPC_MULTU */
+MMI_OPC_DIV1 = 0x1A | MMI_CLASS_MMI, /* Same minor as OPC_DIV */
+MMI_OPC_DIVU1 = 0x1B | MMI_CLASS_MMI, /* Same minor as OPC_DIVU */
+MMI_OPC_MADD1 = 0x20 | MMI_CLASS_MMI,
+MMI_OPC_MADDU1 = 0x21 | MMI_CLASS_MMI,
+MMI_OPC_CLASS_MMI1 = 0x28 | MMI_CLASS_MMI,
+MMI_OPC_CLASS_MMI3 = 0x29 | MMI_CLASS_MMI,
+MMI_OPC_PMFHL = 0x30 | MMI_CLASS_MMI,
+MMI_OPC_PMTHL = 0x31 | MMI_CLASS_MMI,
+MMI_OPC_PSLLH = 0x34 | MMI_CLASS_MMI,
+MMI_OPC_PSRLH = 0x36 | MMI_CLASS_MMI,
+MMI_OPC_PSRAH = 0x37 | MMI_CLASS_MMI,
+MMI_OPC_PSLLW = 0x3C | MMI_CLASS_MMI,
+MMI_OPC_PSRLW = 0x3E | MMI_CLASS_MMI,
+MMI_OPC_PSRAW = 0x3F | MMI_CLASS_MMI,
};
/*
- * TX79 Multimedia Instructions with opcode field
[Qemu-devel] [PATCH v2 1/2] hw/arm/xilinx_zynq: Use the ARRAY_SIZE macro
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Reviewed-by: Richard Henderson
---
hw/arm/xilinx_zynq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index f1496d2927..57497b0c4d 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -294,7 +294,7 @@ static void zynq_init(MachineState *machine)
busdev = SYS_BUS_DEVICE(dev);
sysbus_mmio_map(busdev, 0, 0xF8003000);
sysbus_connect_irq(busdev, 0, pic[45-IRQ_OFFSET]); /* abort irq line */
-for (n = 0; n < 8; ++n) { /* event irqs */
+for (n = 0; n < ARRAY_SIZE(dma_irqs); ++n) { /* event irqs */
sysbus_connect_irq(busdev, n + 1, pic[dma_irqs[n] - IRQ_OFFSET]);
}
--
2.17.2
Re: [Qemu-devel] [PULL 00/27] MIPS queue for October 2018, part 4
On 29 October 2018 at 15:19, Aleksandar Markovic wrote: > From: Aleksandar Markovic > > The following changes since commit 03f400883a1dd92fac5b0d9127b38e34c9a722d7: > > target/mips: Add MXU decoding engine (2018-10-29 14:13:47 +0100) > > are available in the git repository at: > > https://github.com/AMarkovic/qemu tags/mips-queue-october-2018-part-4 > > for you to fetch changes up to 64ea3d676d9447ecdb987deab5a1542ea088bd31: > > linux-user: Add prctl() PR_SET_FP_MODE and PR_GET_FP_MODE implementations > (2018-10-29 15:50:31 +0100) > > > MIPS queue for October 2018, part 4 > > - fix for two missing break statements > - series on Ingenic's MXU ASE support > - series on MIPS-specific prctl() > Applied, thanks. -- PMM
Re: [Qemu-devel] [PATCH v5 00/11] hw/m68k: add Apple Machintosh Quadra 800 machine
On 30/10/2018 08:15, Richard Henderson wrote: > On 10/29/18 1:39 PM, Mark Cave-Ayland wrote: >> You can install your own disk using debian-installer, with: >> >> ... >> -M q800 \ >> -serial none -serial mon:stdio \ >> -m 1000M -drive file=m68k.qcow2,format=qcow2 \ >> -net nic,model=dp83932,addr=09:00:07:12:34:57 \ >> -append "console=ttyS0 vga=off" \ >> -kernel vmlinux-4.15.0-2-m68k \ >> -initrd initrd.gz \ >> -drive file=debian-9.0-m68k-NETINST-1.iso \ >> -drive file=m68k.qcow2,format=qcow2 \ >> -nographic > > I tried this and got > > Trace 0: 0x7f2e886c7140 [/d404/0xe000] > INT 1: Unassigned(0xf4) pc=d404 sp=00393e60 sr=2700 > INT 2: Access Fault(0x8) pc= sp=00393e58 sr=2700 > ssw: 0506 ea: sfc: 5dfc: 5 > > which lead straight to buserr and panic. This happens way early in boot -- > only 1926 TranslationBlocks generated. > > Is there some device missing from the command-line that the kernel is > expecting? Heh that's annoying. The original branch I forked that Laurent was working on had some extra patches at the start of the series: some were required for q800 whilst others were for new development. I thought that all of the patches required for q800 had been applied over the past few months, but sadly that isn't the case :( I've pushed an updated branch to https://github.com/mcayland/qemu/tree/q800-test which contains the patchset plus two extra patches that are still needed to boot to the debian installer here: 9281a5371f "tmp" 629754d847 "target/m68k: manage FPU exceptions" Laurent, are these patches ready for upstream or do they need work in which case we should leave q800 until the 3.2 cycle? ATB, Mark.
[Qemu-devel] [PATCH v3] strongarm: mask off high[31:28] bits from dir and state registers
From: Prasad J Pandit
The high[31:28] bits of 'direction' and 'state' registers of
SA-1100/SA-1110 device are reserved. Setting them may lead to
OOB 's->handler[]' array access issue. Mask off [31:28] bits to
avoid it.
Reported-by: Moguofang
Signed-off-by: Prasad J Pandit
---
hw/arm/strongarm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
Update v3: fix the mask value to 0x0fff
-> https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg06088.html
diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c
index ec2627374d..644a9c45b4 100644
--- a/hw/arm/strongarm.c
+++ b/hw/arm/strongarm.c
@@ -587,12 +587,12 @@ static void strongarm_gpio_write(void *opaque, hwaddr
offset,
switch (offset) {
case GPDR:/* GPIO Pin-Direction registers */
-s->dir = value;
+s->dir = value & 0x0fff;
strongarm_gpio_handler_update(s);
break;
case GPSR:/* GPIO Pin-Output Set registers */
-s->olevel |= value;
+s->olevel |= value & 0x0fff;
strongarm_gpio_handler_update(s);
break;
--
2.17.2
Re: [Qemu-devel] [PATCH v5 05/11] hw/m68k: Apple Sound Chip (ASC) emulation
Le 30/10/2018 à 11:46, Mark Cave-Ayland a écrit : > On 30/10/2018 06:46, Hervé Poussineau wrote: > >> Le 29/10/2018 à 14:39, Mark Cave-Ayland a écrit : >>> From: Laurent Vivier >>> >>> This is broken as the linux driver seems broken too... >>> >>> Co-developed-by: Mark Cave-Ayland >>> Signed-off-by: Mark Cave-Ayland >>> Signed-off-by: Laurent Vivier >>> --- >>> hw/audio/Makefile.objs | 1 + >>> hw/audio/asc.c | 446 >>> + >>> include/hw/audio/asc.h | 48 ++ >>> 3 files changed, 495 insertions(+) >>> create mode 100644 hw/audio/asc.c >>> create mode 100644 include/hw/audio/asc.h >> >> According to above comment, this device is broken. >> Is it necessary for Q800 emulation? What happens if you remove it? > > A quick test here shows that I can still boot without it, so it doesn't seem > to be > essential. Laurent, should we remove this from the next revision of the > patchset? The > general consensus seems to be that if a device isn't required (for now) then > it > shouldn't be included. It can be removed. I've just checked the kernel and in the case of the Quadra 800 the ASC is not supported at all. Thanks, Laurent
Re: [Qemu-devel] [PATCH v2] strongarm: mask off high[32:28] bits from dir and state registers
+-- On Mon, 29 Oct 2018, Peter Maydell wrote --+
| > switch (offset) {
| > case GPDR:/* GPIO Pin-Direction registers */
| > -s->dir = value;
| > +s->dir = value & 0x3f;
|
| The commit message says it's masking [31:28], but the
| code is masking [31:22]. The SA1110 spec suggests the
| commit message is correct and the code is not.
Ouch, sorry! Sent revised patch v3.
Thank you.
--
Prasad J Pandit / Red Hat Product Security Team
47AF CE69 3A90 54AA 9045 1053 DD13 3D32 FE5B 041F
Re: [Qemu-devel] [PATCH 5/9] qom/globals: generalize object_property_set_globals()
Hi
On Mon, Oct 29, 2018 at 5:11 PM Igor Mammedov wrote:
>
> On Wed, 12 Sep 2018 16:55:27 +0400
> Marc-André Lureau wrote:
>
> > Handle calls of object_property_set_globals() with any object type,
> > but only apply globals to TYPE_DEVICE & TYPE_USER_CREATABLE.
> >
> > Signed-off-by: Marc-André Lureau
> > ---
> > qom/globals.c | 22 ++
> > 1 file changed, 14 insertions(+), 8 deletions(-)
> >
> > diff --git a/qom/globals.c b/qom/globals.c
> > index 587f4a1b5c..8664baebe0 100644
> > --- a/qom/globals.c
> > +++ b/qom/globals.c
> > @@ -15,22 +15,28 @@ void object_property_register_global(GlobalProperty
> > *prop)
> >
> > void object_property_set_globals(Object *obj)
> > {
> > -DeviceState *dev = DEVICE(obj);
> > GList *l;
> > +DeviceState *dev = (DeviceState *)object_dynamic_cast(obj,
> > TYPE_DEVICE);
> > +
> > +if (!dev && !IS_USER_CREATABLE(obj)) {
> > +/* only TYPE_DEVICE and TYPE_USER_CREATABLE support globals */
> > +return;
> > +}
> more dynamic casts but now imposed on every create object :(
>
> Maybe we should add ObjectClass::check/set_globals hook?
> It would be cheap to check and only objects we intend to work with
> it would be affected. On top of that hooks could be different so
> that device/user_creatable specifics won't be in generic code
> (like it's implemented here).
I don't think adding a few casts during object creation will impact
negatively in a measurable way.
However I'll add an additional patch to the series to implement what I
think you suggested.
thanks
>
> >
> > for (l = global_props; l; l = l->next) {
> > GlobalProperty *prop = l->data;
> > Error *err = NULL;
> >
> > -if (object_dynamic_cast(OBJECT(dev), prop->driver) == NULL) {
> > +if (object_dynamic_cast(obj, prop->driver) == NULL) {
> > continue;
> > }
> > prop->used = true;
> > -object_property_parse(OBJECT(dev), prop->value, prop->property,
> > &err);
> > +object_property_parse(obj, prop->value, prop->property, &err);
> > if (err != NULL) {
> > error_prepend(&err, "can't apply global %s.%s=%s: ",
> >prop->driver, prop->property, prop->value);
> > -if (!dev->hotplugged && prop->errp) {
> > +
> > +if (dev && !dev->hotplugged && prop->errp) {
> > error_propagate(prop->errp, err);
> > } else {
> > assert(prop->user_provided);
> > @@ -56,15 +62,15 @@ int object_property_check_globals(void)
> > continue;
> > }
> > oc = object_class_by_name(prop->driver);
> > -oc = object_class_dynamic_cast(oc, TYPE_DEVICE);
> > -if (!oc) {
> > +dc = (DeviceClass *)object_class_dynamic_cast(oc, TYPE_DEVICE);
> > +if (!IS_USER_CREATABLE_CLASS(oc) && !dc) {
> > warn_report("global %s.%s has invalid class name",
> > prop->driver, prop->property);
> > ret = 1;
> > continue;
> > }
> > -dc = DEVICE_CLASS(oc);
> > -if (!dc->hotpluggable && !prop->used) {
> > +
> > +if (dc && !dc->hotpluggable) {
> > warn_report("global %s.%s=%s not used",
> > prop->driver, prop->property, prop->value);
> > ret = 1;
>
[Qemu-devel] [PATCH] This patch fixes processing of rfi instructions in icount mode.
From: Maria Klimushenkova
In this mode writing to interrupt/peripheral state is controlled
by can_do_io flag. This flag must be set explicitly before helper
function invocation.
Signed-off-by: Maria Klimushenkova
Signed-off-by: Pavel Dovgalyuk
---
target/ppc/translate.c | 12
1 file changed, 12 insertions(+)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 987ce6e..980862c 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -3878,9 +3878,15 @@ static void gen_rfi(DisasContext *ctx)
}
/* Restore CPU state */
CHK_SV;
+if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
+gen_io_start();
+}
gen_update_cfar(ctx, ctx->base.pc_next - 4);
gen_helper_rfi(cpu_env);
gen_sync_exception(ctx);
+if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
+gen_io_end();
+}
#endif
}
@@ -3892,9 +3898,15 @@ static void gen_rfid(DisasContext *ctx)
#else
/* Restore CPU state */
CHK_SV;
+if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
+gen_io_start();
+}
gen_update_cfar(ctx, ctx->base.pc_next - 4);
gen_helper_rfid(cpu_env);
gen_sync_exception(ctx);
+if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
+gen_io_end();
+}
#endif
}
Re: [Qemu-devel] [PATCH 0/4] tcg: fix dirty bitmap race with MTTCG
Paolo Bonzini writes: > This is a race that can happen when migrating TCG guests under load. > It was introduced by the change to run vCPUs outside the big QEMU > lock. Did this ever get re-spun? -- Alex Bennée
Re: [Qemu-devel] [RFC v4 05/71] cpu: move run_on_cpu to cpus-common
Paolo Bonzini writes:
> On 29/10/2018 22:39, Emilio G. Cota wrote:
>> I'm not convinced about adding an "assert(!user-mode)" to run_on_cpu.
>> Given that now it does not depend on the BQL, it could actually
>> work in user-mode if called. If we really wanted to make sure
>> that no user-mode would call it, then a compile-time check
>> would be better than an assert. But again, I fail to see what
>> we'd gain from that.
>>
>> For context, do_run_on_cpu et al. were moved to cpus-common.c by
>> d148d90ee8 ("cpus-common: move CPU work item management to
>> common code", 2016-09-27). The point was to consolidate the
>> run-on-cpu code in a common (softmmu & user-mode) file, since
>> user-mode needed async_run_on_cpu for exclusive work.
>>
>> Now we can finally make run_on_cpu generic as well.
>
> I agree, the run_on_cpu stuff should not be system-specific at all.
I'm happy to for it to be generic - just not broken ;-)
I'm not sure what sort of use cases it has at the moment given we use
start/end_exclusive for both atomics and system call marshalling in
linux-user. However have a common toolbox across system and linux-user
is a good thing.
>
> Paolo
--
Alex Bennée
Re: [Qemu-devel] qemu3.0.0: Linux on non x86 CPUs run Wine
Thanks for your reply. At 2018-10-30 16:33:15, "Peter Maydell" wrote: >On 30 October 2018 at 02:16, wj193102 wrote: >> Hi, everyone. >> When I have installed the QEMU3.0.0 in the Linux on non X86 CPUS, I want >> to use user space emulator to run Wine. I can get the source code for Wine >> and the RPM file for Wine from the WineHQ web page. >> I used to compile Wine in the X86-based Linux system and used it to run most >> Win32 programs. Now I want to use it on the non X86 CPUS by QEMU. But I >> can't get the function to install and use the Wine. Please give me some >> advice >> or some functions to finish it. Thanks a lot. > >I'm afraid you will need to provide more detail for us to >help here. What exactly are you doing? Which commands are you >running? What is the exact error message or failure you see? I have installed the Wine in Linux(fedora) on the X86 CPUs from the source code. Can I copy the related file of Wine from the Linux on X86 CPUs to the Linux on the non X86 CPUS for running the command "wine" or "winecfg". >>Meanwhile, I use the command "qemu-i386/qemu-x86_64 *.sh" to >> run the application from the X86 CPUS on non X86 CPUS, I get the >> error information:"Invalid ELF image for this architecture". Why >> the error is comming? What can I do to resolve this problem? > >This is probably because you are trying to run a shell script. >(I'm guessing this from the '.sh' extension). This won't work. >QEMU only runs actual executables (ELF files). That is my fault. I don't run the *.sh file. I copy the file "/bin/ls" from the Linux on x86 CPUs to the Linux on non X86 CPUs. I put the file in the new created directory, such as "/home/admin/user/test/". Then I run the executable file,using "qemu-i386 ./ls", I get the following error: "./ls: error while loading shared libraries: libselinux.so.1: cannot open shared object file: No such file or directory." How can I resolve this problem? >Usually the setup is that the host Linux system is set up >with binfmt-misc, so that if it encounters a guest-architecture >binary it will automatically run it under QEMU. Usually >this is done to allow running guest binaries inside a chroot. > >thanks >-- PMM Thanks a lot. --WangJi
Re: [Qemu-devel] [RFC v4 04/71] cpu: make qemu_work_cond per-cpu
Emilio G. Cota writes:
> This eliminates the need to use the BQL to queue CPU work.
>
> While at it, give the per-cpu field a generic name ("cond") since
> it will soon be used for more than just queueing CPU work.
>
> Signed-off-by: Emilio G. Cota
Reviewed-by: Alex Bennée
> ---
> include/qom/cpu.h | 6 ++--
> cpus-common.c | 72 ++-
> cpus.c| 2 +-
> qom/cpu.c | 1 +
> 4 files changed, 63 insertions(+), 18 deletions(-)
>
> diff --git a/include/qom/cpu.h b/include/qom/cpu.h
> index 7fdb5a2be0..2fad537a4f 100644
> --- a/include/qom/cpu.h
> +++ b/include/qom/cpu.h
> @@ -316,6 +316,7 @@ struct qemu_work_item;
> * @mem_io_vaddr: Target virtual address at which the memory was accessed.
> * @kvm_fd: vCPU file descriptor for KVM.
> * @lock: Lock to prevent multiple access to per-CPU fields.
> + * @cond: Condition variable for per-CPU events.
> * @work_list: List of pending asynchronous work.
> * @trace_dstate_delayed: Delayed changes to trace_dstate (includes all
> changes
> *to @trace_dstate).
> @@ -358,6 +359,7 @@ struct CPUState {
>
> QemuMutex lock;
> /* fields below protected by @lock */
> +QemuCond cond;
> QSIMPLEQ_HEAD(, qemu_work_item) work_list;
>
> CPUAddressSpace *cpu_ases;
> @@ -769,12 +771,10 @@ bool cpu_is_stopped(CPUState *cpu);
> * @cpu: The vCPU to run on.
> * @func: The function to be executed.
> * @data: Data to pass to the function.
> - * @mutex: Mutex to release while waiting for @func to run.
> *
> * Used internally in the implementation of run_on_cpu.
> */
> -void do_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data,
> - QemuMutex *mutex);
> +void do_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data
> data);
>
> /**
> * run_on_cpu:
> diff --git a/cpus-common.c b/cpus-common.c
> index 2913294cb7..71469c85ce 100644
> --- a/cpus-common.c
> +++ b/cpus-common.c
> @@ -26,7 +26,6 @@
> static QemuMutex qemu_cpu_list_lock;
> static QemuCond exclusive_cond;
> static QemuCond exclusive_resume;
> -static QemuCond qemu_work_cond;
>
> /* >= 1 if a thread is inside start_exclusive/end_exclusive. Written
> * under qemu_cpu_list_lock, read with atomic operations.
> @@ -42,7 +41,6 @@ void qemu_init_cpu_list(void)
> qemu_mutex_init(&qemu_cpu_list_lock);
> qemu_cond_init(&exclusive_cond);
> qemu_cond_init(&exclusive_resume);
> -qemu_cond_init(&qemu_work_cond);
> }
>
> void cpu_list_lock(void)
> @@ -113,23 +111,37 @@ struct qemu_work_item {
> bool free, exclusive, done;
> };
>
> -static void queue_work_on_cpu(CPUState *cpu, struct qemu_work_item *wi)
> +/* Called with the CPU's lock held */
> +static void queue_work_on_cpu_locked(CPUState *cpu, struct qemu_work_item
> *wi)
> {
> -qemu_mutex_lock(&cpu->lock);
> QSIMPLEQ_INSERT_TAIL(&cpu->work_list, wi, node);
> wi->done = false;
> -qemu_mutex_unlock(&cpu->lock);
>
> qemu_cpu_kick(cpu);
> }
>
> -void do_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data,
> - QemuMutex *mutex)
> +static void queue_work_on_cpu(CPUState *cpu, struct qemu_work_item *wi)
> +{
> +cpu_mutex_lock(cpu);
> +queue_work_on_cpu_locked(cpu, wi);
> +cpu_mutex_unlock(cpu);
> +}
> +
> +void do_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data)
> {
> struct qemu_work_item wi;
> +bool has_bql = qemu_mutex_iothread_locked();
> +
> +g_assert(no_cpu_mutex_locked());
>
> if (qemu_cpu_is_self(cpu)) {
> -func(cpu, data);
> +if (has_bql) {
> +func(cpu, data);
> +} else {
> +qemu_mutex_lock_iothread();
> +func(cpu, data);
> +qemu_mutex_unlock_iothread();
> +}
> return;
> }
>
> @@ -139,13 +151,34 @@ void do_run_on_cpu(CPUState *cpu, run_on_cpu_func func,
> run_on_cpu_data data,
> wi.free = false;
> wi.exclusive = false;
>
> -queue_work_on_cpu(cpu, &wi);
> +cpu_mutex_lock(cpu);
> +queue_work_on_cpu_locked(cpu, &wi);
> +
> +/*
> + * We are going to sleep on the CPU lock, so release the BQL.
> + *
> + * During the transition to per-CPU locks, we release the BQL _after_
> + * having kicked the destination CPU (from queue_work_on_cpu_locked
> above).
> + * This makes sure that the enqueued work will be seen by the CPU
> + * after being woken up from the kick, since the CPU sleeps on the BQL.
> + * Once we complete the transition to per-CPU locks, we will release
> + * the BQL earlier in this function.
> + */
> +if (has_bql) {
> +qemu_mutex_unlock_iothread();
> +}
> +
> while (!atomic_mb_read(&wi.done)) {
> CPUState *self_cpu = current_cpu;
>
> -qemu_cond_wait(&qemu_work_cond, mutex);
> +qemu_cond_wait(&cpu->cond, &cpu->lock);
> current_cpu = self_cpu;
>
Re: [Qemu-devel] [PATCH v2 1/5] target/mips: Rename MMI-related masks
On 30.10.18. 12:36, Aleksandar Markovic wrote:
> From: Aleksandar Markovic
>
> Rename MMI-related masks.
>
> Signed-off-by: Aleksandar Markovic
> ---
> target/mips/translate.c | 20 ++--
> 1 file changed, 10 insertions(+), 10 deletions(-)
Reviewed-by: Stefan Markovic
> diff --git a/target/mips/translate.c b/target/mips/translate.c
> index 51a5488..e38d50d 100644
> --- a/target/mips/translate.c
> +++ b/target/mips/translate.c
> @@ -2159,7 +2159,7 @@ enum {
>*7 111 | * | * | * | * | PSLLW | * | PSRLW | PSRAW
>*/
>
> -#define MASK_TX79_MMI(op) (MASK_OP_MAJOR(op) | ((op) & 0x3F))
> +#define MASK_MMI(op) (MASK_OP_MAJOR(op) | ((op) & 0x3F))
> enum {
> TX79_MMI_MADD = 0x00 | TX79_CLASS_MMI, /* Same as OPC_MADD */
> TX79_MMI_MADDU = 0x01 | TX79_CLASS_MMI, /* Same as OPC_MADDU */
> @@ -2210,7 +2210,7 @@ enum {
>*7 111 | * | * | PEXT5 | PPAC5
>*/
>
> -#define MASK_TX79_MMI0(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF))
> +#define MASK_MMI0(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF))
> enum {
> TX79_MMI0_PADDW = (0x00 << 6) | TX79_MMI_CLASS_MMI0,
> TX79_MMI0_PSUBW = (0x01 << 6) | TX79_MMI_CLASS_MMI0,
> @@ -2261,7 +2261,7 @@ enum {
>*7 111 | * | * | * | *
>*/
>
> -#define MASK_TX79_MMI1(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF))
> +#define MASK_MMI1(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF))
> enum {
> TX79_MMI1_PABSW = (0x01 << 6) | TX79_MMI_CLASS_MMI1,
> TX79_MMI1_PCEQW = (0x02 << 6) | TX79_MMI_CLASS_MMI1,
> @@ -2305,7 +2305,7 @@ enum {
>*7 111 | PMULTH| PDIVBW| PEXEW | PROT3W
>*/
>
> -#define MASK_TX79_MMI2(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF))
> +#define MASK_MMI2(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF))
> enum {
> TX79_MMI2_PMADDW = (0x00 << 6) | TX79_MMI_CLASS_MMI2,
> TX79_MMI2_PSLLVW = (0x02 << 6) | TX79_MMI_CLASS_MMI2,
> @@ -2353,7 +2353,7 @@ enum {
>*7 111 | * | * | PEXCW | *
>*/
>
> -#define MASK_TX79_MMI3(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF))
> +#define MASK_MMI3(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF))
> enum {
> TX79_MMI3_PMADDUW = (0x00 << 6) | TX79_MMI_CLASS_MMI3,
> TX79_MMI3_PSRAVW = (0x03 << 6) | TX79_MMI_CLASS_MMI3,
> @@ -24683,7 +24683,7 @@ static void decode_opc_special3_legacy(CPUMIPSState
> *env, DisasContext *ctx)
>
> static void decode_tx79_mmi0(CPUMIPSState *env, DisasContext *ctx)
> {
> -uint32_t opc = MASK_TX79_MMI0(ctx->opcode);
> +uint32_t opc = MASK_MMI0(ctx->opcode);
>
> switch (opc) {
> case TX79_MMI0_PADDW: /* TODO: TX79_MMI0_PADDW */
> @@ -24722,7 +24722,7 @@ static void decode_tx79_mmi0(CPUMIPSState *env,
> DisasContext *ctx)
>
> static void decode_tx79_mmi1(CPUMIPSState *env, DisasContext *ctx)
> {
> -uint32_t opc = MASK_TX79_MMI1(ctx->opcode);
> +uint32_t opc = MASK_MMI1(ctx->opcode);
>
> switch (opc) {
> case TX79_MMI1_PABSW: /* TODO: TX79_MMI1_PABSW */
> @@ -24754,7 +24754,7 @@ static void decode_tx79_mmi1(CPUMIPSState *env,
> DisasContext *ctx)
>
> static void decode_tx79_mmi2(CPUMIPSState *env, DisasContext *ctx)
> {
> -uint32_t opc = MASK_TX79_MMI2(ctx->opcode);
> +uint32_t opc = MASK_MMI2(ctx->opcode);
>
> switch (opc) {
> case TX79_MMI2_PMADDW:/* TODO: TX79_MMI2_PMADDW */
> @@ -24790,7 +24790,7 @@ static void decode_tx79_mmi2(CPUMIPSState *env,
> DisasContext *ctx)
>
> static void decode_tx79_mmi3(CPUMIPSState *env, DisasContext *ctx)
> {
> -uint32_t opc = MASK_TX79_MMI3(ctx->opcode);
> +uint32_t opc = MASK_MMI3(ctx->opcode);
>
> switch (opc) {
> case TX79_MMI3_PMADDUW:/* TODO: TX79_MMI3_PMADDUW */
> @@ -24817,7 +24817,7 @@ static void decode_tx79_mmi3(CPUMIPSState *env,
> DisasContext *ctx)
>
> static void decode_tx79_mmi(CPUMIPSState *env, DisasContext *ctx)
> {
> -uint32_t opc = MASK_TX79_MMI(ctx->opcode);
> +uint32_t opc = MASK_MMI(ctx->opcode);
> int rs = extract32(ctx->opcode, 21, 5);
> int rt = extract32(ctx->opcode, 16, 5);
> int rd = extract32(ctx->opcode, 11, 5);
[Qemu-devel] Question: Perfecting checkpatch.pl
Perhaps checkpatch.pl should make sure the commit messages do not contain "address@hidden" and "Reviewed-off-by"? $ git log | grep address@hidden Signed-off-by: Michael S. Tsirkin Signed-off-by: Ronald Hecht Signed-off-by: Justin Chevrier Signed-off-by: Justin Chevrier Signed-off-by: Justin Chevrier $ git log | grep Reviewed-off-by Reviewed-off-by: Pavel Dovgalyuk Reviewed-off-by: Anthony Liguori Aleksandar
[Qemu-devel] [PATCH v3 1/3] Deprecate QMP `cpu-add`
The intended functionality of QMP `cpu-add` is replaced with
`device_add` (and `query-hotpluggable-cpus`). So let's deprecate
`cpu-add`.
A complete example of vCPU hotplug with the recommended way (using
`device_add`) is provided as part of a seperate docs patch.
Suggested-by: Eduardo Habkost
---
---
qapi/misc.json | 8 +++-
qemu-deprecated.texi | 5 +
2 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/qapi/misc.json b/qapi/misc.json
index d450cfef21..fbee1e6d34 100644
--- a/qapi/misc.json
+++ b/qapi/misc.json
@@ -1104,7 +1104,7 @@
##
# @cpu-add:
#
-# Adds CPU with specified ID
+# Adds CPU with specified ID.
#
# @id: ID of CPU to be created, valid values [0..max_cpus)
#
@@ -1112,6 +1112,10 @@
#
# Since: 1.5
#
+# Note: This command is deprecated. The `device_add` command should be
+# used instead. See the `query-hotpluggable-cpus` command for
+# details.
+#
# Example:
#
# -> { "execute": "cpu-add", "arguments": { "id": 2 } }
@@ -3213,6 +3217,8 @@
##
# @query-hotpluggable-cpus:
#
+# TODO: Better documentation; currently there is none.
+#
# Returns: a list of HotpluggableCPU objects.
#
# Since: 2.7
diff --git a/qemu-deprecated.texi b/qemu-deprecated.texi
index 1b9c007f12..c86924ad9a 100644
--- a/qemu-deprecated.texi
+++ b/qemu-deprecated.texi
@@ -155,6 +155,11 @@ The ``query-cpus'' command is replaced by the
``query-cpus-fast'' command.
The ``arch'' output member of the ``query-cpus-fast'' command is
replaced by the ``target'' output member.
+@subsection cpu-add (since 3.1)
+
+Use ``device_add'' for hotplugging vCPUs instead of ``cpu-add''. See
+documentation of ``query-hotpluggable-cpus'' for additional details.
+
@section System emulator devices
@subsection ivshmem (since 2.6.0)
--
2.17.1
[Qemu-devel] [PATCH v3 0/3] Deprecate QMP & HMP `cpu-add`; document vCPU hotplug
The first patch deprecates the QMP `cpu-add`, the second its HMP equivalent, and the third documents vCPU hotplug procedure using QMP `device_add` et al. v2: https://lists.gnu.org/archive/html/qemu-devel/2018-09/msg03191.html Kashyap Chamarthy (3): Deprecate QMP `cpu-add` Deprecate HMP `cpu-add` docs: Document vCPU hotplug procedure docs/cpu-hotplug.rst | 142 +++ hmp-commands.hx | 6 +- hmp.c| 2 + qapi/misc.json | 8 ++- qemu-deprecated.texi | 5 ++ 5 files changed, 160 insertions(+), 3 deletions(-) create mode 100644 docs/cpu-hotplug.rst -- 2.17.1
Re: [Qemu-devel] [PATCH v2 2/5] target/mips: Rename MMI-related opcodes
On 30.10.18. 12:36, Aleksandar Markovic wrote:
> From: Aleksandar Markovic
>
> Rename MMI-related opcodes.
>
> Signed-off-by: Aleksandar Markovic
> ---
> target/mips/translate.c | 470
>
> 1 file changed, 235 insertions(+), 235 deletions(-)
Reviewed-by: Stefan Markovic
> diff --git a/target/mips/translate.c b/target/mips/translate.c
> index e38d50d..4b008d8 100644
> --- a/target/mips/translate.c
> +++ b/target/mips/translate.c
> @@ -2099,7 +2099,7 @@ enum {
>* The TX79-specific Multimedia Instruction encodings
>* ==
>*
> - * TX79 Multimedia Instruction encoding table keys:
> + * MMI Instruction encoding table keys:
>*
>* * This code is reserved for future use. An attempt to execute it
>* causes a Reserved Instruction exception.
> @@ -2110,7 +2110,7 @@ enum {
>* DMULTU, DDIV, DDIVU, LL, LLD, SC, SCD, LWC2 and SWC2. An attempt
>* to execute it causes a Reserved Instruction exception.
>*
> - * TX79 Multimedia Instructions encoded by opcode field (MMI, LQ, SQ):
> + * MMI Instructions encoded by opcode field (MMI, LQ, SQ):
>*
>* 31260
>* +++
> @@ -2132,13 +2132,13 @@ enum {
>*/
>
> enum {
> -TX79_CLASS_MMI = 0x1C << 26,/* Same as OPC_SPECIAL2 */
> -TX79_LQ= 0x1E << 26,/* Same as OPC_MSA */
> -TX79_SQ= 0x1F << 26,/* Same as OPC_SPECIAL3 */
> +MMI_CLASS_MMI = 0x1C << 26,/* Same as OPC_SPECIAL2 */
> +MMI_LQ= 0x1E << 26,/* Same as OPC_MSA */
> +MMI_SQ= 0x1F << 26,/* Same as OPC_SPECIAL3 */
> };
>
> /*
> - * TX79 Multimedia Instructions with opcode field = MMI:
> + * MMI Instructions with opcode field = MMI:
>*
>* 3126 5 0
>* ++---++
> @@ -2161,35 +2161,35 @@ enum {
>
> #define MASK_MMI(op) (MASK_OP_MAJOR(op) | ((op) & 0x3F))
> enum {
> -TX79_MMI_MADD = 0x00 | TX79_CLASS_MMI, /* Same as OPC_MADD */
> -TX79_MMI_MADDU = 0x01 | TX79_CLASS_MMI, /* Same as OPC_MADDU */
> -TX79_MMI_PLZCW = 0x04 | TX79_CLASS_MMI,
> -TX79_MMI_CLASS_MMI0 = 0x08 | TX79_CLASS_MMI,
> -TX79_MMI_CLASS_MMI2 = 0x09 | TX79_CLASS_MMI,
> -TX79_MMI_MFHI1 = 0x10 | TX79_CLASS_MMI, /* Same minor as OPC_MFHI */
> -TX79_MMI_MTHI1 = 0x11 | TX79_CLASS_MMI, /* Same minor as OPC_MTHI */
> -TX79_MMI_MFLO1 = 0x12 | TX79_CLASS_MMI, /* Same minor as OPC_MFLO */
> -TX79_MMI_MTLO1 = 0x13 | TX79_CLASS_MMI, /* Same minor as OPC_MTLO */
> -TX79_MMI_MULT1 = 0x18 | TX79_CLASS_MMI, /* Same minor as OPC_MULT */
> -TX79_MMI_MULTU1 = 0x19 | TX79_CLASS_MMI, /* Same minor as OPC_MULTU
> */
> -TX79_MMI_DIV1 = 0x1A | TX79_CLASS_MMI, /* Same minor as OPC_DIV */
> -TX79_MMI_DIVU1 = 0x1B | TX79_CLASS_MMI, /* Same minor as OPC_DIVU */
> -TX79_MMI_MADD1 = 0x20 | TX79_CLASS_MMI,
> -TX79_MMI_MADDU1 = 0x21 | TX79_CLASS_MMI,
> -TX79_MMI_CLASS_MMI1 = 0x28 | TX79_CLASS_MMI,
> -TX79_MMI_CLASS_MMI3 = 0x29 | TX79_CLASS_MMI,
> -TX79_MMI_PMFHL = 0x30 | TX79_CLASS_MMI,
> -TX79_MMI_PMTHL = 0x31 | TX79_CLASS_MMI,
> -TX79_MMI_PSLLH = 0x34 | TX79_CLASS_MMI,
> -TX79_MMI_PSRLH = 0x36 | TX79_CLASS_MMI,
> -TX79_MMI_PSRAH = 0x37 | TX79_CLASS_MMI,
> -TX79_MMI_PSLLW = 0x3C | TX79_CLASS_MMI,
> -TX79_MMI_PSRLW = 0x3E | TX79_CLASS_MMI,
> -TX79_MMI_PSRAW = 0x3F | TX79_CLASS_MMI,
> +MMI_OPC_MADD = 0x00 | MMI_CLASS_MMI, /* Same as OPC_MADD */
> +MMI_OPC_MADDU = 0x01 | MMI_CLASS_MMI, /* Same as OPC_MADDU */
> +MMI_OPC_PLZCW = 0x04 | MMI_CLASS_MMI,
> +MMI_OPC_CLASS_MMI0 = 0x08 | MMI_CLASS_MMI,
> +MMI_OPC_CLASS_MMI2 = 0x09 | MMI_CLASS_MMI,
> +MMI_OPC_MFHI1 = 0x10 | MMI_CLASS_MMI, /* Same minor as OPC_MFHI */
> +MMI_OPC_MTHI1 = 0x11 | MMI_CLASS_MMI, /* Same minor as OPC_MTHI */
> +MMI_OPC_MFLO1 = 0x12 | MMI_CLASS_MMI, /* Same minor as OPC_MFLO */
> +MMI_OPC_MTLO1 = 0x13 | MMI_CLASS_MMI, /* Same minor as OPC_MTLO */
> +MMI_OPC_MULT1 = 0x18 | MMI_CLASS_MMI, /* Same minor as OPC_MULT */
> +MMI_OPC_MULTU1 = 0x19 | MMI_CLASS_MMI, /* Same minor as OPC_MULTU */
> +MMI_OPC_DIV1 = 0x1A | MMI_CLASS_MMI, /* Same minor as OPC_DIV */
> +MMI_OPC_DIVU1 = 0x1B | MMI_CLASS_MMI, /* Same minor as OPC_DIVU */
> +MMI_OPC_MADD1 = 0x20 | MMI_CLASS_MMI,
> +MMI_OPC_MADDU1 = 0x21 | MMI_CLASS_MMI,
> +MMI_OPC_CLASS_MMI1 = 0x28 | MMI_CLASS_MMI,
> +MMI_OPC_CLASS_MMI3 = 0x29 | MMI_CLASS_MMI,
> +MMI_OPC_PMFHL = 0x30 | MMI_CLASS_MMI,
> +MMI_OPC_PMTHL = 0x31 | MMI_CLASS_MMI,
> +MMI_OPC_PSLLH = 0x34 | MMI_CLASS_M
[Qemu-devel] [PATCH v3 2/3] Deprecate HMP `cpu-add`
Since we're deprecating the QMP `cpu-add`, let's deprecate its HMP
equivalent, too.
Suggested-by: Thomas Huth
Signed-off-by: Kashyap Chamarthy
---
hmp-commands.hx | 6 --
hmp.c | 2 ++
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/hmp-commands.hx b/hmp-commands.hx
index db0c681f74..ba71558c25 100644
--- a/hmp-commands.hx
+++ b/hmp-commands.hx
@@ -1849,14 +1849,16 @@ ETEXI
.name = "cpu-add",
.args_type = "id:i",
.params = "id",
-.help = "add cpu",
+.help = "add cpu (deprecated, use device_add instead)",
.cmd= hmp_cpu_add,
},
STEXI
@item cpu-add @var{id}
@findex cpu-add
-Add CPU with id @var{id}
+Add CPU with id @var{id}. This command is deprecated, please
++use @code{device_add} instead. For details, refer to
+'docs/cpu-hotplug.rst'.
ETEXI
{
diff --git a/hmp.c b/hmp.c
index 4975fa56b0..c3f3db7795 100644
--- a/hmp.c
+++ b/hmp.c
@@ -2353,6 +2353,8 @@ void hmp_cpu_add(Monitor *mon, const QDict *qdict)
int cpuid;
Error *err = NULL;
+error_report("cpu_add is deprecated, please use device_add instead");
+
cpuid = qdict_get_int(qdict, "id");
qmp_cpu_add(cpuid, &err);
hmp_handle_error(mon, &err);
--
2.17.1
[Qemu-devel] [PATCH v3 3/3] docs: Document vCPU hotplug procedure
Signed-off-by: Kashyap Chamarthy
---
docs/cpu-hotplug.rst | 142 +++
1 file changed, 142 insertions(+)
create mode 100644 docs/cpu-hotplug.rst
diff --git a/docs/cpu-hotplug.rst b/docs/cpu-hotplug.rst
new file mode 100644
index 00..1c268e00b4
--- /dev/null
+++ b/docs/cpu-hotplug.rst
@@ -0,0 +1,142 @@
+===
+Virtual CPU hotplug
+===
+
+A complete example of vCPU hotplug (and hot-unplug) using QMP
+``device_add`` and ``device_del``.
+
+vCPU hotplug
+
+
+(1) Launch QEMU as follows (note that the "maxcpus" is mandatory to
+allow vCPU hotplug)::
+
+ $ qemu-system-x86_64 -display none -no-user-config -m 2048 \
+ -nodefaults -monitor stdio -machine pc,accel=kvm,usb=off \
+ -smp 1,maxcpus=2 -cpu IvyBridge-IBRS \
+ -qmp unix:/tmp/qmp-sock,server,nowait
+
+(2) Run 'qmp-shell' (located in the source tree, under: "scripts/qmp/)
+to connect to the just-launched QEMU::
+
+ $> ./qmp-shell -p -v /tmp/qmp-sock
+ [...]
+ (QEMU)
+
+(3) Find out which CPU types could be plugged, and into which sockets::
+
+ (QEMU) query-hotpluggable-cpus
+ {
+ "execute": "query-hotpluggable-cpus",
+ "arguments": {}
+ }
+ {
+ "return": [
+ {
+ "type": "IvyBridge-IBRS-x86_64-cpu",
+ "vcpus-count": 1,
+ "props": {
+ "socket-id": 1,
+ "core-id": 0,
+ "thread-id": 0
+ }
+ },
+ {
+ "qom-path": "/machine/unattached/device[0]",
+ "type": "IvyBridge-IBRS-x86_64-cpu",
+ "vcpus-count": 1,
+ "props": {
+ "socket-id": 0,
+ "core-id": 0,
+ "thread-id": 0
+ }
+ }
+ ]
+ }
+ (QEMU)
+
+(4) The ``query-hotpluggable-cpus`` command returns an object for CPUs
+that are present (containing a "qom-path" member) or which may be
+hot-plugged (no "qom-path" member). From its output in step (3), we
+can see that ``IvyBridge-IBRS-x86_64-cpu`` is present in socket 0,
+while hot-plugging a CPU into socket 1 requires passing the listed
+properties to QMP ``device_add``:
+
+ (QEMU) device_add id=cpu-2 driver=IvyBridge-IBRS-x86_64-cpu socket-id=1
core-id=0 thread-id=0
+ {
+ "execute": "device_add",
+ "arguments": {
+ "socket-id": 1,
+ "driver": "IvyBridge-IBRS-x86_64-cpu",
+ "id": "cpu-2",
+ "core-id": 0,
+ "thread-id": 0
+ }
+ }
+ {
+ "return": {}
+ }
+ (QEMU)
+
+(5) Optionally, run QMP `query-cpus-fast` for some details about the
+vCPUs::
+
+ (QEMU) query-cpus-fast
+ {
+ "execute": "query-cpus-fast",
+ "arguments": {}
+ }
+ {
+ "return": [
+ {
+ "qom-path": "/machine/unattached/device[0]",
+ "target": "x86_64",
+ "thread-id": 11534,
+ "cpu-index": 0,
+ "props": {
+ "socket-id": 0,
+ "core-id": 0,
+ "thread-id": 0
+ },
+ "arch": "x86"
+ },
+ {
+ "qom-path": "/machine/peripheral/cpu-2",
+ "target": "x86_64",
+ "thread-id": 12106,
+ "cpu-index": 1,
+ "props": {
+ "socket-id": 1,
+ "core-id": 0,
+ "thread-id": 0
+ },
+ "arch": "x86"
+ }
+ ]
+ }
+ (QEMU)
+
+vCPU hot-unplug
+---
+
+From the 'qmp-shell', invoke the QMP ``device_del`` command::
+
+ (QEMU) device_del id=cpu-2
+ {
+ "execute": "device_del",
+ "arguments": {
+ "id": "cpu-2"
+ }
+ }
+ {
+ "return": {}
+ }
+ (QEMU)
+
+.. note::
+vCPU hot-unplug requires guest cooperation; so the ``device_del``
+command above does not guarantee vCPU removal -- it's a "request to
+unplug". At this point, the guest will get a System Control
+Interupt (SCI) and calls the ACPI handler for the affected vCPU
+device. Then the guest kernel will bring the vCPU offline and tell
+QEMU to unplug it.
--
2.17.1
Re: [Qemu-devel] [PATCH v2 3/5] target/mips: Rename MMI-related functions
On 30.10.18. 12:36, Aleksandar Markovic wrote:
> From: Aleksandar Markovic
>
> Rename MMI-related functions.
>
> Signed-off-by: Aleksandar Markovic
> ---
> target/mips/translate.c | 32
> 1 file changed, 16 insertions(+), 16 deletions(-)
Reviewed-by: Stefan Markovic
> diff --git a/target/mips/translate.c b/target/mips/translate.c
> index 4b008d8..155331f 100644
> --- a/target/mips/translate.c
> +++ b/target/mips/translate.c
> @@ -24681,7 +24681,7 @@ static void decode_opc_special3_legacy(CPUMIPSState
> *env, DisasContext *ctx)
> }
> }
>
> -static void decode_tx79_mmi0(CPUMIPSState *env, DisasContext *ctx)
> +static void decode_mmi0(CPUMIPSState *env, DisasContext *ctx)
> {
> uint32_t opc = MASK_MMI0(ctx->opcode);
>
> @@ -24720,7 +24720,7 @@ static void decode_tx79_mmi0(CPUMIPSState *env,
> DisasContext *ctx)
> }
> }
>
> -static void decode_tx79_mmi1(CPUMIPSState *env, DisasContext *ctx)
> +static void decode_mmi1(CPUMIPSState *env, DisasContext *ctx)
> {
> uint32_t opc = MASK_MMI1(ctx->opcode);
>
> @@ -24752,7 +24752,7 @@ static void decode_tx79_mmi1(CPUMIPSState *env,
> DisasContext *ctx)
> }
> }
>
> -static void decode_tx79_mmi2(CPUMIPSState *env, DisasContext *ctx)
> +static void decode_mmi2(CPUMIPSState *env, DisasContext *ctx)
> {
> uint32_t opc = MASK_MMI2(ctx->opcode);
>
> @@ -24788,7 +24788,7 @@ static void decode_tx79_mmi2(CPUMIPSState *env,
> DisasContext *ctx)
> }
> }
>
> -static void decode_tx79_mmi3(CPUMIPSState *env, DisasContext *ctx)
> +static void decode_mmi3(CPUMIPSState *env, DisasContext *ctx)
> {
> uint32_t opc = MASK_MMI3(ctx->opcode);
>
> @@ -24815,7 +24815,7 @@ static void decode_tx79_mmi3(CPUMIPSState *env,
> DisasContext *ctx)
> }
> }
>
> -static void decode_tx79_mmi(CPUMIPSState *env, DisasContext *ctx)
> +static void decode_mmi(CPUMIPSState *env, DisasContext *ctx)
> {
> uint32_t opc = MASK_MMI(ctx->opcode);
> int rs = extract32(ctx->opcode, 21, 5);
> @@ -24824,16 +24824,16 @@ static void decode_tx79_mmi(CPUMIPSState *env,
> DisasContext *ctx)
>
> switch (opc) {
> case MMI_OPC_CLASS_MMI0:
> -decode_tx79_mmi0(env, ctx);
> +decode_mmi0(env, ctx);
> break;
> case MMI_OPC_CLASS_MMI1:
> -decode_tx79_mmi1(env, ctx);
> +decode_mmi1(env, ctx);
> break;
> case MMI_OPC_CLASS_MMI2:
> -decode_tx79_mmi2(env, ctx);
> +decode_mmi2(env, ctx);
> break;
> case MMI_OPC_CLASS_MMI3:
> -decode_tx79_mmi3(env, ctx);
> +decode_mmi3(env, ctx);
> break;
> case MMI_OPC_MULT1:
> case MMI_OPC_MULTU1:
> @@ -24873,12 +24873,12 @@ static void decode_tx79_mmi(CPUMIPSState *env,
> DisasContext *ctx)
> }
> }
>
> -static void decode_tx79_lq(CPUMIPSState *env, DisasContext *ctx)
> +static void decode_mmi_lq(CPUMIPSState *env, DisasContext *ctx)
> {
> generate_exception_end(ctx, EXCP_RI);/* TODO: MMI_LQ */
> }
>
> -static void gen_tx79_sq(DisasContext *ctx, int base, int rt, int offset)
> +static void gen_mmi_sq(DisasContext *ctx, int base, int rt, int offset)
> {
> generate_exception_end(ctx, EXCP_RI);/* TODO: MMI_SQ */
> }
> @@ -24904,7 +24904,7 @@ static void gen_tx79_sq(DisasContext *ctx, int base,
> int rt, int offset)
>* In user mode, QEMU must verify the upper and lower 11 bits to distinguish
>* between SQ and RDHWR, as the Linux kernel does.
>*/
> -static void decode_tx79_sq(CPUMIPSState *env, DisasContext *ctx)
> +static void decode_mmi_sq(CPUMIPSState *env, DisasContext *ctx)
> {
> int base = extract32(ctx->opcode, 21, 5);
> int rt = extract32(ctx->opcode, 16, 5);
> @@ -24922,7 +24922,7 @@ static void decode_tx79_sq(CPUMIPSState *env,
> DisasContext *ctx)
> }
> #endif
>
> -gen_tx79_sq(ctx, base, rt, offset);
> +gen_mmi_sq(ctx, base, rt, offset);
> }
>
> static void decode_opc_special3(CPUMIPSState *env, DisasContext *ctx)
> @@ -26231,14 +26231,14 @@ static void decode_opc(CPUMIPSState *env,
> DisasContext *ctx)
> break;
> case OPC_SPECIAL2:
> if ((ctx->insn_flags & INSN_R5900) && (ctx->insn_flags & ASE_MMI)) {
> -decode_tx79_mmi(env, ctx);
> +decode_mmi(env, ctx);
> } else {
> decode_opc_special2_legacy(env, ctx);
> }
> break;
> case OPC_SPECIAL3:
> if (ctx->insn_flags & INSN_R5900) {
> -decode_tx79_sq(env, ctx);/* MMI_SQ */
> +decode_mmi_sq(env, ctx);/* MMI_SQ */
> } else {
> decode_opc_special3(env, ctx);
> }
> @@ -26902,7 +26902,7 @@ static void decode_opc(CPUMIPSState *env,
> DisasContext *ctx)
> break;
> case OPC_MSA: /* OPC_MDMX */
> if (ctx->insn_flags & INSN_R5900) {
> -decode_tx79_lq(e
Re: [Qemu-devel] [PATCH 2/3] hw/dma/pl330: Factor out pl330_init() from hw/arm/xilinx_zynq.c
On 30 October 2018 at 11:28, Philippe Mathieu-Daudé wrote:
> On 30/10/18 10:36, Peter Maydell wrote:
>>
>> On 29 October 2018 at 23:20, Philippe Mathieu-Daudé
>> wrote:
>>>
>>> Signed-off-by: Philippe Mathieu-Daudé
>>> ---
>>> MAINTAINERS| 1 +
>>> hw/arm/xilinx_zynq.c | 18 ++
>>> hw/dma/pl330.c | 2 +-
>>> include/hw/dma/pl330.h | 41 +
>>> 4 files changed, 45 insertions(+), 17 deletions(-)
>>> create mode 100644 include/hw/dma/pl330.h
>>
>>
>>> +static inline void pl330_init(uint32_t base, qemu_irq irq, int nreq)
>>> +{
>>> +SysBusDevice *busdev;
>>> +DeviceState *dev;
>>> +
>>> +dev = qdev_create(NULL, TYPE_PL330);
>>> +qdev_prop_set_uint8(dev, "num_chnls", 8);
>>> +qdev_prop_set_uint8(dev, "num_periph_req", nreq);
>>> +qdev_prop_set_uint8(dev, "num_events", 16);
>>> +qdev_prop_set_uint8(dev, "data_width", 64);
>>> +qdev_prop_set_uint8(dev, "wr_cap", 8);
>>> +qdev_prop_set_uint8(dev, "wr_q_dep", 16);
>>> +qdev_prop_set_uint8(dev, "rd_cap", 8);
>>> +qdev_prop_set_uint8(dev, "rd_q_dep", 16);
>>> +qdev_prop_set_uint16(dev, "data_buffer_dep", 256);
>>> +qdev_init_nofail(dev);
>>
>>
>> These are the settings the Xilinx board uses, but are
>> they really the settings every SoC that has a PL330 will use ?
>
>
> Except "num_periph_req", all are pl330_properties defaults.
If they're all the device's defaults there's not much point
in setting them by hand. But my point is that the reason they're
properties is that in the real hardware these are configurable
values in the RTL. So any given SoC model needs to be able to
set them appropriately. Having a helper function that doesn't
let you set them makes it too easy for people modelling SoCs
not to think about the question, I think...
thanks
-- PMM
Re: [Qemu-devel] qemu3.0.0: Linux on non x86 CPUs run Wine
On 30 October 2018 at 12:10, wj193102 wrote: > That is my fault. I don't run the *.sh file. I copy the file "/bin/ls" from > the Linux on x86 CPUs to the Linux on non X86 CPUs. I put the file in the > new created directory, such as "/home/admin/user/test/". > Then I run the executable file,using "qemu-i386 ./ls", I get the following > error: "./ls: error while loading shared libraries: libselinux.so.1: cannot > open shared object file: No such file or directory." > How can I resolve this problem? This is because you need not just the guest executable, but all the DLLs, data files and other things it requires. The easiest way to set this up is to use a chroot. There should be some tutorials on the web that you can look for to tell you how to set this up. thanks -- PMM
Re: [Qemu-devel] [PATCH v2 2/5] target/mips: Rename MMI-related opcodes
Hi Aleksandar,
On 30/10/18 12:36, Aleksandar Markovic wrote:
From: Aleksandar Markovic
Rename MMI-related opcodes.
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 470
1 file changed, 235 insertions(+), 235 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index e38d50d..4b008d8 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -2099,7 +2099,7 @@ enum {
* The TX79-specific Multimedia Instruction encodings
What about this section title? Should this be "MultiMedia extension
Instructions encodings"?
* ==
*
- * TX79 Multimedia Instruction encoding table keys:
+ * MMI Instruction encoding table keys:
*
* * This code is reserved for future use. An attempt to execute it
* causes a Reserved Instruction exception.
@@ -2110,7 +2110,7 @@ enum {
* DMULTU, DDIV, DDIVU, LL, LLD, SC, SCD, LWC2 and SWC2. An attempt
* to execute it causes a Reserved Instruction exception.
*
- * TX79 Multimedia Instructions encoded by opcode field (MMI, LQ, SQ):
+ * MMI Instructions encoded by opcode field (MMI, LQ, SQ):
*
* 31260
* +++
@@ -2132,13 +2132,13 @@ enum {
*/
enum {
-TX79_CLASS_MMI = 0x1C << 26,/* Same as OPC_SPECIAL2 */
-TX79_LQ= 0x1E << 26,/* Same as OPC_MSA */
-TX79_SQ= 0x1F << 26,/* Same as OPC_SPECIAL3 */
+MMI_CLASS_MMI = 0x1C << 26,/* Same as OPC_SPECIAL2 */
+MMI_LQ= 0x1E << 26,/* Same as OPC_MSA */
+MMI_SQ= 0x1F << 26,/* Same as OPC_SPECIAL3 */
};
/*
- * TX79 Multimedia Instructions with opcode field = MMI:
+ * MMI Instructions with opcode field = MMI:
*
* 3126 5 0
* ++---++
@@ -2161,35 +2161,35 @@ enum {
#define MASK_MMI(op) (MASK_OP_MAJOR(op) | ((op) & 0x3F))
enum {
-TX79_MMI_MADD = 0x00 | TX79_CLASS_MMI, /* Same as OPC_MADD */
-TX79_MMI_MADDU = 0x01 | TX79_CLASS_MMI, /* Same as OPC_MADDU */
-TX79_MMI_PLZCW = 0x04 | TX79_CLASS_MMI,
-TX79_MMI_CLASS_MMI0 = 0x08 | TX79_CLASS_MMI,
-TX79_MMI_CLASS_MMI2 = 0x09 | TX79_CLASS_MMI,
-TX79_MMI_MFHI1 = 0x10 | TX79_CLASS_MMI, /* Same minor as OPC_MFHI */
-TX79_MMI_MTHI1 = 0x11 | TX79_CLASS_MMI, /* Same minor as OPC_MTHI */
-TX79_MMI_MFLO1 = 0x12 | TX79_CLASS_MMI, /* Same minor as OPC_MFLO */
-TX79_MMI_MTLO1 = 0x13 | TX79_CLASS_MMI, /* Same minor as OPC_MTLO */
-TX79_MMI_MULT1 = 0x18 | TX79_CLASS_MMI, /* Same minor as OPC_MULT */
-TX79_MMI_MULTU1 = 0x19 | TX79_CLASS_MMI, /* Same minor as OPC_MULTU */
-TX79_MMI_DIV1 = 0x1A | TX79_CLASS_MMI, /* Same minor as OPC_DIV */
-TX79_MMI_DIVU1 = 0x1B | TX79_CLASS_MMI, /* Same minor as OPC_DIVU */
-TX79_MMI_MADD1 = 0x20 | TX79_CLASS_MMI,
-TX79_MMI_MADDU1 = 0x21 | TX79_CLASS_MMI,
-TX79_MMI_CLASS_MMI1 = 0x28 | TX79_CLASS_MMI,
-TX79_MMI_CLASS_MMI3 = 0x29 | TX79_CLASS_MMI,
-TX79_MMI_PMFHL = 0x30 | TX79_CLASS_MMI,
-TX79_MMI_PMTHL = 0x31 | TX79_CLASS_MMI,
-TX79_MMI_PSLLH = 0x34 | TX79_CLASS_MMI,
-TX79_MMI_PSRLH = 0x36 | TX79_CLASS_MMI,
-TX79_MMI_PSRAH = 0x37 | TX79_CLASS_MMI,
-TX79_MMI_PSLLW = 0x3C | TX79_CLASS_MMI,
-TX79_MMI_PSRLW = 0x3E | TX79_CLASS_MMI,
-TX79_MMI_PSRAW = 0x3F | TX79_CLASS_MMI,
+MMI_OPC_MADD = 0x00 | MMI_CLASS_MMI, /* Same as OPC_MADD */
+MMI_OPC_MADDU = 0x01 | MMI_CLASS_MMI, /* Same as OPC_MADDU */
+MMI_OPC_PLZCW = 0x04 | MMI_CLASS_MMI,
+MMI_OPC_CLASS_MMI0 = 0x08 | MMI_CLASS_MMI,
+MMI_OPC_CLASS_MMI2 = 0x09 | MMI_CLASS_MMI,
+MMI_OPC_MFHI1 = 0x10 | MMI_CLASS_MMI, /* Same minor as OPC_MFHI */
+MMI_OPC_MTHI1 = 0x11 | MMI_CLASS_MMI, /* Same minor as OPC_MTHI */
+MMI_OPC_MFLO1 = 0x12 | MMI_CLASS_MMI, /* Same minor as OPC_MFLO */
+MMI_OPC_MTLO1 = 0x13 | MMI_CLASS_MMI, /* Same minor as OPC_MTLO */
+MMI_OPC_MULT1 = 0x18 | MMI_CLASS_MMI, /* Same minor as OPC_MULT */
+MMI_OPC_MULTU1 = 0x19 | MMI_CLASS_MMI, /* Same minor as OPC_MULTU */
+MMI_OPC_DIV1 = 0x1A | MMI_CLASS_MMI, /* Same minor as OPC_DIV */
+MMI_OPC_DIVU1 = 0x1B | MMI_CLASS_MMI, /* Same minor as OPC_DIVU */
+MMI_OPC_MADD1 = 0x20 | MMI_CLASS_MMI,
+MMI_OPC_MADDU1 = 0x21 | MMI_CLASS_MMI,
+MMI_OPC_CLASS_MMI1 = 0x28 | MMI_CLASS_MMI,
+MMI_OPC_CLASS_MMI3 = 0x29 | MMI_CLASS_MMI,
+MMI_OPC_PMFHL = 0x30 | MMI_CLASS_MMI,
+MMI_OPC_PMTHL = 0x31 | MMI_CLASS_MMI,
+MMI_OPC_PSLLH = 0x34 | MMI_CLASS_MMI,
+MMI_OPC_PSRLH = 0x36 | MMI_CLASS_MMI,
+MMI_OPC_PSRAH = 0x37 | MMI_CLASS_MMI,
+MMI_OPC
Re: [Qemu-devel] [PATCH v2 4/5] target/mips: Misc R5900-related cosmetic changes
On 30/10/18 12:36, Aleksandar Markovic wrote:
From: Aleksandar Markovic
Misc changes in comments and strings for R5900.
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 14 +++---
target/mips/translate_init.inc.c | 12
2 files changed, 7 insertions(+), 19 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 155331f..259ad2b 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -2096,8 +2096,8 @@ enum {
* MTSAH rs, immediate Move Halfword Count to Shift Amount Register
* PROT3W rd, rtParallel Rotate 3 Words
*
- * The TX79-specific Multimedia Instruction encodings
- * ==
+ * Multimedia Instructions (MMI) encodings
Oh now I see this. I this single change should be squashed into patch #2
of this series.
Also, maybe use "MultiMedia ..."
+ * ===
*
* MMI Instruction encoding table keys:
*
@@ -24714,7 +24714,7 @@ static void decode_mmi0(CPUMIPSState *env, DisasContext
*ctx)
generate_exception_end(ctx, EXCP_RI); /* TODO: MMI_OPC_CLASS_MMI0 */
break;
default:
-MIPS_INVAL("TX79 MMI class MMI0");
+MIPS_INVAL("MMI class MMI0");
generate_exception_end(ctx, EXCP_RI);
break;
}
@@ -24746,7 +24746,7 @@ static void decode_mmi1(CPUMIPSState *env, DisasContext
*ctx)
generate_exception_end(ctx, EXCP_RI); /* TODO: MMI_OPC_CLASS_MMI1 */
break;
default:
-MIPS_INVAL("TX79 MMI class MMI1");
+MIPS_INVAL("MMI class MMI1");
generate_exception_end(ctx, EXCP_RI);
break;
}
@@ -24782,7 +24782,7 @@ static void decode_mmi2(CPUMIPSState *env, DisasContext
*ctx)
generate_exception_end(ctx, EXCP_RI); /* TODO: MMI_OPC_CLASS_MMI2 */
break;
default:
-MIPS_INVAL("TX79 MMI class MMI2");
+MIPS_INVAL("MMI class MMI2");
generate_exception_end(ctx, EXCP_RI);
break;
}
@@ -24809,7 +24809,7 @@ static void decode_mmi3(CPUMIPSState *env, DisasContext
*ctx)
generate_exception_end(ctx, EXCP_RI); /* TODO: MMI_OPC_CLASS_MMI3 */
break;
default:
-MIPS_INVAL("TX79 MMI class MMI3");
+MIPS_INVAL("MMI class MMI3");
generate_exception_end(ctx, EXCP_RI);
break;
}
@@ -24867,7 +24867,7 @@ static void decode_mmi(CPUMIPSState *env, DisasContext
*ctx)
generate_exception_end(ctx, EXCP_RI);/* TODO: MMI_CLASS_MMI */
break;
default:
-MIPS_INVAL("TX79 MMI class");
+MIPS_INVAL("MMI class");
generate_exception_end(ctx, EXCP_RI);
break;
}
diff --git a/target/mips/translate_init.inc.c b/target/mips/translate_init.inc.c
index 85da4a2..cab2003 100644
--- a/target/mips/translate_init.inc.c
+++ b/target/mips/translate_init.inc.c
@@ -411,18 +411,6 @@ const mips_def_t mips_defs[] =
.mmu_type = MMU_TYPE_R4000,
},
{
-/*
- * The Toshiba TX System RISC TX79 Core Architecture manual
- *
- * https://wiki.qemu.org/File:C790.pdf
- *
- * describes the C790 processor that is a follow-up to the R5900.
- * There are a few notable differences in that the R5900 FPU
- *
- * - is not IEEE 754-1985 compliant,
- * - does not implement double format, and
- * - its machine code is nonstandard.
- */
Why remove this documentation? This entry is specific to the R5900.
.name = "R5900",
.CP0_PRid = 0x2E00,
/* No L2 cache, icache size 32k, dcache size 32k, uncached coherency.
*/
Re: [Qemu-devel] [PULL v1 0/5] Merge tpm 2018/10/29 v1
On 10/30/18 7:26 AM, Peter Maydell wrote: On 30 October 2018 at 11:14, Marc-André Lureau wrote: Hi Peter On Tue, Oct 30, 2018 at 2:45 PM Peter Maydell wrote: Hi; this gives some test failures (all hosts): TEST: tests/tpm-crb-swtpm-test... (pid=305) /i386/tpm/crb-swtpm/test:FAIL GTester: last random seed: R02Sf628ca48da88252a6b95465fef3b855f /i386/tpm/crb-swtpm-migration/test: FAIL GTester: last random seed: R02Sf628ca48da88252a6b95465fef3b855f FAIL: tests/tpm-crb-swtpm-test TEST: tests/tpm-crb-test... (pid=311) /i386/tpm-crb/test: OK PASS: tests/tpm-crb-test TEST: tests/tpm-tis-swtpm-test... (pid=324) /i386/tpm/tis-swtpm/test:FAIL GTester: last random seed: R02Sca4f303959770d4ca9f8f12b784dba0d /i386/tpm/tis-swtpm-migration/test: FAIL GTester: last random seed: R02Sca4f303959770d4ca9f8f12b784dba0d FAIL: tests/tpm-tis-swtpm-test TEST: tests/tpm-tis-test... (pid=331) /i386/tpm-tis/test_check_localities: OK /i386/tpm-tis/test_check_access_reg: OK /i386/tpm-tis/test_check_access_reg_seize: OK /i386/tpm-tis/test_check_access_reg_release: OK /i386/tpm-tis/test_check_transmit: OK PASS: tests/tpm-tis-test What version of swtpm & libtpms is installed? No idea, how do I tell? On my x86 Ubuntu machine which is one of those which failed there are no packages whose name includes either "swtpm" or "tpms". Probably it's failing without it being installed. I had also tried running it on my machine without swtpm being installed and it didn't fail. thanks -- PMM
Re: [Qemu-devel] [PATCH v5 00/11] hw/m68k: add Apple Machintosh Quadra 800 machine
Le 30/10/2018 à 12:48, Mark Cave-Ayland a écrit :
> On 30/10/2018 08:15, Richard Henderson wrote:
>
>> On 10/29/18 1:39 PM, Mark Cave-Ayland wrote:
>>> You can install your own disk using debian-installer, with:
>>>
>>> ...
>>> -M q800 \
>>> -serial none -serial mon:stdio \
>>> -m 1000M -drive file=m68k.qcow2,format=qcow2 \
>>> -net nic,model=dp83932,addr=09:00:07:12:34:57 \
>>> -append "console=ttyS0 vga=off" \
>>> -kernel vmlinux-4.15.0-2-m68k \
>>> -initrd initrd.gz \
>>> -drive file=debian-9.0-m68k-NETINST-1.iso \
>>> -drive file=m68k.qcow2,format=qcow2 \
>>> -nographic
>>
>> I tried this and got
>>
>> Trace 0: 0x7f2e886c7140 [/d404/0xe000]
>> INT 1: Unassigned(0xf4) pc=d404 sp=00393e60 sr=2700
>> INT 2: Access Fault(0x8) pc= sp=00393e58 sr=2700
>> ssw: 0506 ea: sfc: 5dfc: 5
>>
>> which lead straight to buserr and panic. This happens way early in boot --
>> only 1926 TranslationBlocks generated.
>>
>> Is there some device missing from the command-line that the kernel is
>> expecting?
>
> Heh that's annoying. The original branch I forked that Laurent was working on
> had
> some extra patches at the start of the series: some were required for q800
> whilst
> others were for new development. I thought that all of the patches required
> for q800
> had been applied over the past few months, but sadly that isn't the case :(
>
> I've pushed an updated branch to
> https://github.com/mcayland/qemu/tree/q800-test
> which contains the patchset plus two extra patches that are still needed to
> boot to
> the debian installer here:
>
> 9281a5371f "tmp"
> 629754d847 "target/m68k: manage FPU exceptions"
>
> Laurent, are these patches ready for upstream or do they need work in which
> case we
> should leave q800 until the 3.2 cycle?
The only needed part is from 9281a5371f.
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -1552,7 +1552,7 @@ DISAS_INSN(undef)
but actually illegal for CPU32 or pre-68020. */
qemu_log_mask(LOG_UNIMP, "Illegal instruction: %04x @ %08x\n",
insn, s->base.pc_next);
-gen_exception(s, s->base.pc_next, EXCP_UNSUPPORTED);
+gen_exception(s, s->base.pc_next, EXCP_ILLEGAL);
}
DISAS_INSN(mulw)
@@ -2799,7 +2799,7 @@ DISAS_INSN(mull)
if (ext & 0x400) {
if (!m68k_feature(s->env, M68K_FEATURE_QUAD_MULDIV)) {
-gen_exception(s, s->base.pc_next, EXCP_UNSUPPORTED);
+gen_exception(s, s->base.pc_next, EXCP_ILLEGAL);
return;
}
@@ -4509,7 +4509,7 @@ DISAS_INSN(strldsr)
addr = s->pc - 2;
ext = read_im16(env, s);
if (ext != 0x46FC) {
-gen_exception(s, addr, EXCP_UNSUPPORTED);
+gen_exception(s, addr, EXCP_ILLEGAL);
return;
}
ext = read_im16(env, s);
Because kernel only manages illegal instruction exception not unsupported.
Without the patch, we have:
IN:
0xd454: 071400
INT 1: Unassigned(0xf4) pc=d454 sp=00331e60 sr=2700
with the patch:
IN:
0xd454: 071400
INT 1: Illegal Instruction(0x10) pc=d454 sp=00331e60 sr=2700
We have in linux/arch/m68k/kernel/vectors.c:
/*
* this must be called very early as the kernel might
* use some instruction that are emulated on the 060
* and so we're prepared for early probe attempts (e.g. nf_init).
*/
void __init base_trap_init(void)
{
...
vectors[VEC_BUSERR] = buserr;
vectors[VEC_ILLEGAL] = trap;
vectors[VEC_SYS] = system_call;
}
So I think the unsupported vector jumps to an invalid address.
This seems triggered by the aranym native feature:
d454: 7300mvsb %d0,%d1
from linux/arch/m68k/emu/natfeat.c
Thanks,
Laurent
[Qemu-devel] [PATCH 3/3] configure: Use FILES loop for all build tree symlinks
A few places in configure were doing ad-hoc calls to the symlink function to set up symlinks from the build tree back to the source tree. We have a loop that does this already for all files and directories listed in the FILES environment variable; use that instead. Signed-off-by: Peter Maydell --- configure | 14 ++ 1 file changed, 2 insertions(+), 12 deletions(-) diff --git a/configure b/configure index acb9a4d39e5..11ca69472a6 100755 --- a/configure +++ b/configure @@ -7392,6 +7392,8 @@ LINKS="$LINKS roms/seabios/Makefile roms/vgabios/Makefile" LINKS="$LINKS pc-bios/qemu-icon.bmp" LINKS="$LINKS .gdbinit scripts" # scripts needed by relative path in .gdbinit LINKS="$LINKS tests/acpi-test-data tests/hex-loader-check-data" +LINKS="$LINKS tests/acceptance tests/data" +LINKS="$LINKS tests/qemu-iotests/check" for bios_file in \ $source_path/pc-bios/*.bin \ $source_path/pc-bios/*.lid \ @@ -7428,25 +7430,13 @@ for rom in seabios vgabios ; do echo "RANLIB=$ranlib" >> $config_mak done -# set up tests data directory -for tests_subdir in acceptance data; do -if [ ! -e tests/$tests_subdir ]; then -symlink "$source_path/tests/$tests_subdir" tests/$tests_subdir -fi -done - # set up qemu-iotests in this build directory iotests_common_env="tests/qemu-iotests/common.env" -iotests_check="tests/qemu-iotests/check" echo "# Automatically generated by configure - do not modify" > "$iotests_common_env" echo >> "$iotests_common_env" echo "export PYTHON='$python'" >> "$iotests_common_env" -if [ ! -e "$iotests_check" ]; then -symlink "$source_path/$iotests_check" "$iotests_check" -fi - # Save the configure command line for later reuse. cat
[Qemu-devel] [PATCH 2/3] configure: Symlink entire test directories rather than individual files
Instead of symlinking every individual file inside the data directories used by some tests, just symlink the entire directory. This avoids a problem where if a new data file is added to the source tree, nothing results in configure being rerun to create the symlink, and so test runs in the build tree fail to find the file. Add a comment noting why adding wildcards to FILES is a bad idea. (Yes, we still do this for various files in pc-bios/; we get away with this because we don't in practice add new BIOS images often and if we do there's also usually a change that means configure is rerun anyway. We can't just symlink all of pc-bios into the build tree because it contains other things than just generated binaries.) Signed-off-by: Peter Maydell --- configure | 15 +++ 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/configure b/configure index b7d0167b650..acb9a4d39e5 100755 --- a/configure +++ b/configure @@ -7370,6 +7370,12 @@ fi # DIRS are directories which we simply mkdir in the build tree; # LINKS are things to symlink back into the source tree # (these can be both files and directories). +# Caution: do not add files or directories here using wildcards. This +# will result in problems later if a new file matching the wildcard is +# added to the source tree -- nothing will cause configure to be rerun +# so the build tree will be missing the link back to the new file, and +# tests might fail. Prefer to keep the relevant files in their own +# directory and symlink the directory instead. DIRS="tests tests/tcg tests/tcg/cris tests/tcg/lm32 tests/libqos tests/qapi-schema tests/tcg/xtensa tests/qemu-iotests tests/vm" DIRS="$DIRS tests/fp" DIRS="$DIRS docs docs/interop fsdev scsi" @@ -7385,6 +7391,7 @@ LINKS="$LINKS pc-bios/s390-ccw/Makefile" LINKS="$LINKS roms/seabios/Makefile roms/vgabios/Makefile" LINKS="$LINKS pc-bios/qemu-icon.bmp" LINKS="$LINKS .gdbinit scripts" # scripts needed by relative path in .gdbinit +LINKS="$LINKS tests/acpi-test-data tests/hex-loader-check-data" for bios_file in \ $source_path/pc-bios/*.bin \ $source_path/pc-bios/*.lid \ @@ -7398,14 +7405,6 @@ for bios_file in \ do LINKS="$LINKS pc-bios/$(basename $bios_file)" done -for test_file in $(find $source_path/tests/acpi-test-data -type f) -do -LINKS="$LINKS tests/acpi-test-data$(echo $test_file | sed -e 's/.*acpi-test-data//')" -done -for test_file in $(find $source_path/tests/hex-loader-check-data -type f) -do -LINKS="$LINKS tests/hex-loader-check-data$(echo $test_file | sed -e 's/.*hex-loader-check-data//')" -done mkdir -p $DIRS for f in $LINKS ; do if [ -e "$source_path/$f" ] && [ "$pwd_is_source_path" != "y" ]; then -- 2.19.1
