Re: [SeaBIOS] [PATCH v3 4/6] pci: init boot devices only on address space shortage

2011-07-06 Thread Gerd Hoffmann

On 07/05/11 18:23, Michael S. Tsirkin wrote:

On Tue, Jul 05, 2011 at 05:27:03PM +0200, Gerd Hoffmann wrote:

Try to handle address space shortage by skipping any device
which isn't essential for boot.

Signed-off-by: Gerd Hoffmannkra...@redhat.com


At least in a virt setup, it's much easier to debug
things if boot just fails. Partial boot could be an option I guess.


Yea, I think that is pretty much the fundamental question.  Does it make 
sense to try boot up even if we can't fit some devices into the pci 
memory hole.


At least linux guests will try to map devices below the pci memory hole 
in case seabios didn't assign an address.  Of course this works only if 
the guest hasn't too much memory so there is some free space between end 
of ram and the start of the pci memory hole.



We usually have a list of bootable devices we got from qemu -
want to use that?


Why?  seabios knows itself which devices it can use to boot.  Also the 
list from qemu is incomplete, the boot menu can have more entries than 
what we get passed in from qemu as boot order list.


cheers,
  Gerd


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Re: [SeaBIOS] [PATCH] pci: capability scanning function'

2011-07-06 Thread Michael S. Tsirkin
On Wed, Jul 06, 2011 at 05:03:21PM +0300, Michael S. Tsirkin wrote:
 Add pci_find_capability to scan capability list.
 Return 0 on error, capability offset if found.
 
 Signed-off-by: Michael S. Tsirkin m...@redhat.com
 
 ---
 
 Not useful by itself, but should be handy if
 we ever want to look at capabilities such as pci express.

Here's an example using slot register and
pci express register to figure out how many
expansion slots does a bridge have:


diff --git a/src/pci.c b/src/pci.c
index 23a6878..5e72347 100644
--- a/src/pci.c
+++ b/src/pci.c
@@ -57,30 +57,59 @@ pci_config_maskw(u16 bdf, u32 addr, u16 off, u16 on)
 pci_config_writew(bdf, addr, val);
 }
 
 unsigned char pci_find_capability(u16 bdf, unsigned char cap_id)
 {
 unsigned char next, prev;
 int loop = 0;
 
 if (!(pci_config_readb(bdf, PCI_STATUS)  PCI_STATUS_CAP_LIST))
 return 0;
 
 for (prev = PCI_CAPABILITY_LIST; (next = pci_config_readb(bdf, prev));
  prev = next + PCI_CAP_LIST_NEXT) {
 if (pci_config_readb(bdf, next + PCI_CAP_LIST_ID) == cap_id)
 break;
 if (loop++  0x100) {
 dprintf(1, ERROR: capability loop detected. 
PCI device %02x:%02x.%x\n
 , pci_bdf_to_bus(bdf), pci_bdf_to_dev(bdf)
 , pci_bdf_to_fn(bdf));
 return 0;
 }
 }
 
 return next;
 }
 
+static int pci_bridge_conventional_slots(u16 bdf)
+{
+u8 cap = pci_find_capability(bdf, PCI_CAP_ID_SLOTID);
+if (!cap)
+return 32;
+u8 slots = pci_config_readb(bdf, cap + 2);
+return slots;
+}
+
+int pci_bridge_get_slots(u16 bdf)
+{
+/* No express cap: assume 32 ports. */
+u8 flags, type;
+u8 cap = pci_find_capability(bdf, PCI_CAP_ID_EXP);
+if (!cap)
+return pci_bridge_conventional_slots(bdf);
+flags = pci_config_readb(cap + 2);
+type = flags  4;
+switch (type) {
+case PCI_EXP_TYPE_UPSTREAM:
+return 0;
+case PCI_EXP_TYPE_DOWNSTREAM:
+return 1;
+default:
+return pci_bridge_conventional_slots(bdf);
+}
+
+}
+
 // Helper function for foreachbdf() macro - return next device
 int
 pci_next(int bdf, int bus)

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Re: [SeaBIOS] [PATCH] pci: capability scanning function'

2011-07-06 Thread Gerd Hoffmann

On 07/06/11 16:57, Michael S. Tsirkin wrote:

On Wed, Jul 06, 2011 at 05:03:21PM +0300, Michael S. Tsirkin wrote:

Add pci_find_capability to scan capability list.
Return 0 on error, capability offset if found.

Signed-off-by: Michael S. Tsirkinm...@redhat.com

---

Not useful by itself, but should be handy if
we ever want to look at capabilities such as pci express.


Here's an example using slot register and
pci express register to figure out how many
expansion slots does a bridge have:


Thanks, I'll use the bits for finetuning in the next version of the 
two-pass pci init patches.


cheers,
  Gerd


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[SeaBIOS] [PATCH V5 0/9] Add TPM support to SeaBIOS

2011-07-06 Thread Stefan Berger
The following set of patches add TPM and Trusted Computing support to SeaBIOS.
In particular the patches add:

- a TPM driver for the Qemu's TPM TIS emulation (not yet in Qemu git)
- ACPI support for the TPM device (SSDT table)
- ACPI support for measurement logging (TCPA table)
- Support for initialzation of the TPM
- Support for the TCG BIOS extensions (1ah handler [ah = 0xbb])
  (used by trusted grub; http://trousers.sourceforge.net/grub.html)
- Static Root of Trusted for Measurement (SRTM) support
- Support for S3 resume (sends command to TPM upon resume)
- TPM-specific menu for controlling aspects of the TPM
- [An optional test suite for the TIS interface]

All implementations necessarily follow specifications.

When all patches are applied the following services are available
- SSDT ACPI table for TPM support
- initialization of the TPM upon VM start and S3 resume
- Static root of trust for measurements (SRTM) that measures (some) data
  of SeaBIOS in TCPA ACPI table
- 1ah interrupt handler offering APIs for measuring and sending commands to
  the TPM (trusted grub uses them)
- User menu for controlling aspects of the state of the TPM

v5:
 - adapted patches to checkout of 76b5e71 (June 21)
 - bugfixes (see individual patches)
 - added patch to support the transfer of Qemu-provided measurements via
   firmware interface

v4:
 - if ! has_working_tpm() now returns error code everywhere
 - tis_test.c now also under LGPLv3
 - in inthandler, pulled set_cf() out of switch and then only call it in
   the default case where we need to indicate that a function is not
   implemented

v3:
 - some nits here and there
 - calling timer_setup now after S3 resume

v2:
 - following Kevin's comment
 - refactoring code so that every patch compiles

Regards,
 Stefan



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[SeaBIOS] [PATCH V5 8/9] Support for Qemu-provided measurements

2011-07-06 Thread Stefan Berger
This patch adds support for measurements provided by Qemu via the
firmware interface. In the case where Qemu was started with the -kernel,
-initrd and -append command lines, Qemu hashes the kernel and initrd files
as well as the command line parameters and provides the measurements to
SeaBIOS via the firmware interface. SeaBIOS then processes the individual
measurements and extends the TPM's PCRs as well as writes logs about those
measurements.

Signed-off-by: Stefan Berger stef...@linux.vnet.ibm.com

---
 src/boot.c |1 
 src/paravirt.c |   14 ++
 src/paravirt.h |4 +++
 src/tcgbios.c  |   74 +
 src/tcgbios.h  |   16 
 5 files changed, 109 insertions(+)

Index: seabios/src/tcgbios.c
===
--- seabios.orig/src/tcgbios.c
+++ seabios/src/tcgbios.c
@@ -17,6 +17,7 @@
 #include acpi.h  // RSDP_SIGNATURE, rsdt_descriptor
 #include sha1.h  // sha1
 #include smbios.h // get_smbios_entry_point
+#include paravirt.h // QEMU_CFG_KERNEL_*, QEMU_CFG_INITRD_*
 
 
 static const u8 Startup_ST_CLEAR[2] = { 0x00, TPM_ST_CLEAR };
@@ -1308,6 +1309,79 @@ tcpa_smbios_measure(void)
 }
 
 
+u32 tcpa_process_firmware_cfg(void)
+{
+if (!CONFIG_TCGBIOS)
+return 0;
+
+if (!has_working_tpm())
+return TCG_GENERAL_ERROR;
+
+void *ptr = (void *)0x10;
+u16 ctr = 0;
+
+u32 len = qemu_cfg_get_u32(QEMU_CFG_TPM_MEASURE_SIZE);
+
+if (len) {
+qemu_cfg_copy(QEMU_CFG_TPM_MEASURE_DATA, ptr, len);
+
+TPMMsrHdr *hdr = ptr;
+u32 idx = sizeof(*hdr);
+
+if (hdr-rev  1)
+return TCG_GENERAL_ERROR;
+
+/* since the first revision (1) we have numTPMMsrEntries */
+while (idx  hdr-totlen  ctr  hdr-numTPMMsrEntries) {
+TPMMsrEntry *entry = (void *)hdr + idx;
+
+idx += entry-len;
+
+struct hleo hleo;
+
+u8 _pcpes[offsetof(struct pcpes, event) + 400];
+struct pcpes *pcpes = (struct pcpes *)_pcpes;
+
+pcpes-pcrindex = entry-pcrindex;
+pcpes-eventtype = entry-type;
+if (entry-eventdatasize  400) {
+pcpes-eventdatasize = entry-eventdatasize;
+memcpy(pcpes-event, entry-event, entry-eventdatasize);
+} else {
+pcpes-eventdatasize = 0;
+}
+memcpy(pcpes-digest, entry-digest, sizeof(pcpes-digest));
+
+struct hlei hlei = {
+.ipblength   = sizeof(hlei),
+.hashdataptr = NULL,
+.hashdatalen = 0,
+.pcrindex= entry-pcrindex,
+.logeventtype= entry-type,
+.logdataptr  = pcpes,
+.logdatalen  = pcpes-eventdatasize +
+   offsetof(struct pcpes, event),
+};
+
+u32 rc = hash_log_event(hlei, hleo);
+if (rc)
+goto err_exit;
+
+rc = tpm_extend(entry-digest, entry-pcrindex);
+if (rc)
+goto err_exit;
+
+ctr++;
+}
+}
+
+return 0;
+
+err_exit:
+return 1;
+}
+
+
 /*
  * Add a measurement to the log in support of 8.2.5.3
  * Creates two log entries
Index: seabios/src/boot.c
===
--- seabios.orig/src/boot.c
+++ seabios/src/boot.c
@@ -620,6 +620,7 @@ static void
 boot_rom(u32 vector)
 {
 printf(Booting from ROM...\n);
+tcpa_process_firmware_cfg();
 struct segoff_s so;
 so.segoff = vector;
 call_boot_entry(so, 0);
Index: seabios/src/paravirt.c
===
--- seabios.orig/src/paravirt.c
+++ seabios/src/paravirt.c
@@ -61,6 +61,20 @@ void qemu_cfg_port_probe(void)
 dprintf(4, qemu_cfg_present=%d\n, qemu_cfg_present);
 }
 
+u32 qemu_cfg_get_u32(int e)
+{
+u32 i;
+
+qemu_cfg_read_entry(i, e, sizeof(i));
+
+return i;
+}
+
+void qemu_cfg_copy(int e, void *buf, int len)
+{
+qemu_cfg_read_entry(buf, e, len);
+}
+
 void qemu_cfg_get_uuid(u8 *uuid)
 {
 if (!qemu_cfg_present)
Index: seabios/src/paravirt.h
===
--- seabios.orig/src/paravirt.h
+++ seabios/src/paravirt.h
@@ -32,6 +32,8 @@ static inline int kvm_para_available(voi
 #define QEMU_CFG_BOOT_MENU 0x0e
 #define QEMU_CFG_MAX_CPUS  0x0f
 #define QEMU_CFG_FILE_DIR   0x19
+#define QEMU_CFG_TPM_MEASURE_SIZE   0x1a
+#define QEMU_CFG_TPM_MEASURE_DATA   0x1b
 #define QEMU_CFG_ARCH_LOCAL0x8000
 #define QEMU_CFG_ACPI_TABLES   (QEMU_CFG_ARCH_LOCAL + 0)
 #define QEMU_CFG_SMBIOS_ENTRIES(QEMU_CFG_ARCH_LOCAL + 1)
@@ -41,6 +43,8 @@ static inline int kvm_para_available(voi
 extern int qemu_cfg_present;
 
 void qemu_cfg_port_probe(void);
+u32 qemu_cfg_get_u32(int e);

[SeaBIOS] [PATCH V5 6/9] Add measurement code to the BIOS

2011-07-06 Thread Stefan Berger
This patch adds invocactions of functions that measure various parts of the
code and data through various parts of the BIOS code. It follows TCG
specifications on what needs to be measured. It also adds the implementation
of the called functions.

Reference for what needs to be measured can be found in section 3.2.2++ in

http://www.trustedcomputinggroup.org/resources/pc_client_work_group_specific_implementation_specification_for_conventional_bios_specification_version_12


The first measurements are done once the ACPI tables have been initialized.

Once booted into Linux, the current measurements produce the following logs
which can be found in /sys/kernel/security/tpm0/ascii_bios_measurements.
The below log also shows measurements from trusted grub.

 1 3fb240d2a04085a4e84f81e4398e070ed5a18163 06 [SMBIOS]
 2 cc812353fc277c1fab99e0b721752a1392984566 06 [Option ROM]
 2 9dbd87163112e5670378abe4510491259a61f411 05 [Start Option ROM Scan]
 2 6f74e357331b8dee11bbad85f27bc66cb873106c 06 [Option ROM]
 2 5626eb7ac05c7231e46d7461e7d3839b03ae9fad 06 [Option ROM]
 4 c1e25c3f6b0dc78d57296aa2870ca6f782ccf80f 05 [Calling INT 19h]
 0 d9be6524a5f5047db5866813acf3277892a7a30a 04 []
 1 d9be6524a5f5047db5866813acf3277892a7a30a 04 []
 2 d9be6524a5f5047db5866813acf3277892a7a30a 04 []
 3 d9be6524a5f5047db5866813acf3277892a7a30a 04 []
 4 d9be6524a5f5047db5866813acf3277892a7a30a 04 []
 5 d9be6524a5f5047db5866813acf3277892a7a30a 04 []
 6 d9be6524a5f5047db5866813acf3277892a7a30a 04 []
 7 d9be6524a5f5047db5866813acf3277892a7a30a 04 []
 4 8cf2fe6c87d4d0b2998a43da630292e6d85ee8b6 05 [Booting BCV device 80h (HDD)]
 4 5dff94459a3e2d13a433ef94afdc306144565bf7 0d [IPL]
 5 d1b33afde65ad47502332af957c60f20c84c1edc 0e [IPL Partition Data]
 4 487ce764b527ccad17f1d04243d0136fa981e6c4 0d [IPL]
 4 91d285e4dead566324c8938a3cc75803f462d9a1 0d [IPL]
 4 8ba79ac98bb491524fef29defc724daaf6263d35 0d [IPL]
 4 c591c15b82e4ff30e7383a4ff1ef3b41b38521ac 06 []
 4 8cdc27ec545eda33fbba1e8b8dae4da5c7206972 04 [Grub Event Separator]
 5 8cdc27ec545eda33fbba1e8b8dae4da5c7206972 04 [Grub Event Separator]
 5 e8673b9e14b02dc12d8ccfd0176bca7a3de7fc3c 0e [IPL Partition Data]
 5 0163e375a0af7525c5dac1a8e74b277359e40d1d 1105 []
 8 4be30f67c3d48ab7f04d9c0fd07f06d4c68379be 1205 []
 8 54c83965978de9708d026016ecb0e70660e04388 1305 []
 5 2431ed60130faeaf3a045f21963f71cacd46a029 04 [OS Event Separator]
 8 2431ed60130faeaf3a045f21963f71cacd46a029 04 [OS Event Separator]
 8 f3973cae05d6e2055062119d6e6e1e077b7df876 1005 []

v5:
 - call code for measuring CDROM boot sector

v4:
 - return TCG_GENERAL_ERROR if ! has_working_tpm()

v2:
 - dropping call to tcpa_measure_post
 - converting tcpa_option_rom and tcpa_ipl functions to get pointers
   rather than segments passed
 - introduce public get_smbios_entry_point() function and use it
   rather than searching for the entry point
 - use dprintf(DEBUG_tcg, ...)


Signed-off-by: Stefan Berger stef...@linux.vnet.ibm.com

---
 src/boot.c   |   11 +
 src/cdrom.c  |   10 +
 src/optionroms.c |4 
 src/post.c   |4 
 src/smbios.c |   12 +
 src/smbios.h |1 
 src/tcgbios.c|  359 +++
 src/tcgbios.h|8 +
 8 files changed, 409 insertions(+)

Index: seabios/src/post.c
===
--- seabios.orig/src/post.c
+++ seabios/src/post.c
@@ -197,6 +197,9 @@ init_hw(void)
 void VISIBLE32FLAT
 startBoot(void)
 {
+tcpa_calling_int19h();
+tcpa_add_event_separators();
+
 // Clear low-memory allocations (required by PMM spec).
 memset((void*)BUILD_STACK_ADDR, 0, BUILD_EBDA_MINIMUM - BUILD_STACK_ADDR);
 
@@ -248,6 +251,7 @@ maininit(void)
 // Initialize tpm (after acpi tables were written)
 tcpa_acpi_init();
 tcpa_startup();
+tcpa_smbios_measure();
 
 // Run vga option rom
 vga_setup();
Index: seabios/src/optionroms.c
===
--- seabios.orig/src/optionroms.c
+++ seabios/src/optionroms.c
@@ -14,6 +14,7 @@
 #include pci_ids.h // PCI_CLASS_DISPLAY_VGA
 #include boot.h // IPL
 #include paravirt.h // qemu_cfg_*
+#include tcgbios.h // tcpa_*
 
 
 /
@@ -134,6 +135,7 @@ is_valid_rom(struct rom_header *rom)
 if (CONFIG_OPTIONROMS_CHECKSUM)
 return 0;
 }
+tcpa_option_rom(rom, len);
 return 1;
 }
 
@@ -396,6 +398,8 @@ optionrom_setup(void)
 memset(sources, 0, sizeof(sources));
 u32 post_vga = RomEnd;
 
+tcpa_start_option_rom_scan();
+
 if (CONFIG_OPTIONROMS_DEPLOYED) {
 // Option roms are already deployed on the system.
 u32 pos = RomEnd;
Index: seabios/src/boot.c
===
--- seabios.orig/src/boot.c
+++ seabios/src/boot.c
@@ -557,6 +557,10 @@ boot_disk(u8 bootdrv, int checksig)
 }
 }
 
+tcpa_add_bootdevice(0, bootdrv);
+/* 

[SeaBIOS] [PATCH V5 9/9] Optional tests for the TIS interface

2011-07-06 Thread Stefan Berger
This patch adds an optional test suite (CONFIG_TIS_TEST) for the TIS interface
to SeaBIOS. If compiled into the BIOS, it can be invoked through the
TPM-specific menu item 8.

1. Enable TPM
2. Disable TPM
3. Activate TPM
4. Deactivate TPM
5. Clear ownership
6. Allow installation of owner
7. Prevent installation of owner
8. TIS test

I would like to see this code become part of the SeaBIOS code base
but I understand that a test suite in a BIOS is not the right place...
Nevertheless, for testing the TIS emulation in Qemu, I am posting it here.
The test suite fills up the available BIOS space from 92.6% at the previous
patch to 98.4%.

v4:
  - adapted tis_test.c to be under LGPLv3

v3:
  - use if (CONFIG_TIS_TEST) ... where possible, otherwise use #if CONFIG_...

Signed-off-by: Stefan Berger stef...@linux.vnet.ibm.com

---
 Makefile   |3 
 src/Kconfig|7 
 src/tcgbios.c  |   33 +-
 src/tis_test.c |  834 +
 src/tis_test.h |   52 +++
 5 files changed, 920 insertions(+), 9 deletions(-)

Index: seabios/src/tcgbios.c
===
--- seabios.orig/src/tcgbios.c
+++ seabios/src/tcgbios.c
@@ -19,6 +19,9 @@
 #include smbios.h // get_smbios_entry_point
 #include paravirt.h // QEMU_CFG_KERNEL_*, QEMU_CFG_INITRD_*
 
+#if CONFIG_TIS_TEST
+#include tis_test.h
+#endif
 
 static const u8 Startup_ST_CLEAR[2] = { 0x00, TPM_ST_CLEAR };
 static const u8 Startup_ST_STATE[2] = { 0x00, TPM_ST_STATE };
@@ -694,6 +697,9 @@ pass_through_to_tpm(struct pttti *pttti,
 iovec[1].data   = NULL;
 iovec[1].length = 0;
 
+if (CONFIG_TIS_TEST)
+locty = pttti-reserved;
+
 rc = transmit(locty, iovec, pttto-tpmopout, resbuflen);
 if (rc)
 goto err_exit;
@@ -1801,26 +1807,29 @@ err_exit:
 }
 
 
-static void
+static int
 show_tpm_state(void)
 {
+int state = 0;
 struct tpm_permanent_flags pf;
 u8 has_owner;
 
 if (read_permanent_flags((char *)pf, sizeof(pf)) ||
 read_has_owner(has_owner))
-return;
+return ~0;
 
 printf(TPM is );
 
-if (pf.flags[PERM_FLAG_IDX_DISABLE])
+if (pf.flags[PERM_FLAG_IDX_DISABLE]) {
 printf(disabled);
-else
+state |= 1  PERM_FLAG_IDX_DISABLE;
+} else
 printf(enabled);
 
-if (pf.flags[PERM_FLAG_IDX_DEACTIVATED])
+if (pf.flags[PERM_FLAG_IDX_DEACTIVATED]) {
 printf(, deactivated);
-else
+state |= 1  PERM_FLAG_IDX_DEACTIVATED;
+} else
 printf(, active);
 
 if (has_owner)
@@ -1833,6 +1842,7 @@ show_tpm_state(void)
 printf(and an owner cannot be installed.\n);
 }
 
+return state;
 }
 
 
@@ -1891,7 +1901,7 @@ tcpa_menu(void)
 return;
 
 int show_menu = 1;
-int scan_code;
+int scan_code, state;
 u32 rc;
 tpm_bios_cfg_t cfg = {
 .op  = 0,
@@ -1910,9 +1920,12 @@ tcpa_menu(void)
5. Clear ownership\n
6. Allow installation of owner\n
7. Prevent installation of owner\n
+#if CONFIG_TIS_TEST
+   8. TIS test\n
+#endif
Escape for previous menu.\n);
 show_menu = 0;
-show_tpm_state();
+state = show_tpm_state();
 }
 
 cfg.op = 0;
@@ -1926,6 +1939,10 @@ tcpa_menu(void)
 case 2 ... 8:
 cfg.op = scan_code - 1;
 break;
+#if CONFIG_TIS_TEST
+case 9:
+tis_test(state);
+#endif
 default:
 continue;
 }
Index: seabios/src/tis_test.c
===
--- /dev/null
+++ seabios/src/tis_test.c
@@ -0,0 +1,834 @@
+//
+//  TIS interface tests
+//
+//  Copyright (C) 2006-2011 IBM Corporation
+//  Copyright (C) 2006-2011 Stefan Berger stef...@us.ibm.com
+//
+// This file may be distributed under the terms of the GNU LGPLv3 license.
+
+
+#include config.h
+
+#include types.h
+#include util.h /* read{b,l}, write{b,l} */
+#include tcgbios.h
+#include tpm_drivers.h
+#include tis_test.h
+
+
+static int
+tis_check_reg(u32 reg, u8 locty, u32 mask, u32 exp, u32 timeout)
+{
+u32 val;
+u32 now = 0;
+
+while (now = timeout) {
+val = readl(TIS_REG(locty, reg));
+
+if ((val  mask) == exp)
+return 0;
+
+msleep(10);
+
+now += 10;
+}
+
+return 1;
+}
+
+static int
+tis_check_status(u8 locty, u32 mask, u32 exp, u32 timeout)
+{
+return tis_check_reg(TIS_REG_STS, locty, mask, exp, timeout);
+}
+
+static int
+tis_check_access(u8 locty, u32 mask, u32 exp, u32 timeout)
+{
+return tis_check_reg(TIS_REG_ACCESS, locty, mask, exp, timeout);
+}
+
+static void
+wait_for_keystroke(void)
+{
+printf(Press escape to continue.\n);
+while (1) {
+switch (get_keystroke(1000)) {
+case 1:
+return;
+}
+}
+}
+
+static void
+check_access(u8 locty, u8 mask, u8 exp,
+   

[SeaBIOS] [PATCH V5 4/9] Implementation of the TCG BIOS extensions

2011-07-06 Thread Stefan Berger
This patch implements the main part of the TCG BIOS extensions. It provides
the following functionality:

- initialization of the TCPA ACPI table used for logging of measurements
- initialization of the TPM by sending a sequence of commands to it
- proper setup of the TPM once the BIOS hands over control to the bootloader
- support for S3 resume; BIOS sends TPM_Startup(ST_STATE) to TPM
- enable configuration of SeaBIOS to be built with TCGBIOS extensions
  depending on COREBOOT not being selected
  All TCG BIOS extensions are activated with CONFIG_TCGBIOS.

Structures that are needed in subsequent patches are also included in
tcgbios.h at this point.

The effect of this patch is that it initialized the TPM upon VM start
and S3 resume.

v5:
 - adding the lock flag to the 'not present' Physcial_presence_NOT_PRESENT
   structure

v4:
 - return TCG_GENERAL_ERROR if ! has_working_tpm()

v3:
 - upon S3 resume call timer_setup()

v2:
 - replace mssleep() with calls to msleep()
 - Moving Kconfig patch to this file
 - converting code to call dprintf(DEBUG_tcg, ...)
 - use the get_rsdp call to get hold of the RSDP
 - use util.c:checksum()
 - Adapting tcgbios.c to be under LGPLv3
 - using if (!CONFIG_TCGBIOS) everywhere

Signed-off-by: Stefan Berger stef...@linux.vnet.ibm.com

---
 src/Kconfig   |8 +
 src/boot.c|2 
 src/config.h  |1 
 src/post.c|5 
 src/resume.c  |2 
 src/tcgbios.c |  396 ++
 src/tcgbios.h |  312 +
 7 files changed, 726 insertions(+)

Index: seabios/src/post.c
===
--- seabios.orig/src/post.c
+++ seabios/src/post.c
@@ -26,6 +26,7 @@
 #include xen.h // xen_probe_hvm_info
 #include ps2port.h // ps2port_setup
 #include virtio-blk.h // virtio_blk_setup
+#include tcgbios.h // tcpa_*
 
 
 /
@@ -244,6 +245,10 @@ maininit(void)
 mouse_setup();
 init_bios_tables();
 
+// Initialize tpm (after acpi tables were written)
+tcpa_acpi_init();
+tcpa_startup();
+
 // Run vga option rom
 vga_setup();
 
Index: seabios/src/boot.c
===
--- seabios.orig/src/boot.c
+++ seabios/src/boot.c
@@ -14,6 +14,7 @@
 #include cmos.h // inb_cmos
 #include paravirt.h // romfile_loadfile
 #include pci.h //pci_bdf_to_*
+#include tcgbios.h // tcpa_*
 
 
 /
@@ -473,6 +474,7 @@ boot_prep(void)
 // Allow user to modify BCV/IPL order.
 interactive_bootmenu();
 wait_threads();
+tcpa_leave_bios();
 
 // Map drives and populate BEV list
 struct bootentry_s *pos = BootList;
Index: seabios/src/resume.c
===
--- seabios.orig/src/resume.c
+++ seabios/src/resume.c
@@ -10,6 +10,7 @@
 #include biosvar.h // struct bios_data_area_s
 #include bregs.h // struct bregs
 #include acpi.h // find_resume_vector
+#include tcgbios.h // tcpa_s3_resume
 
 // Reset DMA controller
 void
@@ -116,6 +117,7 @@ s3_resume(void)
 if (s3_resume_vector) {
 dprintf(1, Jump to resume vector (%x)\n, s3_resume_vector);
 br.code = FLATPTR_TO_SEGOFF((void*)s3_resume_vector);
+tcpa_s3_resume();
 } else {
 dprintf(1, No resume vector set!\n);
 // Jump to the post vector to restart with a normal boot.
Index: seabios/src/config.h
===
--- seabios.orig/src/config.h
+++ seabios/src/config.h
@@ -112,5 +112,6 @@
 #define DEBUG_unimplemented 2
 #define DEBUG_invalid 3
 #define DEBUG_thread 2
+#define DEBUG_tcg 20
 
 #endif // config.h
Index: seabios/src/Kconfig
===
--- seabios.orig/src/Kconfig
+++ seabios/src/Kconfig
@@ -341,6 +341,14 @@ menu BIOS interfaces
 default n
 help
 Disable A20 on 16bit boot.
+
+config TCGBIOS
+depends on !COREBOOT
+bool TPM support and TCG BIOS extensions
+default y
+help
+Provide TPM support along with TCG BIOS extensions
+
 endmenu
 
 menu BIOS Tables
Index: seabios/src/tcgbios.h
===
--- seabios.orig/src/tcgbios.h
+++ seabios/src/tcgbios.h
@@ -1,6 +1,22 @@
 #ifndef TCGBIOS_H
 #define TCGBIOS_H
 
+#include types.h
+#include bregs.h /* struct bregs */
+
+#define TCG_MAGIC 0x41504354L
+
+/* Define for section 12.3 */
+#define TCG_PC_OK   0x0
+#define TCG_PC_TPMERROR 0x1
+#define TCG_PC_LOGOVERFLOW  0x2
+#define TCG_PC_UNSUPPORTED  0x3
+
+#define TPM_ALG_SHA 0x4
+
+#define TCG_MAGIC   0x41504354L
+#define TCG_VERSION_MAJOR   1
+#define TCG_VERSION_MINOR   

[SeaBIOS] [PATCH V5 3/9] Add public get_rsdp function

2011-07-06 Thread Stefan Berger
This patch adds a global get_rsdp() function call and refactors
find_resume_vector() to call it.

Signed-off-by: Stefan Berger stef...@linux.vnet.ibm.com

---
 src/acpi.c |   12 ++--
 src/acpi.h |1 +
 2 files changed, 11 insertions(+), 2 deletions(-)

Index: seabios/src/acpi.c
===
--- seabios.orig/src/acpi.c
+++ seabios/src/acpi.c
@@ -719,11 +719,19 @@ acpi_bios_init(void)
 dprintf(1, ACPI tables: RSDP=%p RSDT=%p\n, rsdp, rsdt);
 }
 
-u32
-find_resume_vector(void)
+struct rsdp_descriptor *
+get_rsdp(void)
 {
 dprintf(4, rsdp=%p\n, RsdpAddr);
 if (!RsdpAddr || RsdpAddr-signature != RSDP_SIGNATURE)
+return 0;
+return RsdpAddr;
+}
+
+u32
+find_resume_vector(void)
+{
+if (!get_rsdp())
 return 0;
 struct rsdt_descriptor_rev1 *rsdt = (void*)RsdpAddr-rsdt_physical_address;
 dprintf(4, rsdt=%p\n, rsdt);
Index: seabios/src/acpi.h
===
--- seabios.orig/src/acpi.h
+++ seabios/src/acpi.h
@@ -4,6 +4,7 @@
 #include types.h // u32
 
 void acpi_bios_init(void);
+struct rsdp_descriptor *get_rsdp();
 u32 find_resume_vector(void);
 
 #define RSDP_SIGNATURE 0x2052545020445352LL // RSD PTR 


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Re: [SeaBIOS] [PATCH] pci: capability scanning function'

2011-07-06 Thread Michael S. Tsirkin
On Wed, Jul 06, 2011 at 05:43:34PM +0200, Gerd Hoffmann wrote:
 On 07/06/11 16:57, Michael S. Tsirkin wrote:
 On Wed, Jul 06, 2011 at 05:03:21PM +0300, Michael S. Tsirkin wrote:
 Add pci_find_capability to scan capability list.
 Return 0 on error, capability offset if found.
 
 Signed-off-by: Michael S. Tsirkinm...@redhat.com
 
 ---
 
 Not useful by itself, but should be handy if
 we ever want to look at capabilities such as pci express.
 
 Here's an example using slot register and
 pci express register to figure out how many
 expansion slots does a bridge have:
 
 Thanks, I'll use the bits for finetuning in the next version of the
 two-pass pci init patches.
 
 cheers,
   Gerd

BTw I don't think we need to make it a dependency of
that patchset, necessarily. Keeping it simple
also has certain appeal, and might make it easier
for management to figure out what is and isn't
supported.


-- 
MST

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