Re: [SeaBIOS] Some questions

2011-03-31 Thread Stefan Berger

On 02/28/2011 09:55 PM, Kevin O'Connor wrote:

On Fri, Feb 25, 2011 at 10:35:04AM -0500, Stefan Berger wrote:

On 11/25/2010 08:35 AM, Kevin O'Connor wrote:



This is due to the hierarchical nature of the functions. Also, while
for example B calls A, B fills a data structure (on the stack) that
it passes to A. A of course can get the same data structure from the
user calling the interrupt interface. So, by switching to 32 bit
mode and converting to 32 bit pointers early I could previously
avoid a lot of headaches with the segment registers in 16 bit mode
and reading the data from wherever they may be. Would you have any
concerns about switching to 32 bit mode early, so that the interrupt
handler and anything subsequent runs in 32 bit mode?

I can't say for sure what will make sense without seeing the code
first, but it sounds okay to me.

I posted the TPM patches yesterday on the Qemu mailing list. It may
take some time until TPM functionality becomes available in Qemu,
but would you be willing to review the BIOS extensions even without
being able to run them (for some time)? It's quite a chunk...

Hi Stefan,

Yes - please break the patch up into chunks and send it to the list.
I mailed them today to seabios@seabios.org but didn't see them coming 
back or showing up on the webpage. I cc'ed the Qemu mailing list and 
there they are.


  Stefan


Thanks,
-Kevin



___
SeaBIOS mailing list
SeaBIOS@seabios.org
http://www.seabios.org/mailman/listinfo/seabios


Re: [SeaBIOS] Some questions

2011-03-31 Thread Kevin O'Connor
On Wed, Mar 30, 2011 at 07:31:23PM -0400, Stefan Berger wrote:
 I mailed them today to seabios@seabios.org but didn't see them
 coming back or showing up on the webpage. I cc'ed the Qemu mailing
 list and there they are.
 
   Stefan

The mailing list had a blip yesterday - but it should be okay now.

-Kevin

___
SeaBIOS mailing list
SeaBIOS@seabios.org
http://www.seabios.org/mailman/listinfo/seabios


Re: [SeaBIOS] Some questions

2011-02-28 Thread Kevin O'Connor
On Fri, Feb 25, 2011 at 10:35:04AM -0500, Stefan Berger wrote:
 On 11/25/2010 08:35 AM, Kevin O'Connor wrote:
 
 
 This is due to the hierarchical nature of the functions. Also, while
 for example B calls A, B fills a data structure (on the stack) that
 it passes to A. A of course can get the same data structure from the
 user calling the interrupt interface. So, by switching to 32 bit
 mode and converting to 32 bit pointers early I could previously
 avoid a lot of headaches with the segment registers in 16 bit mode
 and reading the data from wherever they may be. Would you have any
 concerns about switching to 32 bit mode early, so that the interrupt
 handler and anything subsequent runs in 32 bit mode?
 I can't say for sure what will make sense without seeing the code
 first, but it sounds okay to me.
 I posted the TPM patches yesterday on the Qemu mailing list. It may
 take some time until TPM functionality becomes available in Qemu,
 but would you be willing to review the BIOS extensions even without
 being able to run them (for some time)? It's quite a chunk...

Hi Stefan,

Yes - please break the patch up into chunks and send it to the list.

Thanks,
-Kevin

___
SeaBIOS mailing list
SeaBIOS@seabios.org
http://www.seabios.org/mailman/listinfo/seabios


Re: [SeaBIOS] Some questions

2011-02-25 Thread Stefan Berger

On 11/25/2010 08:35 AM, Kevin O'Connor wrote:




This is due to the hierarchical nature of the functions. Also, while
for example B calls A, B fills a data structure (on the stack) that
it passes to A. A of course can get the same data structure from the
user calling the interrupt interface. So, by switching to 32 bit
mode and converting to 32 bit pointers early I could previously
avoid a lot of headaches with the segment registers in 16 bit mode
and reading the data from wherever they may be. Would you have any
concerns about switching to 32 bit mode early, so that the interrupt
handler and anything subsequent runs in 32 bit mode?

I can't say for sure what will make sense without seeing the code
first, but it sounds okay to me.
I posted the TPM patches yesterday on the Qemu mailing list. It may take 
some time until TPM functionality becomes available in Qemu, but would 
you be willing to review the BIOS extensions even without being able to 
run them (for some time)? It's quite a chunk...


   Stefan


___
SeaBIOS mailing list
SeaBIOS@seabios.org
http://www.seabios.org/mailman/listinfo/seabios