Re: [SeaBIOS] [PATCH] tsc: use kvmclock for calibration
On Fri, Aug 10, 2012 at 10:18:00AM +0300, Gleb Natapov wrote: can fix the in-kernel PIT issues with GRUB (see Michaels message) while testing. What message exactly? found it. -- Gleb. ___ SeaBIOS mailing list SeaBIOS@seabios.org http://www.seabios.org/mailman/listinfo/seabios
Re: [SeaBIOS] [PATCH] tsc: use kvmclock for calibration
Hi,
(1) Use this patch (with alignment issue fixed of course).
(2) Do a full kvmclock implementation. Feels a bit like overkill.
(3) SeaBIOS can fallback to the PIT for timing on machines which
have no TSC. We could do that too in case we detect kvm ...
What sort of timeouts are these? If seconds, maybe the rtc would be best.
I vote for 3 so nobody has to maintain kvmclock code in SeaBIOS and Gerd
can fix the in-kernel PIT issues with GRUB (see Michaels message) while
testing.
(2) turned out to be not too bad when taking a shortcut: Go through an
enable/disable cycle each time we read the clock, then just grab
system_time. Not that efficient, but should be ok for seabios. Usually
it checks the clock when sitting around idle, waiting for something to
happen. And it simplifies the implementation alot as we can just skip
all the tsc frequency delta calculations.
Draft patch attached. Comments?
cheers,
Gerd
From e42d62e90ae4b8a00413a0665d4022069154a516 Mon Sep 17 00:00:00 2001
From: Gerd Hoffmann kra...@redhat.com
Date: Thu, 9 Aug 2012 13:26:18 +0200
Subject: [PATCH] kvmclock clocksource
Signed-off-by: Gerd Hoffmann kra...@redhat.com
---
Makefile |4 +-
src/clock.c| 13 +++
src/paravirt.c | 65
src/paravirt.h |3 ++
4 files changed, 83 insertions(+), 2 deletions(-)
diff --git a/Makefile b/Makefile
index 72ee152..b692a96 100644
--- a/Makefile
+++ b/Makefile
@@ -13,11 +13,11 @@ SRCBOTH=misc.c stacks.c pmm.c output.c util.c block.c
floppy.c ata.c mouse.c \
pnpbios.c pirtable.c vgahooks.c ramdisk.c pcibios.c blockcmd.c \
usb.c usb-uhci.c usb-ohci.c usb-ehci.c usb-hid.c usb-msc.c \
virtio-ring.c virtio-pci.c virtio-blk.c virtio-scsi.c apm.c ahci.c \
-usb-uas.c lsi-scsi.c esp-scsi.c
+usb-uas.c lsi-scsi.c esp-scsi.c paravirt.c
SRC16=$(SRCBOTH) system.c disk.c font.c
SRC32FLAT=$(SRCBOTH) post.c shadow.c memmap.c coreboot.c boot.c \
acpi.c smm.c mptable.c smbios.c pciinit.c optionroms.c mtrr.c \
-lzmadecode.c bootsplash.c jpeg.c usb-hub.c paravirt.c \
+lzmadecode.c bootsplash.c jpeg.c usb-hub.c \
biostables.c xen.c bmp.c romfile.c
SRC32SEG=util.c output.c pci.c pcibios.c apm.c stacks.c
diff --git a/src/clock.c b/src/clock.c
index 69e9f17..15921fa 100644
--- a/src/clock.c
+++ b/src/clock.c
@@ -13,6 +13,7 @@
#include bregs.h // struct bregs
#include biosvar.h // GET_GLOBAL
#include usb-hid.h // usb_check_event
+#include paravirt.h // kvm clock
// RTC register flags
#define RTC_A_UIP 0x80
@@ -64,6 +65,7 @@
u32 cpu_khz VAR16VISIBLE;
u8 no_tsc VAR16VISIBLE;
+u8 use_kvmclock VAR16VISIBLE;
static void
calibrate_tsc(void)
@@ -80,6 +82,15 @@ calibrate_tsc(void)
return;
}
+if (kvm_para_available()) {
+u32 hz = kvmclock_init();
+if (hz != 0) {
+SET_GLOBAL(use_kvmclock, 1);
+SET_GLOBAL(cpu_khz, hz / 1000);
+return;
+}
+}
+
// Setup timer2
u8 orig = inb(PORT_PS2_CTRLB);
outb((orig ~PPCB_SPKR) | PPCB_T2GATE, PORT_PS2_CTRLB);
@@ -134,6 +145,8 @@ get_tsc(void)
{
if (unlikely(GET_GLOBAL(no_tsc)))
return emulate_tsc();
+if (unlikely(GET_GLOBAL(use_kvmclock)))
+return kvmclock_get();
return rdtscll();
}
diff --git a/src/paravirt.c b/src/paravirt.c
index 2a98d53..07aa926 100644
--- a/src/paravirt.c
+++ b/src/paravirt.c
@@ -12,6 +12,7 @@
#include ioport.h // outw
#include paravirt.h // qemu_cfg_port_probe
#include smbios.h // struct smbios_structure_header
+#include biosvar.h // GET_GLOBAL
int qemu_cfg_present;
@@ -346,3 +347,67 @@ void qemu_cfg_romfile_setup(void)
dprintf(3, Found fw_cfg file: %s (size=%d)\n, file-name,
file-size);
}
}
+
+#define KVM_CPUID_SIGNATURE 0x4000
+#define KVM_CPUID_FEATURES0x4001
+#define KVM_FEATURE_CLOCKSOURCE0
+#define KVM_FEATURE_CLOCKSOURCE2 3
+#define MSR_KVM_SYSTEM_TIME 0x12
+#define MSR_KVM_SYSTEM_TIME_NEW 0x4b564d01
+
+struct pvclock_vcpu_time_info {
+ u32 version;
+ u32 pad0;
+ u64 tsc_timestamp;
+ u64 system_time;
+ u32 tsc_to_system_mul;
+ s8tsc_shift;
+ u8flags;
+ u8pad[2];
+} PACKED;
+
+/* kvmclock system time runs with nanoseconds */
+#define KVM_SYSTIME_HZ 10
+
+u32 kvm_systime_msr VAR16VISIBLE;
+
+static void kvmclock_fetch(struct pvclock_vcpu_time_info *time)
+{
+u32 addr = (u32)MAKE_FLATPTR(GET_SEG(SS), time);
+u32 msr = GET_GLOBAL(kvm_systime_msr);
+
+memset(time, 0, sizeof(*time));
+wrmsr(msr, addr | 1);
+wrmsr(msr, 0);
+}
+
+u64 kvmclock_get(void)
+{
+struct pvclock_vcpu_time_info time;
+
+kvmclock_fetch(time);
+return time.system_time;
+}
+
+u32 kvmclock_init(void)
+{
+u32 eax, ebx, ecx, edx;
+struct pvclock_vcpu_time_info time;
+
+cpuid(KVM_CPUID_FEATURES, eax,
Re: [SeaBIOS] [PATCH v2 0/2] Add IPMI SMBIOS/ACPI support
On 08/08/2012 11:11 AM, miny...@acm.org wrote: I went ahead and kept the structure passing because I've added ACPI support. After thinking about it a while, I think if you have to pass anything to SMBIOS (like IPMI is present) you might as well pass the whole structure, and making things fixed in the BIOS that can change in the hardware doesn't seem like a good idea. Note that the acpi-element code might make building the SSDT table a little cleaner, if that is interesting. I haven't heard anything on this patch set. Any comments? -corey ___ SeaBIOS mailing list SeaBIOS@seabios.org http://www.seabios.org/mailman/listinfo/seabios
Re: [SeaBIOS] [PULL 0/1] update qemu seabios / seabios release?
Gerd Hoffmann kra...@redhat.com writes: Hi, This pull updates seabios in qemu to the latest bits from seabios master, so the upcoming 1.2 qemu release gets all the new shiny stuff added recently. I'd like to have a new seabios release for inclusion into qemu 1.2 which is planned for September 1st. So how about this plan: - merge seabios snapshot now (this pull req), so it gets testing in the qemu testing release candidates phase - put seabios into bugfixing freeze too (now or in a few days), fix any issues poping up in testing. - roll out seabios release by end of august, so it can be included into qemu 1.2 We really would need a SeaBIOS release by no later than August 21st to do this. The 1.2 release is on September 1st but we're in hard freeze starting on August 15th. I wouldn't want to make any changes later than the 21st. Regards, Anthony Liguori Anthony? Kevin? Fine are you ok with this? qemu release schedule is here: http://wiki.qemu.org/Planning/1.2 cheers, Gerd Gerd Hoffmann (1): update seabios to latest master pc-bios/bios.bin | Bin 131072 - 131072 bytes roms/seabios |2 +- 2 files changed, 1 insertions(+), 1 deletions(-) The following changes since commit 0b8db8fe15d17a529a5ea90614c11e9f031dfee8: slirp: fix build on mingw32 (2012-08-06 19:31:55 -0500) are available in the git repository at: git://git.kraxel.org/qemu seabios-5a02306 Gerd Hoffmann (1): update seabios to latest master pc-bios/bios.bin | Bin 131072 - 131072 bytes roms/seabios |2 +- 2 files changed, 1 insertions(+), 1 deletions(-) ___ SeaBIOS mailing list SeaBIOS@seabios.org http://www.seabios.org/mailman/listinfo/seabios ___ SeaBIOS mailing list SeaBIOS@seabios.org http://www.seabios.org/mailman/listinfo/seabios
Re: [SeaBIOS] How much RAM is required?
Markus Armbruster wrote: SeaBIOS requires a minimum of 1Meg of ram. I didn't even know one could request less than 1meg of ram from QEMU. I'll cook up a QEMU patch to give it at least that much. But QEMU may use other firmware/payload than SeaBIOS which might require less than 1 MB of RAM. Good point. I disagree actually. It is not an invalid point, but please optimize for the common case and let's deal with microscopic corner cases if they actually happen. Could SeaBIOS fail more cleanly when it detects insufficient RAM? What would you propose? //Peter ___ SeaBIOS mailing list SeaBIOS@seabios.org http://www.seabios.org/mailman/listinfo/seabios
Re: [SeaBIOS] How much RAM is required?
Fred . wrote: No, I am not. Ok, so there's only a hypothesis. But I believe QEMU does have the functionality to load an arbitrary firmware. So the firmware doesn't necessarily have to be SeaBIOS. As you may know the 8086 reset vector is at 1MB-16 so it will be really difficult to run a PC-like machine with less than 1MB of memory. I don't believe one has ever existed. Don't know if its possible to make QEMU use an UEFI or OpenFirmware image instead, or if such an image exists. Sure, but UEFI rather requires 1GB than 1MB. //Peter ___ SeaBIOS mailing list SeaBIOS@seabios.org http://www.seabios.org/mailman/listinfo/seabios
Re: [SeaBIOS] How much RAM is required?
Peter Stuge pe...@stuge.se writes: Markus Armbruster wrote: SeaBIOS requires a minimum of 1Meg of ram. I didn't even know one could request less than 1meg of ram from QEMU. I'll cook up a QEMU patch to give it at least that much. But QEMU may use other firmware/payload than SeaBIOS which might require less than 1 MB of RAM. Good point. I disagree actually. It is not an invalid point, but please optimize for the common case and let's deal with microscopic corner cases if they actually happen. Could SeaBIOS fail more cleanly when it detects insufficient RAM? What would you propose? Fail POST with panic(Not enough RAM)? Perfect score if can limit ourselves to just ROM, registers, and possibly CPU cache, but no RAM, before this check. It's been done elsewhere, but it may not be practical for us. If we can't, we merely reduce the need this much RAM to avoid silent failure limit to something pretty much any conceivable firmware will require. QEMU might be more willing to enforce such a low limit. Making it enforce 1MiB will be a hard sell, I'm afraid... ___ SeaBIOS mailing list SeaBIOS@seabios.org http://www.seabios.org/mailman/listinfo/seabios
Re: [SeaBIOS] How much RAM is required?
Some machines also have broken memory modules. So some computers have 0 byte RAM in that case. :D On Fri, Aug 10, 2012 at 5:28 PM, Markus Armbruster arm...@redhat.com wrote: Frediano Ziglio frediano.zig...@citrix.com writes: On Fri, 2012-08-10 at 16:24 +0200, Peter Stuge wrote: Fred . wrote: No, I am not. Ok, so there's only a hypothesis. But I believe QEMU does have the functionality to load an arbitrary firmware. So the firmware doesn't necessarily have to be SeaBIOS. As you may know the 8086 reset vector is at 1MB-16 so it will be really difficult to run a PC-like machine with less than 1MB of memory. I don't believe one has ever existed. I remember that my manual of the NEC V20 (a 8086 clone with 10 MHZ!) has settings for 256KB of RAM (jumpers of course!) The ROM was mapped (physically!) at f with extended ROM at e. According to Wikipedia, the original IBM PC was sold with as little as 16KiB RAM. IIRC, 64KiB BIOS ROM at the top of the 1MiB address space. http://en.wikipedia.org/wiki/IBM_PC [...] ___ SeaBIOS mailing list SeaBIOS@seabios.org http://www.seabios.org/mailman/listinfo/seabios ___ SeaBIOS mailing list SeaBIOS@seabios.org http://www.seabios.org/mailman/listinfo/seabios
Re: [SeaBIOS] How much RAM is required?
Fred . eldman...@gmail.com writes: On Fri, Aug 10, 2012 at 5:28 PM, Markus Armbruster arm...@redhat.com wrote: Frediano Ziglio frediano.zig...@citrix.com writes: On Fri, 2012-08-10 at 16:24 +0200, Peter Stuge wrote: Fred . wrote: No, I am not. Ok, so there's only a hypothesis. But I believe QEMU does have the functionality to load an arbitrary firmware. So the firmware doesn't necessarily have to be SeaBIOS. As you may know the 8086 reset vector is at 1MB-16 so it will be really difficult to run a PC-like machine with less than 1MB of memory. I don't believe one has ever existed. I remember that my manual of the NEC V20 (a 8086 clone with 10 MHZ!) has settings for 256KB of RAM (jumpers of course!) The ROM was mapped (physically!) at f with extended ROM at e. According to Wikipedia, the original IBM PC was sold with as little as 16KiB RAM. IIRC, 64KiB BIOS ROM at the top of the 1MiB address space. http://en.wikipedia.org/wiki/IBM_PC [...] Some machines also have broken memory modules. So some computers have 0 byte RAM in that case. :D Yup, be we *can* catch that in QEMU :) ___ SeaBIOS mailing list SeaBIOS@seabios.org http://www.seabios.org/mailman/listinfo/seabios
Re: [SeaBIOS] [PATCH] tsc: use kvmclock for calibration
On Fri, Aug 10, 2012 at 10:10:27AM +0200, Gerd Hoffmann wrote: Hi, (1) Use this patch (with alignment issue fixed of course). (2) Do a full kvmclock implementation. Feels a bit like overkill. (3) SeaBIOS can fallback to the PIT for timing on machines which have no TSC. We could do that too in case we detect kvm ... What sort of timeouts are these? If seconds, maybe the rtc would be best. I vote for 3 so nobody has to maintain kvmclock code in SeaBIOS and Gerd can fix the in-kernel PIT issues with GRUB (see Michaels message) while testing. (2) turned out to be not too bad when taking a shortcut: Go through an enable/disable cycle each time we read the clock, then just grab system_time. Not that efficient, but should be ok for seabios. Usually it checks the clock when sitting around idle, waiting for something to happen. And it simplifies the implementation alot as we can just skip all the tsc frequency delta calculations. Draft patch attached. Comments? Given the history of problems with kvmclock, would rather see it not being used for delays, if possible. Your shortcut gets rid of a class of problems, but there might be others (...). Isnt pmtimer ioport usable? 14MHz. Error handling in kvmclock_init is awkward. Thanks ___ SeaBIOS mailing list SeaBIOS@seabios.org http://www.seabios.org/mailman/listinfo/seabios
