Re: [SeaBIOS] [RFC] SeaBIOS v1.7.2.1 stable release
On 02/22/13 01:45, Kevin O'Connor wrote: There's been requests for a stable release. Here's a list of patches that have been requested / that I think would be useful: 616fb27f - Update tools/acpi_extract.py to handle iasl 20130117 release. 7cac600a - USB-EHCI: Fix null pointer assignment 4c405cbf - Fix Makefile - don't reference out/ directly, instead use $(OUT). 23219122 - build: Don't require $(OUT) to be a sub-directory of the main directory. bb0808a2 - Verify CC is valid during build tests. 555a2136 - seabios q35: Enable all PIRQn IRQs at startup b9490408 - seabios q35: Add new PCI slot to irq routing function dbb7a66f - seabios: Add a dummy PCI slot to irq mapping function Looks good to me. cheers, Gerd ___ SeaBIOS mailing list SeaBIOS@seabios.org http://www.seabios.org/mailman/listinfo/seabios
Re: [SeaBIOS] [edk2] [PATCH 0/8] OvmfPkg: reset-related changes
On Fri, 2013-02-22 at 04:23 +0100, Laszlo Ersek wrote:
Patches 1 to 6 upgrade the FADT to ACPI 2.0 and present the PIIX3
Reset Control Register in it.
Hm. I can still trigger the soft reset loop in SeaBIOS, but perhaps not
in a circumstance that we care about...
I've fixed Qemu to do the proper hard reset on 0xcf9 but not any other
reset method. I'm running with KVM on an old machine without
unrestricted guest support.
I've fixed SeaBIOS to look for the ACPI RESET_REG and use it, and that
part *works*... but SeaBIOS only *sees* the ACPI table when we boot a
legacy OS. If I boot an EFI OS and then do a soft reset via the keyboard
controller ('echo -en \\xfe | dd of=/dev/port bs=1 seek=$((0x64))'),
SeaBIOS hasn't seen the ACPI tables, still uses the keyboard controller
as its first choice of reset method, and still does its reset loop as
before.
Do we actually *care* about that? Do we expect any EFI OS to be doing a
keyboard reset instead of using ACPI or the runtime services Reset call?
If we've booted a legacy OS, it works fine. SeaBIOS gets invoked at
0x0 after a soft reset, uses the ACPI RESET_REG that it was given by
OVMF, and does a proper reset...
# echo -en \\xfe | dd of=/dev/port bs=1 seek=$((0x64))
Changing serial settings was 0/0 now 3/0
In resume (status=0)
In 32bit resume
Attempting a hard reboot
Using ACPI reset reg
rcr_write 6 (debug from qemu)
SecCoreStartupWithStack(0xFFFE6000, 0x8)
File-Type: 0xB
...
--
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Re: [SeaBIOS] [edk2] [PATCH 0/8] OvmfPkg: reset-related changes
On 02/22/13 15:55, David Woodhouse wrote:
On Fri, 2013-02-22 at 04:23 +0100, Laszlo Ersek wrote:
Patches 1 to 6 upgrade the FADT to ACPI 2.0 and present the PIIX3
Reset Control Register in it.
Hm. I can still trigger the soft reset loop in SeaBIOS, but perhaps not
in a circumstance that we care about...
I've fixed Qemu to do the proper hard reset on 0xcf9 but not any other
reset method. I'm running with KVM on an old machine without
unrestricted guest support.
I've fixed SeaBIOS to look for the ACPI RESET_REG and use it, and that
part *works*... but SeaBIOS only *sees* the ACPI table when we boot a
legacy OS. If I boot an EFI OS and then do a soft reset via the keyboard
controller ('echo -en \\xfe | dd of=/dev/port bs=1 seek=$((0x64))'),
SeaBIOS hasn't seen the ACPI tables, still uses the keyboard controller
as its first choice of reset method, and still does its reset loop as
before.
Do we actually *care* about that? Do we expect any EFI OS to be doing a
keyboard reset instead of using ACPI or the runtime services Reset call?
http://thread.gmane.org/gmane.comp.emulators.qemu/195351/focus=2169
If you evaluate the pseudo-code there with the input you described
above, I think we can conclude this is the KVM problem again, and that
we shouldn't care. When you actually *want* soft reset, there's nothing
qemu can do to cover up the problematic jump target that comes from the
first part of the pseudo-code.
Laszlo
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[SeaBIOS] [PATCH 2/4] Rename find_pmtimer() to find_acpi_features()
From: David Woodhouse david.woodho...@intel.com
I'm about to make it do more than just the pmtimer...
Signed-off-by: David Woodhouse david.woodho...@intel.com
---
src/acpi.c | 10 --
src/acpi.h | 2 +-
src/coreboot.c | 4 ++--
src/csm.c | 4 ++--
src/xen.c | 4 ++--
5 files changed, 11 insertions(+), 13 deletions(-)
diff --git a/src/acpi.c b/src/acpi.c
index c7177c3..36bd39a 100644
--- a/src/acpi.c
+++ b/src/acpi.c
@@ -925,15 +925,13 @@ find_resume_vector(void)
}
void
-find_pmtimer(void)
+find_acpi_features(void)
{
struct fadt_descriptor_rev1 *fadt = find_fadt();
if (!fadt)
return;
-u32 pm_tmr = fadt-pm_tmr_blk;
+u32 pm_tmr = le32_to_cpu(fadt-pm_tmr_blk);
dprintf(4, pm_tmr_blk=%x\n, pm_tmr);
-if (!pm_tmr)
-return;
-
-pmtimer_setup(pm_tmr, 3579);
+if (pm_tmr)
+pmtimer_setup(pm_tmr, 3579);
}
diff --git a/src/acpi.h b/src/acpi.h
index e52470e..b23717a 100644
--- a/src/acpi.h
+++ b/src/acpi.h
@@ -5,7 +5,7 @@
void acpi_setup(void);
u32 find_resume_vector(void);
-void find_pmtimer(void);
+void find_acpi_features(void);
#define RSDP_SIGNATURE 0x2052545020445352LL // RSD PTR
diff --git a/src/coreboot.c b/src/coreboot.c
index f0484e1..c9ad2a8 100644
--- a/src/coreboot.c
+++ b/src/coreboot.c
@@ -12,7 +12,7 @@
#include boot.h // boot_add_cbfs
#include disk.h // MAXDESCSIZE
#include config.h // CONFIG_*
-#include acpi.h // find_pmtimer
+#include acpi.h // find_acpi_features
#include pci.h // pci_probe_devices
@@ -214,7 +214,7 @@ coreboot_platform_setup(void)
scan_tables(m-start, m-size);
}
-find_pmtimer();
+find_acpi_features();
}
diff --git a/src/csm.c b/src/csm.c
index 68f8830..4336e16 100644
--- a/src/csm.c
+++ b/src/csm.c
@@ -146,12 +146,12 @@ handle_csm_0002(struct bregs *regs)
dprintf(3, CSM PIRQ table at %p\n, PirAddr);
}
-// For find_resume_vector()... and find_pmtimer()
+// For find_resume_vector()... and find_acpi_features()
if (csm_rsdp.signature == RSDP_SIGNATURE) {
RsdpAddr = csm_rsdp;
dprintf(3, CSM ACPI RSDP at %p\n, RsdpAddr);
-find_pmtimer();
+find_acpi_features();
}
// SMBIOS table needs to be copied into the f-seg
diff --git a/src/xen.c b/src/xen.c
index db542c3..5dfee9e 100644
--- a/src/xen.c
+++ b/src/xen.c
@@ -10,7 +10,7 @@
#include memmap.h // add_e820
#include types.h // ASM32FLAT
#include util.h // copy_acpi_rsdp
-#include acpi.h // find_pmtimer
+#include acpi.h // find_acpi_features
#define INFO_PHYSICAL_ADDRESS 0x1000
@@ -125,7 +125,7 @@ void xen_biostable_setup(void)
for (i=0; iinfo-tables_nr; i++)
copy_table(tables[i]);
-find_pmtimer();
+find_acpi_features();
}
void xen_ramsize_preinit(void)
--
1.8.1.2
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[SeaBIOS] [PATCH 1/4] Fix return type of le64_to_cpu() and be64_to_cpu()
From: David Woodhouse david.woodho...@intel.com
Signed-off-by: David Woodhouse david.woodho...@intel.com
---
src/byteorder.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/byteorder.h b/src/byteorder.h
index 5a8a64a..7362aeb 100644
--- a/src/byteorder.h
+++ b/src/byteorder.h
@@ -43,7 +43,7 @@ static inline u16 le16_to_cpu(u16 x) {
static inline u32 le32_to_cpu(u32 x) {
return x;
}
-static inline u32 le64_to_cpu(u64 x) {
+static inline u64 le64_to_cpu(u64 x) {
return x;
}
@@ -62,7 +62,7 @@ static inline u16 be16_to_cpu(u16 x) {
static inline u32 be32_to_cpu(u32 x) {
return swab32(x);
}
-static inline u32 be64_to_cpu(u64 x) {
+static inline u64 be64_to_cpu(u64 x) {
return swab64(x);
}
--
1.8.1.2
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[SeaBIOS] [PATCH 3/4] Add acpi_reboot() reset method using RESET_REG
From: David Woodhouse david.woodho...@intel.com
Signed-off-by: David Woodhouse david.woodho...@intel.com
---
src/acpi.c | 58 +++---
src/acpi.h | 14 ++
src/resume.c | 3 +++
3 files changed, 64 insertions(+), 11 deletions(-)
diff --git a/src/acpi.c b/src/acpi.c
index 36bd39a..195dc88 100644
--- a/src/acpi.c
+++ b/src/acpi.c
@@ -151,17 +151,6 @@ struct madt_local_nmi {
/*
- * ACPI 2.0 Generic Address Space definition.
- */
-struct acpi_20_generic_address {
-u8 address_space_id;
-u8 register_bit_width;
-u8 register_bit_offset;
-u8 reserved;
-u64 address;
-} PACKED;
-
-/*
* HPET Description Table
*/
struct acpi_20_hpet {
@@ -934,4 +923,51 @@ find_acpi_features(void)
dprintf(4, pm_tmr_blk=%x\n, pm_tmr);
if (pm_tmr)
pmtimer_setup(pm_tmr, 3579);
+
+// Theoretically we should check the 'reset_reg_sup' flag, but Windows
+// doesn't and thus nobody seems to *set* it. If the table is large enough
+// to include it, let the sanity checks in acpi_set_reset_reg() suffice.
+if (fadt-length = 129) {
+void *p = fadt;
+acpi_set_reset_reg(p + 116, *(u8 *)(p + 128));
+}
+}
+
+static struct acpi_20_generic_address acpi_reset_reg;
+static u8 acpi_reset_val;
+
+void
+acpi_reboot(void)
+{
+// Check it passed the sanity checks in acpi_set_reset_reg() and was set
+if (acpi_reset_reg.register_bit_width != 8)
+return;
+
+u64 addr = le64_to_cpu(acpi_reset_reg.address);
+
+dprintf(1, ACPI hard reset %d:%llx (%x)\n,
+acpi_reset_reg.address_space_id, addr, acpi_reset_val);
+
+switch (acpi_reset_reg.address_space_id) {
+case 0: // System Memory
+ writeb((void *)(u32)addr, acpi_reset_val);
+break;
+case 1: // System I/O
+outb(acpi_reset_val, addr);
+break;
+case 2: // PCI config space
+pci_config_writeb(acpi_ga_to_bdf(addr), addr 0x, acpi_reset_val);
+break;
+}
+}
+
+void
+acpi_set_reset_reg(struct acpi_20_generic_address *reg, u8 val)
+{
+if (!reg || reg-address_space_id 2 ||
+reg-register_bit_width != 8 || reg-register_bit_offset)
+return;
+
+acpi_reset_reg = *reg;
+acpi_reset_val = val;
}
diff --git a/src/acpi.h b/src/acpi.h
index b23717a..6289953 100644
--- a/src/acpi.h
+++ b/src/acpi.h
@@ -3,9 +3,23 @@
#include types.h // u32
+/*
+ * ACPI 2.0 Generic Address Space definition.
+ */
+struct acpi_20_generic_address {
+u8 address_space_id;
+u8 register_bit_width;
+u8 register_bit_offset;
+u8 reserved;
+u64 address;
+} PACKED;
+#define acpi_ga_to_bdf(addr) pci_to_bdf(0, (addr 32) 0x, (addr 16)
0x)
+
void acpi_setup(void);
u32 find_resume_vector(void);
void find_acpi_features(void);
+void acpi_set_reset_reg(struct acpi_20_generic_address *reg, u8 val);
+void acpi_reboot(void);
#define RSDP_SIGNATURE 0x2052545020445352LL // RSD PTR
diff --git a/src/resume.c b/src/resume.c
index b30d62e..784abac 100644
--- a/src/resume.c
+++ b/src/resume.c
@@ -132,6 +132,9 @@ tryReboot(void)
// Setup for reset on qemu.
qemu_prep_reset();
+// Reboot using ACPI RESET_REG
+acpi_reboot();
+
// Try keyboard controller reboot.
i8042_reboot();
--
1.8.1.2
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[SeaBIOS] [PATCH 4/4] Try pci_reboot() before i8042_reboot()
From: David Woodhouse david.woodho...@intel.com The so-called PCI reboot at 0xCF9 is supposed to be a hard reset, while the keyboard controller is only a soft reset. So try pci_reboot() first. Signed-off-by: David Woodhouse david.woodho...@intel.com --- src/resume.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/resume.c b/src/resume.c index 784abac..97e20b6 100644 --- a/src/resume.c +++ b/src/resume.c @@ -135,12 +135,12 @@ tryReboot(void) // Reboot using ACPI RESET_REG acpi_reboot(); -// Try keyboard controller reboot. -i8042_reboot(); - // Try PCI 0xcf9 reboot pci_reboot(); +// Try keyboard controller reboot. +i8042_reboot(); + // Try triple fault asm volatile(int3); -- 1.8.1.2 ___ SeaBIOS mailing list SeaBIOS@seabios.org http://www.seabios.org/mailman/listinfo/seabios
Re: [SeaBIOS] [PATCH] Add acpi_reboot() function for invoking ACPI reset
On Tue, 2013-02-19 at 20:09 -0500, Kevin O'Connor wrote: Looks okay to me. I'd like to see the follow up patches that make use of it before committing though. Sent. With Qemu fixed to actually *do* a hard reset, and OVMF fixed to pass in ACPI 2.0 tables with a RESET_REG filled in (thanks, Laszlo), this fixes the endless loop of soft resets. -- dwmw2 smime.p7s Description: S/MIME cryptographic signature ___ SeaBIOS mailing list SeaBIOS@seabios.org http://www.seabios.org/mailman/listinfo/seabios
