Re: [Simh] VMS 1.5 installable?

[Sergey Oboguev]

There is a file vax_cmode.c.

  From: John Forecast 
 To: simh  
 Sent: Tuesday, October 17, 2017 1:27 PM
 Subject: Re: [Simh] VMS 1.5 installable?
   
 
I don’t think you’ll be able to get early versions of VMS running on SIMH. A 
lot (almost all?) of the utilities run in PDP-11 compatibility mode  which, as 
far as I can see, is not supported by the 11/780 emulator.

  John.




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Re: [Simh] New simulator - VAX-11/782

[Sergey Oboguev]

Matt Burke  wrote:

> I probably should have researched memory barriers a bit more. 
> I knew a little bit about them but wasn't sure if they were needed here. 
> The problem may also exist for the rest of the shared memory.

For the purposes of running VMS, what really and ultimately matters is not what 
actual 78x hardware does, but what VMS expects it to do. And this latter bit 
can be learned from VMS sources, even if we do not have (and may be unable to 
obtain) sufficient knowledge about the hardware. 

Precise understanding of VMS expectations would require a more thorough look 
into VMS sources than I could have until now, however my hunch is that VMS 
desires are a subset of a stronger general statement: 

[SS:] "When VCPU1 and VCPU2 [in a shared-memory or cache-coherent 
multiprocessor] communicate via an IPI from VCPU1 to VCPU2, VCPU1 [most often] 
wants to pass its view of memory to VCPU2".

VMS may quite possibly expect less than that, however we do not (yet) know 
exactly what... it might take a night or more with the listings to understand 
the code well enough to figure this out exactly. (Comments in the code next to 
BBSSI/BBCCI instructions suggest that VMS uses them purposefully to flush and 
control the cache "manually"... hence my questions in the previous message.)

Also this "less" might turn out to be more difficult to implement in practice 
than (both stronger but comparatively simpler) SS.

My *hunch* however is that if SS were in place, VMS will most likely be happy 
with it. There is a slim chance this might prove wrong, only code reading might 
tell, but I think this chance is pretty slim... I'd place money on it. Thus 
assuming it for now:

SS is easy to implement. There is a flag that CPU1 sets and CPU2 reads, to pass 
an IPI. If this flag is protected by a lock both on read and write sides, this 
would ensure SS, since locking primitives issue memory barriers (and compiler 
barriers as well -- another important thing to have in mind).

Right now ipc_send_int uses ipc_lock/ipc_unlock but ipc_poll_int does not. If 
ipc_poll_int used locking (matching one in ipc_send_int), that would provide 
memory barriers (along with compiler barriers) and provide SS.

Alternatively, it is possible to insert WMB (or full MB) primitive into 
ipc_send_int before setting an IPI flag, and insert a RMB (or full MB) 
primitive in ipc_poll_int after reading the flag, but these are 
platform-specific. (RMB and WMB designations here also imply compiler barrier 
included, on both sides of a hardware barrier). VAX MP out of necessity has an 
implementation for smp_rmb() and smp_wmb() that also include compiler barrier 
(barrier(), COMPILER_BARRIER), but you do not really want to get into this host 
platform specific (and for X86, also host CPU model specific and bitness 
specific) mess unless really necessary... and for 782 it is really not. Using 
locks is a much neater solution for 782 purposes, I think.___
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Re: [Simh] Problem with MT_ASTLVL on the VAX-11/780

[Sergey Oboguev]

Matt Burke  wrote:

> Whilst experimenting with a new device on VAX/VMS V4.5 I got a fatal
> bugcheck (exception whilst above ASTDEL). The problem turned out the be
> a reserved operand fault and I traced it back to the following code
> (shown here from the VMS 3.0 source listings):
> 
> MOVL    PCB$L_PHD(R0),R0    ; Get PHD address
> MOVB    PHD$B_ASTLVL(R0),R0    ; And fetch ASTLVL
> MTPR    R0,#PR$_ASTLVL  ; Update current value

FWIW, the sequence does not appear to be present in 3.7-dev, 4.0 or 7.3 sources.

(For 3.x and 4.x I checked only ASTDEL, not ASMP code -- speaking on which, 
would not it be fun to emulate 11/782 or 11/784?)

Is this exact sequence actually indicated by the instruction trace when running 
4.5?

Thanks,Sergey
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Re: [Simh] Adding storage to vax running 4.3BSD

[Sergey Oboguev]

 Johnny Billquist wrote: 
> Well, MSCP was a good solution, and it's rather funny to now watch SATA 
> and SAS, which is almost a carbon copy of MSCP and DSI, but 20 years later.

Unless I am mistaken, SCSI (at least in the form of SASI) preceded MSCP 
chronologically and perhaps inspired the latter.
SAS thus would have no need for MSCP as an intellectual ancestor, although for 
sure technologies of the same field, such as storage technologies, mutually 
inform each other in the course of their development.
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Re: [Simh] DECserver (terminal server) emulation?

[Sergey Oboguev]

>> The MOP server that exists for Unix systems ... only supports booting.


> What else do you need?  MOP doesn't do much more than that

Academically speaking, MOP also provides remote control, counters, memory dump, 
loopback testing.Whether any of this is "needed" is a matter of taste of course 
(just like virtually all retro-computing is).
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Re: [Simh] VAX 8200

[Sergey Oboguev]

> Robert Armstrong  wrote:
> I have a running 8350 [...] I've always wondered if the limitation to two 
> CPUs was purely for testing and support reasons - 
> it doesn't seem that there's any reason why you could not plug in three or 
> even more CPU cards.
By the way of the anecdotes, Bernd Ulmann who owns a huge (likely the largest 
in the world by now) collection of VAX/Alpha equipment (a shed filled with  
various models of VAXes, including 7000, 6000 vector, 8000 series, MicroVAXes, 
VAXstations, HSCs, star couplers, RA disks, you name it), including the 
machines that were never released or were released in a singular quantities 
(like 32-processor Alpha), owns VAX 8330 (?) -- or anyway a 3-CPU 8000 series 
machine.

The machine was being designed by DEC Germany, and was intended to be a 
3-processor edition.
However it was generating spurious bus resets and DEC engineering was never 
able to figure why.
Thus the machine was never releases commercially and the only engineering 
sample had been sitting for a good while in DEC/Compaq engineering storage 
before being dumped to Bernd's collection.

* * *

I also cannot help but remember the other story Bernd had, about that 
32-processor Alpha. It was special-ordered by some German company, but while 
Compaq Germany was being putting it together, the company that ordered the 
machine went out of business. So Compaq held the machine for a while but 
several years later dumped it to Bernd as well. When I was visiting Bernd some 
years ago, he still never turned the machine on (unlike most of the others in 
his collection), since the power draw would put the lights out in the whole 
village where the shed resides... he was still figuring out the power feed.

* * *

And then, my favorite of Bernd's tales, is about the machine that had the most 
exotic fate: it was a MicroVAX III that was being shipped from the Western 
Germany to the USSR in the late 1980's, and German customs intercepted the 
shipping (infrequently, but occasionally they would succeeded in that). While 
German authorities were trying to figure out what to do with the intercepted 
shipping, the customs put it in the warehouse, where it sat for the next 20 
years. In the late 2000's German customs noticed that this box had been sitting 
there for 20 years, and it was apparently the time to do something about it 
after all. The box ended up at Bernd's barn. Bernd opened it, powered up this 
MicroVAX and installed VMS on it -- it worked flawlessly.

Few months after learning this story from Bernd (he told it to me while 
pointing at that MicroVAX) I was at my old VAXcluster room about 2 hours from 
Moscow (machines were long gone by then), taking out the old tapes -- in the 
hopes of finding some retro-interesting software/files there. My friend and I 
took select tapes from the storage shelves down to the building entrance, but 
we needed to transport them to another building on site located a mile away, 
where the tapes could be kept temporarily before smuggling them out beyond the 
secure perimeter. Tapes were bulky and heavy, and carrying them this distance 
would have been quite an exercise, so my friend called his colleague, who had a 
car pass to the site. His colleague came in the car, and while we were loading 
the tapes into the trunk, he looked at those tapes recorded 20 to 25 years ago 
and said:

– I kind of doubt you'll be able to read them.

In response I told him a story about Bernd's MicroVAX that sat for 20 years in 
the box and then worked just fine.

To which my friend's colleague responded with an instinctive exclamation, 
without an instant of thinking:

– Of course! What could have ever happened to it?! It's a VAX!___
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Re: [Simh] HSC vs UDA/QDA

[Sergey Oboguev]

And then of course, if someone wants a true emulation, then A and B paths 
should be running on separate Ethernet rails. ;-)


  From: Paul Koning 
 To: Johnny Billquist  
Cc: simh@trailing-edge.com
 Sent: Wednesday, March 8, 2017 5:26 PM
 Subject: Re: [Simh] HSC vs UDA/QDA
   

> On Mar 8, 2017, at 7:44 PM, Johnny Billquist  wrote:
> 
> On 2017-03-08 22:15, Bob Supnik wrote:
>> The HSC family offered a superset of capabilities compared to the
>> UDA50/QDA50. In particular,
>> 
>> - tape as well as disk support (TMSCP as well as MSCP);
>> - controller-based disk to tape backups and tape to disk restores;
>> - controller-based disk to disk duplication;
>> - controller-based volume shadowing (RAID 1).
>> 
>> UDA50/QDA50 did not support tape drives, disk duplication, or
>> controller-based volume shadowing.
>> 
>> HSC supported some data caching; UDA50/QDA50 did not.
> 
> Oh. I didnät mean to imply that the HSC was just the same as an UDA. But the 
> MSCP protocol as such is the same between them. Shadowing, local disk 
> copying, caching and so on, are just things a controller can do without the 
> host are even aware of it happening.
> But since we're talking emulation, the actual disks now might be doing even 
> more of that than an HSC ever could. It's not really something that makes 
> much sense to emulate.

I think the significant different for emulation, as opposed for the real 
hardware, is that CI is a multi-access network (like Ethernet).  All the hosts 
can see all the disks, and in addition the hosts have peer to peer 
communication.  VAXclusters use both of these things.  You can of course do 
them via LAVC (same services but over Ethernet).  With CI emulation you get a 
second way.  That enables running clusters with VMS versions predating LAVC, if 
that is interesting to anyone.

    paul


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Re: [Simh] VAX vectors

[Sergey Oboguev]

Bob Supnik bob at supnik.org:

 Bolting on vectors to the existing 3900 would not be all that hard, 
 because the core floating point routines are available, but it would be 
 another never existed in the real world hybrid. That's already been 
 done once, when the 3900's memory capacity was extended to 512MB


Not to mention the ungodly 32-processor MicroVAX 3900. ;-)A monster in the dark 
with glowing red eyes.

* * *

Curiously enough though, there were rumors about the existence of a 
64-processor VAX.

Some of these relate to VAX M31 (codenamed Andromeda) 

http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=4859
http://ieeexplore.ieee.org/search/searchresult.jsp?queryText=vax%20m31newsearch=true

which was supposed to be expandable up to 64 processors, but as net rumors say, 
has actually grown up to 32-way machine only.
I vaguely recall however seeing somewhere (at comp.os.vms?) a comment by Steve 
Lionel about him working with parallel algorithms on a 64-processor VAX SMP 
machine (running custom OS), and VMS people coming down from the East coast to 
test the stability of VMS on it, whatever this means (e.g. perhaps partitioned 
down to 32 processors, or running custom kernel able to handle 64 CPUs ?).

My memory of this comment are dim and I may well mis-remember the particulars, 
however VAX/VMS 7.3 does actually run fine on 32 processors (scalability issues 
aside), except for the bug in the MONITOR utility making it able to pick up 
only the first 31 processors in its screens.

http://oboguev.net/vax_mp/screen-39320.html   ___
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Re: [Simh] Missing (VAX) documents

[Sergey Oboguev]

From: Bob Supnik b...@supnik.org

 a lot of that  failed to survive the DEC to Compaq and Compaq to HP 
 transitions, 
 as well as the various archival media transitions.

Do you know per chance if HP ever managed to recover VAXELN sources?  ___
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Re: [Simh] Regarding Cutler THE father of VMS myth

[Sergey Oboguev]

 From: Henk Gooijen henk.gooi...@hotmail.com
 up and down is not the best translation for P/V operation.
 P stands for the Dutch word passeer which roughly translates to pass.
 V stands for the Dutch word verhoog and that should be translated to 
 increment.

The history of early efforts in synchronization is fascinating.

Another fascinating piece along the same lines is a comment at Lamport's web 
page to one of his articles relating that when Alpha was being designed, the 
designers came to Lamport and asked if he can optimize his synchronization 
algorithm so that Alpha can get by with having no interlocked instructions (low 
contention was considered to be the primary use case)... and Lamport did, but 
even the optimized version of the algorithm was still deemed expensive, so 
Alpha team designed LL/SC into the processor.

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Re: [Simh] Simulating the PDP-15/76 Unichannel

[Sergey Oboguev]

 From: E. Groenenberg qua...@xs4all.nl

 Any current  reasonably seasoned Unix or derivative has shmat()  shmdt()
 (or equivalent) calls for attaching  detaching a segment of a given size.

 Also MS$ has this
 [...]
 so a common API for SIMH would be fairly easy.

[ ...]

 With this feature, it would probably also easy to realize a PDP-11/74
 with 4 instances of SIMH.

Mapping shared memory segment into the address spaces of multiple SIMH
instances is the straightforward part.

More intricate parts are:

1) Mapping guest memory-consistency model to host memory-consistency model.

Does legacy software expect to observe updates to the shared memory executed
by simulated VCPU1 (or virtual IO processor) to become observable by VCPU2
in the same order they were executed by VCPU1? If yes, this would not work
(without special handling by the simulator) on modern machines with weaker
memory-consistency model.

What is the cache coherency protocol of the simulated system and how does it
map to the host system?

Does simulated system have any system events (such as inter-processor
interrupts or IO completion) that affect cache synchronization between VCPUs
or VCPUs/VIOPs, and if yes, how this is to be mapped to the simulator?

Ultimately it all depends on exact actual synchronization patterns utilized
by legacy software.

2) Mapping memory atomicity.

Does host machine provide the same memory access atomicity and separability
as the simulated machine? For instance, if a simulated machine provides a way
to update a byte at address A without interfering with concurrent updates to
bytes at A-1 and A+1 by other VCPUs, then this would take a special effort
to be implemented on a host machine that has let us say a 4-byte word as
the minimum separable unit. Ditto for atomic and separable 2-byte word
accesses (atomicity would mean that concurrent writes to the word do not
result in resultant bytes values coming from different writes,
separability would mean that concurrent writes to neighbor words do not
interfere with each other).

3) Does a simulated system have any synchronization facilities such as
interlocked instructions or machine-specific registers that affect cache
coherency?

4) Mapping execution model.

What happens if a host system thread simulating the execution of VCPU1 (or
virtual IO processor) gets preempted, while VCPU2 is waiting for a response
from VCPU1? Does the simulated system (specifically, its legacy software)
rely on finite timeouts?
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Re: [Simh] Simulating the PDP-15/76 Unichannel

[Sergey Oboguev]

Unless I misread Mark's message about the RQDX3 analogy, he is suggesting to 
put PDP-15 and PDP-11 in the same SIMH thread and in the same address space. 
When PDP-11 side becomes non-idle, it can signal an event and become eligible 
for execution, in a way similar to RQDX3. The options for co-execution with 
PDP-15 side in this structure are:

1) Execute PDP-11 exclusively until it enters idle state, then resume PDP-15 
execution until PDP-11 becomes non-idle again.(This directly mirrors RQDX3 
analogy).

2) Probably a better option (albeit dissimilar with RQDX3): co-execute PDP-11 
and PDP-15 instruction streams on the same SIMH thread. I.e. execute of chunk 
of N instructions on PDP-15 side, then execute N (or M) instructions on PDP-11 
side, then come back to PDP-15 main loop etc., and repeat this alternating 
execution of per-CPU main loops until one of the sides becomes idle, at which 
point the other side receives 100% share unless it becomes idle too.

One disadvantage of this approach is namespace conflicts.
But perhaps this can be addressed by restructuring SIMH build into 
machine-independent part and machine-specific parts, with machine-specific 
parts going to respective machine-specific DLLs/DSOs, with names local to 
specific CPUs not exported from these DLLs/DSOs and thus not colliding.
A complication might be that while machine-independent part code may be shared, 
but some machine-independent data perhaps might be not (for instance the event 
queue may have the same logical structure for both sides, but either a separate 
instance of this structure is needed for each side, or resets etc. need to be 
handled in a more delicate and involved way taking into account which side is 
resetting -- so the required reorg may be deeper than at the first glance).

The other disadvantage is that it does not leverage host multi-CPU resources.
That's assuming computational performance matters at all.

Yet the other disadvantage is the issues with calibrating VCPU speed.
As the calibration now becomes significantly distorted by the co-executing 
CPU(s) going in and out of idle state in a rapidly varying pattern.

Yet another disadvantage is that by default the consoles of two systems get 
mapped to the same host window, rather than being split, as they probably were 
in real life.

Yet another disadvantage is a complication of the codebase to implement the 
mentioned reorgs or offset for them.

The advantage is that it takes inter-thread synchronization issues out, 
includingmemory coherence issues and timing issues.
But those may be not that great after all.


- Original Message -
From: Christian Gauger-Cosgrove captainkirk...@gmail.com
To: Mark Pizzolato - Info Comm m...@infocomm.com
Cc: simh@trailing-edge.com simh@trailing-edge.com
Sent: Tuesday, March 17, 2015 6:58 PM
Subject: Re: [Simh] Simulating the PDP-15/76 Unichannel

On 17 March 2015 at 21:41, Mark Pizzolato - Info Comm m...@infocomm.com wrote:
 Wasn't the RQDX3's processor a member of the PDP11 family?  We don't try to 
 execute the RQDX3 firmware, but we merely have a device simulator that 
 communicates across the bus just as the RQDX3 did.  Would an approach make 
 sense that implemented the PIREX behaviors in a DR15 simulation (possibly, 
 internally talking to the various UNIBUS device simulations)?

 Just a wild idea...

I mentioned that back on the GitHub discussion (just to plug it again:
https://github.com/simh/simh/issues/96). The PDP-11 side of things
does more than just run PIREX and respond to requests. The PDP-11 also
runs the SPOL11 spooler package, and you can run custom MACRO-11
programs on the '11 loaded and started by the '15.

Really the best way is to find some way of making the simulators talk
to each other. Plus, that framework can be expanded towards other
examples. (KL10 and PDP-11/74, being the ones off the top of my head.)


Regards,
Christian
-- 
Christian M. Gauger-Cosgrove
STCKON08DS0
Contact information available upon request.



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Re: [Simh] Regarding Cutler THE father of VMS myth

[Sergey Oboguev]

 Johnny Billquist b...@softjar.se wrote:

 One thing Cutler did, which you do not find in the predecessors are ACPs.

If so, he may have a claim to inventing (a hint at) a microkernel concept. ;-)

Ironically, while ACPs made a lot of sense in a PDP-11 world due to the 
constraints in address space and kernel memory size, but rolling ACP idea over 
to VMS was much less productive (since these constraints were gone), and 
eventually F11 ACP was replaced with in-process XQP.

I am wondering though if FUSE developers ever heard of ACPs or reinvented the 
concept from scratch.
At least http://en.wikipedia.org/wiki/Filesystem_in_Userspace
claims that The idea of a filesystem driver living in userspace was originally 
developed in 1995.

It is also curious that ACPs (whether in traditional form or XQP form) allowed 
to do one thing that Unix/Linux interface still does not -- opening files as an 
asynchronous operation -- but ironically the chief utility of this capability 
is mainly for web servers which were not invented back then yet.

P.S. To come think of it, my very first project as a salaried software 
developer (more akin to commercial enterprise of Tom Sawyer in fence painting 
business) at ca. 1984 involved writing an ACP-like structure... not for a file 
system, but for a graphics card, on RSX.
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Re: [Simh] Regarding Cutler THE father of VMS myth

[Sergey Oboguev]

 From: Andreas Davour a...@update.uu.se


 what is the Showstopper?

A belletristic account of Windows NT development history.

Showstopper is the dramatic, inside story of the creation of Windows NT, told 
by Wall Street Journal reporter G. Pascal Zachary. Driven by the legendary 
Bruce [sic!] Cutler, a picked band of software engineers sacrifices almost 
everything in their lives to build a new, stable, operating system aimed at 
giving Microsoft a platform for growth through the next decade of development 
in the computing business. Comparable in many ways to the Pulitzer 
Prize-winning book The Soul of a New Machine by Tracy Kidder, Showstopper gets 
deep inside the process of software development, the lives and motivations of 
coders and the pressure to succeed coupled with the drive for originality and 
perfection that can pull a diverse team together to create a program consisting 
of many hundreds of thousands of lines of code.

http://www.amazon.com/Showstopper-Breakneck-Windows-Generation-Microsoft/dp/1497638836

In all fairness, in the text of the book they actually got Cutler's name right.

G. Pascal Zachary is a journalist, author, and teacher. He spent thirteen 
years as a senior writer for the Wall Street Journal (1989 to 2001) [...] 
Zachary concentrates on African affairs. He also writes on globalization, 
America's role in world affairs, immigration, race and identity, and the 
dysfunctionalities and divisions in US society.

Some undoubtedly would argue that Windows must be falling into 
dysfunctionalities and divisions in US society.
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Re: [Simh] Regarding Cutler THE father of VMS myth

[Sergey Oboguev]

 From: Bill Cunningham bill...@suddenlink.net

 I've always heard Dave Cutler given full credit 
 for RSX. I know he designed NTFS.

If you imply NT file system, then the history of NTFS development is described
at some length in the Showstopper. According to this description NTFS was one
of the aspects of NT Cutler did not partake in.

NTFS had other developers:

http://en.wikipedia.org/wiki/NTFS#Developers
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Re: [Simh] Regarding Cutler THE father of VMS myth

[Sergey Oboguev]

 From: Clem Cole cl...@ccc.com


 While I think it bug Dave and others that people did not like his 
 favorite system ...

The New Hacker's Dictionary, MIT Press, 3rd edition:

Many Unix fans generously concede that VMS would probably be the
hacker's favorite commercial OS if Unix didn't exist; though true,
this makes VMS fans furious.  ;-)

 Unix has been able to embrace the ideas easily and I do not think
 that would have been easy with VMS

It would not, which makes it even more curious that there was a pilot
effort at reimplementation of VMS on top of Mach.

http://dl.acm.org/citation.cfm?id=964616
http://dl.acm.org/citation.cfm?id=692228
http://www.sture.ch/vms/Usenix_VMS-on-Mach.pdf

 They wrote Mica in C++ (warped a bit to look like PL/1 IMO)

Was not it supposed to be in Pillar (kind of Pascal++)?
Or was Pillar abandoned or relegated to some other role?

http://www.textfiles.com/bitsavers/pdf/dec/prism/mica/Pillar_Language_Specification_Nov88.pdf

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Re: [Simh] Getting rsxs to run on the pdp11 emulator

[Sergey Oboguev]

There is a couple of publicly accessible system running RSX-11M+.

***

The first one I know of is located in Novosibirsk and runs 
RSX-11M-PLUS V4.6 BL87.

Some days it is executed by SimH, other days by Ersatz-11.

To access,
telnet rsx.pdp-11.org.ru

Then log in as
HEL GUEST/  (note the slash before empty password field)

Web page (in Russian): 
http://pdp-11.org.ru/~form/ctakah.html

To get an account or for other inquiries contact supp...@pdp-11.org.ru.

Login screen reports the date as 4-MAR-15, so the system must be Y2K aware
at least to the extent of mostly running.

***

Another one is hosted in IL, but the owner seems to be in MA.

http://www.dbit.com

telnet rsx.dbit.com

Specifically, if you want to plug your old dusty Unibus or Q-bus card
into a PC, knock there.
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Re: [Simh] Is Alpha AXP in SIMH's future?

[Sergey Oboguev]

My comment was is not about Intel vs. non-Intel, but about having 64-bit as a
native type in host machine instructions and leveraged by the compiler, rather
than simulated by 32-bit host operations.

Just consider how let us say LDQ or ADDQ would actually be implemented
in each of the respective cases.




From: li...@openmailbox.org li...@openmailbox.org
To: Simh@trailing-edge.com Simh@trailing-edge.com 
Sent: Tuesday, March 3, 2015 12:56 PM
Subject: Re: [Simh] Is Alpha AXP in SIMH's future?


Hi,

I don't understand (a) unless this is referring specially to Intel. For (b)
I didn't imagine needing so much memory for a guest.

Right now I'm running SIMH on a MIPS III (64 bit) box under OpenBSD and on
Solaris SPARC (sun4u). SIMH builds and runs on everything I have. I don't
use Windows and my Linux box is 32 bit for a few things that don't run
elsewhere. From my view it would be fantastic to have SIMH support an Alpha
emulator because SIMH doesn't require particular hosts.


On Tue, 3 Mar 2015 12:44:03 -0800
Sergey Oboguev obog...@yahoo.com wrote:

 The downside of running a 32-bit version of virtually any AXP simulator
 is that it is bound to be 2-3 times slower than 64-bit version, due to
 
 (a) simulation of AXP 64-bit operations on top of 32-bit host operations,
 
 (b) indirect access to guest memory when it is sized above 2 GB or so
 assuming such an access is implemented at all.
 
 The only exception to (a) would be a 64-bit simulator squeezed into 32-bit
 environment running on 64-bit machine, but this is hardly worth the
 effort.
 
 
 - Original Message -
 From: li...@openmailbox.org li...@openmailbox.org
 To: Simh@trailing-edge.com Simh@trailing-edge.com
 Cc: 
 Sent: Tuesday, March 3, 2015 9:25 AM
 Subject: [Simh] Is Alpha AXP in SIMH's future?
 
 Is an Alpha machine capable of running OpenVMS in SIMH's future? I know
 there are several Alpha emulators for Linux and Windows but I really like
 SIMH since it runs on pretty much any UNIX-like OS and doesn't depend on
 having a 64-bit Linux installed.
 
 Thank you for SIMH.
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Re: [Simh] Is Alpha AXP in SIMH's future?

[Sergey Oboguev]

The downside of running a 32-bit version of virtually any AXP simulator
is that it is bound to be 2-3 times slower than 64-bit version, due to

(a) simulation of AXP 64-bit operations on top of 32-bit host operations,

(b) indirect access to guest memory when it is sized above 2 GB or so
assuming such an access is implemented at all.

The only exception to (a) would be a 64-bit simulator squeezed into 32-bit
environment running on 64-bit machine, but this is hardly worth the effort.


- Original Message -
From: li...@openmailbox.org li...@openmailbox.org
To: Simh@trailing-edge.com Simh@trailing-edge.com
Cc: 
Sent: Tuesday, March 3, 2015 9:25 AM
Subject: [Simh] Is Alpha AXP in SIMH's future?

Is an Alpha machine capable of running OpenVMS in SIMH's future? I know
there are several Alpha emulators for Linux and Windows but I really like
SIMH since it runs on pretty much any UNIX-like OS and doesn't depend on
having a 64-bit Linux installed.

Thank you for SIMH.
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Re: [Simh] Is Alpha AXP in SIMH's future?

[Sergey Oboguev]

 How did this get to be a discussion about running a 32bit simulator of a 
 64bit machine?


It is not a discussion, rather an observation to a person who wished to run 

AXP simulation without having a 64-bit Linux installed.




- Original Message -
From: Mark Pizzolato - Info Comm m...@infocomm.com
To: Sergey Oboguev obog...@yahoo.com; li...@openmailbox.org 
li...@openmailbox.org; Simh@trailing-edge.com Simh@trailing-edge.com
Cc: 
Sent: Tuesday, March 3, 2015 12:55 PM
Subject: RE: [Simh] Is Alpha AXP in SIMH's future?

On Tuesday, March 3, 2015 at 12:44 PM, Serge Oboguev wrote:
 The downside of running a 32-bit version of virtually any AXP simulator is
 that it is bound to be 2-3 times slower than 64-bit version, due to
 
 (a) simulation of AXP 64-bit operations on top of 32-bit host operations,
 
 (b) indirect access to guest memory when it is sized above 2 GB or so
 assuming such an access is implemented at all.
 
 The only exception to (a) would be a 64-bit simulator squeezed into 32-bit
 environment running on 64-bit machine, but this is hardly worth the effort.

How did this get to be a discussion about running a 32bit simulator of a 64bit 
machine?

The ONLY requirement that the simh framework would require to implement a AXP 
simulator would be that the host machine have 64bit integer support.  Certainly 
if large memory was to be simulated (as would only be reasonable with an AXP 
simulator) then things would have to run on an 64bit capable host with a 64bit 
OS compiled as a 64bit binary.

The existing makefile will compile simulators with the default compiler 
available on the host (gcc) or any other compiler which is explicitly requested 
by GCC=othercompiler on the make command line.  If the host system is native 
64bit and the compiler is native 64bit then the resulting simulator will be 
fully capable of providing memory beyond 4GB.  Nothing special needs to be done.

There already are other simulators which require 64bit integer support.  

- Mark


 - Original Message -
 From: li...@openmailbox.org li...@openmailbox.org
 To: Simh@trailing-edge.com Simh@trailing-edge.com
 Cc:
 Sent: Tuesday, March 3, 2015 9:25 AM
 Subject: [Simh] Is Alpha AXP in SIMH's future?
 
 Is an Alpha machine capable of running OpenVMS in SIMH's future? I know
 there are several Alpha emulators for Linux and Windows but I really like
 SIMH since it runs on pretty much any UNIX-like OS and doesn't depend on
 having a 64-bit Linux installed.
 
 Thank you for SIMH.
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[Simh] Regarding Cutler THE father of VMS myth

[Sergey Oboguev]

 - Original Message -
 From: Christian Gauger-Cosgrove captainkirk...@gmail.com
 To: Bill Cunningham bill...@suddenlink.net
 Cc: SIMH Simh@trailing-edge.com
 Sent: Tuesday, March 3, 2015 12:12 PM
 Subject: Re: [Simh] Getting rsxs to run on the pdp11 emulator

 Dave Cutler is the father of RSX-11/M+, VMS, and Windows NT.

Since the topic of Cutler the Demiurg of VMS comes up once in a while here
and there...

In the interests of some historical justice and accuracy, Cutler is a father
of VMS, not the father.

The myth that Cutler was the father of VMS originated in its public
circulations probably from the authors of the Showstopper book, who did not
have much interest in the subject of VMS, did not have access to the members of
early VMS design team and could not know what had been happening there, and
also probably (as many if not most book authors) were not against dramatizing
and embellishing their story a little.

I have not read or heard anywhere that Cutler himself was ever claiming the
role in VMS development ascribed to him by this myth.

In reality, from the very start there were three key people on the software
side in development of VAX and subsequently VMS, and if any the father of VMS
were to be named at all, it would hands down be Dick Hustvedt.

http://en.wikipedia.org/wiki/Dick_Hustvedt

Cutler was a technical team manager during the development of initial versions
of VMS, however he was not the top #1 architect and technical contributor.

VAX Team A designing VAX architecture included 3 people from the hardware
side and 3 people from the software side. On the software side these were
Dick Hustvedt, Peter Lipman and David Cutler. These three also became later
the principal authors of VMS kernel.

In terms of the magnitude of contribution to VMS among these three
a distinct #1 was certainly Hustvedt.

A look into VMS source code (authorship and change history in source files
headers) in source kits at around VMS late 3.x-4.0 versions timeframe -- about
the time when all three departed VMS development -- makes the picture
exceedingly clear.

Direct code contributions of Cutler to VMS were parts of the kernel, DCL, MCR,
autoconfig, 5 drivers and C run-time library.

As to the specific parts of VMS kernel, the breakdown of its primary authors
is as follows:

Cutler was responsible for IO subsystem (except page locking), forking (like in
fork processes/fork blocks), exception handling, system timer and timer
services, executive pool allocation, bugcheck code, logical names and several
miscellaneous facilities (including mailboxes, console IO routines, CHMx
dispatcher, adjust stack and error logging interface routines in the kernel).
There are no visible Cutler fingerprints (change/authorship comments) in any
other kernel modules.

Hustvedt was the primary author responsible for the scheduler, swapper,
synchronization primitives (including event flags and kernel mutexes) and RSE
code (that changes process scheduling state in response to system events), AST
handling (for all CPU modes), process creation/deletion/starting, process
control (suspend/resume/hibernate/wakeup/handling process priorities and
names), process shell and null process, system init, SYSGEN parameters,
image exit and rundown, power failure handling and recovery, VMB, SYSBOOT,
XDELTA and MSCP port driver.

In addition, as a secondary author Hustvedt was responsible for 55 other source
files in the kernel.

Later Hustvedt was also responsible for ASMP (asymmetric multi-processing) and
was the driving force behind the advent of VAXcluster.

Peter Lipman was the primary author responsible for all virtual and physical
memory handling (except swapper). This may sound brief, but these are the most
complex and sophisticated modules in the system with extreme importance.
One should remember that the ability of VMS to run scores of user sessions
in a few megabytes of main memory was a sort of a technical wonder that,
one might surmise, greatly contributed to VMS success. In the course of
VAX MP project, I had a reason to look through some pieces of these algorithms
and implementation code behind them and might say they stay a technical miracle
even today, with hardly any modern operating system replicating their
complexity and sophistication (of course, in days of RAM plenty this is not
much of a pressing issue). In addition, Lipman was responsible as the primary
author for image activator, kernel file IO routines and GETDVI. As a secondary
contributor he was also responsible for 63 other source files in the kernel.

There were also other major VMS components, such as file system, various system
processes, later SCA/SCS etc., developed by other people.

Thus, though contributions of Cutler to VMS were significant, he by no means
was the demiurge of VMS as the myth would have it, nor even the architect #1.

One may surmise that dedication of IDS to Hustvedt (rather than Cutler, who by
the time the book was published also departed 

Re: [Simh] Platform for VAX MP Experimentation (amongst other uses)

[Sergey Oboguev]

Most extensive VAX MP stress tests I did were on 8-VCPU configuration (i7), 
however I also did some testing on 24-VCPU and 32-VCPU configurations. No 
problems have been spotted.

If you want to run VAX MP on a 32-bit host system, you might wish to rebuild 
VAX MP from source, as 32-bit binaries posted on the web site do not 
incorporate some later fixes (I currently do not have 32-bit Linux build 
environment around, so I updated only 64-bit binaries).

However be sure to read the note on OpenVMS VAX SMP licensing at the beginning 
of VAX MP User Guide.




 From: Mark Wickens m...@wickensonline.co.uk
To: simh@trailing-edge.com Simh@trailing-edge.com 
Sent: Monday, January 5, 2015 3:01 PM
Subject: [Simh] Platform for VAX MP Experimentation (amongst other uses)
 


Hi

I was interested in the collective thoughts of SIMH users with regard to 
simulator performance - and in particular - about what would be a suitable 
platform to experiment with the multiprocessor variant of SIMH.

I have various reasons to be interested in a server that has multiple cores - 
from virtualisation of Windows and other operating systems to running multiple 
emulators including VAX and Alpha emulators.

I am seriously considering buying an HP Proliant 585 Gen 6 server - the variant 
I'm looking it has 32 GB of RAM and 4 x hex core AMD Opteron 2.4Ghz (8431) for 
a total of 24 cores. There isn't a great deal of performance information out 
there but I think buying one of these second hand for around GBP 250 is a 
sensible compromise between number of CPUs and price.

Are there any other multi-cpu servers I could sensibly consider given budget 
constraints? Is 32 GB a sensible amount of RAM or should I got for more?

Thanks for the help.

Mark.
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Re: [Simh] Reduce CPU usage

[Sergey Oboguev]

Could it perhaps be a canonical case of Linux build with low CONFIG_HZ such as 
100 or around?




 From: Hittner, David T (IS) david.hitt...@ngc.com
To: Mark Pizzolato - Info Comm m...@infocomm.com; Priya Chincholikar 
priyach...@gmail.com; simh@trailing-edge.com simh@trailing-edge.com 
Sent: Friday, January 24, 2014 12:43 PM
Subject: Re: [Simh] Reduce CPU usage
 


 
And what version of VMS are you running? Different versions of VMS have 
different idle characteristics..
 
Dave
 
From:simh-boun...@trailing-edge.com [mailto:simh-boun...@trailing-edge.com] On 
Behalf Of Mark Pizzolato - Info Comm
Sent: Friday, January 24, 2014 8:26 AM
To: Priya Chincholikar; simh@trailing-edge.com
Subject: EXT :Re: [Simh] Reduce CPU usage
 
Hi Priya,
 
This is one of those “it works for me” cases.  Idling works fine for a VMS 
guest on my fc18 x86 test system.
 
What is the output of “SHOW VERSION” done at the “sim” prompt?
What does your configuration file look like?
 
-  Mark
 
From:simh-boun...@trailing-edge.com [mailto:simh-boun...@trailing-edge.com] On 
Behalf Of Priya Chincholikar
Sent: Friday, January 24, 2014 3:40 AM
To: simh@trailing-edge.com
Subject: [Simh] Reduce CPU usage
 
Hi,
 
The cpu usage while running the emulator is shown as 97% to 99%. Is there a way 
to reduce this?
And I tried setting the cpu idle but no use. CPU utilization is still high.
 
sim show cpu
CPU     idle disabled, model=VAXServer 3900 (KA655), NOAUTOBOOT
        64MB, HALT to console
sim SET CPU IDLE=VMS
sim show cpu
CPU     idle=VMS, idle enabled, model=VAXServer 3900 (KA655), NOAUTOBOOT
        64MB, HALT to console
 
Host OS used is Linux. fc18. 
 
Thanks,
Priya 
 
 
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Re: [Simh] EXT : Questions regarding future simulator development

[Sergey Oboguev]

 There is an unreleased VAX simulator variant in the wild with 32 processor 
support.

It had been released about 8 months ago.
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Re: [Simh] Why 36-bit computing?

[Sergey Oboguev]

My very first computer as a kid was a 37-bit computer we had at school, which I 
reckon must be considered superior to 36-bit computers.





From: Michael Mondy michael.mo...@coffeebird.net
To: simh@trailing-edge.com
Sent: Tue, March 19, 2013 7:39:07 AM
Subject: [Simh] Why 36-bit computing?

On Tue, Mar 19, 2013 at 02:43:10PM +0100, Johnny Billquist wrote:
 [ ... ]
 
 It wasn't just DEC. Back in the day, most everyone used various word
 lengths that wasn't a power of two. I can't really make many
 comments on why other word lengths were more popular. I've seen
 mentioned that floating point formats was pretty nice to do with
 something like 60 or 72 bits. Reason being that you had large enough
 exponents for useful things, and enough precision for most
 calculations.
 So a word length that related to this made sense.
 
 Number of bits being a power of two started with IBM in the 60s, and
 became common with the PDP-11 in the 70s. (Or so I'd like to think.)
 
 Johnny

Wikipedia has an article on 36-bit computing: 
http://en.wikipedia.org/wiki/36-bit

Snipped from the wikipedia article:

[ ... ]

Many early computers aimed at the scientific market had a 36-bit word length. 
This word length was just long enough to represent positive and negative 
integers to an accuracy of ten decimal digits (35 bits would have been the 
minimum). It also allowed the storage of six alphanumeric characters encoded in 
a six-bit character encoding. Prior to the introduction of computers, the state 
of the art in precision scientific and engineering calculation was the 
ten-digit, electrically powered, mechanical calculator, such as those 
manufactured by Friden, Marchant and Monroe. These calculators had a column of 
keys for each digit and operators were trained to use all their fingers when 
entering numbers, so while some specialized calculators had more columns, ten 
was a practical limit. Computers, as the new competitor, had to match that 
accuracy. Decimal computers sold in that era, such as the IBM 650 and the IBM 
7070, had a word length of ten digits, as did ENIAC, one of the earliest 
computers.

[ ... ]

By the time IBM introduced System/360, scientific calculations had shifted to 
floating point and mechanical calculators were no longer a competitor. [...]  [ 
At which point the advantages of using powers of two became more important than 
feature parity with mechanical calculators. ]

-- Mike
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Re: [Simh] Virtual VAXen

[Sergey Oboguev]

I came across another article regarding the history of VAX virtualization 
project at DEC.
Surprisingly, the projects dates back to 1981 and ran till 1990.
The goal was to achieve A1 security level certification.

Steve Lipner et al., Lessons from VAX/SVS for High Assurance VM Systems

http://dx.doi.org/10.1109/MSP.2012.87
http://www.cse.psu.edu/~tjaeger/cse543-f12/docs/SP_SPSI-2012-03-0042 
R1_Zurko.pdf





From: Sergey Oboguev obog...@yahoo.com
To: simh@trailing-edge.com
Sent: Mon, July 9, 2012 6:23:41 AM
Subject: Re: [Simh] Virtual VAXen

 Ah yes, the VVAX option... another attempted graft on the VAX architecture 
tree. Unlike vectors, it never got as far as a real implementation.

According to VVAX / VAX Security Kernel developers, while it was never released 
externally as a product, there was internal proof-of-concept implementation on 
11/730 and production quality implementation on 8800, the latter field-tested 
in 

1989 at a number of external customers' sites.

http://dx.doi.org/10.1109/32.106971
http://www.cse.psu.edu/~tjaeger/cse543-f06/papers/vax_vmm.pdf

http://dx.doi.org/10.1109/RISP.1990.63834
http://www.scs.stanford.edu/nyu/02sp/sched/vmm.pdf

And here is somewhat more detailed technical description:
http://dx.doi.org/10.1109/ISCA.1991.1021630
http://mprc.pku.cn/mentors/training/ISCAreading/1991/p380-hall/p380-hall.pdf
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Re: [Simh] Connecting to Ethernet

[Sergey Oboguev]

 
$ tcpip show route /full
MYVAX::SYSTEM 09:53:18 TCPIP$UCP CPU=00:00:03.15 PF=4490 IO=341 MEM=931
MYVAX::SYSTEM 09:53:22 TCPIP$UCP CPU=00:00:03.15 PF=4502 IO=347 MEM=943
MYVAX::SYSTEM 09:53:29 TCPIP$UCP CPU=00:00:03.16 PF=4502 IO=353 MEM=943
 Interrupt 

SHOW ROUTE just hangs .. well, I see it's doing I/Os, but no results.

$ mc tcpip$ping 10.0.0.2

Hangs as well. 


--- On Mon, 9/3/12, Sergey Oboguev obog...@yahoo.com wrote:


From: Sergey Oboguev obog...@yahoo.com
Subject: Re: [Simh] Connecting to Ethernet
To: david.d.mil...@att.net, simh@trailing-edge.com
Date: Monday, September 3, 2012, 5:34 PM


Did you remember to configure the interface in TCP/IP services for OpenVMS?

Assuming for the sake of example that your host uses IP address 192.168.21.3 
for 


(initially) eth0 and (subsequently after bridging) br0, and assuming you want 
to 

assign 

IP address 192.168.21.200 to VAX instance, you need to configure QE0 inside 
VMS 

as follows:

$ TCPIP SET INTERFACE QE0 /HOST=192.168.21.200 
$ TCPIP SET CONFIGURATION INTERFACE QE0 /HOST=192.168.21.200

Depending on exact value of network addresses being used and network topology 
it 


may be necessary to additionally specify options  /NETWORK_MASK=n.n.n.n and 
/BROADCAST_MASK=m.m.m.m, although usually VMS TCP/IP picks correct defaults 
for 

the masks.

If it still does not work, please post the output of

$ TCPIP SHOW INTERFACE /FULL
$ TCPIP SHOW ROUTE /FULL

and (in Linux)

ifconfig br0
ifcongig eth0
ifconfig tap0
brctl show
brctl show br0
brctl showmacs br0
route -n

and (at SIMH command console prompt)

show xq

Thanks,
Sergey


From: david.d.mil...@att.net david.d.mil...@att.net
To: simh@trailing-edge.com
Sent: Mon, September 3, 2012 4:10:48 PM
Subject: Re: [Simh] Connecting to Ethernet


Sergey

That was a big help, but I'm not  there yet.  I did the following

$ sudo ./ linux-tap.sh create br0 eth0 tap0 david
$ sudo vax; to start SIMH
simh   ; the usual stuff
simh set xq mac=bla bla
simh att tap0  ;  hooray, this is the first time this succeeded.
simh boot cpu

When logged into VMS, I could PING and TELNET to LOCALHOST (and 127.0.0.1).   
But alas, not to my physical host.  And my physical host can't see the VAX 
either.

But I did so many things to get to this point that something else might be 
screwed up, so I need to reboot linux and start this drill again.

Thanks for a great start!

Any other suggestions?

--- On Mon,  9/3/12, Sergey Oboguev obog...@yahoo.com wrote:


From: Sergey Oboguev obog...@yahoo.com
Subject: Re: [Simh] Basic questions
To: david.d.mil...@att.net, simh@trailing-edge.com
Date: Monday, September 3, 2012, 12:20 PM


 In particular I get the following error:
 david@Thinkpad:~$ sudo brctl addbr br0
 david@Thinkpad:~$ sudo ifconfig tap0 up
 tap0: ERROR while getting interface flags: No such device

Perhaps because 

/usr/sbin/tunctl -t $TAPDEV -u  $USERID

is missing.

You may find the following script helpful:  
http://oboguev.net/misc/linux-tap.sh.txt

Usage is at the bottom or invokable as

./linux-tap.sh help
 
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Re: [Simh] Basic questions

[Sergey Oboguev]

 In particular I get the following error:
 david@Thinkpad:~$ sudo brctl addbr br0
 david@Thinkpad:~$ sudo ifconfig tap0 up
 tap0: ERROR while getting interface flags: No such device

Perhaps because 

/usr/sbin/tunctl -t $TAPDEV -u $USERID

is missing.

You may find the following script helpful:  
http://oboguev.net/misc/linux-tap.sh.txt

Usage is at the bottom or invokable as

./linux-tap.sh help
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Re: [Simh] Virtual VAXen

[Sergey Oboguev]

 Ah yes, the VVAX option... another attempted graft on the VAX architecture 
tree. Unlike vectors, it never got as far as a real implementation.

According to VVAX / VAX Security Kernel developers, while it was never released 
externally as a product, there was internal proof-of-concept implementation on 
11/730 and production quality implementation on 8800, the latter field-tested 
in 
1989 at a number of external customers' sites.

http://dx.doi.org/10.1109/32.106971
http://www.cse.psu.edu/~tjaeger/cse543-f06/papers/vax_vmm.pdf

http://dx.doi.org/10.1109/RISP.1990.63834
http://www.scs.stanford.edu/nyu/02sp/sched/vmm.pdf

And here is somewhat more detailed technical description:
http://dx.doi.org/10.1109/ISCA.1991.1021630
http://mprc.pku.cn/mentors/training/ISCAreading/1991/p380-hall/p380-hall.pdf
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Re: [Simh] clang (was Re: XCode and LTO)

[Sergey Oboguev]

 From: Michael Bloom mabl...@dslextreme.com

 nanosleep() would give you the exact timing needed.  I'm very much against 
polling the time as a solution because it could use up a lot of CPU cycles 
that 
other processes would love to have.  

 spinning when there are ways that are more accurate (not to mention 
friendlier to other processes who'd like some CPU time) to simulate timing,  
is 
not the best choice, in my opinion.


Hi Michael,

First off, the whole issue was about the code that gets executed only when 
console ROM is active.
Once the bootstrap is started, it is irrelevant.

Second, on most platforms you are lucky to get sleep interval with granularity 
around 1 ms.
Never mind 100 us, let alone 1 us.
Having system call that takes its argument in nanosecond or femtosecond  units 
does not mean host OS timer events are actually processed at this resolution.

But even if they magically were, the cost for no-op system call  
(userland-kernel-userland context roundtrip) on 3+ GHz x64 CPU is about 1 us,  
which is approximately the amount of the delay introduced by  rom_read_delay 
loop. The overhead of creating timer entry -- merely  creating the entry, 
without any processing of it -- would exceed the  delay required.
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Re: [Simh] clang (was Re: XCode and LTO)

[Sergey Oboguev]

Splitting into separate files won't override optimization in LTO case since 
(tautologically) it is link-time.



- Original Message 
From: Nelson H. F. Beebe be...@math.utah.edu
To: Sergey Oboguev obog...@yahoo.com; simh@trailing-edge.com 
simh@trailing-edge.com
Cc: be...@math.utah.edu
Sent: Fri, April 27, 2012 10:48:42 AM
Subject: Re: [Simh] clang (was Re: XCode and LTO)

 Declaring loopval as volatile (and perhaps global, rather than on-stack, 
 to 

 reduce chances of compiler disregarding volatile declaration) might do the 
 trick.

Yes, that should work if the compiler obeys volatile declarations.  Otherwise,
a store subterfuge will work too:

(a)volatile int foo;

(b)int foo;
...
store(foo);

In another file:
void store(int *x) { }

Both cases should force the compiler to load foo from memory, and
not optimize it away.

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Re: [Simh] Alpha simulator performance

[Sergey Oboguev]

 NT is not VMS or a reimplementation of it.

Let's look at some basics in internals.

I'd rather just quote someone here, to save time typing:

=== quote begin ===
The scheduler. 
(process scheduler in VMS, thread scheduler in NT) 32 scheduling priorities, 
divided into the real-time (16-31) and variable (0-15) priority ranges. 
identical preemption at ready by higher-priority threads; identical quantum and 
priority boost implementations; identical CPU starvation avoidance mechanism to 
get out of priority inversion situations; a null thread for each CPU; etc., etc.

Memory management. 
0-7FFF is per-process, mostly user-mode-accessible only; 8000- 
is systemwide, mostly kernel-accessible only. Functionally identical 
implementations of paging vs. swapping.

I/O. 
I could write a book, but briefly, IRPs are IRPs, UCBs are device objects, 
CRBs are controller objects, ADPs are adapter objects, FDT routines are 
dispatch routines, EXE$QIODRVPKT is IoStartPacket, StartIO routines are 
StartIO routines, fork routines are DPC routines, ASTs are APCs... etc., etc., 
etc., etc., etc.

Interrupt handling. 
32 levels of interrupts (some simulated but this is nevertheless the way the 
code is written). IPLs on VMS, IRQLs on NT. In order: Passive level, APC (AST) 
Level, Dispatch (fork) level, then the IO hardware interrupts, then some 
hardware maintenance functions like the hardware timer, IPI, power fail 
notification, and HIGH_LEVEL to block all interrupts. 

=== quote end ===

Could go on, but probably enough to give an initial idea.
Native API and subsystems came from Mica, I might just add.
In effect you could say Mica turned out to be a dry run for Windows 
architectural design.

As for crashes, after installing XP SP3, my old computer at work stayed up 
(unrebooted) for about 2 years and was restarted only because IT pushed 
hotfixes 
that required restart.
I also do not remember having any crashes in XP or later era on my home 
computer 
that were not related to 3rd party drivers (and those were largely gone by XP 
time too).

Earlier versions of NT may have been less stable, but they had to deal with 
diversity of supported hardware and magnitude of functionality far exceeding 
those early versions of VMS had to.

As for single-user system, it is an era of client/server computing and personal 
computing.
The era of timeshared computers is long gone.
Nevertheless Windows does provide multiple logon sessions with remote desktops.

 vms was elegant. thats something NT never had.

Cannot agree.
At user level, Windows is certainly more usable than VMS.
At API level, likewise there is no even comparison in terms of elegance.
This is not to say VMS APIs were bad at their time -- but they are APIs of 
their 
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Re: [Simh] Alpha simulator performance

[Sergey Oboguev]

 I would say Unix (and its derivatives) and VMS are Operating Systems.

 Windows is an Application.  Takes VMware to run it.

Takes SIMH to run VMS.

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[Simh] RE : Segmentation fault when running the MIcrovax emulator

[Sergey Oboguev]

If you compile it, rather than using pre-built binary, can you compile in debug 
mode, run under gdb and see the stack at fault point, and also the fault 
location?
Similarly, can you verify if SHOW XQ ETH works or also faults?

From: brian br...@meadows.pair.com
To: simh@trailing-edge.com  SIMH simh@trailing-edge.com
Sent: Sun, January 8, 2012 1:51:10 AM
Subject: Re: [Simh] RE :  Segmentation fault when running the MIcrovax emulator

I'm actually running Mint 9, but that's based on Ubuntu 10.04.

However, I've compiled the software without any errors, so presumably 
the linker could find the library OK.

It's when running SIMH that the segmentation fault occurs.


Brian.
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Re: [Simh] Segmentation fault when running the MIcrovax emulator

[Sergey Oboguev]

Build options can be checked with show version command.
It should display something like

sim sh vers
VAX_MP simulator V3.8-1 [64b data, 64b addresses, Ethernet support]




From: Boucher, François boucher.franc...@uqam.ca
To: simh@trailing-edge.com
Sent: Sat, January 7, 2012 10:21:33 AM
Subject: Re: [Simh] Segmentation fault when running the MIcrovax emulator

Maybe your microvax emulator was not compiled with the ethernet (XQ) support?
Just to test this, please remove the two lines:
set xq mac=00-1C-25-EA-22-09
attach xq eth0

that are related to the ethernet interface, then run the microvax again.
Hope that helps,

François
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Re: [Simh] Segmentation fault when running the MIcrovax emulator

[Sergey Oboguev]

I'd suggest to start with identifying script command that causes the fault.

You can do it by disabling individual suspect commands by commenting them out 
with ! prefix
or by inserting echo step 1, echo step 2 etc. commands in the script 
between 
the suspect commands
or simply by starting the simulator's executable without an argument and 
copy-pasting script commands
one line at a time at the simulator's prompt.





From: brian br...@meadows.pair.com
To: simh@trailing-edge.com
Sent: Sat, January 7, 2012 10:53:29 AM
Subject: Re: [Simh] Segmentation fault when running the MIcrovax emulator

I put a show version in vax.ini.

This is the output from trying to run the program


VAX simulator V3.8-1
NVR: buffering file in memory
VAX simulator V3.8-1 [64b data, 64b addresses, Ethernet support]
RQ: unit is read only
Segmentation fault


Brian.

On 01/07/2012 01:31 PM, Sergey Oboguev wrote:
 Build options can be checked with show version command.
 It should display something like

 sim sh vers
 VAX_MP simulator V3.8-1 [64b data, 64b addresses, Ethernet support]

 --
 *From:* Boucher, François boucher.franc...@uqam.ca
 *To:* simh@trailing-edge.com
 *Sent:* Sat, January 7, 2012 10:21:33 AM
 *Subject:* Re: [Simh] Segmentation fault when running the MIcrovax
 emulator

 Maybe your microvax emulator was not compiled with the ethernet (XQ)
 support?
 Just to test this, please remove the two lines:
 set xq mac=00-1C-25-EA-22-09
 attach xq eth0

 that are related to the ethernet interface, then run the microvax again.
 Hope that helps,

 François


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Re: [Simh] Network interfaces under Windows

[Sergey Oboguev]

If you want to communicate between Windows host machine and SIMH, the easiest 
setup is Windows Loopback Adaptor (yes, with o). To avoid confusion by name, 
it is not an adapter that is associated with address 127.0.0.1, but a virtual 
Ethernet card driver that creates a subnet connected on one side to the Windows 
host machine, and on other side to applications, pretty much like TAP/TUN, but 
without the hassle.

Loopback Adaptor can be installed from Device Manager (on Windows 7, Action - 
Add Legacy Hardware - manually - Network - Microsoft - Microsoft Loopback 
Adaptor, and there is similar sequence in XP).

Once the adapter is installed, assign its host-side address in Control Panel 
(something like 192.168.3.1/255.255.255.0), restart the machine to get PCAP to 
recognize it, then bind it on SIMH side the usual way, just as you would bind a 
physical adapter, and configure it inside VMS.

Note that there is a bug in SIMH 3.8.1 autoconfigure that causes mis-assignment 
of QBus device vectors when there are two XQ devices present and that may cause 
some other devices such as DHV stop working. I forwarded the fix some time ago 
to Robert Supnik, so if you run into the problem perhaps he could advise how to 
obtain the codebase that incorporates the fix.





From: Timothe Litt l...@ieee.org
To: Stafford Winters stafford.wint...@gmail.com
Cc: simh@trailing-edge.com
Sent: Wed, December 21, 2011 11:03:36 AM
Subject: Re: [Simh] Network interfaces under Windows

Your second interface probably doesn't have an IP address assigned (under
windoze); annoyingly, libpcap doesn't return interfaces without addresses.

Be careful picking a subnet.

Alternatively, you don't actually need a dedicated interface.  I use OpenVPN
(just install the TAP adapter  bridge it to your primary ethernet card).
You don't need the whole OpenVPN package.  Don't forget to set the Media
Status of the TAP to Always Connected, and things just work.


-
This communication may not represent my employer's views,
if any, on the matters discussed. 

-Original Message-
From: simh-boun...@trailing-edge.com [mailto:simh-boun...@trailing-edge.com]
On Behalf Of Stafford Winters
Sent: Wednesday, December 21, 2011 13:48
To: simh@trailing-edge.com
Subject: [Simh] Network interfaces under Windows

I've had SimH for several months, running VAX (including ethernet
support) with OpenVMS installed.  (WinPcap is installed.)  I decided I
wanted to add a second network card so that I could telnet in from the same
computer to the OpenVMS system.  I had a Dynex DX-E102 available, so I stuck
it in the computer, but I don't see it as an available network interface
under SimH.  The primary network interface is an integrated NVIDIA nForce
10/100/1000.  To complicate matters, I have old VMware Player software
installed (version 1.0.2.) that allows me to run some necessary software
for a client.  The host computer is running Windows XP Professional x64
Edition.  Under SimH:
sim show xq eth
ETH devices:
   0  \Device\NPF_{4EBEA91C-BB4D-4EB4-A3D0-D44914480A2F} (Local Area
Connection)
   1  \Device\NPF_{237514F4-8533-43C8-A69E-E94618353E5F} (VMware Network
Adapter VMnet8)
sim
The Local Area Connection is the NVIDIA NIC.  Am I not able to additional
network interfaces because of VMware, or is the Dynex NIC not usable for
this, or is it something else altogether?

I realize this is a bit on the fringe for SimH discussion, but I haven't
been able to find anything that seems promising in my internet searches.
Thanks for any pointers you can provide.
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[Simh] VAX VMS73 listings - source

[Sergey Oboguev]

I put together a small utility that massages OpenVMS VAX 7.3 listings back to a 
source-like form, basically stripping off compiler-produced crud, thus making 
files easier to read and restoring original file names (found in listings) to 
the best of its ability.

Those who use these listings may find this utility handy.

The utility has two passes: StripVersion (that removes ;V postfix in file 
names) and ReSource-VAX73, the latter part is specific to the version of 
listings.
It runs under MSDEV/C#/.NET and is a quick and dirty utility put together 
overnight, but worked for me.

http://oboguev.net/misc/vaxvms-lis2src-73.zip

- Sergey
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