CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Thu Apr 18 16:44:21 UTC 2024
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: viac7temp.c
Log Message:
Pull up following revision(s) (requested by andvar in ticket #1959):
sys/arch/x86/x86/viac7temp.c: revision 1.10
viac7temp(4): define module metadata using MODULE() macro and implement
viac7temp_modcmd() to handle module load/unload events.
Fixes PR kern/58148. Look OK by mrg@.
To generate a diff of this commit:
cvs rdiff -u -r1.8 -r1.8.20.1 src/sys/arch/x86/x86/viac7temp.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/viac7temp.c
diff -u src/sys/arch/x86/x86/viac7temp.c:1.8 src/sys/arch/x86/x86/viac7temp.c:1.8.20.1
--- src/sys/arch/x86/x86/viac7temp.c:1.8 Sun Aug 10 16:44:34 2014
+++ src/sys/arch/x86/x86/viac7temp.c Thu Apr 18 16:44:20 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: viac7temp.c,v 1.8 2014/08/10 16:44:34 tls Exp $ */
+/* $NetBSD: viac7temp.c,v 1.8.20.1 2024/04/18 16:44:20 martin Exp $ */
/*-
* Copyright (c) 2009 Jared D. McNeill
@@ -27,11 +27,12 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: viac7temp.c,v 1.8 2014/08/10 16:44:34 tls Exp $");
+__KERNEL_RCSID(0, "$NetBSD: viac7temp.c,v 1.8.20.1 2024/04/18 16:44:20 martin Exp $");
#include
#include
#include
+#include
#include
#include
@@ -162,3 +163,32 @@ viac7temp_refresh_xcall(void *arg0, void
edata->value_cur += 27315;
edata->state = ENVSYS_SVALID;
}
+
+MODULE(MODULE_CLASS_DRIVER, viac7temp, NULL);
+
+#ifdef _MODULE
+#include "ioconf.c"
+#endif
+
+static int
+viac7temp_modcmd(modcmd_t cmd, void *arg __unused)
+{
+ int error = 0;
+
+ switch (cmd) {
+ case MODULE_CMD_INIT:
+#ifdef _MODULE
+ error = config_init_component(cfdriver_ioconf_viac7temp,
+ cfattach_ioconf_viac7temp, cfdata_ioconf_viac7temp);
+#endif
+ return error;
+ case MODULE_CMD_FINI:
+#ifdef _MODULE
+ error = config_fini_component(cfdriver_ioconf_viac7temp,
+ cfattach_ioconf_viac7temp, cfdata_ioconf_viac7temp);
+#endif
+ return error;
+ default:
+ return ENOTTY;
+ }
+}
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src Committed By: martin Date: Thu Apr 18 16:44:21 UTC 2024 Modified Files: src/sys/arch/x86/x86 [netbsd-8]: viac7temp.c Log Message: Pull up following revision(s) (requested by andvar in ticket #1959): sys/arch/x86/x86/viac7temp.c: revision 1.10 viac7temp(4): define module metadata using MODULE() macro and implement viac7temp_modcmd() to handle module load/unload events. Fixes PR kern/58148. Look OK by mrg@. To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.8.20.1 src/sys/arch/x86/x86/viac7temp.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/i386/stand/efiboot
Module Name:src
Committed By: martin
Date: Fri Sep 15 15:44:20 UTC 2023
Modified Files:
src/sys/arch/i386/stand/efiboot [netbsd-8]: Makefile.efiboot eficons.c
Added Files:
src/sys/arch/i386/stand/efiboot [netbsd-8]: eficpufunc.c eficpufunc.h
Log Message:
Pull up following revision(s) (requested by rin in ticket #1897):
sys/arch/i386/stand/efiboot/Makefile.efiboot: revision 1.22
sys/arch/i386/stand/efiboot/eficpufunc.c: revision 1.1
sys/arch/i386/stand/efiboot/eficpufunc.h: revision 1.1
sys/arch/i386/stand/efiboot/eficons.c: revision 1.13
sys/arch/i386/stand/efiboot/eficons.c: revision 1.14
efiboot/x86: Add serial console support via raw I/O port access
Unfortunately, some (most?) UEFI implementations do not support
com ports by ``Serial I/O Protocol''.
``PNP0501-0'' and friends are not recognized also.
In this case, if user explicitly requires to switch to serial
console by ``consdev'' command, try to use raw I/O port access.
Ugly, but what FreeBSD does, at least.
Proposed as PR port-amd64/57523
efiboot/x86: eficons.c: Explicitly include params.h for howmany()
NFC for -current and netbsd-10, but necessary for netbsd-[89] to
pull up raw IO serial port support (PR port-amd64/57523).
To generate a diff of this commit:
cvs rdiff -u -r1.9.2.5 -r1.9.2.6 \
src/sys/arch/i386/stand/efiboot/Makefile.efiboot
cvs rdiff -u -r1.4.2.6 -r1.4.2.7 src/sys/arch/i386/stand/efiboot/eficons.c
cvs rdiff -u -r0 -r1.1.6.2 src/sys/arch/i386/stand/efiboot/eficpufunc.c \
src/sys/arch/i386/stand/efiboot/eficpufunc.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/i386/stand/efiboot/Makefile.efiboot
diff -u src/sys/arch/i386/stand/efiboot/Makefile.efiboot:1.9.2.5 src/sys/arch/i386/stand/efiboot/Makefile.efiboot:1.9.2.6
--- src/sys/arch/i386/stand/efiboot/Makefile.efiboot:1.9.2.5 Wed Sep 18 17:30:05 2019
+++ src/sys/arch/i386/stand/efiboot/Makefile.efiboot Fri Sep 15 15:44:20 2023
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile.efiboot,v 1.9.2.5 2019/09/18 17:30:05 martin Exp $
+# $NetBSD: Makefile.efiboot,v 1.9.2.6 2023/09/15 15:44:20 martin Exp $
S= ${.CURDIR}/../../../../..
@@ -10,9 +10,11 @@ AFLAGS.start.S= ${${ACTIVE_CC} == "clang
SOURCES= start.S boot.c conf.c devopen.c dev_net.c self_reloc.c panic.c
SOURCES+= efiboot.c efichar.c eficons.c efidelay.c efidev.c
+SOURCES+= eficpufunc.c
SOURCES+= efidisk.c efidisk_ll.c efigetsecs.c efimemory.c
SOURCES+= efinet.c efipxe.c
LIBI386SRCS= biosdisk.c bootinfo.c bootinfo_biosgeom.c bootmenu.c
+LIBI386SRCS+= comio_direct.c
LIBI386SRCS+= diskbuf.c exec.c menuutils.c parseutils.c pread.c
LIBI386SRCS+= exec_multiboot1.c exec_multiboot2.c
# use our own nfs implementation
Index: src/sys/arch/i386/stand/efiboot/eficons.c
diff -u src/sys/arch/i386/stand/efiboot/eficons.c:1.4.2.6 src/sys/arch/i386/stand/efiboot/eficons.c:1.4.2.7
--- src/sys/arch/i386/stand/efiboot/eficons.c:1.4.2.6 Mon Mar 9 09:48:00 2020
+++ src/sys/arch/i386/stand/efiboot/eficons.c Fri Sep 15 15:44:20 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: eficons.c,v 1.4.2.6 2020/03/09 09:48:00 martin Exp $ */
+/* $NetBSD: eficons.c,v 1.4.2.7 2023/09/15 15:44:20 martin Exp $ */
/*-
* Copyright (c) 2016 Kimihiro Nonaka
@@ -26,9 +26,12 @@
* SUCH DAMAGE.
*/
+#include
#include
#include
+#include
+
#include "efiboot.h"
#include "bootinfo.h"
@@ -60,6 +63,8 @@ static u_char serbuf[16];
static int serbuf_read = 0;
static int serbuf_write = 0;
+static int raw_com_addr = 0;
+
static void eficons_init_video(void);
static void efi_switch_video_to_text_mode(void);
@@ -76,6 +81,12 @@ static int efi_com_putc(int);
static int efi_com_status(int);
static int efi_com_waitforinputevent(uint64_t);
+static int raw_com_init(int, int);
+static int raw_com_getc(void);
+static int raw_com_putc(int);
+static int raw_com_status(int);
+static int raw_com_waitforinputevent(uint64_t);
+
static int efi_find_gop_mode(char *);
static int iodev;
@@ -134,11 +145,8 @@ ok:
case CONSDEV_COM3:
iodev = dev;
btinfo_console.addr = ioport;
- if (btinfo_console.addr == 0) {
- if (!efi_valid_com(iodev))
-goto nocom;
+ if (btinfo_console.addr == 0)
btinfo_console.addr = getcomaddr(iodev - CONSDEV_COM0);
- }
if (speed != 0)
btinfo_console.speed = speed;
efi_com_init(btinfo_console.addr, btinfo_console.speed);
@@ -149,8 +157,6 @@ ok:
case CONSDEV_COM2KBD:
case CONSDEV_COM3KBD:
iodev = dev - CONSDEV_COM0KBD + CONSDEV_COM0;
- if (!efi_valid_com(iodev))
- goto nocom;
btinfo_console.addr = getcomaddr(iodev - CONSDEV_COM0);
efi_cons_putc('0' + iodev - CONSDEV_COM0);
@@ -868,7 +874,7 @@ efi_com_init(int addr, int speed)
return 0;
if (!efi_valid_com(iodev))
- return 0;
+ return raw_com_init(addr, speed);
serio = serios[iodev - CONSDEV_COM0];
@@ -884,6 +890,7 @@ efi_com_init(int addr, int speed)
}
}
+
CVS commit: [netbsd-8] src/sys/arch/i386/stand/efiboot
Module Name:src Committed By: martin Date: Fri Sep 15 15:44:20 UTC 2023 Modified Files: src/sys/arch/i386/stand/efiboot [netbsd-8]: Makefile.efiboot eficons.c Added Files: src/sys/arch/i386/stand/efiboot [netbsd-8]: eficpufunc.c eficpufunc.h Log Message: Pull up following revision(s) (requested by rin in ticket #1897): sys/arch/i386/stand/efiboot/Makefile.efiboot: revision 1.22 sys/arch/i386/stand/efiboot/eficpufunc.c: revision 1.1 sys/arch/i386/stand/efiboot/eficpufunc.h: revision 1.1 sys/arch/i386/stand/efiboot/eficons.c: revision 1.13 sys/arch/i386/stand/efiboot/eficons.c: revision 1.14 efiboot/x86: Add serial console support via raw I/O port access Unfortunately, some (most?) UEFI implementations do not support com ports by ``Serial I/O Protocol''. ``PNP0501-0'' and friends are not recognized also. In this case, if user explicitly requires to switch to serial console by ``consdev'' command, try to use raw I/O port access. Ugly, but what FreeBSD does, at least. Proposed as PR port-amd64/57523 efiboot/x86: eficons.c: Explicitly include params.h for howmany() NFC for -current and netbsd-10, but necessary for netbsd-[89] to pull up raw IO serial port support (PR port-amd64/57523). To generate a diff of this commit: cvs rdiff -u -r1.9.2.5 -r1.9.2.6 \ src/sys/arch/i386/stand/efiboot/Makefile.efiboot cvs rdiff -u -r1.4.2.6 -r1.4.2.7 src/sys/arch/i386/stand/efiboot/eficons.c cvs rdiff -u -r0 -r1.1.6.2 src/sys/arch/i386/stand/efiboot/eficpufunc.c \ src/sys/arch/i386/stand/efiboot/eficpufunc.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/x86/pci
Module Name:src Committed By: martin Date: Wed Aug 23 17:10:58 UTC 2023 Modified Files: src/sys/arch/x86/pci [netbsd-8]: pci_machdep.c Log Message: Pull up following revision(s) (requested by msaitoh in ticket #1890): sys/arch/x86/pci/pci_machdep.c: revision 1.94 Fix detection of availability of MSI/MSI-X on some systems. Try to find all functions on bus 0, device 0 to find a PCI host bridge. Some CPU's host bridge is at 0:0.4. Tested by Intel Snow Ridge. To generate a diff of this commit: cvs rdiff -u -r1.79.2.2 -r1.79.2.3 src/sys/arch/x86/pci/pci_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/x86/pci
Module Name:src
Committed By: martin
Date: Wed Aug 23 17:10:58 UTC 2023
Modified Files:
src/sys/arch/x86/pci [netbsd-8]: pci_machdep.c
Log Message:
Pull up following revision(s) (requested by msaitoh in ticket #1890):
sys/arch/x86/pci/pci_machdep.c: revision 1.94
Fix detection of availability of MSI/MSI-X on some systems.
Try to find all functions on bus 0, device 0 to find a PCI host bridge.
Some CPU's host bridge is at 0:0.4. Tested by Intel Snow Ridge.
To generate a diff of this commit:
cvs rdiff -u -r1.79.2.2 -r1.79.2.3 src/sys/arch/x86/pci/pci_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/pci/pci_machdep.c
diff -u src/sys/arch/x86/pci/pci_machdep.c:1.79.2.2 src/sys/arch/x86/pci/pci_machdep.c:1.79.2.3
--- src/sys/arch/x86/pci/pci_machdep.c:1.79.2.2 Wed Jun 12 10:17:33 2019
+++ src/sys/arch/x86/pci/pci_machdep.c Wed Aug 23 17:10:57 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: pci_machdep.c,v 1.79.2.2 2019/06/12 10:17:33 martin Exp $ */
+/* $NetBSD: pci_machdep.c,v 1.79.2.3 2023/08/23 17:10:57 martin Exp $ */
/*-
* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
@@ -73,7 +73,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.79.2.2 2019/06/12 10:17:33 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.79.2.3 2023/08/23 17:10:57 martin Exp $");
#include
#include
@@ -456,6 +456,8 @@ pci_attach_hook(device_t parent, device_
pci_chipset_tag_t pc = pba->pba_pc;
pcitag_t tag;
pcireg_t id, class;
+ int i;
+ bool havehb = false;
#endif
if (pba->pba_bus == 0)
@@ -473,19 +475,25 @@ pci_attach_hook(device_t parent, device_
#ifdef __HAVE_PCI_MSI_MSIX
/*
* In order to decide whether the system supports MSI we look
- * at the host bridge, which should be device 0 function 0 on
- * bus 0. It is better to not enable MSI on systems that
+ * at the host bridge, which should be device 0 on bus 0.
+ * It is better to not enable MSI on systems that
* support it than the other way around, so be conservative
* here. So we don't enable MSI if we don't find a host
* bridge there. We also deliberately don't enable MSI on
* chipsets from low-end manifacturers like VIA and SiS.
*/
- tag = pci_make_tag(pc, 0, 0, 0);
- id = pci_conf_read(pc, tag, PCI_ID_REG);
- class = pci_conf_read(pc, tag, PCI_CLASS_REG);
-
- if (PCI_CLASS(class) != PCI_CLASS_BRIDGE ||
- PCI_SUBCLASS(class) != PCI_SUBCLASS_BRIDGE_HOST)
+ for (i = 0; i <= 7; i++) {
+ tag = pci_make_tag(pc, 0, 0, i);
+ id = pci_conf_read(pc, tag, PCI_ID_REG);
+ class = pci_conf_read(pc, tag, PCI_CLASS_REG);
+
+ if (PCI_CLASS(class) == PCI_CLASS_BRIDGE &&
+ PCI_SUBCLASS(class) == PCI_SUBCLASS_BRIDGE_HOST) {
+ havehb = true;
+ break;
+ }
+ }
+ if (havehb == false)
return;
/* VMware and KVM use old chipset, but they can use MSI/MSI-X */
CVS commit: [netbsd-8] src/sys/arch/x86/pci
Module Name:src
Committed By: martin
Date: Tue Aug 22 16:12:55 UTC 2023
Modified Files:
src/sys/arch/x86/pci [netbsd-8]: amdsmn.c amdzentemp.c
Log Message:
Pull up following revision(s) (requested by msaitoh in ticket #1888):
sys/arch/x86/pci/amdzentemp.c: revision 1.20
sys/arch/x86/pci/amdsmn.c: revision 1.17
sys/arch/x86/pci/amdzentemp.c: revision 1.19
Add Zen4 Ryzen "Phoenix" support.
Add Zen2 Mendocino APU support.
Add Zen4 Phoenix support.
To generate a diff of this commit:
cvs rdiff -u -r1.3.2.6 -r1.3.2.7 src/sys/arch/x86/pci/amdsmn.c
cvs rdiff -u -r1.7.2.5 -r1.7.2.6 src/sys/arch/x86/pci/amdzentemp.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/pci/amdsmn.c
diff -u src/sys/arch/x86/pci/amdsmn.c:1.3.2.6 src/sys/arch/x86/pci/amdsmn.c:1.3.2.7
--- src/sys/arch/x86/pci/amdsmn.c:1.3.2.6 Wed Jun 21 18:58:22 2023
+++ src/sys/arch/x86/pci/amdsmn.c Tue Aug 22 16:12:54 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: amdsmn.c,v 1.3.2.6 2023/06/21 18:58:22 martin Exp $ */
+/* $NetBSD: amdsmn.c,v 1.3.2.7 2023/08/22 16:12:54 martin Exp $ */
/*-
* Copyright (c) 2017, 2019 Conrad Meyer
@@ -29,7 +29,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: amdsmn.c,v 1.3.2.6 2023/06/21 18:58:22 martin Exp $ ");
+__KERNEL_RCSID(0, "$NetBSD: amdsmn.c,v 1.3.2.7 2023/08/22 16:12:54 martin Exp $ ");
/*
* Driver for the AMD Family 15h (model 60+) and 17h CPU
@@ -112,6 +112,11 @@ static const struct pciid {
.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
.amdsmn_data_reg = F17H_SMN_DATA_REG,
},
+ {
+ .amdsmn_deviceid = PCI_PRODUCT_AMD_F19_7X_RC,
+ .amdsmn_addr_reg = F17H_SMN_ADDR_REG,
+ .amdsmn_data_reg = F17H_SMN_DATA_REG,
+ },
};
static int amdsmn_match(device_t, cfdata_t, void *);
Index: src/sys/arch/x86/pci/amdzentemp.c
diff -u src/sys/arch/x86/pci/amdzentemp.c:1.7.2.5 src/sys/arch/x86/pci/amdzentemp.c:1.7.2.6
--- src/sys/arch/x86/pci/amdzentemp.c:1.7.2.5 Wed Jun 21 18:58:22 2023
+++ src/sys/arch/x86/pci/amdzentemp.c Tue Aug 22 16:12:54 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: amdzentemp.c,v 1.7.2.5 2023/06/21 18:58:22 martin Exp $ */
+/* $NetBSD: amdzentemp.c,v 1.7.2.6 2023/08/22 16:12:54 martin Exp $ */
/* $OpenBSD: kate.c,v 1.2 2008/03/27 04:52:03 cnst Exp $ */
/*
@@ -53,7 +53,7 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: amdzentemp.c,v 1.7.2.5 2023/06/21 18:58:22 martin Exp $ ");
+__KERNEL_RCSID(0, "$NetBSD: amdzentemp.c,v 1.7.2.6 2023/08/22 16:12:54 martin Exp $ ");
#include
#include
@@ -370,15 +370,19 @@ amdzentemp_probe_ccd_sensors17h(struct a
{
int maxreg;
- sc->sc_ccd_offset = 0x154;
-
switch (model) {
case 0x00 ... 0x2f: /* Zen1, Zen+ */
+ sc->sc_ccd_offset = 0x154;
maxreg = 4;
break;
case 0x30 ... 0x3f: /* Zen2 TR (Castle Peak)/EPYC (Rome) */
case 0x60 ... 0x7f: /* Zen2 Ryzen (Renoir APU, Matisse) */
case 0x90 ... 0x9f: /* Zen2 Ryzen (Van Gogh APU) */
+ sc->sc_ccd_offset = 0x154;
+ maxreg = 8;
+ break;
+ case 0xa0 ... 0xaf: /* Zen2 Ryzen (Mendocino APU) */
+ sc->sc_ccd_offset = 0x300;
maxreg = 8;
break;
default:
@@ -403,6 +407,7 @@ amdzentemp_probe_ccd_sensors19h(struct a
maxreg = 8;
break;
case 0x60 ... 0x6f: /* Zen4 Ryzen "Raphael" */
+ case 0x70 ... 0x7f: /* Zen4 Ryzen "Phoenix" */
sc->sc_ccd_offset = 0x308;
maxreg = 8;
break;
CVS commit: [netbsd-8] src/sys/arch/x86/pci
Module Name:src Committed By: martin Date: Tue Aug 22 16:12:55 UTC 2023 Modified Files: src/sys/arch/x86/pci [netbsd-8]: amdsmn.c amdzentemp.c Log Message: Pull up following revision(s) (requested by msaitoh in ticket #1888): sys/arch/x86/pci/amdzentemp.c: revision 1.20 sys/arch/x86/pci/amdsmn.c: revision 1.17 sys/arch/x86/pci/amdzentemp.c: revision 1.19 Add Zen4 Ryzen "Phoenix" support. Add Zen2 Mendocino APU support. Add Zen4 Phoenix support. To generate a diff of this commit: cvs rdiff -u -r1.3.2.6 -r1.3.2.7 src/sys/arch/x86/pci/amdsmn.c cvs rdiff -u -r1.7.2.5 -r1.7.2.6 src/sys/arch/x86/pci/amdzentemp.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/mips/include
Module Name:src Committed By: martin Date: Tue Aug 1 13:18:21 UTC 2023 Modified Files: src/sys/arch/mips/include [netbsd-8]: asm.h Log Message: Apply patch, requested by riastradh in ticket #1859: sys/arch/mips/include/asm.h (apply patch) Additional build fix for mips1 (and mips2?) (patch taken from [pullup-9 #1676]) To generate a diff of this commit: cvs rdiff -u -r1.54.6.1 -r1.54.6.2 src/sys/arch/mips/include/asm.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/asm.h diff -u src/sys/arch/mips/include/asm.h:1.54.6.1 src/sys/arch/mips/include/asm.h:1.54.6.2 --- src/sys/arch/mips/include/asm.h:1.54.6.1 Mon Jul 31 13:56:14 2023 +++ src/sys/arch/mips/include/asm.h Tue Aug 1 13:18:21 2023 @@ -1,4 +1,4 @@ -/* $NetBSD: asm.h,v 1.54.6.1 2023/07/31 13:56:14 martin Exp $ */ +/* $NetBSD: asm.h,v 1.54.6.2 2023/08/01 13:18:21 martin Exp $ */ /* * Copyright (c) 1992, 1993 @@ -511,8 +511,13 @@ _C_LABEL(x): #endif /* XXX pullup more mips barrier improvements here */ +#if defined(MULTIPROCESSOR) && (__mips >= 3 || !defined(__mips_o32)) #define SYNC_ACQ sync #define SYNC_REL sync +#else +#define SYNC_ACQ /* nothing */ +#define SYNC_REL /* nothing */ +#endif /* * Store-before-load barrier. Do not use this unless you know what
CVS commit: [netbsd-8] src/sys/arch/mips/include
Module Name:src Committed By: martin Date: Tue Aug 1 13:18:21 UTC 2023 Modified Files: src/sys/arch/mips/include [netbsd-8]: asm.h Log Message: Apply patch, requested by riastradh in ticket #1859: sys/arch/mips/include/asm.h (apply patch) Additional build fix for mips1 (and mips2?) (patch taken from [pullup-9 #1676]) To generate a diff of this commit: cvs rdiff -u -r1.54.6.1 -r1.54.6.2 src/sys/arch/mips/include/asm.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/xen/x86
Module Name:src Committed By: martin Date: Mon Jul 31 15:41:01 UTC 2023 Modified Files: src/sys/arch/xen/x86 [netbsd-8]: hypervisor_machdep.c Log Message: Pull up following revision(s) (requested by riastradh in ticket #1864): sys/arch/xen/x86/hypervisor_machdep.c: revision 1.46 (patch) xen/x86: Need kpreempt_disable/enable around curcpu() access. This is called with `hardware' interrupts enabled (between sti and cli), so presumably preemption is possible here. To generate a diff of this commit: cvs rdiff -u -r1.28 -r1.28.12.1 src/sys/arch/xen/x86/hypervisor_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/xen/x86/hypervisor_machdep.c diff -u src/sys/arch/xen/x86/hypervisor_machdep.c:1.28 src/sys/arch/xen/x86/hypervisor_machdep.c:1.28.12.1 --- src/sys/arch/xen/x86/hypervisor_machdep.c:1.28 Sun Sep 21 12:46:15 2014 +++ src/sys/arch/xen/x86/hypervisor_machdep.c Mon Jul 31 15:41:00 2023 @@ -1,4 +1,4 @@ -/* $NetBSD: hypervisor_machdep.c,v 1.28 2014/09/21 12:46:15 bouyer Exp $ */ +/* $NetBSD: hypervisor_machdep.c,v 1.28.12.1 2023/07/31 15:41:00 martin Exp $ */ /* * @@ -54,7 +54,7 @@ #include -__KERNEL_RCSID(0, "$NetBSD: hypervisor_machdep.c,v 1.28 2014/09/21 12:46:15 bouyer Exp $"); +__KERNEL_RCSID(0, "$NetBSD: hypervisor_machdep.c,v 1.28.12.1 2023/07/31 15:41:00 martin Exp $"); #include #include @@ -163,6 +163,8 @@ stipending(void) volatile struct vcpu_info *vci; int ret; + kpreempt_disable(); + ret = 0; ci = curcpu(); vci = ci->ci_vcpu; @@ -206,6 +208,8 @@ stipending(void) ci->ci_ipending); #endif + kpreempt_enable(); + return (ret); }
CVS commit: [netbsd-8] src/sys/arch/xen/x86
Module Name:src Committed By: martin Date: Mon Jul 31 15:41:01 UTC 2023 Modified Files: src/sys/arch/xen/x86 [netbsd-8]: hypervisor_machdep.c Log Message: Pull up following revision(s) (requested by riastradh in ticket #1864): sys/arch/xen/x86/hypervisor_machdep.c: revision 1.46 (patch) xen/x86: Need kpreempt_disable/enable around curcpu() access. This is called with `hardware' interrupts enabled (between sti and cli), so presumably preemption is possible here. To generate a diff of this commit: cvs rdiff -u -r1.28 -r1.28.12.1 src/sys/arch/xen/x86/hypervisor_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/xen/xen
Module Name:src Committed By: martin Date: Mon Jul 31 15:31:44 UTC 2023 Modified Files: src/sys/arch/xen/xen [netbsd-8]: if_xennet_xenbus.c Log Message: Apply patch, requested by riastradh in ticket #1863, pulling up the essential part of sys/arch/xen/xen/if_xennet_xenbus.c 1.129 xennet(4): Add missing membar. To generate a diff of this commit: cvs rdiff -u -r1.70.6.2 -r1.70.6.3 src/sys/arch/xen/xen/if_xennet_xenbus.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/xen/xen/if_xennet_xenbus.c diff -u src/sys/arch/xen/xen/if_xennet_xenbus.c:1.70.6.2 src/sys/arch/xen/xen/if_xennet_xenbus.c:1.70.6.3 --- src/sys/arch/xen/xen/if_xennet_xenbus.c:1.70.6.2 Mon Jan 21 20:12:15 2019 +++ src/sys/arch/xen/xen/if_xennet_xenbus.c Mon Jul 31 15:31:43 2023 @@ -1,4 +1,4 @@ -/* $NetBSD: if_xennet_xenbus.c,v 1.70.6.2 2019/01/21 20:12:15 martin Exp $ */ +/* $NetBSD: if_xennet_xenbus.c,v 1.70.6.3 2023/07/31 15:31:43 martin Exp $ */ /* * Copyright (c) 2006 Manuel Bouyer. @@ -85,7 +85,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: if_xennet_xenbus.c,v 1.70.6.2 2019/01/21 20:12:15 martin Exp $"); +__KERNEL_RCSID(0, "$NetBSD: if_xennet_xenbus.c,v 1.70.6.3 2023/07/31 15:31:43 martin Exp $"); #include "opt_xen.h" #include "opt_nfs_boot.h" @@ -947,7 +947,7 @@ again: sc->sc_tx_ring.sring->rsp_event = resp_prod + ((sc->sc_tx_ring.sring->req_prod - resp_prod) >> 1) + 1; ifp->if_timer = 0; - xen_wmb(); + xen_mb(); if (resp_prod != sc->sc_tx_ring.sring->rsp_prod) goto again; end:
CVS commit: [netbsd-8] src/sys/arch/xen/xen
Module Name:src Committed By: martin Date: Mon Jul 31 15:31:44 UTC 2023 Modified Files: src/sys/arch/xen/xen [netbsd-8]: if_xennet_xenbus.c Log Message: Apply patch, requested by riastradh in ticket #1863, pulling up the essential part of sys/arch/xen/xen/if_xennet_xenbus.c 1.129 xennet(4): Add missing membar. To generate a diff of this commit: cvs rdiff -u -r1.70.6.2 -r1.70.6.3 src/sys/arch/xen/xen/if_xennet_xenbus.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/xen
Module Name:src Committed By: martin Date: Mon Jul 31 14:59:25 UTC 2023 Modified Files: src/sys/arch/xen/include [netbsd-8]: xen.h src/sys/arch/xen/x86 [netbsd-8]: xen_intr.c Log Message: Pull up following revision(s) (requested by riastradh in ticket #1862): sys/arch/xen/x86/xen_intr.c: revision 1.31 (patch) sys/arch/xen/include/xen.h (apply patch) xen_intr.c: Use kpreempt_disable/enable around access to curcpu(). curcpu() is not otherwise guaranteed to be stable at these points. While here, nix nonsensical membars. This need only be synchronized with interrupts on the same CPU. Proposed on port-xen: https://mail-index.netbsd.org/port-xen/2022/07/13/msg010250.html To generate a diff of this commit: cvs rdiff -u -r1.37.10.1 -r1.37.10.2 src/sys/arch/xen/include/xen.h cvs rdiff -u -r1.9 -r1.9.58.1 src/sys/arch/xen/x86/xen_intr.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/xen
Module Name:src
Committed By: martin
Date: Mon Jul 31 14:59:25 UTC 2023
Modified Files:
src/sys/arch/xen/include [netbsd-8]: xen.h
src/sys/arch/xen/x86 [netbsd-8]: xen_intr.c
Log Message:
Pull up following revision(s) (requested by riastradh in ticket #1862):
sys/arch/xen/x86/xen_intr.c: revision 1.31 (patch)
sys/arch/xen/include/xen.h (apply patch)
xen_intr.c: Use kpreempt_disable/enable around access to curcpu().
curcpu() is not otherwise guaranteed to be stable at these points.
While here, nix nonsensical membars. This need only be synchronized
with interrupts on the same CPU.
Proposed on port-xen:
https://mail-index.netbsd.org/port-xen/2022/07/13/msg010250.html
To generate a diff of this commit:
cvs rdiff -u -r1.37.10.1 -r1.37.10.2 src/sys/arch/xen/include/xen.h
cvs rdiff -u -r1.9 -r1.9.58.1 src/sys/arch/xen/x86/xen_intr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/xen/include/xen.h
diff -u src/sys/arch/xen/include/xen.h:1.37.10.1 src/sys/arch/xen/include/xen.h:1.37.10.2
--- src/sys/arch/xen/include/xen.h:1.37.10.1 Sat Oct 13 17:16:12 2018
+++ src/sys/arch/xen/include/xen.h Mon Jul 31 14:59:25 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: xen.h,v 1.37.10.1 2018/10/13 17:16:12 martin Exp $ */
+/* $NetBSD: xen.h,v 1.37.10.2 2023/07/31 14:59:25 martin Exp $ */
/*
*
@@ -142,34 +142,46 @@ void xpq_flush_cache(void);
#define __save_flags(x) \
do { \
+ kpreempt_disable(); \
(x) = curcpu()->ci_vcpu->evtchn_upcall_mask; \
+ kpreempt_enable(); \
} while (0)
#define __restore_flags(x) \
do { \
- volatile struct vcpu_info *_vci = curcpu()->ci_vcpu; \
+ uint8_t _flags = (x); \
+ struct cpu_info *_ci; \
+ \
+ kpreempt_disable(); \
+ _ci = curcpu(); \
+ _ci->ci_vcpu->evtchn_upcall_mask = _flags; \
__insn_barrier(); \
- if ((_vci->evtchn_upcall_mask = (x)) == 0) { \
- x86_lfence(); \
- if (__predict_false(_vci->evtchn_upcall_pending)) \
- hypervisor_force_callback(); \
- }\
+ if (__predict_false(_ci->ci_vcpu->evtchn_upcall_pending && \
+ _flags == 0)) \
+ hypervisor_force_callback();\
+ kpreempt_enable(); \
} while (0)
#define __cli()\
do { \
+ kpreempt_disable(); \
curcpu()->ci_vcpu->evtchn_upcall_mask = 1; \
- x86_lfence(); \
+ kpreempt_enable(); \
+ __insn_barrier(); \
} while (0)
#define __sti()\
do { \
- volatile struct vcpu_info *_vci = curcpu()->ci_vcpu; \
+ struct cpu_info *_ci; \
+ \
+ __insn_barrier(); \
+ kpreempt_disable(); \
+ _ci = curcpu(); \
+ _ci->ci_vcpu->evtchn_upcall_mask = 0;\
__insn_barrier(); \
- _vci->evtchn_upcall_mask = 0; \
- x86_lfence(); /* unmask then check (avoid races) */ \
- if (__predict_false(_vci->evtchn_upcall_pending)) \
+ if (__predict_false(_ci->ci_vcpu->evtchn_upcall_pending)) \
hypervisor_force_callback();\
+ kpreempt_enable(); \
} while (0)
#define cli() __cli()
Index: src/sys/arch/xen/x86/xen_intr.c
diff -u src/sys/arch/xen/x86/xen_intr.c:1.9 src/sys/arch/xen/x86/xen_intr.c:1.9.58.1
--- src/sys/arch/xen/x86/xen_intr.c:1.9 Fri Jan 16 20:16:47 2009
+++ src/sys/arch/xen/x86/xen_intr.c Mon Jul 31 14:59:25 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: xen_intr.c,v 1.9 2009/01/16 20:16:47 jym Exp $ */
+/* $NetBSD: xen_intr.c,v 1.9.58.1 2023/07/31 14:59:25 martin Exp $ */
/*-
* Copyright (c) 1998, 2001 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: xen_intr.c,v 1.9 2009/01/16 20:16:47 jym Exp $");
+__KERNEL_RCSID(0, "$NetBSD: xen_intr.c,v 1.9.58.1 2023/07/31 14:59:25 martin Exp $");
#include
@@ -97,18 +97,25 @@ x86_enable_intr(void)
u_long
x86_read_psl(void)
{
+ u_long psl;
+
+ kpreempt_disable();
+ psl = curcpu()->ci_vcpu->evtchn_upcall_mask;
+ kpreempt_enable();
- return (curcpu()->ci_vcpu->evtchn_upcall_mask);
+ return psl;
}
void
x86_write_psl(u_long psl)
{
- struct cpu_info *ci = curcpu();
+ struct cpu_info *ci;
+ kpreempt_disable();
+ ci = curcpu();
ci->ci_vcpu->evtchn_upcall_mask = psl;
- xen_rmb();
- if (ci->ci_vcpu->evtchn_upcall_pending && psl == 0) {
+ __insn_barrier();
+ if (__predict_false(ci->ci_vcpu->evtchn_upcall_pending) && psl == 0)
hypervisor_force_callback();
- }
+ kpreempt_enable();
}
CVS commit: [netbsd-8] src/sys/arch
Module Name:src Committed By: martin Date: Mon Jul 31 14:26:26 UTC 2023 Modified Files: src/sys/arch/alpha/alpha [netbsd-8]: locore.s multiproc.s src/sys/arch/arm/cortex [netbsd-8]: a9_mpsubr.S cortex_init.S Log Message: Pull up following revision(s) (requested by riastradh in ticket #1859): sys/arch/ia64/ia64/vm_machdep.c: revision 1.18 sys/arch/powerpc/powerpc/locore_subr.S: revision 1.67 sys/arch/aarch64/aarch64/locore.S: revision 1.91 sys/arch/mips/include/asm.h: revision 1.74 sys/arch/hppa/include/cpu.h: revision 1.13 sys/arch/arm/arm/armv6_start.S: revision 1.38 (applied also to sys/arch/arm/cortex/a9_mpsubr.S, sys/arch/arm/cortex/a9_mpsubr.S, sys/arch/arm/cortex/cortex_init.S) sys/arch/evbmips/ingenic/cpu_startup.S: revision 1.2 sys/arch/mips/mips/locore.S: revision 1.229 sys/arch/alpha/include/asm.h: revision 1.45 (applied to sys/arch/alpha/alpha/multiproc.s) sys/arch/sparc64/sparc64/locore.s: revision 1.432 sys/arch/vax/vax/subr.S: revision 1.42 sys/arch/mips/mips/locore_mips3.S: revision 1.116 sys/arch/ia64/ia64/machdep.c: revision 1.44 sys/arch/arm/arm32/cpuswitch.S: revision 1.106 sys/arch/sparc/sparc/locore.s: revision 1.284 (all via patch) aarch64: Add missing barriers in cpu_switchto. Details in comments. Note: This is a conservative change that inserts a barrier where there was a comment saying none is needed, which is probably correct. The goal of this change is to systematically add barriers to be confident in correctness; subsequent changes may remove some bariers, as an optimization, with an explanation of why each barrier is not needed. PR kern/57240 alpha: Add missing barriers in cpu_switchto. Details in comments. arm32: Add missing barriers in cpu_switchto. Details in comments. hppa: Add missing barriers in cpu_switchto. Not sure hppa has ever had working MULTIPROCESSOR, so maybe no pullups needed? ia64: Add missing barriers in cpu_switchto. (ia64 has never really worked, so no pullups needed, right?) mips: Add missing barriers in cpu_switchto. Details in comments. powerpc: Add missing barriers in cpu_switchto. Details in comments. sparc: Add missing barriers in cpu_switchto. sparc64: Add missing barriers in cpu_switchto. Details in comments. vax: Note where cpu_switchto needs barriers. Not sure vax has ever had working MULTIPROCESSOR, though, and I'm not even sure how to spell store-before-load barriers on VAX, so no functional change for now. To generate a diff of this commit: cvs rdiff -u -r1.122 -r1.122.32.1 src/sys/arch/alpha/alpha/locore.s cvs rdiff -u -r1.13 -r1.13.80.1 src/sys/arch/alpha/alpha/multiproc.s cvs rdiff -u -r1.47.8.2 -r1.47.8.3 src/sys/arch/arm/cortex/a9_mpsubr.S cvs rdiff -u -r1.1 -r1.1.12.1 src/sys/arch/arm/cortex/cortex_init.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/alpha/alpha/locore.s diff -u src/sys/arch/alpha/alpha/locore.s:1.122 src/sys/arch/alpha/alpha/locore.s:1.122.32.1 --- src/sys/arch/alpha/alpha/locore.s:1.122 Sun Feb 19 21:05:58 2012 +++ src/sys/arch/alpha/alpha/locore.s Mon Jul 31 14:26:25 2023 @@ -1,4 +1,4 @@ -/* $NetBSD: locore.s,v 1.122 2012/02/19 21:05:58 rmind Exp $ */ +/* $NetBSD: locore.s,v 1.122.32.1 2023/07/31 14:26:25 martin Exp $ */ /*- * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. @@ -67,7 +67,7 @@ #include -__KERNEL_RCSID(0, "$NetBSD: locore.s,v 1.122 2012/02/19 21:05:58 rmind Exp $"); +__KERNEL_RCSID(0, "$NetBSD: locore.s,v 1.122.32.1 2023/07/31 14:26:25 martin Exp $"); #include "assym.h" @@ -686,8 +686,28 @@ LEAF(cpu_switchto, 0) SWITCH_CONTEXT/* swap the context */ - GET_CPUINFO + /* + * Issue barriers to coordinate mutex_exit on this CPU with + * mutex_vector_enter on another CPU. + * + * 1. Any prior mutex_exit by oldlwp must be visible to other + *CPUs before we set ci_curlwp := newlwp on this one, + *requiring a store-before-store barrier. + * + * 2. ci_curlwp := newlwp must be visible on all other CPUs + *before any subsequent mutex_exit by newlwp can even test + *whether there might be waiters, requiring a + *store-before-load barrier. + * + * See kern_mutex.c for details -- this is necessary for + * adaptive mutexes to detect whether the lwp is on the CPU in + * order to safely block without requiring atomic r/m/w in + * mutex_exit. + */ + GET_CPUINFO/* v0 = curcpu() */ + wmb /* store-before-store XXX patch out if !MP? */ stq s2, CPU_INFO_CURLWP(v0) /* curlwp = l */ + mb /* store-before-load XXX patch out if !MP? */ /* * Now running on the new PCB. Index: src/sys/arch/alpha/alpha/multiproc.s diff -u src/sys/arch/alpha/alpha/multiproc.s:1.13 src/sys/arch/alpha/alpha/multiproc.s:1.13.80.1 ---
CVS commit: [netbsd-8] src/sys/arch
Module Name:src Committed By: martin Date: Mon Jul 31 14:26:26 UTC 2023 Modified Files: src/sys/arch/alpha/alpha [netbsd-8]: locore.s multiproc.s src/sys/arch/arm/cortex [netbsd-8]: a9_mpsubr.S cortex_init.S Log Message: Pull up following revision(s) (requested by riastradh in ticket #1859): sys/arch/ia64/ia64/vm_machdep.c: revision 1.18 sys/arch/powerpc/powerpc/locore_subr.S: revision 1.67 sys/arch/aarch64/aarch64/locore.S: revision 1.91 sys/arch/mips/include/asm.h: revision 1.74 sys/arch/hppa/include/cpu.h: revision 1.13 sys/arch/arm/arm/armv6_start.S: revision 1.38 (applied also to sys/arch/arm/cortex/a9_mpsubr.S, sys/arch/arm/cortex/a9_mpsubr.S, sys/arch/arm/cortex/cortex_init.S) sys/arch/evbmips/ingenic/cpu_startup.S: revision 1.2 sys/arch/mips/mips/locore.S: revision 1.229 sys/arch/alpha/include/asm.h: revision 1.45 (applied to sys/arch/alpha/alpha/multiproc.s) sys/arch/sparc64/sparc64/locore.s: revision 1.432 sys/arch/vax/vax/subr.S: revision 1.42 sys/arch/mips/mips/locore_mips3.S: revision 1.116 sys/arch/ia64/ia64/machdep.c: revision 1.44 sys/arch/arm/arm32/cpuswitch.S: revision 1.106 sys/arch/sparc/sparc/locore.s: revision 1.284 (all via patch) aarch64: Add missing barriers in cpu_switchto. Details in comments. Note: This is a conservative change that inserts a barrier where there was a comment saying none is needed, which is probably correct. The goal of this change is to systematically add barriers to be confident in correctness; subsequent changes may remove some bariers, as an optimization, with an explanation of why each barrier is not needed. PR kern/57240 alpha: Add missing barriers in cpu_switchto. Details in comments. arm32: Add missing barriers in cpu_switchto. Details in comments. hppa: Add missing barriers in cpu_switchto. Not sure hppa has ever had working MULTIPROCESSOR, so maybe no pullups needed? ia64: Add missing barriers in cpu_switchto. (ia64 has never really worked, so no pullups needed, right?) mips: Add missing barriers in cpu_switchto. Details in comments. powerpc: Add missing barriers in cpu_switchto. Details in comments. sparc: Add missing barriers in cpu_switchto. sparc64: Add missing barriers in cpu_switchto. Details in comments. vax: Note where cpu_switchto needs barriers. Not sure vax has ever had working MULTIPROCESSOR, though, and I'm not even sure how to spell store-before-load barriers on VAX, so no functional change for now. To generate a diff of this commit: cvs rdiff -u -r1.122 -r1.122.32.1 src/sys/arch/alpha/alpha/locore.s cvs rdiff -u -r1.13 -r1.13.80.1 src/sys/arch/alpha/alpha/multiproc.s cvs rdiff -u -r1.47.8.2 -r1.47.8.3 src/sys/arch/arm/cortex/a9_mpsubr.S cvs rdiff -u -r1.1 -r1.1.12.1 src/sys/arch/arm/cortex/cortex_init.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch
Module Name:src
Committed By: martin
Date: Mon Jul 31 13:56:15 UTC 2023
Modified Files:
src/sys/arch/aarch64/aarch64 [netbsd-8]: locore.S
src/sys/arch/arm/arm32 [netbsd-8]: cpuswitch.S
src/sys/arch/evbmips/ingenic [netbsd-8]: cpu_startup.S
src/sys/arch/hppa/include [netbsd-8]: cpu.h
src/sys/arch/ia64/ia64 [netbsd-8]: machdep.c vm_machdep.c
src/sys/arch/mips/include [netbsd-8]: asm.h
src/sys/arch/mips/mips [netbsd-8]: locore.S locore_mips3.S
src/sys/arch/powerpc/powerpc [netbsd-8]: locore_subr.S
src/sys/arch/sparc/sparc [netbsd-8]: locore.s
src/sys/arch/sparc64/sparc64 [netbsd-8]: locore.s
src/sys/arch/vax/vax [netbsd-8]: subr.S
Log Message:
Pull up following revision(s) (requested by riastradh in ticket #1859):
sys/arch/ia64/ia64/vm_machdep.c: revision 1.18
sys/arch/powerpc/powerpc/locore_subr.S: revision 1.67
sys/arch/aarch64/aarch64/locore.S: revision 1.91
sys/arch/mips/include/asm.h: revision 1.74
sys/arch/hppa/include/cpu.h: revision 1.13
sys/arch/arm/arm/armv6_start.S: revision 1.38
(applied also to sys/arch/arm/cortex/a9_mpsubr.S,
sys/arch/arm/cortex/a9_mpsubr.S,
sys/arch/arm/cortex/cortex_init.S)
sys/arch/evbmips/ingenic/cpu_startup.S: revision 1.2
sys/arch/mips/mips/locore.S: revision 1.229
sys/arch/alpha/include/asm.h: revision 1.45
(applied to sys/arch/alpha/alpha/multiproc.s)
sys/arch/sparc64/sparc64/locore.s: revision 1.432
sys/arch/vax/vax/subr.S: revision 1.42
sys/arch/mips/mips/locore_mips3.S: revision 1.116
sys/arch/ia64/ia64/machdep.c: revision 1.44
sys/arch/arm/arm32/cpuswitch.S: revision 1.106
sys/arch/sparc/sparc/locore.s: revision 1.284
(all via patch)
aarch64: Add missing barriers in cpu_switchto.
Details in comments.
Note: This is a conservative change that inserts a barrier where
there was a comment saying none is needed, which is probably correct.
The goal of this change is to systematically add barriers to be
confident in correctness; subsequent changes may remove some bariers,
as an optimization, with an explanation of why each barrier is not
needed.
PR kern/57240
alpha: Add missing barriers in cpu_switchto.
Details in comments.
arm32: Add missing barriers in cpu_switchto.
Details in comments.
hppa: Add missing barriers in cpu_switchto.
Not sure hppa has ever had working MULTIPROCESSOR, so maybe no
pullups needed?
ia64: Add missing barriers in cpu_switchto.
(ia64 has never really worked, so no pullups needed, right?)
mips: Add missing barriers in cpu_switchto.
Details in comments.
powerpc: Add missing barriers in cpu_switchto.
Details in comments.
sparc: Add missing barriers in cpu_switchto.
sparc64: Add missing barriers in cpu_switchto.
Details in comments.
vax: Note where cpu_switchto needs barriers.
Not sure vax has ever had working MULTIPROCESSOR, though, and I'm not
even sure how to spell store-before-load barriers on VAX, so no
functional change for now.
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.1.22.1 src/sys/arch/aarch64/aarch64/locore.S
cvs rdiff -u -r1.90 -r1.90.10.1 src/sys/arch/arm/arm32/cpuswitch.S
cvs rdiff -u -r1.1 -r1.1.12.1 src/sys/arch/evbmips/ingenic/cpu_startup.S
cvs rdiff -u -r1.3 -r1.3.10.1 src/sys/arch/hppa/include/cpu.h
cvs rdiff -u -r1.38 -r1.38.6.1 src/sys/arch/ia64/ia64/machdep.c
cvs rdiff -u -r1.13 -r1.13.6.1 src/sys/arch/ia64/ia64/vm_machdep.c
cvs rdiff -u -r1.54 -r1.54.6.1 src/sys/arch/mips/include/asm.h
cvs rdiff -u -r1.208 -r1.208.8.1 src/sys/arch/mips/mips/locore.S
cvs rdiff -u -r1.113 -r1.113.8.1 src/sys/arch/mips/mips/locore_mips3.S
cvs rdiff -u -r1.55 -r1.55.6.1 src/sys/arch/powerpc/powerpc/locore_subr.S
cvs rdiff -u -r1.268.30.1 -r1.268.30.2 src/sys/arch/sparc/sparc/locore.s
cvs rdiff -u -r1.411 -r1.411.2.1 src/sys/arch/sparc64/sparc64/locore.s
cvs rdiff -u -r1.34 -r1.34.2.1 src/sys/arch/vax/vax/subr.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/locore.S
diff -u src/sys/arch/aarch64/aarch64/locore.S:1.1 src/sys/arch/aarch64/aarch64/locore.S:1.1.22.1
--- src/sys/arch/aarch64/aarch64/locore.S:1.1 Sun Aug 10 05:47:37 2014
+++ src/sys/arch/aarch64/aarch64/locore.S Mon Jul 31 13:56:14 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.1 2014/08/10 05:47:37 matt Exp $ */
+/* $NetBSD: locore.S,v 1.1.22.1 2023/07/31 13:56:14 martin Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -34,7 +34,7 @@
#include "opt_ddb.h"
-RCSID("$NetBSD: locore.S,v 1.1 2014/08/10 05:47:37 matt Exp $")
+RCSID("$NetBSD: locore.S,v 1.1.22.1 2023/07/31 13:56:14 martin Exp $")
/*
* At IPL_SCHED:
@@ -99,7 +99,27 @@ ENTRY_NP(cpu_switchto)
msr tpidr_el0, x4 // restore it
mrs x3, tpidr_el1 // get curcpu
+ /*
+ * Issue barriers to
CVS commit: [netbsd-8] src/sys/arch
Module Name:src Committed By: martin Date: Mon Jul 31 13:56:15 UTC 2023 Modified Files: src/sys/arch/aarch64/aarch64 [netbsd-8]: locore.S src/sys/arch/arm/arm32 [netbsd-8]: cpuswitch.S src/sys/arch/evbmips/ingenic [netbsd-8]: cpu_startup.S src/sys/arch/hppa/include [netbsd-8]: cpu.h src/sys/arch/ia64/ia64 [netbsd-8]: machdep.c vm_machdep.c src/sys/arch/mips/include [netbsd-8]: asm.h src/sys/arch/mips/mips [netbsd-8]: locore.S locore_mips3.S src/sys/arch/powerpc/powerpc [netbsd-8]: locore_subr.S src/sys/arch/sparc/sparc [netbsd-8]: locore.s src/sys/arch/sparc64/sparc64 [netbsd-8]: locore.s src/sys/arch/vax/vax [netbsd-8]: subr.S Log Message: Pull up following revision(s) (requested by riastradh in ticket #1859): sys/arch/ia64/ia64/vm_machdep.c: revision 1.18 sys/arch/powerpc/powerpc/locore_subr.S: revision 1.67 sys/arch/aarch64/aarch64/locore.S: revision 1.91 sys/arch/mips/include/asm.h: revision 1.74 sys/arch/hppa/include/cpu.h: revision 1.13 sys/arch/arm/arm/armv6_start.S: revision 1.38 (applied also to sys/arch/arm/cortex/a9_mpsubr.S, sys/arch/arm/cortex/a9_mpsubr.S, sys/arch/arm/cortex/cortex_init.S) sys/arch/evbmips/ingenic/cpu_startup.S: revision 1.2 sys/arch/mips/mips/locore.S: revision 1.229 sys/arch/alpha/include/asm.h: revision 1.45 (applied to sys/arch/alpha/alpha/multiproc.s) sys/arch/sparc64/sparc64/locore.s: revision 1.432 sys/arch/vax/vax/subr.S: revision 1.42 sys/arch/mips/mips/locore_mips3.S: revision 1.116 sys/arch/ia64/ia64/machdep.c: revision 1.44 sys/arch/arm/arm32/cpuswitch.S: revision 1.106 sys/arch/sparc/sparc/locore.s: revision 1.284 (all via patch) aarch64: Add missing barriers in cpu_switchto. Details in comments. Note: This is a conservative change that inserts a barrier where there was a comment saying none is needed, which is probably correct. The goal of this change is to systematically add barriers to be confident in correctness; subsequent changes may remove some bariers, as an optimization, with an explanation of why each barrier is not needed. PR kern/57240 alpha: Add missing barriers in cpu_switchto. Details in comments. arm32: Add missing barriers in cpu_switchto. Details in comments. hppa: Add missing barriers in cpu_switchto. Not sure hppa has ever had working MULTIPROCESSOR, so maybe no pullups needed? ia64: Add missing barriers in cpu_switchto. (ia64 has never really worked, so no pullups needed, right?) mips: Add missing barriers in cpu_switchto. Details in comments. powerpc: Add missing barriers in cpu_switchto. Details in comments. sparc: Add missing barriers in cpu_switchto. sparc64: Add missing barriers in cpu_switchto. Details in comments. vax: Note where cpu_switchto needs barriers. Not sure vax has ever had working MULTIPROCESSOR, though, and I'm not even sure how to spell store-before-load barriers on VAX, so no functional change for now. To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.1.22.1 src/sys/arch/aarch64/aarch64/locore.S cvs rdiff -u -r1.90 -r1.90.10.1 src/sys/arch/arm/arm32/cpuswitch.S cvs rdiff -u -r1.1 -r1.1.12.1 src/sys/arch/evbmips/ingenic/cpu_startup.S cvs rdiff -u -r1.3 -r1.3.10.1 src/sys/arch/hppa/include/cpu.h cvs rdiff -u -r1.38 -r1.38.6.1 src/sys/arch/ia64/ia64/machdep.c cvs rdiff -u -r1.13 -r1.13.6.1 src/sys/arch/ia64/ia64/vm_machdep.c cvs rdiff -u -r1.54 -r1.54.6.1 src/sys/arch/mips/include/asm.h cvs rdiff -u -r1.208 -r1.208.8.1 src/sys/arch/mips/mips/locore.S cvs rdiff -u -r1.113 -r1.113.8.1 src/sys/arch/mips/mips/locore_mips3.S cvs rdiff -u -r1.55 -r1.55.6.1 src/sys/arch/powerpc/powerpc/locore_subr.S cvs rdiff -u -r1.268.30.1 -r1.268.30.2 src/sys/arch/sparc/sparc/locore.s cvs rdiff -u -r1.411 -r1.411.2.1 src/sys/arch/sparc64/sparc64/locore.s cvs rdiff -u -r1.34 -r1.34.2.1 src/sys/arch/vax/vax/subr.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Sat Jul 29 11:03:21 UTC 2023
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: coretemp.c
Log Message:
Pull up following revision(s) (requested by msaitoh in ticket #1857):
sys/arch/x86/x86/coretemp.c: revision 1.38-1.39 (patch)
coretemp(4): Change limits of Tjmax.
- Change the lower limit from 70 to 60. At least, some BIOSes can change
the value down to 62.
- Change the upper limit from 110 to 120. At least, some BIOSes can change
the value up to 115.
- Print error message when rdmsr(TEMPERATURE_TARGET) failed.
- When Tjmax exceeded the limit, print warning message and use the value
as it is.
- KNF.
To generate a diff of this commit:
cvs rdiff -u -r1.35.10.2 -r1.35.10.3 src/sys/arch/x86/x86/coretemp.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/coretemp.c
diff -u src/sys/arch/x86/x86/coretemp.c:1.35.10.2 src/sys/arch/x86/x86/coretemp.c:1.35.10.3
--- src/sys/arch/x86/x86/coretemp.c:1.35.10.2 Wed Aug 5 16:05:49 2020
+++ src/sys/arch/x86/x86/coretemp.c Sat Jul 29 11:03:21 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: coretemp.c,v 1.35.10.2 2020/08/05 16:05:49 martin Exp $ */
+/* $NetBSD: coretemp.c,v 1.35.10.3 2023/07/29 11:03:21 martin Exp $ */
/*-
* Copyright (c) 2011 The NetBSD Foundation, Inc.
@@ -61,7 +61,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: coretemp.c,v 1.35.10.2 2020/08/05 16:05:49 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: coretemp.c,v 1.35.10.3 2023/07/29 11:03:21 martin Exp $");
#include
#include
@@ -102,6 +102,10 @@ __KERNEL_RCSID(0, "$NetBSD: coretemp.c,v
#define MSR_TEMP_TARGET_READOUT __BITS(16, 23)
+#define TJMAX_DEFAULT 100
+#define TJMAX_LIMIT_LOW 60
+#define TJMAX_LIMIT_HIGH 120
+
static int coretemp_match(device_t, cfdata_t, void *);
static void coretemp_attach(device_t, device_t, void *);
static int coretemp_detach(device_t, int);
@@ -259,16 +263,15 @@ coretemp_tjmax(device_t self)
{
struct coretemp_softc *sc = device_private(self);
struct cpu_info *ci = sc->sc_ci;
- uint32_t model, stepping;
uint64_t msr;
+ uint32_t model, stepping;
+ int tjmax;
model = CPUID_TO_MODEL(ci->ci_signature);
stepping = CPUID_TO_STEPPING(ci->ci_signature);
- /*
- * Use 100C as the initial value.
- */
- sc->sc_tjmax = 100;
+ /* Set the initial value. */
+ sc->sc_tjmax = TJMAX_DEFAULT;
if ((model == 0x0f && stepping >= 2) || (model == 0x0e)) {
/*
@@ -304,20 +307,20 @@ coretemp_tjmax(device_t self)
sc->sc_tjmax = 90;
} else {
notee:
- /*
- * Attempt to get Tj(max) from IA32_TEMPERATURE_TARGET,
- * but only consider the interval [70, 110] C as valid.
- * It is not fully known which CPU models have the MSR.
- */
- if (rdmsr_safe(MSR_TEMPERATURE_TARGET, ) == EFAULT)
- return;
-
- msr = __SHIFTOUT(msr, MSR_TEMP_TARGET_READOUT);
-
- if (msr >= 70 && msr <= 110) {
- sc->sc_tjmax = msr;
+ /* Attempt to get Tj(max) from IA32_TEMPERATURE_TARGET. */
+ if (rdmsr_safe(MSR_TEMPERATURE_TARGET, ) == EFAULT) {
+ aprint_error_dev(sc->sc_dev,
+ "Failed to read TEMPERATURE_TARGET MSR. "
+ "Use the default (%d)\n", sc->sc_tjmax);
return;
}
+
+ tjmax = __SHIFTOUT(msr, MSR_TEMP_TARGET_READOUT);
+ if ((tjmax < TJMAX_LIMIT_LOW) || (tjmax > TJMAX_LIMIT_HIGH))
+ aprint_error_dev(sc->sc_dev,
+ "WARNING: Tjmax(%d) might exceeded the limit.\n",
+ tjmax);
+ sc->sc_tjmax = tjmax;
}
}
@@ -334,7 +337,7 @@ coretemp_refresh(struct sysmon_envsys *s
static void
coretemp_refresh_xcall(void *arg0, void *arg1)
{
-struct coretemp_softc *sc = arg0;
+ struct coretemp_softc *sc = arg0;
envsys_data_t *edata = arg1;
uint64_t msr;
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src Committed By: martin Date: Sat Jul 29 11:03:21 UTC 2023 Modified Files: src/sys/arch/x86/x86 [netbsd-8]: coretemp.c Log Message: Pull up following revision(s) (requested by msaitoh in ticket #1857): sys/arch/x86/x86/coretemp.c: revision 1.38-1.39 (patch) coretemp(4): Change limits of Tjmax. - Change the lower limit from 70 to 60. At least, some BIOSes can change the value down to 62. - Change the upper limit from 110 to 120. At least, some BIOSes can change the value up to 115. - Print error message when rdmsr(TEMPERATURE_TARGET) failed. - When Tjmax exceeded the limit, print warning message and use the value as it is. - KNF. To generate a diff of this commit: cvs rdiff -u -r1.35.10.2 -r1.35.10.3 src/sys/arch/x86/x86/coretemp.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/x86/include
Module Name:src
Committed By: martin
Date: Sat Jul 29 09:51:56 UTC 2023
Modified Files:
src/sys/arch/x86/include [netbsd-8]: specialreg.h
Log Message:
Pull up the following revisions, all via patch, requested by msaitoh
in ticket #1853:
sys/arch/x86/include/specialreg.h 1.204-1.206, 1.208
- Add Intel CPUID 0x07 %ecx bit 24 BUS_LOCK_DETECT.
- Add AMD CPUID 0x8008 %ebx bit 30 IBPB_RET and CPUID 0x800a
%edx bit 29 BusLockThreshold.
- Fix typo in comment.
To generate a diff of this commit:
cvs rdiff -u -r1.98.2.27 -r1.98.2.28 src/sys/arch/x86/include/specialreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/include/specialreg.h
diff -u src/sys/arch/x86/include/specialreg.h:1.98.2.27 src/sys/arch/x86/include/specialreg.h:1.98.2.28
--- src/sys/arch/x86/include/specialreg.h:1.98.2.27 Tue Jul 25 09:15:28 2023
+++ src/sys/arch/x86/include/specialreg.h Sat Jul 29 09:51:56 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: specialreg.h,v 1.98.2.27 2023/07/25 09:15:28 martin Exp $ */
+/* $NetBSD: specialreg.h,v 1.98.2.28 2023/07/29 09:51:56 martin Exp $ */
/*
* Copyright (c) 2014-2019 The NetBSD Foundation, Inc.
@@ -442,6 +442,7 @@
#define CPUID_SEF_MAWAU __BITS(21, 17) /* MAWAU for BND{LD,ST}X */
#define CPUID_SEF_RDPID __BIT(22) /* RDPID and IA32_TSC_AUX */
#define CPUID_SEF_KL __BIT(23) /* Key Locker */
+#define CPUID_SEF_BUS_LOCK_DETECT __BIT(24) /* OS bus-lock detection */
#define CPUID_SEF_CLDEMOTE __BIT(25) /* Cache line demote */
#define CPUID_SEF_MOVDIRI __BIT(27) /* MOVDIRI instruction */
#define CPUID_SEF_MOVDIR64B __BIT(28) /* MOVDIR64B instruction */
@@ -456,7 +457,7 @@
"b\14AVX512_BITALG\0" "b\15TME_EN\0" "b\16AVX512_VPOPCNTDQ\0" \
"b\20LA57\0" \
"f\21\5MAWAU\0" "b\26RDPID\0" "b\27KL\0" \
- "b\31CLDEMOTE\0" "b\33MOVDIRI\0" \
+ "b\30BUS_LOCK_DETECT" "b\31CLDEMOTE\0" "b\33MOVDIRI\0" \
"b\34MOVDIR64B\0" "b\35ENQCMD\0" "b\36SGXLC\0" "b\37PKS\0"
/* %ecx = 0, %edx */
@@ -865,6 +866,7 @@
#define CPUID_CAPEX_CPPC __BIT(27) /* Collaborative Processor Perf. Control */
#define CPUID_CAPEX_PSFD __BIT(28) /* Predictive Store Forward Dis */
#define CPUID_CAPEX_BTC_NO __BIT(29) /* Branch Type Confusion NO */
+#define CPUID_CAPEX_IBPB_RET __BIT(30) /* Clear RET address predictor */
#define CPUID_CAPEX_FLAGS "\20" \
"\1CLZERO" "\2IRPERF" "\3XSAVEERPTR" "\4INVLPGB" \
@@ -875,7 +877,7 @@
"\24IBRS_SAMEMODE" \
"\25EFER_LSMSLE_UN""\30PPIN" \
"\31SSBD" "\32VIRT_SSBD" "\33SSB_NO" "\34CPPC" \
- "\35PSFD" "\36BTC_NO"
+ "\35PSFD" "\36BTC_NO" "\37IBPB_RET"
/* %ecx */
#define CPUID_CAPEX_PerfTscSize __BITS(17,16) /* Perf. tstamp counter size */
@@ -915,6 +917,7 @@
#define CPUID_AMD_SVM_IBSVIRT __BIT(26) /* IBS Virtualization */
#define CPUID_AMD_SVM_XLVTOFFFLTCHG __BIT(27) /* Ext LVToffset FLT changed */
#define CPUID_AMD_SVM_VMCBADRCHKCHG __BIT(28) /* VMCB addr check changed */
+#define CPUID_AMD_SVM_BUSLOCKTHRESH __BIT(29) /* Bus Lock Threshold */
#define CPUID_AMD_SVM_FLAGS "\20" \
@@ -927,7 +930,7 @@
"\21" "VGIF" "\22" "GMET" "\23x2AVIC" "\24SSSCHECK" \
"\25" "SPEC_CTRL" "\26" "ROGPT" "\30HOST_MCE_OVERRIDE" \
"\31" "TLBICTL" "\32VNMI" "\33IBSVIRT" "\34ExtLvtOffsetFaultChg" \
- "\35VmcbAddrChkChg"
+ "\35VmcbAddrChkChg" "\36BusLockThreshold"
/*
* AMD Instruction-Based Sampling Capabilities.
@@ -1041,7 +1044,7 @@
#define CPUID_AMDEXT2_FSRC __BIT(11) /* Fast Short Rep Cmpsb */
#define CPUID_AMDEXT2_PREFETCHCTL __BIT(13) /* Prefetch control MSR */
#define CPUID_AMDEXT2_CPUIDUSRDIS __BIT(17) /* CPUID dis. for non-priv. soft */
-#define CPUID_AMDEXT2_EPSF __BIT(18) /* Enhanced Predective Store Fwd */
+#define CPUID_AMDEXT2_EPSF __BIT(18) /* Enhanced Predictive Store Fwd */
#define CPUID_AMDEXT2_FLAGS "\20" \
"\1NoNestedDataBp" "\2FsGsKernelGsBaseNonSerializing" \
CVS commit: [netbsd-8] src/sys/arch/x86/include
Module Name:src Committed By: martin Date: Sat Jul 29 09:51:56 UTC 2023 Modified Files: src/sys/arch/x86/include [netbsd-8]: specialreg.h Log Message: Pull up the following revisions, all via patch, requested by msaitoh in ticket #1853: sys/arch/x86/include/specialreg.h 1.204-1.206, 1.208 - Add Intel CPUID 0x07 %ecx bit 24 BUS_LOCK_DETECT. - Add AMD CPUID 0x8008 %ebx bit 30 IBPB_RET and CPUID 0x800a %edx bit 29 BusLockThreshold. - Fix typo in comment. To generate a diff of this commit: cvs rdiff -u -r1.98.2.27 -r1.98.2.28 src/sys/arch/x86/include/specialreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Thu Jul 27 16:42:04 UTC 2023
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: errata.c
Log Message:
Pull up following revision(s) (requested by mrg in ticket #1852):
sys/arch/x86/x86/errata.c: revision 1.32
fix the cpuids for the zen2 client CPUs.
i'm not exactly how i came up with the values i had, though one
of them was still valid and matched my test systems.
To generate a diff of this commit:
cvs rdiff -u -r1.23.10.2 -r1.23.10.3 src/sys/arch/x86/x86/errata.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/errata.c
diff -u src/sys/arch/x86/x86/errata.c:1.23.10.2 src/sys/arch/x86/x86/errata.c:1.23.10.3
--- src/sys/arch/x86/x86/errata.c:1.23.10.2 Tue Jul 25 09:15:28 2023
+++ src/sys/arch/x86/x86/errata.c Thu Jul 27 16:42:04 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: errata.c,v 1.23.10.2 2023/07/25 09:15:28 martin Exp $ */
+/* $NetBSD: errata.c,v 1.23.10.3 2023/07/27 16:42:04 martin Exp $ */
/*-
* Copyright (c) 2007 The NetBSD Foundation, Inc.
@@ -45,7 +45,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: errata.c,v 1.23.10.2 2023/07/25 09:15:28 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: errata.c,v 1.23.10.3 2023/07/27 16:42:04 martin Exp $");
#include
#include
@@ -96,8 +96,8 @@ static const u_int cpurevs[] = {
ML_A1, 0x0730F01, ZP_B1, 0x0800F11, ZP_B2, 0x0800F12,
PiR_B2, 0x0800F82, Rome_B0, 0x0830F10,
/* XXX client Zen2 names aren't known yet. */
- Z2_XB, 0x0840F70, Z2_Ren, 0x0860F80, Z2_Luc, 0x0870F10,
- Z2_Mat, 0x0890F70, Z2_VG, 0x0890F80, Z2_Men, 0x08A0F10,
+ Z2_XB, 0x0840F70, Z2_Ren, 0x0860F01, Z2_Luc, 0x0860F81,
+ Z2_Mat, 0x0870F10, Z2_VG, 0x0890F02, Z2_Men, 0x08A0F00,
Milan_B1, 0x0A00F11, Milan_B2, 0x0A00F12,
Genoa_B1, 0x0A10F11,
OINK
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src Committed By: martin Date: Thu Jul 27 16:42:04 UTC 2023 Modified Files: src/sys/arch/x86/x86 [netbsd-8]: errata.c Log Message: Pull up following revision(s) (requested by mrg in ticket #1852): sys/arch/x86/x86/errata.c: revision 1.32 fix the cpuids for the zen2 client CPUs. i'm not exactly how i came up with the values i had, though one of them was still valid and matched my test systems. To generate a diff of this commit: cvs rdiff -u -r1.23.10.2 -r1.23.10.3 src/sys/arch/x86/x86/errata.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/x86
Module Name:src Committed By: martin Date: Tue Jul 25 09:15:28 UTC 2023 Modified Files: src/sys/arch/x86/include [netbsd-8]: specialreg.h src/sys/arch/x86/x86 [netbsd-8]: errata.c Log Message: Pull up following revision(s) (requested by mrg in ticket #1851): sys/arch/x86/include/specialreg.h: revision 1.207 sys/arch/x86/x86/errata.c: revision 1.31 x86: turn off zenbleed chicken bit on Zen2 cpus. this is based upon Taylor's original work. i just made the list of CPUs to run on correct as i could determine. (also, add some Zen3 and Zen4 cpuids not yet used by any errata.) (might be nice to have a better way to expression revision ranges rather than specific cpuid matches, eg, 0x30-0x4f models in a cpu family, etc.) tested on ryzen 3600, and a ported zenbleed PoC that no longer shows any obtained text. (a similar module-version of it stopped the PoC on a ryzen 3950x without having to reboot.) https://www.amd.com/en/resources/product-security/bulletin/amd-sb-7008.html https://lock.cmpxchg8b.com/zenbleed.html To generate a diff of this commit: cvs rdiff -u -r1.98.2.26 -r1.98.2.27 src/sys/arch/x86/include/specialreg.h cvs rdiff -u -r1.23.10.1 -r1.23.10.2 src/sys/arch/x86/x86/errata.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/x86
Module Name:src
Committed By: martin
Date: Tue Jul 25 09:15:28 UTC 2023
Modified Files:
src/sys/arch/x86/include [netbsd-8]: specialreg.h
src/sys/arch/x86/x86 [netbsd-8]: errata.c
Log Message:
Pull up following revision(s) (requested by mrg in ticket #1851):
sys/arch/x86/include/specialreg.h: revision 1.207
sys/arch/x86/x86/errata.c: revision 1.31
x86: turn off zenbleed chicken bit on Zen2 cpus.
this is based upon Taylor's original work. i just made the list
of CPUs to run on correct as i could determine. (also, add some
Zen3 and Zen4 cpuids not yet used by any errata.)
(might be nice to have a better way to expression revision ranges
rather than specific cpuid matches, eg, 0x30-0x4f models in a cpu
family, etc.)
tested on ryzen 3600, and a ported zenbleed PoC that no longer
shows any obtained text. (a similar module-version of it stopped
the PoC on a ryzen 3950x without having to reboot.)
https://www.amd.com/en/resources/product-security/bulletin/amd-sb-7008.html
https://lock.cmpxchg8b.com/zenbleed.html
To generate a diff of this commit:
cvs rdiff -u -r1.98.2.26 -r1.98.2.27 src/sys/arch/x86/include/specialreg.h
cvs rdiff -u -r1.23.10.1 -r1.23.10.2 src/sys/arch/x86/x86/errata.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/include/specialreg.h
diff -u src/sys/arch/x86/include/specialreg.h:1.98.2.26 src/sys/arch/x86/include/specialreg.h:1.98.2.27
--- src/sys/arch/x86/include/specialreg.h:1.98.2.26 Wed Jun 21 19:06:15 2023
+++ src/sys/arch/x86/include/specialreg.h Tue Jul 25 09:15:28 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: specialreg.h,v 1.98.2.26 2023/06/21 19:06:15 martin Exp $ */
+/* $NetBSD: specialreg.h,v 1.98.2.27 2023/07/25 09:15:28 martin Exp $ */
/*
* Copyright (c) 2014-2019 The NetBSD Foundation, Inc.
@@ -1360,6 +1360,7 @@
#define MSR_DE_CFG 0xc0011029
#define DE_CFG_ERRATA_721 0x0001
#define DE_CFG_LFENCE_SERIALIZE __BIT(1)
+#define DE_CFG_ERRATA_ZENBLEED __BIT(9)
#define DE_CFG_ERRATA_1021 __BIT(13)
#define MSR_LS_CFG2 0xc001102d
Index: src/sys/arch/x86/x86/errata.c
diff -u src/sys/arch/x86/x86/errata.c:1.23.10.1 src/sys/arch/x86/x86/errata.c:1.23.10.2
--- src/sys/arch/x86/x86/errata.c:1.23.10.1 Wed Aug 5 17:27:48 2020
+++ src/sys/arch/x86/x86/errata.c Tue Jul 25 09:15:28 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: errata.c,v 1.23.10.1 2020/08/05 17:27:48 martin Exp $ */
+/* $NetBSD: errata.c,v 1.23.10.2 2023/07/25 09:15:28 martin Exp $ */
/*-
* Copyright (c) 2007 The NetBSD Foundation, Inc.
@@ -45,7 +45,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: errata.c,v 1.23.10.1 2020/08/05 17:27:48 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: errata.c,v 1.23.10.2 2023/07/25 09:15:28 martin Exp $");
#include
#include
@@ -71,9 +71,12 @@ typedef enum cpurev {
JH_E6, SH_B0, SH_B3, SH_C0, SH_CG, SH_D0, SH_E4, SH_E5,
DR_BA, DR_B2, DR_B3, RB_C2, RB_C3, BL_C2, BL_C3, DA_C2,
DA_C3, HY_D0, HY_D1, HY_D1_G34R1, PH_E0, LN_B0, KB_A1,
- ML_A1, ZP_B1, ZP_B2, PiR_B2, OINK
+ ML_A1, ZP_B1, ZP_B2, PiR_B2, Rome_B0, Z2_XB, Z2_Ren,
+ Z2_Luc, Z2_Mat, Z2_VG, Z2_Men, Milan_B1, Milan_B2, Genoa_B1,
+ OINK
} cpurev_t;
+/* These names match names from various AMD Errata/Revision Guides. */
static const u_int cpurevs[] = {
BH_E4, 0x0020fb1, CH_CG, 0xf82, CH_CG, 0xfb2,
CH_D0, 0x0010f80, CH_D0, 0x0010fb0, DH_CG, 0xfc0,
@@ -91,7 +94,12 @@ static const u_int cpurevs[] = {
HY_D0, 0x0100f80, HY_D1, 0x0100f81, HY_D1_G34R1, 0x0100f91,
PH_E0, 0x0100fa0, LN_B0, 0x0300f10, KB_A1, 0x0700F01,
ML_A1, 0x0730F01, ZP_B1, 0x0800F11, ZP_B2, 0x0800F12,
- PiR_B2, 0x0800F82,
+ PiR_B2, 0x0800F82, Rome_B0, 0x0830F10,
+ /* XXX client Zen2 names aren't known yet. */
+ Z2_XB, 0x0840F70, Z2_Ren, 0x0860F80, Z2_Luc, 0x0870F10,
+ Z2_Mat, 0x0890F70, Z2_VG, 0x0890F80, Z2_Men, 0x08A0F10,
+ Milan_B1, 0x0A00F11, Milan_B2, 0x0A00F12,
+ Genoa_B1, 0x0A10F11,
OINK
};
@@ -160,6 +168,10 @@ static const uint8_t x86_errata_set15[]
KB_A1, ML_A1, OINK
};
+static const uint8_t x86_errata_set16[] = {
+ Rome_B0, Z2_XB, Z2_Ren, Z2_Luc, Z2_Mat, Z2_VG, Z2_Men, OINK
+};
+
static bool x86_errata_setmsr(struct cpu_info *, errata_t *);
static bool x86_errata_testmsr(struct cpu_info *, errata_t *);
@@ -359,6 +371,16 @@ static errata_t errata[] = {
1095, FALSE, MSR_LS_CFG, x86_errata_set13,
x86_errata_setmsr, LS_CFG_ERRATA_1095
},
+ /*
+ * Zenbleed:
+ * https://www.amd.com/en/resources/product-security/bulletin/amd-sb-7008.html
+ * https://github.com/google/security-research/security/advisories/GHSA-v6wh-rxpg-cmm8
+ * https://lock.cmpxchg8b.com/zenbleed.html
+ */
+ {
+ -1, FALSE, MSR_DE_CFG, x86_errata_set16,
+ x86_errata_setmsr, DE_CFG_ERRATA_ZENBLEED,
+ },
};
static bool
CVS commit: [netbsd-8] src/sys/arch/i386/i386
Module Name:src Committed By: martin Date: Thu Jun 22 06:30:48 UTC 2023 Modified Files: src/sys/arch/i386/i386 [netbsd-8]: freebsd_machdep.c Log Message: Pull up the following revision, requested by riastradh in ticket #1836 sys/compat/freebsd/freebsd_machdep.c1.5 Memset before copyout To generate a diff of this commit: cvs rdiff -u -r1.60 -r1.60.22.1 src/sys/arch/i386/i386/freebsd_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/i386/i386
Module Name:src Committed By: martin Date: Thu Jun 22 06:30:48 UTC 2023 Modified Files: src/sys/arch/i386/i386 [netbsd-8]: freebsd_machdep.c Log Message: Pull up the following revision, requested by riastradh in ticket #1836 sys/compat/freebsd/freebsd_machdep.c1.5 Memset before copyout To generate a diff of this commit: cvs rdiff -u -r1.60 -r1.60.22.1 src/sys/arch/i386/i386/freebsd_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/i386/i386/freebsd_machdep.c diff -u src/sys/arch/i386/i386/freebsd_machdep.c:1.60 src/sys/arch/i386/i386/freebsd_machdep.c:1.60.22.1 --- src/sys/arch/i386/i386/freebsd_machdep.c:1.60 Sun Feb 23 22:35:27 2014 +++ src/sys/arch/i386/i386/freebsd_machdep.c Thu Jun 22 06:30:48 2023 @@ -1,4 +1,4 @@ -/* $NetBSD: freebsd_machdep.c,v 1.60 2014/02/23 22:35:27 dsl Exp $ */ +/* $NetBSD: freebsd_machdep.c,v 1.60.22.1 2023/06/22 06:30:48 martin Exp $ */ /*- * Copyright (c) 1998, 2000 The NetBSD Foundation, Inc. @@ -30,7 +30,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: freebsd_machdep.c,v 1.60 2014/02/23 22:35:27 dsl Exp $"); +__KERNEL_RCSID(0, "$NetBSD: freebsd_machdep.c,v 1.60.22.1 2023/06/22 06:30:48 martin Exp $"); #if defined(_KERNEL_OPT) #include "opt_vm86.h" @@ -93,6 +93,8 @@ freebsd_sendsig(const ksiginfo_t *ksi, c fp--; + memset(, 0, sizeof(frame)); + /* Build stack frame for signal trampoline. */ frame.sf_signum = sig; frame.sf_code = code;
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Wed Jun 21 19:54:02 UTC 2023
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: procfs_machdep.c
Log Message:
Pull up following revision(s) (requested by msaitoh in ticket #1830):
sys/arch/x86/x86/procfs_machdep.c: revision 1.47
Add Intel lam and AMD vnmi.
To generate a diff of this commit:
cvs rdiff -u -r1.15.2.15 -r1.15.2.16 src/sys/arch/x86/x86/procfs_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/procfs_machdep.c
diff -u src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.15 src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.16
--- src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.15 Mon Jan 23 12:25:06 2023
+++ src/sys/arch/x86/x86/procfs_machdep.c Wed Jun 21 19:54:02 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: procfs_machdep.c,v 1.15.2.15 2023/01/23 12:25:06 martin Exp $ */
+/* $NetBSD: procfs_machdep.c,v 1.15.2.16 2023/06/21 19:54:02 martin Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -42,7 +42,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.15 2023/01/23 12:25:06 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.16 2023/06/21 19:54:02 martin Exp $");
#include
#include
@@ -151,7 +151,7 @@ static const char * const x86_features[]
"avx_vnni", "avx512_bf16", NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
- NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
+ NULL, NULL, "lam", NULL, NULL, NULL, NULL, NULL},
{ /* (13) AMD 0x8008 ebx */
"clzero", "irperf", "xsaveerptr", NULL, "rdpru", NULL, NULL, NULL,
@@ -172,7 +172,7 @@ static const char * const x86_features[]
NULL, NULL, "pausefilter", NULL, "pfthreshold", "avic", NULL,
"v_vmsave_vmload",
"vgif", NULL, "x2avic", NULL, "v_spec_ctrl", NULL, NULL, NULL,
- NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
+ NULL, "vnmi", NULL, NULL, NULL, NULL, NULL, NULL},
{ /* (16) 0x0007:0 ecx */
NULL, "avx512vbmi", "umip", "pku",
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src Committed By: martin Date: Wed Jun 21 19:54:02 UTC 2023 Modified Files: src/sys/arch/x86/x86 [netbsd-8]: procfs_machdep.c Log Message: Pull up following revision(s) (requested by msaitoh in ticket #1830): sys/arch/x86/x86/procfs_machdep.c: revision 1.47 Add Intel lam and AMD vnmi. To generate a diff of this commit: cvs rdiff -u -r1.15.2.15 -r1.15.2.16 src/sys/arch/x86/x86/procfs_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/vax
Module Name:src Committed By: martin Date: Wed Jun 21 19:12:09 UTC 2023 Modified Files: src/sys/arch/vax/include [netbsd-8]: trap.h src/sys/arch/vax/vax [netbsd-8]: pmap.c Log Message: Pull up following revision(s) (requested by abs in ticket #1829): sys/arch/vax/vax/pmap.c: revision 1.196 sys/arch/vax/include/trap.h: revision 1.25 Change CASMAGIC to 0xFEDABABE so that it cannot accidentally end up in valid kernel memory. Due to the VARM accesses above S0 should always give a ptelen trap. Bug found by Kalvis Duckmanton. Ensure that the kernel do not try to allocate a S0 segment larger than 1G, since the hardware prohibits that. To generate a diff of this commit: cvs rdiff -u -r1.24 -r1.24.46.1 src/sys/arch/vax/include/trap.h cvs rdiff -u -r1.185 -r1.185.2.1 src/sys/arch/vax/vax/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/vax/include/trap.h diff -u src/sys/arch/vax/include/trap.h:1.24 src/sys/arch/vax/include/trap.h:1.24.46.1 --- src/sys/arch/vax/include/trap.h:1.24 Sun Jul 3 02:18:20 2011 +++ src/sys/arch/vax/include/trap.h Wed Jun 21 19:12:09 2023 @@ -1,4 +1,4 @@ -/* $NetBSD: trap.h,v 1.24 2011/07/03 02:18:20 matt Exp $ */ +/* $NetBSD: trap.h,v 1.24.46.1 2023/06/21 19:12:09 martin Exp $ */ /*- * Copyright (c) 1990 The Regents of the University of California. @@ -74,7 +74,7 @@ #define AFLT_FLTUND 0xa /* floating underflow */ /* Used by RAS to detect an interrupted CAS */ -#define CASMAGIC 0xBEDABABE /* high end of S0 space */ +#define CASMAGIC 0xFEDABABE /* always invalid space */ /* Trap's coming from user mode */ #define T_USER 0x100 Index: src/sys/arch/vax/vax/pmap.c diff -u src/sys/arch/vax/vax/pmap.c:1.185 src/sys/arch/vax/vax/pmap.c:1.185.2.1 --- src/sys/arch/vax/vax/pmap.c:1.185 Mon May 22 16:53:05 2017 +++ src/sys/arch/vax/vax/pmap.c Wed Jun 21 19:12:09 2023 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.c,v 1.185 2017/05/22 16:53:05 ragge Exp $ */ +/* $NetBSD: pmap.c,v 1.185.2.1 2023/06/21 19:12:09 martin Exp $ */ /* * Copyright (c) 1994, 1998, 1999, 2003 Ludd, University of Lule}, Sweden. * All rights reserved. @@ -25,7 +25,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.185 2017/05/22 16:53:05 ragge Exp $"); +__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.185.2.1 2023/06/21 19:12:09 martin Exp $"); #include "opt_ddb.h" #include "opt_cputype.h" @@ -307,6 +307,15 @@ pmap_bootstrap(void) usrptsize = (avail_end/(20 * PPTESZ)) * VAX_NBPG; kvmsize = calc_kvmsize(usrptsize); + /* + * Ensure that not more than 1G is allocated, since that is + * max size of S0 space. + * Also note that for full S0 space the SLR should be 0x20, + * since the comparison in the vax microcode is >= SLR. + */ +#define S0SPACE (1*1024*1024*1024) + if (kvmsize > S0SPACE) + kvmsize = S0SPACE; sysptsize = kvmsize >> VAX_PGSHIFT; /* * Virtual_* and avail_* is used for mapping of system page table.
CVS commit: [netbsd-8] src/sys/arch/vax
Module Name:src Committed By: martin Date: Wed Jun 21 19:12:09 UTC 2023 Modified Files: src/sys/arch/vax/include [netbsd-8]: trap.h src/sys/arch/vax/vax [netbsd-8]: pmap.c Log Message: Pull up following revision(s) (requested by abs in ticket #1829): sys/arch/vax/vax/pmap.c: revision 1.196 sys/arch/vax/include/trap.h: revision 1.25 Change CASMAGIC to 0xFEDABABE so that it cannot accidentally end up in valid kernel memory. Due to the VARM accesses above S0 should always give a ptelen trap. Bug found by Kalvis Duckmanton. Ensure that the kernel do not try to allocate a S0 segment larger than 1G, since the hardware prohibits that. To generate a diff of this commit: cvs rdiff -u -r1.24 -r1.24.46.1 src/sys/arch/vax/include/trap.h cvs rdiff -u -r1.185 -r1.185.2.1 src/sys/arch/vax/vax/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/x86/pci
Module Name:src Committed By: martin Date: Wed Jun 21 18:58:22 UTC 2023 Modified Files: src/sys/arch/x86/pci [netbsd-8]: amdsmn.c amdzentemp.c Log Message: Pull up following revision(s) (requested by msaitoh in ticket #1825): sys/arch/x86/pci/amdsmn.c: revision 1.16 sys/arch/x86/pci/amdzentemp.c: revision 1.17 sys/arch/x86/pci/amdzentemp.c: revision 1.18 Reduce diff against DragonFly. No functional change. amdsmn(4),amdzentemp(4): Add Zen3+ Rembrandt(19h/4xh) & Zen4 Genoa(19h/1xh). To generate a diff of this commit: cvs rdiff -u -r1.3.2.5 -r1.3.2.6 src/sys/arch/x86/pci/amdsmn.c cvs rdiff -u -r1.7.2.4 -r1.7.2.5 src/sys/arch/x86/pci/amdzentemp.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/x86/pci
Module Name:src
Committed By: martin
Date: Wed Jun 21 18:58:22 UTC 2023
Modified Files:
src/sys/arch/x86/pci [netbsd-8]: amdsmn.c amdzentemp.c
Log Message:
Pull up following revision(s) (requested by msaitoh in ticket #1825):
sys/arch/x86/pci/amdsmn.c: revision 1.16
sys/arch/x86/pci/amdzentemp.c: revision 1.17
sys/arch/x86/pci/amdzentemp.c: revision 1.18
Reduce diff against DragonFly. No functional change.
amdsmn(4),amdzentemp(4): Add Zen3+ Rembrandt(19h/4xh) & Zen4 Genoa(19h/1xh).
To generate a diff of this commit:
cvs rdiff -u -r1.3.2.5 -r1.3.2.6 src/sys/arch/x86/pci/amdsmn.c
cvs rdiff -u -r1.7.2.4 -r1.7.2.5 src/sys/arch/x86/pci/amdzentemp.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/pci/amdsmn.c
diff -u src/sys/arch/x86/pci/amdsmn.c:1.3.2.5 src/sys/arch/x86/pci/amdsmn.c:1.3.2.6
--- src/sys/arch/x86/pci/amdsmn.c:1.3.2.5 Tue Oct 11 18:22:44 2022
+++ src/sys/arch/x86/pci/amdsmn.c Wed Jun 21 18:58:22 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: amdsmn.c,v 1.3.2.5 2022/10/11 18:22:44 martin Exp $ */
+/* $NetBSD: amdsmn.c,v 1.3.2.6 2023/06/21 18:58:22 martin Exp $ */
/*-
* Copyright (c) 2017, 2019 Conrad Meyer
@@ -29,7 +29,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: amdsmn.c,v 1.3.2.5 2022/10/11 18:22:44 martin Exp $ ");
+__KERNEL_RCSID(0, "$NetBSD: amdsmn.c,v 1.3.2.6 2023/06/21 18:58:22 martin Exp $ ");
/*
* Driver for the AMD Family 15h (model 60+) and 17h CPU
@@ -93,7 +93,17 @@ static const struct pciid {
.amdsmn_data_reg = F17H_SMN_DATA_REG,
},
{
- .amdsmn_deviceid = PCI_PRODUCT_AMD_F17_7X_RC,
+ .amdsmn_deviceid = PCI_PRODUCT_AMD_F17_7X_RC, /* or F19_0X */
+ .amdsmn_addr_reg = F17H_SMN_ADDR_REG,
+ .amdsmn_data_reg = F17H_SMN_DATA_REG,
+ },
+ {
+ .amdsmn_deviceid = PCI_PRODUCT_AMD_F17_AX_RC, /* or F19_4X */
+ .amdsmn_addr_reg = F17H_SMN_ADDR_REG,
+ .amdsmn_data_reg = F17H_SMN_DATA_REG,
+ },
+ {
+ .amdsmn_deviceid = PCI_PRODUCT_AMD_F19_1X_RC,
.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
.amdsmn_data_reg = F17H_SMN_DATA_REG,
},
Index: src/sys/arch/x86/pci/amdzentemp.c
diff -u src/sys/arch/x86/pci/amdzentemp.c:1.7.2.4 src/sys/arch/x86/pci/amdzentemp.c:1.7.2.5
--- src/sys/arch/x86/pci/amdzentemp.c:1.7.2.4 Mon Jan 23 12:28:51 2023
+++ src/sys/arch/x86/pci/amdzentemp.c Wed Jun 21 18:58:22 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: amdzentemp.c,v 1.7.2.4 2023/01/23 12:28:51 martin Exp $ */
+/* $NetBSD: amdzentemp.c,v 1.7.2.5 2023/06/21 18:58:22 martin Exp $ */
/* $OpenBSD: kate.c,v 1.2 2008/03/27 04:52:03 cnst Exp $ */
/*
@@ -53,7 +53,7 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: amdzentemp.c,v 1.7.2.4 2023/01/23 12:28:51 martin Exp $ ");
+__KERNEL_RCSID(0, "$NetBSD: amdzentemp.c,v 1.7.2.5 2023/06/21 18:58:22 martin Exp $ ");
#include
#include
@@ -74,7 +74,6 @@ __KERNEL_RCSID(0, "$NetBSD: amdzentemp.c
#include "amdsmn.h"
#define AMD_CURTMP_RANGE_ADJUST 4900 /* in microKelvins (ie, 49C) */
-#define AMD_CURTMP_RANGE_CHECK __BIT(19)
#define F10_TEMP_CURTMP __BITS(31,21) /* XXX same as amdtemp.c */
#define F10_TEMP_CURTMP_MASK 0x7ff
#define F15M60_CURTMP_TJSEL __BITS(17,16)
@@ -96,14 +95,7 @@ __KERNEL_RCSID(0, "$NetBSD: amdzentemp.c
* to -49..206C.
*/
#define AMD_17H_CUR_TMP 0x59800
-
-/*
- * The following register set was discovered experimentally by Ondrej Čerman
- * and collaborators, but is not (yet) documented in a PPR/OSRR (other than
- * the M70H PPR SMN memory map showing [0x59800, +0x314] as allocated to
- * SMU::THM). It seems plausible and the Linux sensor folks have adopted it.
- */
-#define AMD_17H_CCD_TMP_BASE 0x59954
+#define AMD_17H_CUR_TMP_RANGE_SEL __BIT(19)
#define AMD_17H_CCD_TMP_VALID __BIT(11)
struct amdzentemp_softc {
@@ -114,7 +106,7 @@ struct amdzentemp_softc {
size_t sc_sensor_len;
size_t sc_numsensors;
int32_t sc_offset;
- uint32_t sc_ccd_tmp_base;
+ int32_t sc_ccd_offset;
};
enum {
@@ -129,6 +121,10 @@ enum {
CCD5,
CCD6,
CCD7,
+ CCD8,
+ CCD9,
+ CCD10,
+ CCD11,
CCD_MAX,
NUM_CCDS = CCD_MAX - CCD_BASE
};
@@ -339,14 +335,16 @@ amdzentemp_family17_refresh(struct sysmo
edata->state = ENVSYS_SINVALID;
return;
}
- minus49 = (temp & AMD_CURTMP_RANGE_CHECK) ? true : false;
+ minus49 = (temp & AMD_17H_CUR_TMP_RANGE_SEL) ?
+ true : false;
temp = __SHIFTOUT(temp, F10_TEMP_CURTMP);
break;
case CCD_BASE ... (CCD_MAX - 1):
/* Tccd */
i = edata->private - CCD_BASE;
error = amdsmn_read(sc->sc_smn,
- sc->sc_ccd_tmp_base + (i * sizeof(temp)), );
+ AMD_17H_CUR_TMP + sc->sc_ccd_offset + (i * sizeof(temp)),
+ );
if (error || !ISSET(temp, AMD_17H_CCD_TMP_VALID)) {
edata->state = ENVSYS_SINVALID;
return;
@@ -372,6 +370,8 @@ amdzentemp_probe_ccd_sensors17h(struct a
{
int maxreg;
+ sc->sc_ccd_offset = 0x154;
+
switch (model) {
case 0x00 ... 0x2f: /* Zen1, Zen+ */
maxreg = 4;
@@ -399,12
CVS commit: [netbsd-8] src/sys/arch/luna68k/conf
Module Name:src Committed By: martin Date: Thu Apr 20 13:49:11 UTC 2023 Modified Files: src/sys/arch/luna68k/conf [netbsd-8]: Makefile.luna68k Log Message: Pull up following revision(s) (requested by tsutsui in ticket #1821): sys/arch/luna68k/conf/Makefile.luna68k: revision 1.30 Fix missing locore.d dependency output on make depend. Reported from isaki@. Looks missed in rev 1.13 (22 years ago): https://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/luna68k/conf/Makefile.luna68k#rev1.13 To generate a diff of this commit: cvs rdiff -u -r1.27 -r1.27.10.1 src/sys/arch/luna68k/conf/Makefile.luna68k Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/luna68k/conf
Module Name:src
Committed By: martin
Date: Thu Apr 20 13:49:11 UTC 2023
Modified Files:
src/sys/arch/luna68k/conf [netbsd-8]: Makefile.luna68k
Log Message:
Pull up following revision(s) (requested by tsutsui in ticket #1821):
sys/arch/luna68k/conf/Makefile.luna68k: revision 1.30
Fix missing locore.d dependency output on make depend.
Reported from isaki@. Looks missed in rev 1.13 (22 years ago):
https://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/luna68k/conf/Makefile.luna68k#rev1.13
To generate a diff of this commit:
cvs rdiff -u -r1.27 -r1.27.10.1 src/sys/arch/luna68k/conf/Makefile.luna68k
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/luna68k/conf/Makefile.luna68k
diff -u src/sys/arch/luna68k/conf/Makefile.luna68k:1.27 src/sys/arch/luna68k/conf/Makefile.luna68k:1.27.10.1
--- src/sys/arch/luna68k/conf/Makefile.luna68k:1.27 Sun Sep 6 02:17:30 2015
+++ src/sys/arch/luna68k/conf/Makefile.luna68k Thu Apr 20 13:49:10 2023
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile.luna68k,v 1.27 2015/09/06 02:17:30 uebayasi Exp $
+# $NetBSD: Makefile.luna68k,v 1.27.10.1 2023/04/20 13:49:10 martin Exp $
# Makefile for NetBSD
#
@@ -53,7 +53,7 @@ KERN_AS= library
MD_OBJS= locore.o
MD_LIBS= ${FPSP}
MD_CFILES=
-MD_SFILES=
+MD_SFILES= ${LUNA68K}/luna68k/locore.s
locore.o: ${LUNA68K}/luna68k/locore.s assym.h
${NORMAL_S}
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Wed Feb 22 19:24:59 UTC 2023
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: efi.c
Log Message:
Pull up following revision(s) (requested by riastradh in ticket #1799):
sys/arch/x86/x86/efi_machdep.c: revision 1.3
(applied to sys/arch/x86/x86/efi.c)
x86/efi: Print uuids in slightly more standard notation.
Anyone need a spare hyphen? We had a few extras, apparently.
To generate a diff of this commit:
cvs rdiff -u -r1.11.6.1 -r1.11.6.2 src/sys/arch/x86/x86/efi.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/efi.c
diff -u src/sys/arch/x86/x86/efi.c:1.11.6.1 src/sys/arch/x86/x86/efi.c:1.11.6.2
--- src/sys/arch/x86/x86/efi.c:1.11.6.1 Thu Jun 7 15:52:54 2018
+++ src/sys/arch/x86/x86/efi.c Wed Feb 22 19:24:59 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: efi.c,v 1.11.6.1 2018/06/07 15:52:54 martin Exp $ */
+/* $NetBSD: efi.c,v 1.11.6.2 2023/02/22 19:24:59 martin Exp $ */
/*-
* Copyright (c) 2016 The NetBSD Foundation, Inc.
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: efi.c,v 1.11.6.1 2018/06/07 15:52:54 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: efi.c,v 1.11.6.2 2023/02/22 19:24:59 martin Exp $");
#include
#include
@@ -122,7 +122,7 @@ efi_aprintuuid(const struct uuid * uuid)
aprint_debug("-%04" PRIx16 "", uuid->time_mid);
aprint_debug("-%04" PRIx16 "", uuid->time_hi_and_version);
aprint_debug("-%02" PRIx8 "", uuid->clock_seq_hi_and_reserved);
- aprint_debug("-%02" PRIx8 "", uuid->clock_seq_low);
+ aprint_debug("%02" PRIx8 "", uuid->clock_seq_low);
aprint_debug("-");
for (i = 0; i < _UUID_NODE_LEN; i++) {
aprint_debug("%02" PRIx8 "", uuid->node[i]);
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src Committed By: martin Date: Wed Feb 22 19:24:59 UTC 2023 Modified Files: src/sys/arch/x86/x86 [netbsd-8]: efi.c Log Message: Pull up following revision(s) (requested by riastradh in ticket #1799): sys/arch/x86/x86/efi_machdep.c: revision 1.3 (applied to sys/arch/x86/x86/efi.c) x86/efi: Print uuids in slightly more standard notation. Anyone need a spare hyphen? We had a few extras, apparently. To generate a diff of this commit: cvs rdiff -u -r1.11.6.1 -r1.11.6.2 src/sys/arch/x86/x86/efi.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/x86/include
Module Name:src Committed By: martin Date: Mon Jan 23 13:09:54 UTC 2023 Modified Files: src/sys/arch/x86/include [netbsd-8]: specialreg.h Log Message: Pull up the following revisions, requested by msaitoh in ticket #1791: sys/arch/x86/include/specialreg.h 1.193-1.198 - Add CPUID Fn_0006 %eax bit 24 IA32_THERM_INTERRUPT MSR bit 25 Hardware Feedback Notification support. - Add CPUID Fn_0007 %ecx bit 29 ENQCMD. - Add CPUID Fn_0007 %edx bit 1 SGX-KEYS. - Add CPUID Fn_0007 %edx bit 5 UINTR(User INTeRrupts). - Add CPUID Fn_0007 %edx bit 11 RTM_ALWAYS_ABORT. - Add CPUID Fn_0007 %edx bit 22 AMX_BF16. - Add CPUID Fn_0007 %edx bit 23 AVX512_FP16. - Add CPUID Fn_0007 %edx bit 24 AMX_TILE. - Add CPUID Fn_0007 %edx bit 25 AMX_INT8. - Add CPUID Fn_0007 sub-leaf 1 %edx bit 18 CET_SSS. - Add CPUID Fn_0007 sub-leaf 2 %edx definitions. - Add CPUID Fn_000d sub-leaf 1 %eax bit 4 XFD. - Add CPUID Fn_001d Tile Information. - Add CPUID Fn_001e TMUL Information. - Add CPUID Fn8000_0007 %eax RAS capabilities. - Add CPUID Fn8000_0008 %ebx BTC_NO, - Add cpuid Fn8000_000a x2AVIC, VNMI, IBSVIRT and ROGPT. - Add CPUID Fn8000_001b Instruction-Based Sampling. - Add CPUID Fn8000_001e Processor Topology Information. - Add CPUID Fn8000_001f %eax RPMQUERY, VmplSSS, TscAuxVirt, VmgexitParam, VirtualTomMsr, IbsVirtGuest, SmtProtection, vsmCommPageMSR and NestedVirtSnpMsr. - Add CPUID Fn8000_0021 AMD Extended Features Identification 2. - Add CPUID Fn8000_0022 AMD Extended Performance Monitoring and Debug. - Rename HW_FEEDBACK to HWI (Hardware Feedback Interface). - Rename TSX_FORCE_ABORT to RTM_FORCE_ABORT. - Modify comment. Both Intel and AMD support CPUID Fn000b. - Modify comment. Hybrid Information -> Native Model ID Information. - Use __BIT(). Add comment. Whitespace fix. To generate a diff of this commit: cvs rdiff -u -r1.98.2.24 -r1.98.2.25 src/sys/arch/x86/include/specialreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/x86/include
Module Name:src Committed By: martin Date: Mon Jan 23 13:09:54 UTC 2023 Modified Files: src/sys/arch/x86/include [netbsd-8]: specialreg.h Log Message: Pull up the following revisions, requested by msaitoh in ticket #1791: sys/arch/x86/include/specialreg.h 1.193-1.198 - Add CPUID Fn_0006 %eax bit 24 IA32_THERM_INTERRUPT MSR bit 25 Hardware Feedback Notification support. - Add CPUID Fn_0007 %ecx bit 29 ENQCMD. - Add CPUID Fn_0007 %edx bit 1 SGX-KEYS. - Add CPUID Fn_0007 %edx bit 5 UINTR(User INTeRrupts). - Add CPUID Fn_0007 %edx bit 11 RTM_ALWAYS_ABORT. - Add CPUID Fn_0007 %edx bit 22 AMX_BF16. - Add CPUID Fn_0007 %edx bit 23 AVX512_FP16. - Add CPUID Fn_0007 %edx bit 24 AMX_TILE. - Add CPUID Fn_0007 %edx bit 25 AMX_INT8. - Add CPUID Fn_0007 sub-leaf 1 %edx bit 18 CET_SSS. - Add CPUID Fn_0007 sub-leaf 2 %edx definitions. - Add CPUID Fn_000d sub-leaf 1 %eax bit 4 XFD. - Add CPUID Fn_001d Tile Information. - Add CPUID Fn_001e TMUL Information. - Add CPUID Fn8000_0007 %eax RAS capabilities. - Add CPUID Fn8000_0008 %ebx BTC_NO, - Add cpuid Fn8000_000a x2AVIC, VNMI, IBSVIRT and ROGPT. - Add CPUID Fn8000_001b Instruction-Based Sampling. - Add CPUID Fn8000_001e Processor Topology Information. - Add CPUID Fn8000_001f %eax RPMQUERY, VmplSSS, TscAuxVirt, VmgexitParam, VirtualTomMsr, IbsVirtGuest, SmtProtection, vsmCommPageMSR and NestedVirtSnpMsr. - Add CPUID Fn8000_0021 AMD Extended Features Identification 2. - Add CPUID Fn8000_0022 AMD Extended Performance Monitoring and Debug. - Rename HW_FEEDBACK to HWI (Hardware Feedback Interface). - Rename TSX_FORCE_ABORT to RTM_FORCE_ABORT. - Modify comment. Both Intel and AMD support CPUID Fn000b. - Modify comment. Hybrid Information -> Native Model ID Information. - Use __BIT(). Add comment. Whitespace fix. To generate a diff of this commit: cvs rdiff -u -r1.98.2.24 -r1.98.2.25 src/sys/arch/x86/include/specialreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/include/specialreg.h diff -u src/sys/arch/x86/include/specialreg.h:1.98.2.24 src/sys/arch/x86/include/specialreg.h:1.98.2.25 --- src/sys/arch/x86/include/specialreg.h:1.98.2.24 Sat Oct 15 10:16:07 2022 +++ src/sys/arch/x86/include/specialreg.h Mon Jan 23 13:09:54 2023 @@ -1,4 +1,4 @@ -/* $NetBSD: specialreg.h,v 1.98.2.24 2022/10/15 10:16:07 martin Exp $ */ +/* $NetBSD: specialreg.h,v 1.98.2.25 2023/01/23 13:09:54 martin Exp $ */ /* * Copyright (c) 2014-2019 The NetBSD Foundation, Inc. @@ -117,21 +117,21 @@ /* * Extended Control Register XCR0 */ -#define XCR0_X87 0x0001 /* x87 FPU/MMX state */ -#define XCR0_SSE 0x0002 /* SSE state */ -#define XCR0_YMM_Hi128 0x0004 /* AVX-256 (ymmn registers) */ -#define XCR0_BNDREGS 0x0008 /* Memory protection ext bounds */ -#define XCR0_BNDCSR 0x0010 /* Memory protection ext state */ -#define XCR0_Opmask 0x0020 /* AVX-512 Opmask */ -#define XCR0_ZMM_Hi256 0x0040 /* AVX-512 upper 256 bits low regs */ -#define XCR0_Hi16_ZMM 0x0080 /* AVX-512 512 bits upper registers */ -#define XCR0_PT 0x0100 /* Processor Trace state */ -#define XCR0_PKRU 0x0200 /* Protection Key state */ -#define XCR0_CET_U 0x0800 /* User CET state */ -#define XCR0_CET_S 0x1000 /* Kern CET state */ -#define XCR0_HDC 0x2000 /* Hardware Duty Cycle state */ -#define XCR0_LBR 0x8000 /* Last Branch Record */ -#define XCR0_HWP 0x0001 /* Hardware P-states */ +#define XCR0_X87 __BIT(0) /* x87 FPU/MMX state */ +#define XCR0_SSE __BIT(1) /* SSE state */ +#define XCR0_YMM_Hi128 __BIT(2) /* AVX-256 (ymmn registers) */ +#define XCR0_BNDREGS __BIT(3) /* Memory protection ext bounds */ +#define XCR0_BNDCSR __BIT(4) /* Memory protection ext state */ +#define XCR0_Opmask __BIT(5) /* AVX-512 Opmask */ +#define XCR0_ZMM_Hi256 __BIT(6) /* AVX-512 upper 256 bits low regs */ +#define XCR0_Hi16_ZMM __BIT(7) /* AVX-512 512 bits upper registers */ +#define XCR0_PT __BIT(8) /* Processor Trace state */ +#define XCR0_PKRU __BIT(9) /* Protection Key state */ +#define XCR0_CET_U __BIT(11) /* User CET state */ +#define XCR0_CET_S __BIT(12) /* Kern CET state */ +#define XCR0_HDC __BIT(13) /* Hardware Duty Cycle state */ +#define XCR0_LBR __BIT(15) /* Last Branch Record */ +#define XCR0_HWP __BIT(16) /* Hardware P-states */ #define XCR0_FLAGS1 "\20" \ "\1" "x87" "\2" "SSE" "\3" "AVX" "\4" "BNDREGS" \ @@ -200,38 +200,38 @@ #endif /* %ecx */ -#define CPUID2_SSE3 0x0001 /* Streaming SIMD Extensions 3 */ -#define CPUID2_PCLMULQDQ 0x0002 /* PCLMULQDQ instructions */ -#define CPUID2_DTES64 0x0004 /* 64-bit Debug Trace */ -#define CPUID2_MONITOR 0x0008 /* MONITOR/MWAIT instructions */ -#define CPUID2_DS_CPL 0x0010 /* CPL Qualified Debug Store */ -#define CPUID2_VMX 0x0020 /* Virtual Machine eXtensions */ -#define CPUID2_SMX
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src Committed By: martin Date: Mon Jan 23 12:25:06 UTC 2023 Modified Files: src/sys/arch/x86/x86 [netbsd-8]: procfs_machdep.c Log Message: Pull up following revision(s) (requested by msaitoh in ticket #1788): sys/arch/x86/x86/procfs_machdep.c: revision 1.46 Add x2avic. Modify comment. To generate a diff of this commit: cvs rdiff -u -r1.15.2.14 -r1.15.2.15 src/sys/arch/x86/x86/procfs_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/x86/pci
Module Name:src
Committed By: martin
Date: Mon Jan 23 12:28:51 UTC 2023
Modified Files:
src/sys/arch/x86/pci [netbsd-8]: amdzentemp.c
Log Message:
Pull up following revision(s) (requested by msaitoh in ticket #1789):
sys/arch/x86/pci/amdzentemp.c: revision 1.16
match zen3 "cezanne" (ryzen 5000-series APU.)
To generate a diff of this commit:
cvs rdiff -u -r1.7.2.3 -r1.7.2.4 src/sys/arch/x86/pci/amdzentemp.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/pci/amdzentemp.c
diff -u src/sys/arch/x86/pci/amdzentemp.c:1.7.2.3 src/sys/arch/x86/pci/amdzentemp.c:1.7.2.4
--- src/sys/arch/x86/pci/amdzentemp.c:1.7.2.3 Tue Oct 11 18:22:44 2022
+++ src/sys/arch/x86/pci/amdzentemp.c Mon Jan 23 12:28:51 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: amdzentemp.c,v 1.7.2.3 2022/10/11 18:22:44 martin Exp $ */
+/* $NetBSD: amdzentemp.c,v 1.7.2.4 2023/01/23 12:28:51 martin Exp $ */
/* $OpenBSD: kate.c,v 1.2 2008/03/27 04:52:03 cnst Exp $ */
/*
@@ -53,7 +53,7 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: amdzentemp.c,v 1.7.2.3 2022/10/11 18:22:44 martin Exp $ ");
+__KERNEL_RCSID(0, "$NetBSD: amdzentemp.c,v 1.7.2.4 2023/01/23 12:28:51 martin Exp $ ");
#include
#include
@@ -398,6 +398,7 @@ amdzentemp_probe_ccd_sensors19h(struct a
switch (model) {
case 0x00 ... 0x0f: /* Zen3 EPYC "Milan" */
case 0x20 ... 0x2f: /* Zen3 Ryzen "Vermeer" */
+ case 0x50 ... 0x5f: /* Zen3 Ryzen "Cezanne" */
maxreg = 8;
break;
case 0x60 ... 0x6f: /* Zen4 Ryzen "Raphael" */
CVS commit: [netbsd-8] src/sys/arch/x86/pci
Module Name:src Committed By: martin Date: Mon Jan 23 12:28:51 UTC 2023 Modified Files: src/sys/arch/x86/pci [netbsd-8]: amdzentemp.c Log Message: Pull up following revision(s) (requested by msaitoh in ticket #1789): sys/arch/x86/pci/amdzentemp.c: revision 1.16 match zen3 "cezanne" (ryzen 5000-series APU.) To generate a diff of this commit: cvs rdiff -u -r1.7.2.3 -r1.7.2.4 src/sys/arch/x86/pci/amdzentemp.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Mon Jan 23 12:25:06 UTC 2023
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: procfs_machdep.c
Log Message:
Pull up following revision(s) (requested by msaitoh in ticket #1788):
sys/arch/x86/x86/procfs_machdep.c: revision 1.46
Add x2avic. Modify comment.
To generate a diff of this commit:
cvs rdiff -u -r1.15.2.14 -r1.15.2.15 src/sys/arch/x86/x86/procfs_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/procfs_machdep.c
diff -u src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.14 src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.15
--- src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.14 Fri Sep 16 18:39:16 2022
+++ src/sys/arch/x86/x86/procfs_machdep.c Mon Jan 23 12:25:06 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: procfs_machdep.c,v 1.15.2.14 2022/09/16 18:39:16 martin Exp $ */
+/* $NetBSD: procfs_machdep.c,v 1.15.2.15 2023/01/23 12:25:06 martin Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -42,7 +42,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.14 2022/09/16 18:39:16 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.15 2023/01/23 12:25:06 martin Exp $");
#include
#include
@@ -171,7 +171,7 @@ static const char * const x86_features[]
"tsc_scale", "vmcb_clean", "flushbyasid", "decodeassists",
NULL, NULL, "pausefilter", NULL, "pfthreshold", "avic", NULL,
"v_vmsave_vmload",
- "vgif", NULL, NULL, NULL, "v_spec_ctrl", NULL, NULL, NULL,
+ "vgif", NULL, "x2avic", NULL, "v_spec_ctrl", NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
{ /* (16) 0x0007:0 ecx */
@@ -183,7 +183,7 @@ static const char * const x86_features[]
NULL, "cldemote", NULL, "movdiri",
"movdir64b", "enqcmd", "sgx_lc", NULL},
- { /* (17) 0x8007 ebx */
+ { /* (17) AMD 0x8007 ebx */
"overflow_recov", "succor", NULL, "smca", NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
CVS commit: [netbsd-8] src/sys/arch/x86
Module Name:src
Committed By: martin
Date: Tue Oct 11 18:07:11 UTC 2022
Modified Files:
src/sys/arch/x86/include [netbsd-8]: cpu_ucode.h
src/sys/arch/x86/x86 [netbsd-8]: cpu_ucode_intel.c
Log Message:
Pull up following revision(s) (requested by msaitoh in ticket #1772):
sys/arch/x86/include/cpu_ucode.h: revision 1.5
sys/arch/x86/x86/cpu_ucode_intel.c: revision 1.19
sys/arch/x86/x86/cpu_ucode_intel.c: revision 1.20
Add missing newline in a message. KNF.
Verify checksum of the extended signature table.
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.3.30.1 src/sys/arch/x86/include/cpu_ucode.h
cvs rdiff -u -r1.12.2.2 -r1.12.2.3 src/sys/arch/x86/x86/cpu_ucode_intel.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/include/cpu_ucode.h
diff -u src/sys/arch/x86/include/cpu_ucode.h:1.3 src/sys/arch/x86/include/cpu_ucode.h:1.3.30.1
--- src/sys/arch/x86/include/cpu_ucode.h:1.3 Wed Oct 17 20:19:55 2012
+++ src/sys/arch/x86/include/cpu_ucode.h Tue Oct 11 18:07:11 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu_ucode.h,v 1.3 2012/10/17 20:19:55 drochner Exp $ */
+/* $NetBSD: cpu_ucode.h,v 1.3.30.1 2022/10/11 18:07:11 martin Exp $ */
/*
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -72,17 +72,16 @@ struct intel1_ucode_header {
uint32_t uh_reserved[3];
};
-struct intel1_ucode_proc_signature {
- uint32_t ups_signature;
- uint32_t ups_proc_flags;
- uint32_t ups_checksum;
-};
-
struct intel1_ucode_ext_table {
uint32_t uet_count;
uint32_t uet_checksum;
uint32_t uet_reserved[3];
- struct intel1_ucode_proc_signature uet_proc_sig[1];
+};
+
+struct intel1_ucode_proc_signature {
+ uint32_t ups_signature;
+ uint32_t ups_proc_flags;
+ uint32_t ups_checksum;
};
#endif
Index: src/sys/arch/x86/x86/cpu_ucode_intel.c
diff -u src/sys/arch/x86/x86/cpu_ucode_intel.c:1.12.2.2 src/sys/arch/x86/x86/cpu_ucode_intel.c:1.12.2.3
--- src/sys/arch/x86/x86/cpu_ucode_intel.c:1.12.2.2 Sun May 12 09:22:52 2019
+++ src/sys/arch/x86/x86/cpu_ucode_intel.c Tue Oct 11 18:07:11 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu_ucode_intel.c,v 1.12.2.2 2019/05/12 09:22:52 martin Exp $ */
+/* $NetBSD: cpu_ucode_intel.c,v 1.12.2.3 2022/10/11 18:07:11 martin Exp $ */
/*
* Copyright (c) 2012, 2019 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: cpu_ucode_intel.c,v 1.12.2.2 2019/05/12 09:22:52 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu_ucode_intel.c,v 1.12.2.3 2022/10/11 18:07:11 martin Exp $");
#include "opt_xen.h"
#include "opt_cpu_ucode.h"
@@ -109,63 +109,65 @@ static int
cpu_ucode_intel_verify(struct cpu_ucode_softc *sc,
struct intel1_ucode_header *buf)
{
+ struct intel1_ucode_ext_table *ehdr;
uint32_t data_size, total_size, payload_size, ext_size;
uint32_t sum;
+ uint32_t *p;
int i;
if ((buf->uh_header_ver != 1) || (buf->uh_loader_rev != 1))
return EINVAL;
- /*
- * Data size.
- */
- if (buf->uh_data_size == 0) {
+ /* Data size. */
+ if (buf->uh_data_size == 0)
data_size = 2000;
- } else {
+ else
data_size = buf->uh_data_size;
- }
if ((data_size % 4) != 0)
return EINVAL;
if (data_size > sc->sc_blobsize)
return EINVAL;
- /*
- * Total size.
- */
- if (buf->uh_total_size == 0) {
+ /* Total size. */
+ if (buf->uh_total_size == 0)
total_size = data_size + 48;
- } else {
+ else
total_size = buf->uh_total_size;
- }
if ((total_size % 1024) != 0)
return EINVAL;
if (total_size > sc->sc_blobsize)
return EINVAL;
- /*
- * Payload size.
- */
+ /* Payload size. */
payload_size = data_size + 48;
if (payload_size > sc->sc_blobsize)
return EINVAL;
- /*
- * Verify checksum of update data and header. Exclude extended
- * signature.
- */
+ /* Verify checksum of update data and header(s). */
sum = 0;
- for (i = 0; i < (payload_size / sizeof(uint32_t)); i++) {
- sum += *((uint32_t *)buf + i);
- }
+ p = (uint32_t *)buf;
+ for (i = 0; i < (payload_size / sizeof(uint32_t)); i++)
+ sum += p[i];
if (sum != 0)
return EINVAL;
- /*
- * Extended table size. Ignored for now.
- */
ext_size = total_size - payload_size;
if (ext_size > 0) {
- printf("This image has extended signature table.");
+ /* This image has extended signature table. */
+ ehdr = (struct intel1_ucode_ext_table *)
+ ((uint8_t *)buf + sizeof(struct intel1_ucode_header) +
+ data_size);
+ payload_size =
+ sizeof(struct intel1_ucode_ext_table) +
+ sizeof(struct intel1_ucode_proc_signature) *
+ ehdr->uet_count;
+
+ sum = 0;
+ p = (uint32_t *)ehdr;
+ for (i = 0; i < (payload_size / sizeof(uint32_t)); i++)
+ sum += p[i];
+ if (sum != 0)
+ return EINVAL;
}
return 0;
@@ -196,7 +198,8 @@ cpu_ucode_intel_apply(struct cpu_ucode_s
/* Make the buffer 16 byte aligned. */
newbufsize = sc->sc_blobsize + 15;
uha = kmem_alloc(newbufsize,
CVS commit: [netbsd-8] src/sys/arch/x86
Module Name:src Committed By: martin Date: Tue Oct 11 18:07:11 UTC 2022 Modified Files: src/sys/arch/x86/include [netbsd-8]: cpu_ucode.h src/sys/arch/x86/x86 [netbsd-8]: cpu_ucode_intel.c Log Message: Pull up following revision(s) (requested by msaitoh in ticket #1772): sys/arch/x86/include/cpu_ucode.h: revision 1.5 sys/arch/x86/x86/cpu_ucode_intel.c: revision 1.19 sys/arch/x86/x86/cpu_ucode_intel.c: revision 1.20 Add missing newline in a message. KNF. Verify checksum of the extended signature table. To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.3.30.1 src/sys/arch/x86/include/cpu_ucode.h cvs rdiff -u -r1.12.2.2 -r1.12.2.3 src/sys/arch/x86/x86/cpu_ucode_intel.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/x86
Module Name:src
Committed By: martin
Date: Mon Oct 10 15:04:31 UTC 2022
Modified Files:
src/sys/arch/x86/include [netbsd-8]: i82093reg.h
src/sys/arch/x86/x86 [netbsd-8]: ioapic.c
Log Message:
Pull up following revision(s) (requested by msaitoh in ticket #1769):
sys/arch/x86/x86/ioapic.c: revision 1.66
sys/arch/x86/include/i82093reg.h: revision 1.7
Print detail about misconfigured APIC ID.
IOAPIC_ID_MASK is 8 bits these days. Fixes PR kern/54276.
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.5.4.1 src/sys/arch/x86/include/i82093reg.h
cvs rdiff -u -r1.52.10.1 -r1.52.10.2 src/sys/arch/x86/x86/ioapic.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/include/i82093reg.h
diff -u src/sys/arch/x86/include/i82093reg.h:1.5 src/sys/arch/x86/include/i82093reg.h:1.5.4.1
--- src/sys/arch/x86/include/i82093reg.h:1.5 Sat Apr 22 04:25:09 2017
+++ src/sys/arch/x86/include/i82093reg.h Mon Oct 10 15:04:31 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: i82093reg.h,v 1.5 2017/04/22 04:25:09 nonaka Exp $ */
+/* $NetBSD: i82093reg.h,v 1.5.4.1 2022/10/10 15:04:31 martin Exp $ */
/*-
* Copyright (c) 2000 The NetBSD Foundation, Inc.
@@ -60,7 +60,7 @@
#define IOAPIC_ID 0x00
#define IOAPIC_ID_SHIFT 24
-#define IOAPIC_ID_MASK 0x0f00
+#define IOAPIC_ID_MASK 0xff00
/* Version, and maximum interrupt pin number. */
Index: src/sys/arch/x86/x86/ioapic.c
diff -u src/sys/arch/x86/x86/ioapic.c:1.52.10.1 src/sys/arch/x86/x86/ioapic.c:1.52.10.2
--- src/sys/arch/x86/x86/ioapic.c:1.52.10.1 Tue Nov 21 11:01:02 2017
+++ src/sys/arch/x86/x86/ioapic.c Mon Oct 10 15:04:31 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: ioapic.c,v 1.52.10.1 2017/11/21 11:01:02 martin Exp $ */
+/* $NetBSD: ioapic.c,v 1.52.10.2 2022/10/10 15:04:31 martin Exp $ */
/*-
* Copyright (c) 2000, 2009 The NetBSD Foundation, Inc.
@@ -64,7 +64,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: ioapic.c,v 1.52.10.1 2017/11/21 11:01:02 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ioapic.c,v 1.52.10.2 2022/10/10 15:04:31 martin Exp $");
#include "opt_ddb.h"
@@ -373,8 +373,9 @@ ioapic_attach(device_t parent, device_t
* mapping later ...
*/
if (apic_id != sc->sc_pic.pic_apicid) {
- aprint_debug_dev(sc->sc_dev, "misconfigured as apic %d\n",
- apic_id);
+ aprint_debug_dev(sc->sc_dev,
+ "apid is misconfigured (%d != %d)\n",
+ apic_id, sc->sc_pic.pic_apicid);
ioapic_write(sc, IOAPIC_ID,
(ioapic_read(sc, IOAPIC_ID) & ~IOAPIC_ID_MASK)
@@ -385,7 +386,8 @@ ioapic_attach(device_t parent, device_t
if (apic_id != sc->sc_pic.pic_apicid)
aprint_error_dev(sc->sc_dev,
- "can't remap to apid %d\n", sc->sc_pic.pic_apicid);
+ "can't remap apid from %d to %d\n",
+ apic_id, sc->sc_pic.pic_apicid);
else
aprint_debug_dev(sc->sc_dev, "remapped to apic %d\n",
sc->sc_pic.pic_apicid);
CVS commit: [netbsd-8] src/sys/arch/x86
Module Name:src Committed By: martin Date: Mon Oct 10 15:04:31 UTC 2022 Modified Files: src/sys/arch/x86/include [netbsd-8]: i82093reg.h src/sys/arch/x86/x86 [netbsd-8]: ioapic.c Log Message: Pull up following revision(s) (requested by msaitoh in ticket #1769): sys/arch/x86/x86/ioapic.c: revision 1.66 sys/arch/x86/include/i82093reg.h: revision 1.7 Print detail about misconfigured APIC ID. IOAPIC_ID_MASK is 8 bits these days. Fixes PR kern/54276. To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.5.4.1 src/sys/arch/x86/include/i82093reg.h cvs rdiff -u -r1.52.10.1 -r1.52.10.2 src/sys/arch/x86/x86/ioapic.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Fri Sep 16 18:39:16 UTC 2022
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: procfs_machdep.c
Log Message:
Pull up following revision(s) (requested by msaitoh in ticket #1766):
sys/arch/x86/x86/procfs_machdep.c: revision 1.45
Add tdx_guest, brs, hfi, ibt, amx_bf16, amx_tile and amx_int8.
To generate a diff of this commit:
cvs rdiff -u -r1.15.2.13 -r1.15.2.14 src/sys/arch/x86/x86/procfs_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/procfs_machdep.c
diff -u src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.13 src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.14
--- src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.13 Mon Jan 31 17:58:04 2022
+++ src/sys/arch/x86/x86/procfs_machdep.c Fri Sep 16 18:39:16 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: procfs_machdep.c,v 1.15.2.13 2022/01/31 17:58:04 martin Exp $ */
+/* $NetBSD: procfs_machdep.c,v 1.15.2.14 2022/09/16 18:39:16 martin Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -42,7 +42,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.13 2022/01/31 17:58:04 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.14 2022/09/16 18:39:16 martin Exp $");
#include
#include
@@ -122,7 +122,7 @@ static const char * const x86_features[]
{ /* (8) Linux mapping */
"tpr_shadow", "vnmi", "flexpriority", "ept", "vpid", NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, "vmmcall",
- NULL, "ept_ad", NULL, NULL, NULL, NULL, NULL, NULL,
+ NULL, "ept_ad", NULL, NULL, NULL, NULL, "tdx_guest", NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
{ /* (9) Intel-defined: 0007 ebx */
@@ -157,13 +157,13 @@ static const char * const x86_features[]
"clzero", "irperf", "xsaveerptr", NULL, "rdpru", NULL, NULL, NULL,
NULL, "wbnoinvd", NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, "ppin",
- NULL, "virt_ssbd", NULL, "cppc", NULL, NULL, NULL, NULL},
+ NULL, "virt_ssbd", NULL, "cppc", NULL, NULL, NULL, "brs"},
{ /* (14) 0x0006 eax */
"dtherm", "ida", "arat", NULL, "pln", NULL, "pts", "hwp",
"hwp_notify", "hwp_act_window", "hwp_epp","hwp_pkg_req",
NULL, NULL, NULL, NULL,
- NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, "hfi", NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
{ /* (15) AMD 0x800a edx */
@@ -193,8 +193,8 @@ static const char * const x86_features[]
NULL, NULL, "avx512_4vnniw", "avx512_4fmaps", "fsrm", NULL, NULL, NULL,
"vp2intersect", NULL, "md_clear", NULL, NULL, NULL, "serialize", NULL,
"tsxldtrk", NULL, "pconfig", "arch_lbr",
- NULL, NULL, NULL, "avx512_fp16",
- NULL, NULL, NULL, NULL,
+ "ibt", NULL, "amx_bf16", "avx512_fp16",
+ "amx_tile", "amx_int8", NULL, NULL,
"flush_l1d", "arch_capabilities", NULL, "ssbd"},
{ /* (19) AMD 0x801f eax */
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src Committed By: martin Date: Fri Sep 16 18:39:16 UTC 2022 Modified Files: src/sys/arch/x86/x86 [netbsd-8]: procfs_machdep.c Log Message: Pull up following revision(s) (requested by msaitoh in ticket #1766): sys/arch/x86/x86/procfs_machdep.c: revision 1.45 Add tdx_guest, brs, hfi, ibt, amx_bf16, amx_tile and amx_int8. To generate a diff of this commit: cvs rdiff -u -r1.15.2.13 -r1.15.2.14 src/sys/arch/x86/x86/procfs_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/atari/atari
Module Name:src
Committed By: martin
Date: Sat Jun 4 12:40:28 UTC 2022
Modified Files:
src/sys/arch/atari/atari [netbsd-8]: stalloc.c
Log Message:
Pull up following revision(s) (requested by tsutsui in ticket #1747):
sys/arch/atari/atari/stalloc.c: revision 1.17
Restore NULL pointer checks lost in rev 1.16.
Fixes PR port-atari/56859, ok'ed mlelstv@, and confirmed on TT030.
Should be pulled up to netbsd-9 and netbsd-8.
To generate a diff of this commit:
cvs rdiff -u -r1.16 -r1.16.22.1 src/sys/arch/atari/atari/stalloc.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/atari/atari/stalloc.c
diff -u src/sys/arch/atari/atari/stalloc.c:1.16 src/sys/arch/atari/atari/stalloc.c:1.16.22.1
--- src/sys/arch/atari/atari/stalloc.c:1.16 Fri Jan 3 07:14:20 2014
+++ src/sys/arch/atari/atari/stalloc.c Sat Jun 4 12:40:28 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: stalloc.c,v 1.16 2014/01/03 07:14:20 mlelstv Exp $ */
+/* $NetBSD: stalloc.c,v 1.16.22.1 2022/06/04 12:40:28 martin Exp $ */
/*
* Copyright (c) 1995 Leo Weppelman (Atari modifications)
@@ -34,7 +34,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: stalloc.c,v 1.16 2014/01/03 07:14:20 mlelstv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: stalloc.c,v 1.16.22.1 2022/06/04 12:40:28 martin Exp $");
#include
#include
@@ -163,7 +163,7 @@ free_stmem(void *mem)
/*
* check ahead of us.
*/
- if (next->type == MNODE_FREE) {
+ if (next != NULL && next->type == MNODE_FREE) {
/*
* if next is: a valid node and a free node. ==> merge
*/
@@ -174,7 +174,7 @@ free_stmem(void *mem)
stmem_total += mn->size + sizeof(struct mem_node);
mn->size += next->size + sizeof(struct mem_node);
}
- if (prev->type == MNODE_FREE) {
+ if (prev != NULL && prev->type == MNODE_FREE) {
/*
* if prev is: a valid node and a free node. ==> merge
*/
CVS commit: [netbsd-8] src/sys/arch/atari/atari
Module Name:src Committed By: martin Date: Sat Jun 4 12:40:28 UTC 2022 Modified Files: src/sys/arch/atari/atari [netbsd-8]: stalloc.c Log Message: Pull up following revision(s) (requested by tsutsui in ticket #1747): sys/arch/atari/atari/stalloc.c: revision 1.17 Restore NULL pointer checks lost in rev 1.16. Fixes PR port-atari/56859, ok'ed mlelstv@, and confirmed on TT030. Should be pulled up to netbsd-9 and netbsd-8. To generate a diff of this commit: cvs rdiff -u -r1.16 -r1.16.22.1 src/sys/arch/atari/atari/stalloc.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Mon Jan 31 17:58:05 UTC 2022
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: procfs_machdep.c
Log Message:
Pull up following revision(s) (requested by msaitoh in ticket #1733):
sys/arch/x86/x86/procfs_machdep.c: revision 1.43
sys/arch/x86/x86/procfs_machdep.c: revision 1.44
Update for cpuid flags:
- The table 11 was changed from CPUID 0x0f leaf 0 %edx to a Linux mapping.
- The table 12 was changed from CPUID 0x0f leaf 1 %edx to CPUID 0x07 leaf 1
%edx. Print avx_vnni and avx512_bf16.
- Print cppc, enqcmd and arch_lbr.
- Modify linux mapping. No used on NetBSD.
Fix procfs_machdep.c rev. 1.143. Print CPUID 0x0007:1 %eax correctly.
To generate a diff of this commit:
cvs rdiff -u -r1.15.2.12 -r1.15.2.13 src/sys/arch/x86/x86/procfs_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/procfs_machdep.c
diff -u src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.12 src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.13
--- src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.12 Fri Dec 3 19:53:32 2021
+++ src/sys/arch/x86/x86/procfs_machdep.c Mon Jan 31 17:58:04 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: procfs_machdep.c,v 1.15.2.12 2021/12/03 19:53:32 martin Exp $ */
+/* $NetBSD: procfs_machdep.c,v 1.15.2.13 2022/01/31 17:58:04 martin Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -42,7 +42,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.12 2021/12/03 19:53:32 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.13 2022/01/31 17:58:04 martin Exp $");
#include
#include
@@ -120,10 +120,8 @@ static const char * const x86_features[]
NULL, "ibrs", "ibpb", "stibp", NULL, NULL, NULL, NULL},
{ /* (8) Linux mapping */
- "tpr_shadow", "vnmi", "flexpriority", "ept",
- "vpid", "npt", "lbrv", "svm_lock",
- "nrip_save", "tsc_scale", "vmcb_clean", "flushbyasid",
- "decodeassists", "pausefilter", "pfthreshold", "vmmcall",
+ "tpr_shadow", "vnmi", "flexpriority", "ept", "vpid", NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL, NULL, NULL, NULL, "vmmcall",
NULL, "ept_ad", NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
@@ -141,15 +139,16 @@ static const char * const x86_features[]
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
- { /* (11) 0x000f:0 edx */
- NULL, "cqm_llc", NULL, NULL, NULL, NULL, NULL, NULL,
+ { /* (11) Linux mapping */
+ "cqm_llc", "cqm_occup_llc", "cqm_mbm_total", "cqm_mbm_local",
+ NULL, NULL, "split_lock_detect", NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
- { /* (12) 0x000f:1 edx */
- "cqm_occup_llc", "cqm_mbm_total", "cqm_mbm_local", NULL,
+ { /* (12) Intel-defined 0x0007:1 eax */
NULL, NULL, NULL, NULL,
+ "avx_vnni", "avx512_bf16", NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
@@ -158,7 +157,7 @@ static const char * const x86_features[]
"clzero", "irperf", "xsaveerptr", NULL, "rdpru", NULL, NULL, NULL,
NULL, "wbnoinvd", NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, "ppin",
- NULL, "virt_ssbd", NULL, NULL, NULL, NULL, NULL, NULL},
+ NULL, "virt_ssbd", NULL, "cppc", NULL, NULL, NULL, NULL},
{ /* (14) 0x0006 eax */
"dtherm", "ida", "arat", NULL, "pln", NULL, "pts", "hwp",
@@ -181,7 +180,8 @@ static const char * const x86_features[]
"gfni", "vaes", "vpclmulqdq", "avx512_vnni",
"avx512_bitalg", "tme", "avx512_vpopcntdq", NULL,
"la57", NULL, NULL, NULL, NULL, NULL, "rdpid", NULL,
- NULL, "cldemote", NULL, "movdiri", "movdir64b", NULL, "sgx_lc", NULL},
+ NULL, "cldemote", NULL, "movdiri",
+ "movdir64b", "enqcmd", "sgx_lc", NULL},
{ /* (17) 0x8007 ebx */
"overflow_recov", "succor", NULL, "smca", NULL, NULL, NULL, NULL,
@@ -192,7 +192,8 @@ static const char * const x86_features[]
{ /* (18) Intel 0x0007 edx */
NULL, NULL, "avx512_4vnniw", "avx512_4fmaps", "fsrm", NULL, NULL, NULL,
"vp2intersect", NULL, "md_clear", NULL, NULL, NULL, "serialize", NULL,
- "tsxldtrk", NULL, "pconfig", NULL, NULL, NULL, NULL, "avx512_fp16",
+ "tsxldtrk", NULL, "pconfig", "arch_lbr",
+ NULL, NULL, NULL, "avx512_fp16",
NULL, NULL, NULL, NULL,
"flush_l1d", "arch_capabilities", NULL, "ssbd"},
@@ -307,14 +308,11 @@ procfs_getonecpufeatures(struct cpu_info
diff = last - *left;
}
- if (ci->ci_max_cpuid >= 0x0f) {
- x86_cpuid2(0x0f, 0, descs);
- procfs_getonefeatreg(descs[3], x86_features[11], p + diff,
- left);
- diff = last - *left;
+ /* x86_features[11] is Linux defined mapping */
- x86_cpuid2(0x0f, 1, descs);
- procfs_getonefeatreg(descs[3],
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src Committed By: martin Date: Mon Jan 31 17:58:05 UTC 2022 Modified Files: src/sys/arch/x86/x86 [netbsd-8]: procfs_machdep.c Log Message: Pull up following revision(s) (requested by msaitoh in ticket #1733): sys/arch/x86/x86/procfs_machdep.c: revision 1.43 sys/arch/x86/x86/procfs_machdep.c: revision 1.44 Update for cpuid flags: - The table 11 was changed from CPUID 0x0f leaf 0 %edx to a Linux mapping. - The table 12 was changed from CPUID 0x0f leaf 1 %edx to CPUID 0x07 leaf 1 %edx. Print avx_vnni and avx512_bf16. - Print cppc, enqcmd and arch_lbr. - Modify linux mapping. No used on NetBSD. Fix procfs_machdep.c rev. 1.143. Print CPUID 0x0007:1 %eax correctly. To generate a diff of this commit: cvs rdiff -u -r1.15.2.12 -r1.15.2.13 src/sys/arch/x86/x86/procfs_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/x86/include
Module Name:src Committed By: martin Date: Mon Jan 31 17:46:36 UTC 2022 Modified Files: src/sys/arch/x86/include [netbsd-8]: specialreg.h Log Message: Pull up the following revisions (all via patch), requested by msaitoh in ticket #1731: sys/arch/x86/include/specialreg.h 1.179-1.188 - Add CPUID definitions of Last Branch Record, Thread Director, AVX version of VNNI, Fast short REP MOV, HRESET, PPIN, Architectural LBR, Linear Address Masking and Hybrid Information from the latest Intel SDM. - Add CPUID definitions of AddrMaskExt, INT_WBINVD, IbrsSameMode, EferLmsleUnsupported, PSFD and SecureTSC from AMD APM. - Print CLFSH instead of CLFLUSH because both Intel and AMD documents say so. - Modify comment. Add comment. Fix typo. Use __BIT(). KNF. Sort lines. No functional change. To generate a diff of this commit: cvs rdiff -u -r1.98.2.22 -r1.98.2.23 src/sys/arch/x86/include/specialreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/x86/include
Module Name:src Committed By: martin Date: Mon Jan 31 17:46:36 UTC 2022 Modified Files: src/sys/arch/x86/include [netbsd-8]: specialreg.h Log Message: Pull up the following revisions (all via patch), requested by msaitoh in ticket #1731: sys/arch/x86/include/specialreg.h 1.179-1.188 - Add CPUID definitions of Last Branch Record, Thread Director, AVX version of VNNI, Fast short REP MOV, HRESET, PPIN, Architectural LBR, Linear Address Masking and Hybrid Information from the latest Intel SDM. - Add CPUID definitions of AddrMaskExt, INT_WBINVD, IbrsSameMode, EferLmsleUnsupported, PSFD and SecureTSC from AMD APM. - Print CLFSH instead of CLFLUSH because both Intel and AMD documents say so. - Modify comment. Add comment. Fix typo. Use __BIT(). KNF. Sort lines. No functional change. To generate a diff of this commit: cvs rdiff -u -r1.98.2.22 -r1.98.2.23 src/sys/arch/x86/include/specialreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/include/specialreg.h diff -u src/sys/arch/x86/include/specialreg.h:1.98.2.22 src/sys/arch/x86/include/specialreg.h:1.98.2.23 --- src/sys/arch/x86/include/specialreg.h:1.98.2.22 Wed Dec 8 15:56:17 2021 +++ src/sys/arch/x86/include/specialreg.h Mon Jan 31 17:46:36 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: specialreg.h,v 1.98.2.22 2021/12/08 15:56:17 martin Exp $ */ +/* $NetBSD: specialreg.h,v 1.98.2.23 2022/01/31 17:46:36 martin Exp $ */ /* * Copyright (c) 2014-2019 The NetBSD Foundation, Inc. @@ -90,29 +90,29 @@ /* * CR4 */ -#define CR4_VME 0x0001 /* virtual 8086 mode extension enable */ -#define CR4_PVI 0x0002 /* protected mode virtual interrupt enable */ -#define CR4_TSD 0x0004 /* restrict RDTSC instruction to cpl 0 */ -#define CR4_DE 0x0008 /* debugging extension */ -#define CR4_PSE 0x0010 /* large (4MB) page size enable */ -#define CR4_PAE 0x0020 /* physical address extension enable */ -#define CR4_MCE 0x0040 /* machine check enable */ -#define CR4_PGE 0x0080 /* page global enable */ -#define CR4_PCE 0x0100 /* enable RDPMC instruction for all cpls */ -#define CR4_OSFXSR 0x0200 /* enable fxsave/fxrestor and SSE */ -#define CR4_OSXMMEXCPT 0x0400 /* enable unmasked SSE exceptions */ -#define CR4_UMIP 0x0800 /* user-mode instruction prevention */ +#define CR4_VME 0x0001 /* Virtual 8086 mode extension enable */ +#define CR4_PVI 0x0002 /* Protected mode virtual interrupt enable */ +#define CR4_TSD 0x0004 /* Restrict RDTSC instruction to cpl 0 */ +#define CR4_DE 0x0008 /* Debugging extension */ +#define CR4_PSE 0x0010 /* Large (4MB) page size enable */ +#define CR4_PAE 0x0020 /* Physical address extension enable */ +#define CR4_MCE 0x0040 /* Machine check enable */ +#define CR4_PGE 0x0080 /* Page global enable */ +#define CR4_PCE 0x0100 /* Enable RDPMC instruction for all cpls */ +#define CR4_OSFXSR 0x0200 /* Enable fxsave/fxrestor and SSE */ +#define CR4_OSXMMEXCPT 0x0400 /* Enable unmasked SSE exceptions */ +#define CR4_UMIP 0x0800 /* User Mode Instruction Prevention */ #define CR4_LA57 0x1000 /* 57-bit linear addresses */ -#define CR4_VMXE 0x2000 /* enable VMX operations */ -#define CR4_SMXE 0x4000 /* enable SMX operations */ -#define CR4_FSGSBASE 0x0001 /* enable *FSBASE and *GSBASE instructions */ -#define CR4_PCIDE 0x0002 /* enable Process Context IDentifiers */ -#define CR4_OSXSAVE 0x0004 /* enable xsave and xrestore */ -#define CR4_SMEP 0x0010 /* enable SMEP support */ -#define CR4_SMAP 0x0020 /* enable SMAP support */ -#define CR4_PKE 0x0040 /* enable Protection Keys for user pages */ -#define CR4_CET 0x0080 /* enable CET */ -#define CR4_PKS 0x0100 /* enable Protection Keys for kern pages */ +#define CR4_VMXE 0x2000 /* Enable VMX operations */ +#define CR4_SMXE 0x4000 /* Enable SMX operations */ +#define CR4_FSGSBASE 0x0001 /* Enable *FSBASE and *GSBASE instructions */ +#define CR4_PCIDE 0x0002 /* Enable Process Context IDentifiers */ +#define CR4_OSXSAVE 0x0004 /* Enable xsave and xrestore */ +#define CR4_SMEP 0x0010 /* Enable SMEP support */ +#define CR4_SMAP 0x0020 /* Enable SMAP support */ +#define CR4_PKE 0x0040 /* Enable Protection Keys for user pages */ +#define CR4_CET 0x0080 /* Enable CET */ +#define CR4_PKS 0x0100 /* Enable Protection Keys for kern pages */ /* * Extended Control Register XCR0 @@ -130,14 +130,15 @@ #define XCR0_CET_U 0x0800 /* User CET state */ #define XCR0_CET_S 0x1000 /* Kern CET state */ #define XCR0_HDC 0x2000 /* Hardware Duty Cycle state */ +#define XCR0_LBR 0x8000 /* Last Branch Record */ #define XCR0_HWP 0x0001 /* Hardware P-states */ -#define XCR0_FLAGS1 "\20" \ - "\1" "x87" "\2" "SSE" "\3" "AVX" \ - "\4" "BNDREGS" "\5" "BNDCSR" "\6"
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src Committed By: martin Date: Tue Dec 7 12:40:57 UTC 2021 Modified Files: src/sys/arch/x86/x86 [netbsd-8]: identcpu.c Log Message: Pull up following revision(s) (requested by msaitoh in ticket #1719): sys/arch/x86/x86/identcpu.c: revision 1.121 make a numeric literal unsigned as it is bit-negated. To generate a diff of this commit: cvs rdiff -u -r1.55.2.10 -r1.55.2.11 src/sys/arch/x86/x86/identcpu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/x86/identcpu.c diff -u src/sys/arch/x86/x86/identcpu.c:1.55.2.10 src/sys/arch/x86/x86/identcpu.c:1.55.2.11 --- src/sys/arch/x86/x86/identcpu.c:1.55.2.10 Tue Dec 7 12:37:04 2021 +++ src/sys/arch/x86/x86/identcpu.c Tue Dec 7 12:40:57 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: identcpu.c,v 1.55.2.10 2021/12/07 12:37:04 martin Exp $ */ +/* $NetBSD: identcpu.c,v 1.55.2.11 2021/12/07 12:40:57 martin Exp $ */ /*- * Copyright (c) 1999, 2000, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc. @@ -30,7 +30,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.55.2.10 2021/12/07 12:37:04 martin Exp $"); +__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.55.2.11 2021/12/07 12:40:57 martin Exp $"); #include "opt_xen.h" @@ -465,7 +465,7 @@ cpu_probe_cyrix_cmn(struct cpu_info *ci) /* cyrix's workaround for the "coma bug" */ cyrix_write_reg(0x31, cyrix_read_reg(0x31) | 0xf8); cyrix_write_reg(0x32, cyrix_read_reg(0x32) | 0x7f); - cyrix_write_reg(0x33, cyrix_read_reg(0x33) & ~0xff); + cyrix_write_reg(0x33, cyrix_read_reg(0x33) & ~0xffu); cyrix_write_reg(0x3c, cyrix_read_reg(0x3c) | 0x87); /* disable access to ccr4/ccr5 */ cyrix_write_reg(0xC3, c3);
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src Committed By: martin Date: Tue Dec 7 12:40:57 UTC 2021 Modified Files: src/sys/arch/x86/x86 [netbsd-8]: identcpu.c Log Message: Pull up following revision(s) (requested by msaitoh in ticket #1719): sys/arch/x86/x86/identcpu.c: revision 1.121 make a numeric literal unsigned as it is bit-negated. To generate a diff of this commit: cvs rdiff -u -r1.55.2.10 -r1.55.2.11 src/sys/arch/x86/x86/identcpu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Tue Dec 7 12:37:04 UTC 2021
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: identcpu.c
Log Message:
Pull up following revision(s) (requested by msaitoh in ticket #1718):
sys/arch/x86/x86/identcpu.c: revision 1.103
sys/arch/x86/x86/identcpu.c: revision 1.104
sys/arch/x86/x86/identcpu.c: revision 1.105
Add EX2 for Vortex86 SoCs (Andrius V)
use __arraycount, and fix comparison
flip the comparison again
To generate a diff of this commit:
cvs rdiff -u -r1.55.2.9 -r1.55.2.10 src/sys/arch/x86/x86/identcpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/identcpu.c
diff -u src/sys/arch/x86/x86/identcpu.c:1.55.2.9 src/sys/arch/x86/x86/identcpu.c:1.55.2.10
--- src/sys/arch/x86/x86/identcpu.c:1.55.2.9 Fri Aug 16 15:36:17 2019
+++ src/sys/arch/x86/x86/identcpu.c Tue Dec 7 12:37:04 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: identcpu.c,v 1.55.2.9 2019/08/16 15:36:17 martin Exp $ */
+/* $NetBSD: identcpu.c,v 1.55.2.10 2021/12/07 12:37:04 martin Exp $ */
/*-
* Copyright (c) 1999, 2000, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.55.2.9 2019/08/16 15:36:17 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.55.2.10 2021/12/07 12:37:04 martin Exp $");
#include "opt_xen.h"
@@ -691,7 +691,7 @@ cpu_probe_vortex86(struct cpu_info *ci)
#define PCI_MODE1_DATA_REG 0x0cfc
#define PCI_MODE1_ENABLE 0x8000UL
- uint32_t reg;
+ uint32_t reg, idx;
if (cpu_vendor != CPUVENDOR_VORTEX86)
return;
@@ -705,17 +705,18 @@ cpu_probe_vortex86(struct cpu_info *ci)
outl(PCI_MODE1_ADDRESS_REG, PCI_MODE1_ENABLE | 0x90);
reg = inl(PCI_MODE1_DATA_REG);
- if ((reg & 0xf8ff) != 0x30504d44) {
- reg = 0;
+ if ((reg & 0xf0ff) != 0x30504d44) {
+ idx = 0;
} else {
- reg = (reg >> 24) & 7;
+ idx = (reg >> 24) & 0xf;
}
static const char *cpu_vortex86_flavor[] = {
- "??", "SX", "DX", "MX", "DX2", "MX+", "DX3", "EX",
+ "??", "SX", "DX", "MX", "DX2", "MX+", "DX3", "EX", "EX2",
};
+ idx = idx < __arraycount(cpu_vortex86_flavor) ? idx : 0;
snprintf(cpu_brand_string, sizeof(cpu_brand_string), "Vortex86%s",
- cpu_vortex86_flavor[reg]);
+ cpu_vortex86_flavor[idx]);
#undef PCI_MODE1_ENABLE
#undef PCI_MODE1_ADDRESS_REG
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src Committed By: martin Date: Tue Dec 7 12:37:04 UTC 2021 Modified Files: src/sys/arch/x86/x86 [netbsd-8]: identcpu.c Log Message: Pull up following revision(s) (requested by msaitoh in ticket #1718): sys/arch/x86/x86/identcpu.c: revision 1.103 sys/arch/x86/x86/identcpu.c: revision 1.104 sys/arch/x86/x86/identcpu.c: revision 1.105 Add EX2 for Vortex86 SoCs (Andrius V) use __arraycount, and fix comparison flip the comparison again To generate a diff of this commit: cvs rdiff -u -r1.55.2.9 -r1.55.2.10 src/sys/arch/x86/x86/identcpu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Fri Dec 3 19:53:32 UTC 2021
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: procfs_machdep.c
Log Message:
Pull up the following revisions, requested by msaitoh in ticket #1715:
sys/arch/x86/x86/procfs_machdep.c 1.40-1.42
- Add v_spec_ctrl, avx512_fp16, sme, sev, sev_es, sgx, sgx_lc,
serialize and tsxldtrk.
- Whitespace fix.
To generate a diff of this commit:
cvs rdiff -u -r1.15.2.11 -r1.15.2.12 src/sys/arch/x86/x86/procfs_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/procfs_machdep.c
diff -u src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.11 src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.12
--- src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.11 Mon Jul 20 18:40:08 2020
+++ src/sys/arch/x86/x86/procfs_machdep.c Fri Dec 3 19:53:32 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: procfs_machdep.c,v 1.15.2.11 2020/07/20 18:40:08 martin Exp $ */
+/* $NetBSD: procfs_machdep.c,v 1.15.2.12 2021/12/03 19:53:32 martin Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -42,7 +42,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.11 2020/07/20 18:40:08 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.12 2021/12/03 19:53:32 martin Exp $");
#include
#include
@@ -82,11 +82,13 @@ static const char * const x86_features[]
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
{ /* (3) Linux mapping */
- "cxmmx", NULL, "cyrix_arr", "centaur_mcr", NULL,
- "constant_tsc", NULL, NULL,
- NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
- NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
- NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
+ "cxmmx", "k6_mtrr", "cyrix_arr", "centaur_mcr", NULL, NULL, NULL, NULL,
+ "constant_tsc", "up", "art", "arch_perfmon",
+ "pebs", "bts", NULL, NULL,
+ "rep_good", NULL, NULL, "acc_power",
+ "nopl", NULL, "xtopology", "tsc_reliable",
+ "nonstop_tsc", "cpuid", "extd_apicid", "amd_dcm",
+ "aperfmperf", "rapl", "nonstop_tsc_s3", "tsc_known_freq"},
{ /* (4) Intel-defined: 0x0001 ecx */
"pni", "pclmulqdq", "dtes64", "monitor", "ds_cpl", "vmx", "smx", "est",
@@ -112,7 +114,7 @@ static const char * const x86_features[]
{ /* (7) Linux mapping */
NULL, NULL, "cpb", "ebp", NULL, "pln", "pts", "dtherm",
- "hw_pstate", "proc_feedback", "sme", NULL,
+ "hw_pstate", "proc_feedback", NULL, NULL,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, "ibrs", "ibpb", "stibp", NULL, NULL, NULL, NULL},
@@ -126,7 +128,7 @@ static const char * const x86_features[]
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
{ /* (9) Intel-defined: 0007 ebx */
- "fsgsbase", "tsc_adjust", NULL, "bmi1", "hle", "avx2", NULL, "smep",
+ "fsgsbase", "tsc_adjust", "sgx", "bmi1", "hle", "avx2", NULL, "smep",
"bmi2", "erms", "invpcid", "rtm", "cqm", NULL, "mpx", "rdt_a",
"avx512f", "avx512dq", "rdseed", "adx",
"smap", "avx512ifma", NULL, "clflushopt",
@@ -165,12 +167,12 @@ static const char * const x86_features[]
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
- { /* (15) 0x800a edx */
+ { /* (15) AMD 0x800a edx */
"npt", "lbrv", "svm_lock", "nrip_save",
"tsc_scale", "vmcb_clean", "flushbyasid", "decodeassists",
NULL, NULL, "pausefilter", NULL, "pfthreshold", "avic", NULL,
"v_vmsave_vmload",
- "vgif", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+ "vgif", NULL, NULL, NULL, "v_spec_ctrl", NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
{ /* (16) 0x0007:0 ecx */
@@ -179,7 +181,7 @@ static const char * const x86_features[]
"gfni", "vaes", "vpclmulqdq", "avx512_vnni",
"avx512_bitalg", "tme", "avx512_vpopcntdq", NULL,
"la57", NULL, NULL, NULL, NULL, NULL, "rdpid", NULL,
- NULL, "cldemote", NULL, "movdiri", "movdir64b", NULL, NULL, NULL},
+ NULL, "cldemote", NULL, "movdiri", "movdir64b", NULL, "sgx_lc", NULL},
{ /* (17) 0x8007 ebx */
"overflow_recov", "succor", NULL, "smca", NULL, NULL, NULL, NULL,
@@ -189,10 +191,16 @@ static const char * const x86_features[]
{ /* (18) Intel 0x0007 edx */
NULL, NULL, "avx512_4vnniw", "avx512_4fmaps", "fsrm", NULL, NULL, NULL,
- "vp2intersect", NULL, "md_clear", NULL, NULL, NULL, NULL, NULL,
- NULL, NULL, "pconfig", NULL, NULL, NULL, NULL, NULL,
+ "vp2intersect", NULL, "md_clear", NULL, NULL, NULL, "serialize", NULL,
+ "tsxldtrk", NULL, "pconfig", NULL, NULL, NULL, NULL, "avx512_fp16",
NULL, NULL, NULL, NULL,
"flush_l1d", "arch_capabilities", NULL, "ssbd"},
+
+ { /* (19) AMD 0x801f eax */
+ "sme", "sev", NULL, "sev_es", NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
};
static int procfs_getonecpu(int, struct cpu_info *, char *, size_t
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src Committed By: martin Date: Fri Dec 3 19:53:32 UTC 2021 Modified Files: src/sys/arch/x86/x86 [netbsd-8]: procfs_machdep.c Log Message: Pull up the following revisions, requested by msaitoh in ticket #1715: sys/arch/x86/x86/procfs_machdep.c 1.40-1.42 - Add v_spec_ctrl, avx512_fp16, sme, sev, sev_es, sgx, sgx_lc, serialize and tsxldtrk. - Whitespace fix. To generate a diff of this commit: cvs rdiff -u -r1.15.2.11 -r1.15.2.12 src/sys/arch/x86/x86/procfs_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/hppa/dev
Module Name:src
Committed By: martin
Date: Wed Jul 14 17:53:50 UTC 2021
Modified Files:
src/sys/arch/hppa/dev [netbsd-8]: sti_sgc.c
Log Message:
Pull up following revision(s) (requested by tsutsui in ticket #1689):
sys/arch/hppa/dev/sti_sgc.c: revision 1.3
Fix silent freeze on probing sti(4) framebuffer on 712/60. PR/52162
Ok'ed by skrll@.
Should be pulled up to netbsd-9 and netbsd-8.
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.1.28.1 src/sys/arch/hppa/dev/sti_sgc.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/hppa/dev/sti_sgc.c
diff -u src/sys/arch/hppa/dev/sti_sgc.c:1.1 src/sys/arch/hppa/dev/sti_sgc.c:1.1.28.1
--- src/sys/arch/hppa/dev/sti_sgc.c:1.1 Mon Feb 24 07:23:43 2014
+++ src/sys/arch/hppa/dev/sti_sgc.c Wed Jul 14 17:53:50 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: sti_sgc.c,v 1.1 2014/02/24 07:23:43 skrll Exp $ */
+/* $NetBSD: sti_sgc.c,v 1.1.28.1 2021/07/14 17:53:50 martin Exp $ */
/* $OpenBSD: sti_sgc.c,v 1.38 2009/02/06 22:51:04 miod Exp $ */
@@ -35,7 +35,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: sti_sgc.c,v 1.1 2014/02/24 07:23:43 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sti_sgc.c,v 1.1.28.1 2021/07/14 17:53:50 martin Exp $");
#include "opt_cputype.h"
@@ -73,6 +73,16 @@ extern int stidebug;
#define STI_ROMSIZE (sizeof(struct sti_dd) * 4)
#define STI_ID_FDDI 0x280b31af /* Medusa FDDI ROM id */
+/*
+ * hpa addresses to check on-board variants
+ * XXX should check via device_register(9)?
+ *
+ * 0xf400: HPA1991AC19 on 715/33, 715/50
+ * 0xf800: HPA1439A on 735/99, HPA208LCxxx on 715/80, 715/100, 712
+ */
+#define STI_ONBOARD_HPA0 0xf400
+#define STI_ONBOARD_HPA1 0xf800
+
/* gecko optional graphics */
#define STI_GOPT1_REV 0x17
#define STI_GOPT2_REV 0x70
@@ -118,7 +128,9 @@ sti_sgc_getrom(struct confargs *ca)
rom = PAGE0->pd_resv2[1];
hppa_pagezero_unmap(pagezero_cookie);
- if (ca->ca_type.iodc_sv_model == HPPA_FIO_GSGC) {
+ if (ca->ca_type.iodc_sv_model == HPPA_FIO_GSGC &&
+ ca->ca_hpa != STI_ONBOARD_HPA0 &&
+ ca->ca_hpa != STI_ONBOARD_HPA1) {
int i;
for (i = sizeof(sti_sgc_opt); i--; )
if (sti_sgc_opt[i] == ca->ca_type.iodc_revision)
CVS commit: [netbsd-8] src/sys/arch/hppa/dev
Module Name:src Committed By: martin Date: Wed Jul 14 17:53:50 UTC 2021 Modified Files: src/sys/arch/hppa/dev [netbsd-8]: sti_sgc.c Log Message: Pull up following revision(s) (requested by tsutsui in ticket #1689): sys/arch/hppa/dev/sti_sgc.c: revision 1.3 Fix silent freeze on probing sti(4) framebuffer on 712/60. PR/52162 Ok'ed by skrll@. Should be pulled up to netbsd-9 and netbsd-8. To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.1.28.1 src/sys/arch/hppa/dev/sti_sgc.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/hp300/conf
Module Name:src Committed By: martin Date: Sat Jun 5 10:37:10 UTC 2021 Modified Files: src/sys/arch/hp300/conf [netbsd-8]: INSTALL Log Message: Pull up following revision(s) (requested by tsutsui in ticket #1680): sys/arch/hp300/conf/INSTALL: revision 1.67 sys/arch/hp300/conf/INSTALL: revision 1.68 Add missed 'nhpib at intio' for internal HP-IB. Found on testing HPDisk. Also fix comments for HP-IB devices. Should be pulled up to netbsd-8 and netbsd-9. Reduce maxusers to 8 as GENERIC. Should be pulled up to netbsd-9 and netbsd-8. To generate a diff of this commit: cvs rdiff -u -r1.60 -r1.60.12.1 src/sys/arch/hp300/conf/INSTALL Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/hp300/conf/INSTALL diff -u src/sys/arch/hp300/conf/INSTALL:1.60 src/sys/arch/hp300/conf/INSTALL:1.60.12.1 --- src/sys/arch/hp300/conf/INSTALL:1.60 Sat Aug 23 20:26:58 2014 +++ src/sys/arch/hp300/conf/INSTALL Sat Jun 5 10:37:10 2021 @@ -1,4 +1,4 @@ -# $NetBSD: INSTALL,v 1.60 2014/08/23 20:26:58 dholland Exp $ +# $NetBSD: INSTALL,v 1.60.12.1 2021/06/05 10:37:10 martin Exp $ # # INSTALL machine description file # @@ -39,7 +39,7 @@ options HP433 options FPSP # floating point interface for 68040 # Need to set locally -maxusers 32 +maxusers 8 # Standard system options #options COMPAT_43 # compatibility with 4.3BSD interfaces @@ -202,10 +202,11 @@ dcm* at dio? scode ? flags 0xe # DCM 4- le* at dio? scode ? # LANCE ethernet interfaces -nhpib0 at dio? scode 7 # slow internal HP-IB +nhpib* at intio? # internal HP-IB +nhpib0 at dio? scode 7 # 98624A HP-IB nhpib* at dio? scode ? -fhpib* at dio? scode ? # `fast' HP-IB +fhpib* at dio? scode ? # 98625A/98625B HP-IB hpibbus0 at nhpib0 hpibbus* at nhpib?
CVS commit: [netbsd-8] src/sys/arch/hp300/conf
Module Name:src Committed By: martin Date: Sat Jun 5 10:37:10 UTC 2021 Modified Files: src/sys/arch/hp300/conf [netbsd-8]: INSTALL Log Message: Pull up following revision(s) (requested by tsutsui in ticket #1680): sys/arch/hp300/conf/INSTALL: revision 1.67 sys/arch/hp300/conf/INSTALL: revision 1.68 Add missed 'nhpib at intio' for internal HP-IB. Found on testing HPDisk. Also fix comments for HP-IB devices. Should be pulled up to netbsd-8 and netbsd-9. Reduce maxusers to 8 as GENERIC. Should be pulled up to netbsd-9 and netbsd-8. To generate a diff of this commit: cvs rdiff -u -r1.60 -r1.60.12.1 src/sys/arch/hp300/conf/INSTALL Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/xen/x86
Module Name:src Committed By: martin Date: Fri Apr 30 14:22:24 UTC 2021 Modified Files: src/sys/arch/xen/x86 [netbsd-8]: xen_ipi.c Log Message: Pull up following revision(s) (requested by kre in ticket #1675): sys/arch/xen/x86/xen_ipi.c: revision 1.24 (patch) make compile without DDB PR port-xen/50282 To generate a diff of this commit: cvs rdiff -u -r1.20 -r1.20.10.1 src/sys/arch/xen/x86/xen_ipi.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/xen/x86
Module Name:src
Committed By: martin
Date: Fri Apr 30 14:22:24 UTC 2021
Modified Files:
src/sys/arch/xen/x86 [netbsd-8]: xen_ipi.c
Log Message:
Pull up following revision(s) (requested by kre in ticket #1675):
sys/arch/xen/x86/xen_ipi.c: revision 1.24 (patch)
make compile without DDB
PR port-xen/50282
To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.20.10.1 src/sys/arch/xen/x86/xen_ipi.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/xen/x86/xen_ipi.c
diff -u src/sys/arch/xen/x86/xen_ipi.c:1.20 src/sys/arch/xen/x86/xen_ipi.c:1.20.10.1
--- src/sys/arch/xen/x86/xen_ipi.c:1.20 Thu Jul 7 06:55:40 2016
+++ src/sys/arch/xen/x86/xen_ipi.c Fri Apr 30 14:22:24 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: xen_ipi.c,v 1.20 2016/07/07 06:55:40 msaitoh Exp $ */
+/* $NetBSD: xen_ipi.c,v 1.20.10.1 2021/04/30 14:22:24 martin Exp $ */
/*-
* Copyright (c) 2011 The NetBSD Foundation, Inc.
@@ -33,10 +33,12 @@
/*
* Based on: x86/ipi.c
- * __KERNEL_RCSID(0, "$NetBSD: xen_ipi.c,v 1.20 2016/07/07 06:55:40 msaitoh Exp $");
+ * __KERNEL_RCSID(0, "$NetBSD: xen_ipi.c,v 1.20.10.1 2021/04/30 14:22:24 martin Exp $");
*/
-__KERNEL_RCSID(0, "$NetBSD: xen_ipi.c,v 1.20 2016/07/07 06:55:40 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: xen_ipi.c,v 1.20.10.1 2021/04/30 14:22:24 martin Exp $");
+
+#include "opt_ddb.h"
#include
@@ -59,15 +61,17 @@ __KERNEL_RCSID(0, "$NetBSD: xen_ipi.c,v
#include
#include
+#ifdef DDB
#ifdef __x86_64__
extern void ddb_ipi(struct trapframe);
#else
extern void ddb_ipi(int, struct trapframe);
#endif /* __x86_64__ */
+static void xen_ipi_ddb(struct cpu_info *, struct intrframe *);
+#endif
static void xen_ipi_halt(struct cpu_info *, struct intrframe *);
static void xen_ipi_synch_fpu(struct cpu_info *, struct intrframe *);
-static void xen_ipi_ddb(struct cpu_info *, struct intrframe *);
static void xen_ipi_xcall(struct cpu_info *, struct intrframe *);
static void xen_ipi_hvcb(struct cpu_info *, struct intrframe *);
static void xen_ipi_generic(struct cpu_info *, struct intrframe *);
@@ -76,7 +80,11 @@ static void (*ipifunc[XEN_NIPIS])(struct
{ /* In order of priority (see: xen/include/intrdefs.h */
xen_ipi_halt,
xen_ipi_synch_fpu,
+#ifdef DDB
xen_ipi_ddb,
+#else
+ NULL,
+#endif
xen_ipi_xcall,
xen_ipi_hvcb,
xen_ipi_generic,
@@ -226,6 +234,7 @@ xen_ipi_synch_fpu(struct cpu_info *ci, s
fpusave_cpu(true);
}
+#ifdef DDB
static void
xen_ipi_ddb(struct cpu_info *ci, struct intrframe *intrf)
{
@@ -264,6 +273,7 @@ xen_ipi_ddb(struct cpu_info *ci, struct
ddb_ipi(SEL_KPL, tf);
#endif
}
+#endif /* DDB */
static void
xen_ipi_xcall(struct cpu_info *ci, struct intrframe *intrf)
CVS commit: [netbsd-8] src/sys/arch/m68k/m68k
Module Name:src Committed By: martin Date: Thu Feb 25 09:38:48 UTC 2021 Modified Files: src/sys/arch/m68k/m68k [netbsd-8]: reenter_syscall.s Log Message: Pull up following revision(s) (requested by tsutsui in ticket #1659): sys/arch/m68k/m68k/reenter_syscall.s: revision 1.5 sys/arch/m68k/m68k/reenter_syscall.s: revision 1.6 sys/arch/m68k/m68k/reenter_syscall.s: revision 1.7 Replace magic numbers with proper macros prepared in assym.h. No binary changes. Note this is a preparation for a possible fix of PR port-m68k/55990. Consistently use motorola style. No binary changes. Seems missed in rev 1.3: https://mail-index.netbsd.org/source-changes/2013/08/01/msg046378.html Plug kernel stack leaks in reenter_syscall() for setcontext(2). This fixes long standing kernel crashes (MMU fault, address error, and silent freeze by a double bus fault etc. seen for ~10 years) caused by kernel stack overflow, especially on x68k and sun3 running Xorg based servers. See PR/55990 for more details. "This change seems perfectly reasonable" from thorpej@ and jklos@ also reported this also solved freeze of his mac68k system with 10 megabyes of memory. Should be pulled up to netbsd-9 and netbsd-8. To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.4.22.1 src/sys/arch/m68k/m68k/reenter_syscall.s Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/m68k/m68k
Module Name:src
Committed By: martin
Date: Thu Feb 25 09:38:48 UTC 2021
Modified Files:
src/sys/arch/m68k/m68k [netbsd-8]: reenter_syscall.s
Log Message:
Pull up following revision(s) (requested by tsutsui in ticket #1659):
sys/arch/m68k/m68k/reenter_syscall.s: revision 1.5
sys/arch/m68k/m68k/reenter_syscall.s: revision 1.6
sys/arch/m68k/m68k/reenter_syscall.s: revision 1.7
Replace magic numbers with proper macros prepared in assym.h.
No binary changes.
Note this is a preparation for a possible fix of PR port-m68k/55990.
Consistently use motorola style. No binary changes.
Seems missed in rev 1.3:
https://mail-index.netbsd.org/source-changes/2013/08/01/msg046378.html
Plug kernel stack leaks in reenter_syscall() for setcontext(2).
This fixes long standing kernel crashes (MMU fault, address error,
and silent freeze by a double bus fault etc. seen for ~10 years)
caused by kernel stack overflow, especially on x68k and sun3 running
Xorg based servers. See PR/55990 for more details.
"This change seems perfectly reasonable" from thorpej@ and
jklos@ also reported this also solved freeze of his mac68k system
with 10 megabyes of memory.
Should be pulled up to netbsd-9 and netbsd-8.
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.4.22.1 src/sys/arch/m68k/m68k/reenter_syscall.s
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/m68k/m68k/reenter_syscall.s
diff -u src/sys/arch/m68k/m68k/reenter_syscall.s:1.4 src/sys/arch/m68k/m68k/reenter_syscall.s:1.4.22.1
--- src/sys/arch/m68k/m68k/reenter_syscall.s:1.4 Sat Sep 7 19:06:29 2013
+++ src/sys/arch/m68k/m68k/reenter_syscall.s Thu Feb 25 09:38:48 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: reenter_syscall.s,v 1.4 2013/09/07 19:06:29 chs Exp $ */
+/* $NetBSD: reenter_syscall.s,v 1.4.22.1 2021/02/25 09:38:48 martin Exp $ */
/*
* Written by ITOH Yasufumi.
@@ -6,6 +6,7 @@
*/
#include
+#include "assym.h"
/*
* void reenter_syscall(struct frame *fp, int stkadj)
@@ -38,18 +39,31 @@ ENTRY_NOPROFILE(reenter_syscall)
.Lcpfr: movel (%a0)+,(%a1)+
dbra %d0,.Lcpfr
- movew %d1,%sp@(16*4+2) | set stack adjust count
+ movew %d1,FR_ADJ(%sp) | set stack adjust count
movel (%sp),-(%sp) | push syscall no (original d0 value)
jbsr _C_LABEL(syscall) | re-enter syscall()
addql #4,%sp | pop syscall no
#ifdef DEBUG
- tstw %sp@(16*4+2) | stack adjust must be zero
+ tstw FR_ADJ(%sp) | stack adjust must be zero
jeq .Ladjzero
PANIC("reenter_syscall")
.Ladjzero:
#endif
- moveal %sp@(15*4),%a0 | grab and restore
+ moveal FR_SP(%sp),%a0 | grab and restore
movel %a0,%usp | user SP
+ movw FR_ADJ(%sp),%d0 | need to adjust stack?
+ jne .Ladjstk | yes, go to it
moveml (%sp)+,#0x7FFF | restore user registers
addql #8,%sp | pop SP and stack adjust
jra _ASM_LABEL(rei) | rte
+.Ladjstk:
+ lea FR_HW(%sp),%a1 | pointer to HW frame
+ addql #8,%a1 | source pointer
+ movl %a1,%a0 | source
+ addw %d0,%a0 | + hole size = dest pointer
+ movl -(%a1),-(%a0) | copy
+ movl -(%a1),-(%a0) | 8 bytes
+ movl %a0,FR_SP(%sp) | new SSP
+ moveml (%sp)+,#0x7FFF | restore user register
+ movl (%sp),%sp | and do real RTE
+ jra _ASM_LABEL(rei) | rte
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Fri Feb 19 17:49:19 UTC 2021
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: intr.c
Log Message:
Pull up following revision(s) (requested by knakahara in ticket #1657):
sys/arch/x86/x86/intr.c: revision 1.154 (via patch)
Fix x86's pci_intr_disestablish clean up routine. Pointed out by t-kusaba@IIJ,
thanks.
Fix panic on x86 by the following code.
sc_ih = pci_intr_establish_xname(sc_pc, ...);
pci_intr_disestablish(sc_pc, sc_ih);
sc_ih = pci_intr_establish(sc_pc, ...);
ena(4) do such processing when ifconfig down/up.
XXX pullup-8,9
To generate a diff of this commit:
cvs rdiff -u -r1.101.2.7 -r1.101.2.8 src/sys/arch/x86/x86/intr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/intr.c
diff -u src/sys/arch/x86/x86/intr.c:1.101.2.7 src/sys/arch/x86/x86/intr.c:1.101.2.8
--- src/sys/arch/x86/x86/intr.c:1.101.2.7 Thu Nov 14 15:58:06 2019
+++ src/sys/arch/x86/x86/intr.c Fri Feb 19 17:49:19 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: intr.c,v 1.101.2.7 2019/11/14 15:58:06 martin Exp $ */
+/* $NetBSD: intr.c,v 1.101.2.8 2021/02/19 17:49:19 martin Exp $ */
/*-
* Copyright (c) 2007, 2008, 2009 The NetBSD Foundation, Inc.
@@ -133,7 +133,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.101.2.7 2019/11/14 15:58:06 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.101.2.8 2021/02/19 17:49:19 martin Exp $");
#include "opt_intrdebug.h"
#include "opt_multiprocessor.h"
@@ -807,6 +807,9 @@ intr_source_free(struct cpu_info *ci, in
ci->ci_isources[slot] = NULL;
if (pic != _pic)
idt_vec_free(idtvec);
+
+ isp->is_recurse = NULL;
+ isp->is_resume = NULL;
}
#ifdef MULTIPROCESSOR
@@ -1161,12 +1164,12 @@ intr_disestablish_xcall(void *arg1, void
else
(*pic->pic_hwunmask)(pic, ih->ih_pin);
- /* Re-enable interrupts. */
- x86_write_psl(psl);
-
/* If the source is free we can drop it now. */
intr_source_free(ci, ih->ih_slot, pic, idtvec);
+ /* Re-enable interrupts. */
+ x86_write_psl(psl);
+
DPRINTF(("%s: remove slot %d (pic %s pin %d vec %d)\n",
device_xname(ci->ci_dev), ih->ih_slot, pic->pic_name,
ih->ih_pin, idtvec));
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src Committed By: martin Date: Fri Feb 19 17:49:19 UTC 2021 Modified Files: src/sys/arch/x86/x86 [netbsd-8]: intr.c Log Message: Pull up following revision(s) (requested by knakahara in ticket #1657): sys/arch/x86/x86/intr.c: revision 1.154 (via patch) Fix x86's pci_intr_disestablish clean up routine. Pointed out by t-kusaba@IIJ, thanks. Fix panic on x86 by the following code. sc_ih = pci_intr_establish_xname(sc_pc, ...); pci_intr_disestablish(sc_pc, sc_ih); sc_ih = pci_intr_establish(sc_pc, ...); ena(4) do such processing when ifconfig down/up. XXX pullup-8,9 To generate a diff of this commit: cvs rdiff -u -r1.101.2.7 -r1.101.2.8 src/sys/arch/x86/x86/intr.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/x68k/x68k
Module Name:src
Committed By: martin
Date: Thu Feb 11 13:04:01 UTC 2021
Modified Files:
src/sys/arch/x68k/x68k [netbsd-8]: machdep.c
Log Message:
Pull up following revision(s) (requested by tsutsui in ticket #1654):
sys/arch/x68k/x68k/machdep.c: revision 1.204
Restore fixes for PR/51663 lost in r1.195 (uvm_hotplug(9) merge).
The kernel crashdump and savecore(8) on NetBSD/x68k have been broken
(even without EXTNEDED_MEMORY) since NetBSD 8.0. Oops.
Should be pulled up to netbsd-9 and netbsd-8.
To generate a diff of this commit:
cvs rdiff -u -r1.196 -r1.196.6.1 src/sys/arch/x68k/x68k/machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x68k/x68k/machdep.c
diff -u src/sys/arch/x68k/x68k/machdep.c:1.196 src/sys/arch/x68k/x68k/machdep.c:1.196.6.1
--- src/sys/arch/x68k/x68k/machdep.c:1.196 Mon Apr 3 17:37:29 2017
+++ src/sys/arch/x68k/x68k/machdep.c Thu Feb 11 13:04:01 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: machdep.c,v 1.196 2017/04/03 17:37:29 christos Exp $ */
+/* $NetBSD: machdep.c,v 1.196.6.1 2021/02/11 13:04:01 martin Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@@ -39,7 +39,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.196 2017/04/03 17:37:29 christos Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.196.6.1 2021/02/11 13:04:01 martin Exp $");
#include "opt_ddb.h"
#include "opt_kgdb.h"
@@ -554,7 +554,10 @@ cpu_init_kcore_hdr(void)
{
cpu_kcore_hdr_t *h = _kcore_hdr;
struct m68k_kcore_hdr *m = >un._m68k;
- uvm_physseg_t i;
+ psize_t size;
+#ifdef EXTENDED_MEMORY
+ int i, seg;
+#endif
memset(_kcore_hdr, 0, sizeof(cpu_kcore_hdr));
@@ -603,25 +606,20 @@ cpu_init_kcore_hdr(void)
/*
* X68k has multiple RAM segments on some models.
*/
- m->ram_segs[0].start = lowram;
- m->ram_segs[0].size = mem_size - lowram;
-
- i = uvm_physseg_get_first();
-
-for (uvm_physseg_get_next(i); uvm_physseg_valid_p(i); i = uvm_physseg_get_next(i)) {
- if (uvm_physseg_valid_p(i) == false)
- break;
-
- const paddr_t startpfn = uvm_physseg_get_start(i);
- const paddr_t endpfn = uvm_physseg_get_end(i);
-
- KASSERT(startpfn != -1 && endpfn != -1);
-
- m->ram_segs[i].start =
- ctob(startpfn);
- m->ram_segs[i].size =
- ctob(endpfn - startpfn);
+ size = phys_basemem_seg.end - phys_basemem_seg.start;
+ m->ram_segs[0].start = phys_basemem_seg.start;
+ m->ram_segs[0].size = size;
+#ifdef EXTENDED_MEMORY
+ seg = 1;
+ for (i = 0; i < EXTMEM_SEGS; i++) {
+ size = phys_extmem_seg[i].end - phys_extmem_seg[i].start;
+ if (size == 0)
+ continue;
+ m->ram_segs[seg].start = phys_extmem_seg[i].start;
+ m->ram_segs[seg].size = size;
+ seg++;
}
+#endif
}
/*
CVS commit: [netbsd-8] src/sys/arch/x68k/x68k
Module Name:src Committed By: martin Date: Thu Feb 11 13:04:01 UTC 2021 Modified Files: src/sys/arch/x68k/x68k [netbsd-8]: machdep.c Log Message: Pull up following revision(s) (requested by tsutsui in ticket #1654): sys/arch/x68k/x68k/machdep.c: revision 1.204 Restore fixes for PR/51663 lost in r1.195 (uvm_hotplug(9) merge). The kernel crashdump and savecore(8) on NetBSD/x68k have been broken (even without EXTNEDED_MEMORY) since NetBSD 8.0. Oops. Should be pulled up to netbsd-9 and netbsd-8. To generate a diff of this commit: cvs rdiff -u -r1.196 -r1.196.6.1 src/sys/arch/x68k/x68k/machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/hp300/dev
Module Name:src
Committed By: martin
Date: Mon Dec 28 19:52:59 UTC 2020
Modified Files:
src/sys/arch/hp300/dev [netbsd-8]: dnkbd.c hil_intio.c
Log Message:
Pull up following revision(s) (requested by tsutsui in ticket #1642):
sys/arch/hp300/dev/dnkbd.c: revision 1.11
sys/arch/hp300/dev/hil_intio.c: revision 1.4
Fix a longstanding bug in hilkbd (and dnkbd) console attachment.
cn_tab->cn_dev is initialized in wsdisplay_emul_attach()
(but not in wsdiaplay_cnattach()) so it cannot be used
when hil(4) is attached before wsdisplay(4) is attached.
Instead, use exported wsdisplay_cnputc() that is actually
set in early wsdisplay_cnattach().
Now we can use ddb and RB_ASKNAME via HIL keyboard console.
Should be pulleld up to netbsd-8 and netbsd-9.
To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.10.6.1 src/sys/arch/hp300/dev/dnkbd.c
cvs rdiff -u -r1.3 -r1.3.52.1 src/sys/arch/hp300/dev/hil_intio.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/hp300/dev/dnkbd.c
diff -u src/sys/arch/hp300/dev/dnkbd.c:1.10 src/sys/arch/hp300/dev/dnkbd.c:1.10.6.1
--- src/sys/arch/hp300/dev/dnkbd.c:1.10 Sat Apr 8 17:04:56 2017
+++ src/sys/arch/hp300/dev/dnkbd.c Mon Dec 28 19:52:59 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: dnkbd.c,v 1.10 2017/04/08 17:04:56 tsutsui Exp $ */
+/* $NetBSD: dnkbd.c,v 1.10.6.1 2020/12/28 19:52:59 martin Exp $ */
/* $OpenBSD: dnkbd.c,v 1.17 2009/07/23 21:05:56 blambert Exp $ */
/*
@@ -69,6 +69,9 @@
#include "opt_wsdisplay_compat.h"
+#include "wsdisplay.h"
+#include "wsmouse.h"
+
#include
#include
#include
@@ -87,7 +90,9 @@
#include
#include
#include
-#include "wsmouse.h"
+#if NWSDISPLAY > 0
+#include
+#endif
#if NWSMOUSE > 0
#include
#endif
@@ -354,7 +359,8 @@ dnkbd_attach_subdevices(struct dnkbd_sof
* plugged), unless the console keyboard has been claimed already
* (i.e. late hotplug with hil keyboard plugged first).
*/
- if (major(cn_tab->cn_dev) == devsw_name2chr("wsdisplay", NULL, 0)) {
+#if NWSDISPLAY > 0
+ if (cn_tab->cn_putc == wsdisplay_cnputc) {
#if NHILKBD > 0
if (hil_is_console == -1) {
ka.console = 1;
@@ -365,7 +371,10 @@ dnkbd_attach_subdevices(struct dnkbd_sof
ka.console = 1;
#endif
} else
+#endif
+ {
ka.console = 0;
+ }
ka.keymap = _keymapdata;
ka.accessops = _accessops;
Index: src/sys/arch/hp300/dev/hil_intio.c
diff -u src/sys/arch/hp300/dev/hil_intio.c:1.3 src/sys/arch/hp300/dev/hil_intio.c:1.3.52.1
--- src/sys/arch/hp300/dev/hil_intio.c:1.3 Sat Feb 19 05:36:49 2011
+++ src/sys/arch/hp300/dev/hil_intio.c Mon Dec 28 19:52:59 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: hil_intio.c,v 1.3 2011/02/19 05:36:49 tsutsui Exp $ */
+/* $NetBSD: hil_intio.c,v 1.3.52.1 2020/12/28 19:52:59 martin Exp $ */
/* $OpenBSD: hil_intio.c,v 1.8 2007/01/06 20:10:57 miod Exp $ */
/*
@@ -28,6 +28,8 @@
*
*/
+#include "wsdisplay.h"
+
#include
#include
#include
@@ -38,6 +40,9 @@
#include
#include
+#if NWSDISPLAY > 0
+#include
+#endif
#include
@@ -88,8 +93,12 @@ hil_intio_attach(device_t parent, device
/*
* Check that the configured console device is a wsdisplay.
*/
- if (major(cn_tab->cn_dev) != devsw_name2chr("wsdisplay", NULL, 0))
+#if NWSDISPLAY > 0
+ if (cn_tab->cn_putc != wsdisplay_cnputc)
+#endif
+ {
hil_is_console = 0;
+ }
hil_attach(sc, _is_console);
intr_establish(hil_intr, sc, ia->ia_ipl, IPL_TTY);
CVS commit: [netbsd-8] src/sys/arch/hp300/dev
Module Name:src Committed By: martin Date: Mon Dec 28 19:52:59 UTC 2020 Modified Files: src/sys/arch/hp300/dev [netbsd-8]: dnkbd.c hil_intio.c Log Message: Pull up following revision(s) (requested by tsutsui in ticket #1642): sys/arch/hp300/dev/dnkbd.c: revision 1.11 sys/arch/hp300/dev/hil_intio.c: revision 1.4 Fix a longstanding bug in hilkbd (and dnkbd) console attachment. cn_tab->cn_dev is initialized in wsdisplay_emul_attach() (but not in wsdiaplay_cnattach()) so it cannot be used when hil(4) is attached before wsdisplay(4) is attached. Instead, use exported wsdisplay_cnputc() that is actually set in early wsdisplay_cnattach(). Now we can use ddb and RB_ASKNAME via HIL keyboard console. Should be pulleld up to netbsd-8 and netbsd-9. To generate a diff of this commit: cvs rdiff -u -r1.10 -r1.10.6.1 src/sys/arch/hp300/dev/dnkbd.c cvs rdiff -u -r1.3 -r1.3.52.1 src/sys/arch/hp300/dev/hil_intio.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src Committed By: martin Date: Tue Aug 18 09:41:10 UTC 2020 Modified Files: src/sys/arch/x86/x86 [netbsd-8]: ipmi.c Log Message: Pull up following revision(s) (requested by nonaka in ticket #1597): sys/dev/ipmi.c: revision 1.5 (applied to sys/arch/x86/x86/ipmi.c) ipmi(4): Fixed a bug that incorrect condition is notified. When the value obtained from the sensor is below the lower limit of the critical threshold, it is notified that the value is below the lower limit of the warning threshold. To generate a diff of this commit: cvs rdiff -u -r1.64 -r1.64.10.1 src/sys/arch/x86/x86/ipmi.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/x86/ipmi.c diff -u src/sys/arch/x86/x86/ipmi.c:1.64 src/sys/arch/x86/x86/ipmi.c:1.64.10.1 --- src/sys/arch/x86/x86/ipmi.c:1.64 Thu Jul 7 06:55:40 2016 +++ src/sys/arch/x86/x86/ipmi.c Tue Aug 18 09:41:10 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: ipmi.c,v 1.64 2016/07/07 06:55:40 msaitoh Exp $ */ +/* $NetBSD: ipmi.c,v 1.64.10.1 2020/08/18 09:41:10 martin Exp $ */ /* * Copyright (c) 2006 Manuel Bouyer. @@ -52,7 +52,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: ipmi.c,v 1.64 2016/07/07 06:55:40 msaitoh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: ipmi.c,v 1.64.10.1 2020/08/18 09:41:10 martin Exp $"); #include #include @@ -1667,14 +1667,14 @@ ipmi_sensor_status(struct ipmi_softc *sc edata->value_cur > psensor->i_limits.sel_warnmax) return ENVSYS_SWARNOVER; - if (psensor->i_props & PROP_WARNMIN && - edata->value_cur < psensor->i_limits.sel_warnmin) - return ENVSYS_SWARNUNDER; - if (psensor->i_props & PROP_CRITMIN && edata->value_cur < psensor->i_limits.sel_critmin) return ENVSYS_SCRITUNDER; + if (psensor->i_props & PROP_WARNMIN && + edata->value_cur < psensor->i_limits.sel_warnmin) + return ENVSYS_SWARNUNDER; + break; case IPMI_SENSOR_TYPE_INTRUSION:
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src Committed By: martin Date: Tue Aug 18 09:41:10 UTC 2020 Modified Files: src/sys/arch/x86/x86 [netbsd-8]: ipmi.c Log Message: Pull up following revision(s) (requested by nonaka in ticket #1597): sys/dev/ipmi.c: revision 1.5 (applied to sys/arch/x86/x86/ipmi.c) ipmi(4): Fixed a bug that incorrect condition is notified. When the value obtained from the sensor is below the lower limit of the critical threshold, it is notified that the value is below the lower limit of the warning threshold. To generate a diff of this commit: cvs rdiff -u -r1.64 -r1.64.10.1 src/sys/arch/x86/x86/ipmi.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/x86/include
Module Name:src Committed By: martin Date: Wed Aug 5 18:26:17 UTC 2020 Modified Files: src/sys/arch/x86/include [netbsd-8]: specialreg.h Log Message: Accidently not commited for ticket #1595: sys/arch/x86/include/specialreg.h 1.129 via patch Add six errata for AMD Family 17h (Ryzen etc). To generate a diff of this commit: cvs rdiff -u -r1.98.2.20 -r1.98.2.21 src/sys/arch/x86/include/specialreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/include/specialreg.h diff -u src/sys/arch/x86/include/specialreg.h:1.98.2.20 src/sys/arch/x86/include/specialreg.h:1.98.2.21 --- src/sys/arch/x86/include/specialreg.h:1.98.2.20 Wed Aug 5 16:02:53 2020 +++ src/sys/arch/x86/include/specialreg.h Wed Aug 5 18:26:17 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: specialreg.h,v 1.98.2.20 2020/08/05 16:02:53 martin Exp $ */ +/* $NetBSD: specialreg.h,v 1.98.2.21 2020/08/05 18:26:17 martin Exp $ */ /*- * Copyright (c) 1991 The Regents of the University of California. @@ -1055,6 +1055,9 @@ #define NB_CFG_INITAPICCPUIDLO (1ULL << 54) #define MSR_LS_CFG 0xc0011020 +#define LS_CFG_ERRATA_1033 __BIT(4) +#define LS_CFG_ERRATA_793 __BIT(15) +#define LS_CFG_ERRATA_1095 __BIT(57) #define LS_CFG_DIS_LS2_SQUISH 0x0200 #define LS_CFG_DIS_SSB_F15H 0x0040ULL #define LS_CFG_DIS_SSB_F16H 0x0002ULL @@ -1063,6 +1066,7 @@ #define MSR_IC_CFG 0xc0011021 #define IC_CFG_DIS_SEQ_PREFETCH 0x0800 #define IC_CFG_DIS_IND 0x4000 +#define IC_CFG_ERRATA_776 __BIT(26) #define MSR_DC_CFG 0xc0011022 #define DC_CFG_DIS_CNV_WC_SSO 0x0008 @@ -1077,9 +1081,16 @@ #define BU_CFG_WBPFSMCCHKDIS 0x2000ULL #define BU_CFG_WBENHWSBDIS 0x0001ULL +#define MSR_FP_CFG 0xc0011028 +#define FP_CFG_ERRATA_1049 __BIT(4) + #define MSR_DE_CFG 0xc0011029 #define DE_CFG_ERRATA_721 0x0001 #define DE_CFG_LFENCE_SERIALIZE __BIT(1) +#define DE_CFG_ERRATA_1021 __BIT(13) + +#define MSR_LS_CFG2 0xc001102d +#define LS_CFG2_ERRATA_1091 __BIT(34) /* AMD Family10h MSRs */ #define MSR_OSVW_ID_LENGTH 0xc0010140
CVS commit: [netbsd-8] src/sys/arch/x86/include
Module Name:src Committed By: martin Date: Wed Aug 5 18:26:17 UTC 2020 Modified Files: src/sys/arch/x86/include [netbsd-8]: specialreg.h Log Message: Accidently not commited for ticket #1595: sys/arch/x86/include/specialreg.h 1.129 via patch Add six errata for AMD Family 17h (Ryzen etc). To generate a diff of this commit: cvs rdiff -u -r1.98.2.20 -r1.98.2.21 src/sys/arch/x86/include/specialreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Wed Aug 5 17:27:48 UTC 2020
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: errata.c
Log Message:
Pull up the following, requested by msaitoh in ticket #1595:
sys/arch/x86/include/specialreg.h 1.129 via patch
sys/arch/x86/x86/errata.c 1.24-1.26
- Add six errata for AMD Family 17h (Ryzen etc), tested by
Patrick Welche and mrg@.
To generate a diff of this commit:
cvs rdiff -u -r1.23 -r1.23.10.1 src/sys/arch/x86/x86/errata.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/errata.c
diff -u src/sys/arch/x86/x86/errata.c:1.23 src/sys/arch/x86/x86/errata.c:1.23.10.1
--- src/sys/arch/x86/x86/errata.c:1.23 Tue Jan 5 10:20:22 2016
+++ src/sys/arch/x86/x86/errata.c Wed Aug 5 17:27:48 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: errata.c,v 1.23 2016/01/05 10:20:22 hannken Exp $ */
+/* $NetBSD: errata.c,v 1.23.10.1 2020/08/05 17:27:48 martin Exp $ */
/*-
* Copyright (c) 2007 The NetBSD Foundation, Inc.
@@ -45,7 +45,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: errata.c,v 1.23 2016/01/05 10:20:22 hannken Exp $");
+__KERNEL_RCSID(0, "$NetBSD: errata.c,v 1.23.10.1 2020/08/05 17:27:48 martin Exp $");
#include
#include
@@ -70,8 +70,8 @@ typedef enum cpurev {
BH_E4, CH_CG, CH_D0, DH_CG, DH_D0, DH_E3, DH_E6, JH_E1,
JH_E6, SH_B0, SH_B3, SH_C0, SH_CG, SH_D0, SH_E4, SH_E5,
DR_BA, DR_B2, DR_B3, RB_C2, RB_C3, BL_C2, BL_C3, DA_C2,
- DA_C3, HY_D0, HY_D1, HY_D1_G34R1, PH_E0, LN_B0,
- OINK
+ DA_C3, HY_D0, HY_D1, HY_D1_G34R1, PH_E0, LN_B0, KB_A1,
+ ML_A1, ZP_B1, ZP_B2, PiR_B2, OINK
} cpurev_t;
static const u_int cpurevs[] = {
@@ -89,7 +89,9 @@ static const u_int cpurevs[] = {
RB_C2, 0x0100f42, RB_C3, 0x0100f43, BL_C2, 0x0100f52,
BL_C3, 0x0100f53, DA_C2, 0x0100f62, DA_C3, 0x0100f63,
HY_D0, 0x0100f80, HY_D1, 0x0100f81, HY_D1_G34R1, 0x0100f91,
- PH_E0, 0x0100fa0, LN_B0, 0x0300f10,
+ PH_E0, 0x0100fa0, LN_B0, 0x0300f10, KB_A1, 0x0700F01,
+ ML_A1, 0x0730F01, ZP_B1, 0x0800F11, ZP_B2, 0x0800F12,
+ PiR_B2, 0x0800F82,
OINK
};
@@ -142,6 +144,22 @@ static const uint8_t x86_errata_set11[]
DA_C3, HY_D0, HY_D1, HY_D1_G34R1, PH_E0, LN_B0, OINK
};
+static const uint8_t x86_errata_set12[] = {
+ KB_A1, OINK
+};
+
+static const uint8_t x86_errata_set13[] = {
+ ZP_B1, ZP_B2, PiR_B2, OINK
+};
+
+static const uint8_t x86_errata_set14[] = {
+ ZP_B1, OINK
+};
+
+static const uint8_t x86_errata_set15[] = {
+ KB_A1, ML_A1, OINK
+};
+
static bool x86_errata_setmsr(struct cpu_info *, errata_t *);
static bool x86_errata_testmsr(struct cpu_info *, errata_t *);
@@ -285,6 +303,62 @@ static errata_t errata[] = {
721, FALSE, MSR_DE_CFG, x86_errata_set11,
x86_errata_setmsr, DE_CFG_ERRATA_721
},
+ /*
+ * 776: Incorrect Processor Branch Prediction for Two Consecutive
+ * Linear Pages
+ */
+ {
+ 776, FALSE, MSR_IC_CFG, x86_errata_set12,
+ x86_errata_setmsr, IC_CFG_ERRATA_776
+ },
+ /*
+ * 793: Specific Combination of Writes to Write Combined Memory
+ * Types and Locked Instructions May Cause Core Hang
+ */
+ {
+ 793, FALSE, MSR_LS_CFG, x86_errata_set15,
+ x86_errata_setmsr, LS_CFG_ERRATA_793
+ },
+ /*
+ * 1021: Load Operation May Receive Stale Data From Older Store
+ * Operation
+ */
+ {
+ 1021, FALSE, MSR_DE_CFG, x86_errata_set13,
+ x86_errata_setmsr, DE_CFG_ERRATA_1021
+ },
+ /*
+ * 1033: A Lock Operation May Cause the System to Hang
+ */
+ {
+ 1033, FALSE, MSR_LS_CFG, x86_errata_set14,
+ x86_errata_setmsr, LS_CFG_ERRATA_1033
+ },
+ /*
+ * 1049: FCMOV Instruction May Not Execute Correctly
+ */
+ {
+ 1049, FALSE, MSR_FP_CFG, x86_errata_set13,
+ x86_errata_setmsr, FP_CFG_ERRATA_1049
+ },
+#if 0 /* Should we apply this errata? The other OSes don't. */
+ /*
+ * 1091: Address Boundary Crossing Load Operation May Receive
+ * Stale Data
+ */
+ {
+ 1091, FALSE, MSR_LS_CFG2, x86_errata_set13,
+ x86_errata_setmsr, LS_CFG2_ERRATA_1091
+ },
+#endif
+ /*
+ * 1095: Potential Violation of Read Ordering In Lock Operation
+ * In SMT (Simultaneous Multithreading) Mode
+ */
+ {
+ 1095, FALSE, MSR_LS_CFG, x86_errata_set13,
+ x86_errata_setmsr, LS_CFG_ERRATA_1095
+ },
};
static bool
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src Committed By: martin Date: Wed Aug 5 17:27:48 UTC 2020 Modified Files: src/sys/arch/x86/x86 [netbsd-8]: errata.c Log Message: Pull up the following, requested by msaitoh in ticket #1595: sys/arch/x86/include/specialreg.h 1.129 via patch sys/arch/x86/x86/errata.c 1.24-1.26 - Add six errata for AMD Family 17h (Ryzen etc), tested by Patrick Welche and mrg@. To generate a diff of this commit: cvs rdiff -u -r1.23 -r1.23.10.1 src/sys/arch/x86/x86/errata.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch
Module Name:src Committed By: martin Date: Wed Aug 5 16:20:09 UTC 2020 Modified Files: src/sys/arch/x86/conf [netbsd-8]: files.x86 src/sys/arch/x86/include [netbsd-8]: apicvar.h cpu.h src/sys/arch/x86/x86 [netbsd-8]: cpu.c hyperv.c tsc.c src/sys/arch/xen/conf [netbsd-8]: files.xen Log Message: Pull up the following revisions, requested by msaitoh in ticket #1593: sys/arch/x86/conf/files.x86 1.108 sys/arch/x86/include/apicvar.h 1.7 via patch sys/arch/x86/include/cpu.h 1.121 sys/arch/x86/x86/cpu.c 1.185 via patch sys/arch/x86/x86/hyperv.c 1.7 sys/arch/x86/x86/tsc.c 1.41 sys/arch/xen/conf/files.xen 1.181 Get TSC frequency from CPUID 0x15 and/or x16 if it's available. This change fixes a problem that newer Intel processors' timer counts very slowly. To generate a diff of this commit: cvs rdiff -u -r1.88.6.2 -r1.88.6.3 src/sys/arch/x86/conf/files.x86 cvs rdiff -u -r1.5 -r1.5.80.1 src/sys/arch/x86/include/apicvar.h cvs rdiff -u -r1.71.2.8 -r1.71.2.9 src/sys/arch/x86/include/cpu.h cvs rdiff -u -r1.130.2.9 -r1.130.2.10 src/sys/arch/x86/x86/cpu.c cvs rdiff -u -r1.1.2.4 -r1.1.2.5 src/sys/arch/x86/x86/hyperv.c cvs rdiff -u -r1.36.22.1 -r1.36.22.2 src/sys/arch/x86/x86/tsc.c cvs rdiff -u -r1.147.2.3 -r1.147.2.4 src/sys/arch/xen/conf/files.xen Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch
Module Name:src
Committed By: martin
Date: Wed Aug 5 16:20:09 UTC 2020
Modified Files:
src/sys/arch/x86/conf [netbsd-8]: files.x86
src/sys/arch/x86/include [netbsd-8]: apicvar.h cpu.h
src/sys/arch/x86/x86 [netbsd-8]: cpu.c hyperv.c tsc.c
src/sys/arch/xen/conf [netbsd-8]: files.xen
Log Message:
Pull up the following revisions, requested by msaitoh in ticket #1593:
sys/arch/x86/conf/files.x86 1.108
sys/arch/x86/include/apicvar.h 1.7 via patch
sys/arch/x86/include/cpu.h 1.121
sys/arch/x86/x86/cpu.c 1.185 via patch
sys/arch/x86/x86/hyperv.c 1.7
sys/arch/x86/x86/tsc.c 1.41
sys/arch/xen/conf/files.xen 1.181
Get TSC frequency from CPUID 0x15 and/or x16 if it's available.
This change fixes a problem that newer Intel processors' timer
counts very slowly.
To generate a diff of this commit:
cvs rdiff -u -r1.88.6.2 -r1.88.6.3 src/sys/arch/x86/conf/files.x86
cvs rdiff -u -r1.5 -r1.5.80.1 src/sys/arch/x86/include/apicvar.h
cvs rdiff -u -r1.71.2.8 -r1.71.2.9 src/sys/arch/x86/include/cpu.h
cvs rdiff -u -r1.130.2.9 -r1.130.2.10 src/sys/arch/x86/x86/cpu.c
cvs rdiff -u -r1.1.2.4 -r1.1.2.5 src/sys/arch/x86/x86/hyperv.c
cvs rdiff -u -r1.36.22.1 -r1.36.22.2 src/sys/arch/x86/x86/tsc.c
cvs rdiff -u -r1.147.2.3 -r1.147.2.4 src/sys/arch/xen/conf/files.xen
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/conf/files.x86
diff -u src/sys/arch/x86/conf/files.x86:1.88.6.2 src/sys/arch/x86/conf/files.x86:1.88.6.3
--- src/sys/arch/x86/conf/files.x86:1.88.6.2 Sat Mar 9 17:10:20 2019
+++ src/sys/arch/x86/conf/files.x86 Wed Aug 5 16:20:08 2020
@@ -1,4 +1,4 @@
-# $NetBSD: files.x86,v 1.88.6.2 2019/03/09 17:10:20 martin Exp $
+# $NetBSD: files.x86,v 1.88.6.3 2020/08/05 16:20:08 martin Exp $
# options for MP configuration through the MP spec
defflag opt_mpbios.h MPBIOS MPVERBOSE MPDEBUG MPBIOS_SCANPCI
@@ -84,6 +84,7 @@ file arch/x86/x86/efi.c machdep
file arch/x86/x86/errata.c machdep
file arch/x86/x86/genfb_machdep.c machdep
file arch/x86/x86/identcpu.c machdep
+file arch/x86/x86/identcpu_subr.c machdep
file arch/x86/x86/i8259.c machdep
file arch/x86/x86/intr.c machdep
file arch/x86/x86/nmi.c machdep
Index: src/sys/arch/x86/include/apicvar.h
diff -u src/sys/arch/x86/include/apicvar.h:1.5 src/sys/arch/x86/include/apicvar.h:1.5.80.1
--- src/sys/arch/x86/include/apicvar.h:1.5 Mon Apr 28 20:23:40 2008
+++ src/sys/arch/x86/include/apicvar.h Wed Aug 5 16:20:08 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: apicvar.h,v 1.5 2008/04/28 20:23:40 martin Exp $ */
+/* $NetBSD: apicvar.h,v 1.5.80.1 2020/08/05 16:20:08 martin Exp $ */
/*-
* Copyright (c) 2000 The NetBSD Foundation, Inc.
@@ -46,4 +46,7 @@ struct apic_attach_args {
void apic_format_redir(const char *, const char *, int, u_int32_t, u_int32_t);
+/* For lapic.c */
+extern uint32_t lapic_per_second;
+
#endif /* !_X86_APICVAR_H_ */
Index: src/sys/arch/x86/include/cpu.h
diff -u src/sys/arch/x86/include/cpu.h:1.71.2.8 src/sys/arch/x86/include/cpu.h:1.71.2.9
--- src/sys/arch/x86/include/cpu.h:1.71.2.8 Sat Mar 9 17:10:20 2019
+++ src/sys/arch/x86/include/cpu.h Wed Aug 5 16:20:08 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.71.2.8 2019/03/09 17:10:20 martin Exp $ */
+/* $NetBSD: cpu.h,v 1.71.2.9 2020/08/05 16:20:08 martin Exp $ */
/*-
* Copyright (c) 1990 The Regents of the University of California.
@@ -451,6 +451,9 @@ void cpu_probe(struct cpu_info *);
void cpu_identify(struct cpu_info *);
void identify_hypervisor(void);
+/* identcpu_subr.c */
+uint64_t cpu_tsc_freq_cpuid(struct cpu_info *);
+
typedef enum vm_guest {
VM_GUEST_NO = 0,
VM_GUEST_VM,
Index: src/sys/arch/x86/x86/cpu.c
diff -u src/sys/arch/x86/x86/cpu.c:1.130.2.9 src/sys/arch/x86/x86/cpu.c:1.130.2.10
--- src/sys/arch/x86/x86/cpu.c:1.130.2.9 Tue Jan 21 16:47:24 2020
+++ src/sys/arch/x86/x86/cpu.c Wed Aug 5 16:20:08 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.130.2.9 2020/01/21 16:47:24 martin Exp $ */
+/* $NetBSD: cpu.c,v 1.130.2.10 2020/08/05 16:20:08 martin Exp $ */
/*-
* Copyright (c) 2000-2012 NetBSD Foundation, Inc.
@@ -62,7 +62,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.130.2.9 2020/01/21 16:47:24 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.130.2.10 2020/08/05 16:20:08 martin Exp $");
#include "opt_ddb.h"
#include "opt_mpbios.h" /* for MPDEBUG */
@@ -1226,16 +1226,25 @@ cpu_shutdown(device_t dv, int how)
return cpu_stop(dv);
}
+/* Get the TSC frequency and set it to ci->ci_data.cpu_cc_freq. */
void
cpu_get_tsc_freq(struct cpu_info *ci)
{
- uint64_t last_tsc;
+ uint64_t freq = 0, last_tsc;
if (cpu_hascounter()) {
- last_tsc = cpu_counter_serializing();
- x86_delay(10);
-
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Wed Aug 5 16:05:49 UTC 2020
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: coretemp.c
Log Message:
Pull up following revision(s) (requested by msaitoh in ticket #1589):
sys/arch/x86/x86/coretemp.c: revision 1.37
Add special handling for model 0x0f stepping >=2 or mode 0x0e to get Tjmax.
To generate a diff of this commit:
cvs rdiff -u -r1.35.10.1 -r1.35.10.2 src/sys/arch/x86/x86/coretemp.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/coretemp.c
diff -u src/sys/arch/x86/x86/coretemp.c:1.35.10.1 src/sys/arch/x86/x86/coretemp.c:1.35.10.2
--- src/sys/arch/x86/x86/coretemp.c:1.35.10.1 Thu Jul 26 23:23:50 2018
+++ src/sys/arch/x86/x86/coretemp.c Wed Aug 5 16:05:49 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: coretemp.c,v 1.35.10.1 2018/07/26 23:23:50 snj Exp $ */
+/* $NetBSD: coretemp.c,v 1.35.10.2 2020/08/05 16:05:49 martin Exp $ */
/*-
* Copyright (c) 2011 The NetBSD Foundation, Inc.
@@ -61,7 +61,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: coretemp.c,v 1.35.10.1 2018/07/26 23:23:50 snj Exp $");
+__KERNEL_RCSID(0, "$NetBSD: coretemp.c,v 1.35.10.2 2020/08/05 16:05:49 martin Exp $");
#include
#include
@@ -271,6 +271,19 @@ coretemp_tjmax(device_t self)
sc->sc_tjmax = 100;
if ((model == 0x0f && stepping >= 2) || (model == 0x0e)) {
+ /*
+ * Check MSR_IA32_PLATFORM_ID(0x17) bit 28. It's not documented
+ * in the datasheet, but the following page describes the
+ * detail:
+ * http://software.intel.com/en-us/articles/
+ * mobile-intel-core2-processor-detection-table/
+ * Was: http://softwarecommunity.intel.com/Wiki/Mobility/
+ * 720.htm
+ */
+ if (rdmsr_safe(MSR_IA32_PLATFORM_ID, ) != 0)
+ goto notee;
+ if ((model < 0x17) && ((msr & __BIT(28)) == 0))
+ goto notee;
if (rdmsr_safe(MSR_IA32_EXT_CONFIG, ) == EFAULT)
return;
@@ -290,6 +303,7 @@ coretemp_tjmax(device_t self)
} else
sc->sc_tjmax = 90;
} else {
+notee:
/*
* Attempt to get Tj(max) from IA32_TEMPERATURE_TARGET,
* but only consider the interval [70, 110] C as valid.
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src Committed By: martin Date: Wed Aug 5 16:05:49 UTC 2020 Modified Files: src/sys/arch/x86/x86 [netbsd-8]: coretemp.c Log Message: Pull up following revision(s) (requested by msaitoh in ticket #1589): sys/arch/x86/x86/coretemp.c: revision 1.37 Add special handling for model 0x0f stepping >=2 or mode 0x0e to get Tjmax. To generate a diff of this commit: cvs rdiff -u -r1.35.10.1 -r1.35.10.2 src/sys/arch/x86/x86/coretemp.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/x86/include
Module Name:src Committed By: martin Date: Wed Aug 5 16:02:53 UTC 2020 Modified Files: src/sys/arch/x86/include [netbsd-8]: specialreg.h Log Message: Pull up the following revisions, requested by msaitoh in ticket #1588: sys/arch/x86/include/specialreg.h 1.162-1.168 via patch - AMD CPUID Fn8000_000a %edx bit 20 is "SPEC_CTRL". - Add some bit definitions of AMD's CPUID Fn8000_001f Encrypted Memory features. - Add AMD INVLPGB/TLBSYNC hypervisor enable in VMCB and TLBSYNC intercept bit. - Add AMD MSR_DE_CFG's bit 1 as DE_CFG_LFENCE_SERIALIZE. - Add some definitions for Intel: - Add CPUID leaf 6 %eax bit 19 for HW_FEEDBACK* and IA32_PACKAGE_TERM* MSRs. - Add CPUID leaf 7 %ecx bit 31 for Protection Keys. - Add definition of Load only TLB and Store only TLB. - Add IF_PSCHANGE_MC_NO bit of IA32_ARCH_CAPABILITIES - Fix HWP_IGNIDL. - Add CPUID 7 %edx bit 9 "SRBDS_CTRL" - Modify comment. Style and fix typo. To generate a diff of this commit: cvs rdiff -u -r1.98.2.19 -r1.98.2.20 src/sys/arch/x86/include/specialreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/x86/include
Module Name:src Committed By: martin Date: Wed Aug 5 16:02:53 UTC 2020 Modified Files: src/sys/arch/x86/include [netbsd-8]: specialreg.h Log Message: Pull up the following revisions, requested by msaitoh in ticket #1588: sys/arch/x86/include/specialreg.h 1.162-1.168 via patch - AMD CPUID Fn8000_000a %edx bit 20 is "SPEC_CTRL". - Add some bit definitions of AMD's CPUID Fn8000_001f Encrypted Memory features. - Add AMD INVLPGB/TLBSYNC hypervisor enable in VMCB and TLBSYNC intercept bit. - Add AMD MSR_DE_CFG's bit 1 as DE_CFG_LFENCE_SERIALIZE. - Add some definitions for Intel: - Add CPUID leaf 6 %eax bit 19 for HW_FEEDBACK* and IA32_PACKAGE_TERM* MSRs. - Add CPUID leaf 7 %ecx bit 31 for Protection Keys. - Add definition of Load only TLB and Store only TLB. - Add IF_PSCHANGE_MC_NO bit of IA32_ARCH_CAPABILITIES - Fix HWP_IGNIDL. - Add CPUID 7 %edx bit 9 "SRBDS_CTRL" - Modify comment. Style and fix typo. To generate a diff of this commit: cvs rdiff -u -r1.98.2.19 -r1.98.2.20 src/sys/arch/x86/include/specialreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/x86/include/specialreg.h diff -u src/sys/arch/x86/include/specialreg.h:1.98.2.19 src/sys/arch/x86/include/specialreg.h:1.98.2.20 --- src/sys/arch/x86/include/specialreg.h:1.98.2.19 Wed Apr 15 14:25:09 2020 +++ src/sys/arch/x86/include/specialreg.h Wed Aug 5 16:02:53 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: specialreg.h,v 1.98.2.19 2020/04/15 14:25:09 martin Exp $ */ +/* $NetBSD: specialreg.h,v 1.98.2.20 2020/08/05 16:02:53 martin Exp $ */ /*- * Copyright (c) 1991 The Regents of the University of California. @@ -247,10 +247,10 @@ ? 0 : (CPUID_TO_EXTMODEL(cpuid) << 4))) /* CPUID Fn0001 %ebx */ -#define CPUID_BRAND_INDEX __BITS(7,0) -#define CPUID_CLFLUSH_SIZE __BITS(15,8) -#define CPUID_HTT_CORES __BITS(23,16) -#define CPUID_LOCAL_APIC_ID __BITS(31,24) +#define CPUID_BRAND_INDEX __BITS(7,0) +#define CPUID_CLFLUSH_SIZE __BITS(15,8) +#define CPUID_HTT_CORES __BITS(23,16) +#define CPUID_LOCAL_APIC_ID __BITS(31,24) /* * Intel Deterministic Cache Parameter Leaf @@ -320,6 +320,7 @@ #define CPUID_DSPM_HWP_PECI __BIT(16) /* HWP PECI override */ #define CPUID_DSPM_HWP_FLEX __BIT(17) /* Flexible HWP */ #define CPUID_DSPM_HWP_FAST __BIT(18) /* Fast access for IA32_HWP_REQUEST */ +#define CPUID_DSPM_HW_FEEDBACK __BIT(19) /* HW_FEEDBACK*, IA32_PACKAGE_TERM* */ #define CPUID_DSPM_HWP_IGNIDL __BIT(20) /* Ignore Idle Logical Processor HWP */ #define CPUID_DSPM_FLAGS "\20" \ @@ -327,8 +328,8 @@ "\5" "PLN" "\6" "ECMD" "\7" "PTM" "\10" "HWP" \ "\11" "HWP_NOTIFY" "\12" "HWP_ACTWIN" "\13" "HWP_EPP" "\14" "HWP_PLR" \ "\16" "HDC" "\17" "TBM3" "\20" "HWP_CAP" \ - "\21" "HWP_PECI" "\22" "HWP_FLEX" "\23" "HWP_FAST" \ - "25" "HWP_IGNIDL" + "\21" "HWP_PECI" "\22" "HWP_FLEX" "\23" "HWP_FAST" "\24HW_FEEDBACK" \ + "\25" "HWP_IGNIDL" /* * Intel/AMD Digital Thermal Sensor and @@ -341,7 +342,7 @@ /* * Intel/AMD Structured Extended Feature leaf Fn_0007 - * %eax == 0: Subleaf 0 + * %ecx == 0: Subleaf 0 * %eax: The Maximum input value for supported subleaf. * %ebx: Feature bits. * %ecx: Feature bits. @@ -413,6 +414,7 @@ #define CPUID_SEF_MOVDIRI __BIT(27) /* MOVDIRI instruction */ #define CPUID_SEF_MOVDIR64B __BIT(28) /* MOVDIR64B instruction */ #define CPUID_SEF_SGXLC __BIT(30) /* SGX Launch Configuration */ +#define CPUID_SEF_PKS __BIT(31) /* Protection Keys */ #define CPUID_SEF_FLAGS1 "\177\20" \ "b\0PREFETCHWT1\0" "b\1AVX512_VBMI\0" "b\2UMIP\0" "b\3PKU\0" \ @@ -422,13 +424,14 @@ "f\21\5MAWAU\0" \ "b\26RDPID\0" \ "b\31CLDEMOTE\0" "b\33MOVDIRI\0" \ - "b\34MOVDIR64B\0" "b\36SGXLC\0" + "b\34MOVDIR64B\0" "b\36SGXLC\0" "b\37PKS\0" /* %edx */ #define CPUID_SEF_AVX512_4VNNIW __BIT(2) #define CPUID_SEF_AVX512_4FMAPS __BIT(3) #define CPUID_SEF_FSREP_MOV __BIT(4) /* Fast Short REP MOV */ #define CPUID_SEF_AVX512_VP2INTERSECT __BIT(8) +#define CPUID_SEF_SRBDS_CTRL __BIT(9) /* IA32_MCU_OPT_CTRL */ #define CPUID_SEF_MD_CLEAR __BIT(10) #define CPUID_SEF_TSX_FORCE_ABORT __BIT(13) /* MSR_TSX_FORCE_ABORT bit 0 */ #define CPUID_SEF_SERIALIZE __BIT(14) @@ -445,7 +448,7 @@ #define CPUID_SEF_FLAGS2 "\20" \ "\3" "AVX512_4VNNIW" "\4" "AVX512_4FMAPS" \ "\5" "FSREP_MOV" \ - "\11" "VP2INTERSECT" "\13" "MD_CLEAR" \ + "\11VP2INTERSECT" "\12SRBDS_CTRL" "\13MD_CLEAR" \ "\16TSX_FORCE_ABORT" "\17SERIALIZE" "\20HYBRID" \ "\21" "TSXLDTRK" \ "\25" "CET_IBT" \ @@ -561,6 +564,8 @@ #define CPUID_DATP_TCTYPE_D 1 /* Data TLB */ #define CPUID_DATP_TCTYPE_I 2 /* Instruction TLB */ #define CPUID_DATP_TCTYPE_U 3 /* Unified TLB */ +#define CPUID_DATP_TCTYPE_L 4 /* Load only TLB */ +#define CPUID_DATP_TCTYPE_S 5 /* Store only TLB */ #define CPUID_DATP_TCLEVEL __BITS(7, 5) /* TLB level (start at 1) */ #define
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src Committed By: martin Date: Mon Jul 20 18:40:09 UTC 2020 Modified Files: src/sys/arch/x86/x86 [netbsd-8]: procfs_machdep.c Log Message: Pull up following revision(s) (requested by msaitoh in ticket #1581): sys/arch/x86/x86/procfs_machdep.c: revision 1.37 sys/arch/x86/x86/procfs_machdep.c: revision 1.38 Add AMD protected processor identification number (PPIN). Lowercase ppin. To generate a diff of this commit: cvs rdiff -u -r1.15.2.10 -r1.15.2.11 src/sys/arch/x86/x86/procfs_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Mon Jul 20 18:40:09 UTC 2020
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: procfs_machdep.c
Log Message:
Pull up following revision(s) (requested by msaitoh in ticket #1581):
sys/arch/x86/x86/procfs_machdep.c: revision 1.37
sys/arch/x86/x86/procfs_machdep.c: revision 1.38
Add AMD protected processor identification number (PPIN).
Lowercase ppin.
To generate a diff of this commit:
cvs rdiff -u -r1.15.2.10 -r1.15.2.11 src/sys/arch/x86/x86/procfs_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/procfs_machdep.c
diff -u src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.10 src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.11
--- src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.10 Wed Apr 15 14:25:09 2020
+++ src/sys/arch/x86/x86/procfs_machdep.c Mon Jul 20 18:40:08 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: procfs_machdep.c,v 1.15.2.10 2020/04/15 14:25:09 martin Exp $ */
+/* $NetBSD: procfs_machdep.c,v 1.15.2.11 2020/07/20 18:40:08 martin Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -42,7 +42,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.10 2020/04/15 14:25:09 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.11 2020/07/20 18:40:08 martin Exp $");
#include
#include
@@ -155,7 +155,7 @@ static const char * const x86_features[]
{ /* (13) AMD 0x8008 ebx */
"clzero", "irperf", "xsaveerptr", NULL, "rdpru", NULL, NULL, NULL,
NULL, "wbnoinvd", NULL, NULL, NULL, NULL, NULL, NULL,
- NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL, NULL, NULL, NULL, "ppin",
NULL, "virt_ssbd", NULL, NULL, NULL, NULL, NULL, NULL},
{ /* (14) 0x0006 eax */
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src
Committed By: martin
Date: Sat Jun 20 16:05:06 UTC 2020
Modified Files:
src/sys/arch/x86/x86 [netbsd-8]: cpu_rng.c
Log Message:
Pull up following revision(s) (requested by riastradh in ticket #1560):
sys/arch/x86/x86/cpu_rng.c: revision 1.16
Use x86_read_psl/x86_disable_intr/x86_read_psl to defer interrupts.
Using x86_disable_intr/x86_enable_intr causes a bit of a snag when we
try it early at boot before we're ready to handle interrupts, because
it has the effect of enabling interrupts!
Fixes instant reset at boot on VIA CPUs. The instant reset on boot
is new since the entropy rework, which initialized the x86 CPU RNG
earlier than before, but in principle this could also cause other
problems while not early at boot too.
XXX pullup
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.5.12.1 src/sys/arch/x86/x86/cpu_rng.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/cpu_rng.c
diff -u src/sys/arch/x86/x86/cpu_rng.c:1.5 src/sys/arch/x86/x86/cpu_rng.c:1.5.12.1
--- src/sys/arch/x86/x86/cpu_rng.c:1.5 Mon Feb 29 00:17:54 2016
+++ src/sys/arch/x86/x86/cpu_rng.c Sat Jun 20 16:05:06 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu_rng.c,v 1.5 2016/02/29 00:17:54 riastradh Exp $ */
+/* $NetBSD: cpu_rng.c,v 1.5.12.1 2020/06/20 16:05:06 martin Exp $ */
/*-
* Copyright (c) 2015 The NetBSD Foundation, Inc.
@@ -136,6 +136,7 @@ exhausted:
static size_t
cpu_rng_via(cpu_rng_t *out)
{
+ u_long psl;
uint32_t creg0, rndsts;
/*
@@ -149,9 +150,9 @@ cpu_rng_via(cpu_rng_t *out)
* even if such a fault is generated.
*
* XXX can this really happen if we don't use "rep xstorrng"?
- *
*/
kpreempt_disable();
+ psl = x86_read_psl();
x86_disable_intr();
creg0 = rcr0();
lcr0(creg0 & ~(CR0_EM|CR0_TS)); /* Permit access to SIMD/FPU path */
@@ -165,7 +166,7 @@ cpu_rng_via(cpu_rng_t *out)
: "=a" (rndsts), "+D" (out) : "d" (0) : "memory");
/* Put CR0 back how it was */
lcr0(creg0);
- x86_enable_intr();
+ x86_write_psl(psl);
kpreempt_enable();
/*
CVS commit: [netbsd-8] src/sys/arch/x86/x86
Module Name:src Committed By: martin Date: Sat Jun 20 16:05:06 UTC 2020 Modified Files: src/sys/arch/x86/x86 [netbsd-8]: cpu_rng.c Log Message: Pull up following revision(s) (requested by riastradh in ticket #1560): sys/arch/x86/x86/cpu_rng.c: revision 1.16 Use x86_read_psl/x86_disable_intr/x86_read_psl to defer interrupts. Using x86_disable_intr/x86_enable_intr causes a bit of a snag when we try it early at boot before we're ready to handle interrupts, because it has the effect of enabling interrupts! Fixes instant reset at boot on VIA CPUs. The instant reset on boot is new since the entropy rework, which initialized the x86 CPU RNG earlier than before, but in principle this could also cause other problems while not early at boot too. XXX pullup To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.5.12.1 src/sys/arch/x86/x86/cpu_rng.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/mac68k/dev
Module Name:src Committed By: bouyer Date: Tue Jun 16 10:23:04 UTC 2020 Modified Files: src/sys/arch/mac68k/dev [netbsd-8]: ams.c Log Message: Pull up following revision(s) (requested by tsutsui in ticket #1557): sys/arch/mac68k/dev/ams.c: revision 1.23 Fix inverted Y-axis value passed to wsmouse_input(9). Note this is what src/sys/arch/macppc/dev/ams.c does as "upward (moving the mouse forward) is positive" as noted in wsmouse(9): http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/macppc/dev/ams.c#rev1.4 Reported and tested by @NonameInsect on his SE/30 and Xorg server. Should be pulled up to netbsd-8 and netbsd-9. To generate a diff of this commit: cvs rdiff -u -r1.22 -r1.22.22.1 src/sys/arch/mac68k/dev/ams.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/mac68k/dev
Module Name:src Committed By: bouyer Date: Tue Jun 16 10:23:04 UTC 2020 Modified Files: src/sys/arch/mac68k/dev [netbsd-8]: ams.c Log Message: Pull up following revision(s) (requested by tsutsui in ticket #1557): sys/arch/mac68k/dev/ams.c: revision 1.23 Fix inverted Y-axis value passed to wsmouse_input(9). Note this is what src/sys/arch/macppc/dev/ams.c does as "upward (moving the mouse forward) is positive" as noted in wsmouse(9): http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/macppc/dev/ams.c#rev1.4 Reported and tested by @NonameInsect on his SE/30 and Xorg server. Should be pulled up to netbsd-8 and netbsd-9. To generate a diff of this commit: cvs rdiff -u -r1.22 -r1.22.22.1 src/sys/arch/mac68k/dev/ams.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mac68k/dev/ams.c diff -u src/sys/arch/mac68k/dev/ams.c:1.22 src/sys/arch/mac68k/dev/ams.c:1.22.22.1 --- src/sys/arch/mac68k/dev/ams.c:1.22 Sat Oct 19 16:23:17 2013 +++ src/sys/arch/mac68k/dev/ams.c Tue Jun 16 10:23:04 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: ams.c,v 1.22 2013/10/19 16:23:17 martin Exp $ */ +/* $NetBSD: ams.c,v 1.22.22.1 2020/06/16 10:23:04 bouyer Exp $ */ /* * Copyright (C) 1998 Colin Wood @@ -31,7 +31,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: ams.c,v 1.22 2013/10/19 16:23:17 martin Exp $"); +__KERNEL_RCSID(0, "$NetBSD: ams.c,v 1.22.22.1 2020/06/16 10:23:04 bouyer Exp $"); #include #include @@ -506,7 +506,7 @@ ms_processevent(adb_event_t *event, stru if (amsc->sc_wsmousedev != NULL) /* wsmouse is attached? */ wsmouse_input(amsc->sc_wsmousedev, new_event.u.m.buttons, - new_event.u.m.dx, new_event.u.m.dy, 0, 0, + new_event.u.m.dx, -new_event.u.m.dy, 0, 0, WSMOUSE_INPUT_DELTA); #else /* do nothing */ ;
CVS commit: [netbsd-8] src/sys/arch/powerpc/oea
Module Name:src
Committed By: martin
Date: Sun Jun 7 12:23:43 UTC 2020
Modified Files:
src/sys/arch/powerpc/oea [netbsd-8]: pmap.c
Log Message:
Pull up following revision(s) (requested by rin in ticket #1554):
sys/arch/powerpc/oea/pmap.c: revision 1.96
Stop returning while PMAP_LOCK() (= KERNEL_LOCK(1, NULL)) is held.
Kernel freeze with heavy load is significantly mitigated (fixed?),
in which I could not even enter DDB from console.
XXX
There is still inconsistency in usage of two PVO pools.
I will send-pr later.
XXX
pullup to netbsd-[987]
To generate a diff of this commit:
cvs rdiff -u -r1.94.8.1 -r1.94.8.2 src/sys/arch/powerpc/oea/pmap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/oea/pmap.c
diff -u src/sys/arch/powerpc/oea/pmap.c:1.94.8.1 src/sys/arch/powerpc/oea/pmap.c:1.94.8.2
--- src/sys/arch/powerpc/oea/pmap.c:1.94.8.1 Tue Feb 27 09:07:33 2018
+++ src/sys/arch/powerpc/oea/pmap.c Sun Jun 7 12:23:43 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.94.8.1 2018/02/27 09:07:33 martin Exp $ */
+/* $NetBSD: pmap.c,v 1.94.8.2 2020/06/07 12:23:43 martin Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -63,7 +63,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.94.8.1 2018/02/27 09:07:33 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.94.8.2 2020/06/07 12:23:43 martin Exp $");
#define PMAP_NOOPNAMES
@@ -991,6 +991,7 @@ pmap_pte_spill(struct pmap *pm, vaddr_t
}
source_pvo = pvo;
if (exec && !PVO_EXECUTABLE_P(source_pvo)) {
+PMAP_UNLOCK();
return 0;
}
if (victim_pvo != NULL)
@@ -2162,6 +2163,7 @@ pmap_extract(pmap_t pm, vaddr_t va, padd
return true;
}
}
+ PMAP_UNLOCK();
return false;
#elif defined (PMAP_OEA64_BRIDGE)
if (va >= SEGMENT_LENGTH)
CVS commit: [netbsd-8] src/sys/arch/powerpc/oea
Module Name:src Committed By: martin Date: Sun Jun 7 12:23:43 UTC 2020 Modified Files: src/sys/arch/powerpc/oea [netbsd-8]: pmap.c Log Message: Pull up following revision(s) (requested by rin in ticket #1554): sys/arch/powerpc/oea/pmap.c: revision 1.96 Stop returning while PMAP_LOCK() (= KERNEL_LOCK(1, NULL)) is held. Kernel freeze with heavy load is significantly mitigated (fixed?), in which I could not even enter DDB from console. XXX There is still inconsistency in usage of two PVO pools. I will send-pr later. XXX pullup to netbsd-[987] To generate a diff of this commit: cvs rdiff -u -r1.94.8.1 -r1.94.8.2 src/sys/arch/powerpc/oea/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [netbsd-8] src/sys/arch/x86/pci
Module Name:src
Committed By: martin
Date: Wed May 13 12:39:20 UTC 2020
Modified Files:
src/sys/arch/x86/pci [netbsd-8]: if_vmx.c
Log Message:
Pull up following revision(s) (requested by yamaguchi in ticket #1547):
sys/arch/x86/pci/if_vmx.c: revision 1.60
Fix the wrong logic about making the number of vmx(4) TX/RX queue
be power of two
reviewed by nonaka@n.o.
To generate a diff of this commit:
cvs rdiff -u -r1.19.6.7 -r1.19.6.8 src/sys/arch/x86/pci/if_vmx.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/pci/if_vmx.c
diff -u src/sys/arch/x86/pci/if_vmx.c:1.19.6.7 src/sys/arch/x86/pci/if_vmx.c:1.19.6.8
--- src/sys/arch/x86/pci/if_vmx.c:1.19.6.7 Thu Dec 26 20:23:39 2019
+++ src/sys/arch/x86/pci/if_vmx.c Wed May 13 12:39:20 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: if_vmx.c,v 1.19.6.7 2019/12/26 20:23:39 martin Exp $ */
+/* $NetBSD: if_vmx.c,v 1.19.6.8 2020/05/13 12:39:20 martin Exp $ */
/* $OpenBSD: if_vmx.c,v 1.16 2014/01/22 06:04:17 brad Exp $ */
/*
@@ -19,12 +19,13 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: if_vmx.c,v 1.19.6.7 2019/12/26 20:23:39 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_vmx.c,v 1.19.6.8 2020/05/13 12:39:20 martin Exp $");
#include
#include
#include
#include
+#include
#include
#include
#include
@@ -398,23 +399,11 @@ CFATTACH_DECL3_NEW(vmx, sizeof(struct vm
static int
vmxnet3_calc_queue_size(int n)
{
- int v, q;
- v = n;
- while (v != 0) {
- if (powerof2(n) != 0)
- break;
- v /= 2;
- q = rounddown2(n, v);
- if (q != 0) {
- n = q;
- break;
- }
- }
- if (n == 0)
- n = 1;
+ if (__predict_false(n <= 0))
+ return 1;
- return n;
+ return (1U << (fls32(n) - 1));
}
static inline void
CVS commit: [netbsd-8] src/sys/arch/x86/pci
Module Name:src Committed By: martin Date: Wed May 13 12:39:20 UTC 2020 Modified Files: src/sys/arch/x86/pci [netbsd-8]: if_vmx.c Log Message: Pull up following revision(s) (requested by yamaguchi in ticket #1547): sys/arch/x86/pci/if_vmx.c: revision 1.60 Fix the wrong logic about making the number of vmx(4) TX/RX queue be power of two reviewed by nonaka@n.o. To generate a diff of this commit: cvs rdiff -u -r1.19.6.7 -r1.19.6.8 src/sys/arch/x86/pci/if_vmx.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
