CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Fri May 12 05:46:39 UTC 2017 Modified Files: src/sys/arch/arm/arm: ast.c Log Message: KASSERT -> MASSERTMSG To generate a diff of this commit: cvs rdiff -u -r1.28 -r1.29 src/sys/arch/arm/arm/ast.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Sat May 6 13:05:59 UTC 2017 Modified Files: src/sys/arch/arm/arm: undefined.c Log Message: KNF To generate a diff of this commit: cvs rdiff -u -r1.58 -r1.59 src/sys/arch/arm/arm/undefined.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/undefined.c diff -u src/sys/arch/arm/arm/undefined.c:1.58 src/sys/arch/arm/arm/undefined.c:1.59 --- src/sys/arch/arm/arm/undefined.c:1.58 Mon Feb 27 06:46:59 2017 +++ src/sys/arch/arm/arm/undefined.c Sat May 6 13:05:59 2017 @@ -1,4 +1,4 @@ -/* $NetBSD: undefined.c,v 1.58 2017/02/27 06:46:59 chs Exp $ */ +/* $NetBSD: undefined.c,v 1.59 2017/05/06 13:05:59 skrll Exp $ */ /* * Copyright (c) 2001 Ben Harris. @@ -47,15 +47,15 @@ #define FAST_FPE #include "opt_ddb.h" -#include "opt_kgdb.h" #include "opt_dtrace.h" +#include "opt_kgdb.h" #include #ifdef KGDB #include #endif -__KERNEL_RCSID(0, "$NetBSD: undefined.c,v 1.58 2017/02/27 06:46:59 chs Exp $"); +__KERNEL_RCSID(0, "$NetBSD: undefined.c,v 1.59 2017/05/06 13:05:59 skrll Exp $"); #include #include
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Sat May 6 13:05:59 UTC 2017 Modified Files: src/sys/arch/arm/arm: undefined.c Log Message: KNF To generate a diff of this commit: cvs rdiff -u -r1.58 -r1.59 src/sys/arch/arm/arm/undefined.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: skrll
Date: Wed Apr 26 08:20:47 UTC 2017
Modified Files:
src/sys/arch/arm/arm: disassem.c
Log Message:
Move mcrr/mrrc earlier so they match before stc/ldc
To generate a diff of this commit:
cvs rdiff -u -r1.35 -r1.36 src/sys/arch/arm/arm/disassem.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/disassem.c
diff -u src/sys/arch/arm/arm/disassem.c:1.35 src/sys/arch/arm/arm/disassem.c:1.36
--- src/sys/arch/arm/arm/disassem.c:1.35 Sat Mar 11 12:19:30 2017
+++ src/sys/arch/arm/arm/disassem.c Wed Apr 26 08:20:47 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: disassem.c,v 1.35 2017/03/11 12:19:30 skrll Exp $ */
+/* $NetBSD: disassem.c,v 1.36 2017/04/26 08:20:47 skrll Exp $ */
/*
* Copyright (c) 1996 Mark Brinicombe.
@@ -49,7 +49,7 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: disassem.c,v 1.35 2017/03/11 12:19:30 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: disassem.c,v 1.36 2017/04/26 08:20:47 skrll Exp $");
#include
@@ -149,10 +149,10 @@ static const struct arm32_insn arm32_i[]
{ 0xfe5fffe0, 0xf84d0500, "srs", "XnW!m" },
{ 0xfe50, 0xf8100a00, "rfe", "XnW" },
{ 0xfe00, 0xfa00, "blx", "t" }, /* Before b and bl */
-{ 0xfe100090, 0xfc00, "stc2", "L#v" },
-{ 0x0e100090, 0x0c00, "stc", "L#v" },
{ 0x0ff0, 0x0c40, "mcrr", "#&" },
{ 0x0ff0, 0x0c50, "mrrc", "#&" },
+{ 0xfe100090, 0xfc00, "stc2", "L#v" },
+{ 0x0e100090, 0x0c00, "stc", "L#v" },
{ 0xfe100090, 0xfc10, "ldc2", "L#v" },
{ 0x0e100090, 0x0c10, "ldc", "L#v" },
{ 0xff10, 0xfe00, "cdp2", "#y" },
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Wed Apr 26 08:20:47 UTC 2017 Modified Files: src/sys/arch/arm/arm: disassem.c Log Message: Move mcrr/mrrc earlier so they match before stc/ldc To generate a diff of this commit: cvs rdiff -u -r1.35 -r1.36 src/sys/arch/arm/arm/disassem.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Tue Apr 25 09:02:05 UTC 2017 Modified Files: src/sys/arch/arm/arm: db_trace.c Log Message: Report trapframe where possible To generate a diff of this commit: cvs rdiff -u -r1.31 -r1.32 src/sys/arch/arm/arm/db_trace.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: skrll
Date: Tue Apr 25 09:02:05 UTC 2017
Modified Files:
src/sys/arch/arm/arm: db_trace.c
Log Message:
Report trapframe where possible
To generate a diff of this commit:
cvs rdiff -u -r1.31 -r1.32 src/sys/arch/arm/arm/db_trace.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/db_trace.c
diff -u src/sys/arch/arm/arm/db_trace.c:1.31 src/sys/arch/arm/arm/db_trace.c:1.32
--- src/sys/arch/arm/arm/db_trace.c:1.31 Sat Jan 24 15:44:32 2015
+++ src/sys/arch/arm/arm/db_trace.c Tue Apr 25 09:02:04 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: db_trace.c,v 1.31 2015/01/24 15:44:32 skrll Exp $ */
+/* $NetBSD: db_trace.c,v 1.32 2017/04/25 09:02:04 skrll Exp $ */
/*
* Copyright (c) 2000, 2001 Ben Harris
@@ -31,7 +31,7 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: db_trace.c,v 1.31 2015/01/24 15:44:32 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_trace.c,v 1.32 2017/04/25 09:02:04 skrll Exp $");
#include
#include
@@ -86,6 +86,7 @@ db_stack_trace_print(db_expr_t addr, boo
db_expr_t count, const char *modif,
void (*pr)(const char *, ...))
{
+ struct trapframe *tf = NULL;
uint32_t *frame, *lastframe;
const char *cp = modif;
char c;
@@ -140,6 +141,7 @@ db_stack_trace_print(db_expr_t addr, boo
}
(*pr)("lid %d ", l.l_lid);
pcb = lwp_getpcb();
+ tf = lwp_trapframe();
#ifndef _KERNEL
struct pcb pcbb;
db_read_bytes((db_addr_t)pcb, sizeof(*pcb),
@@ -258,6 +260,9 @@ db_stack_trace_print(db_expr_t addr, boo
break;
}
} else if (INKERNEL((int)lastframe)) {
+ if (trace_thread) {
+(*pr)("--- tf %p ---\n", tf);
+ }
/* switch from user to kernel */
if (kernel_only)
break; /* kernel stack only */
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: sevan Date: Tue Apr 4 11:46:13 UTC 2017 Modified Files: src/sys/arch/arm/arm: arm_machdep.c Log Message: Define NCPUINFO and set it to 1 or MAXCPUS whether on single or multiprocessor system. Use NCPUINFO as the array size for *cpu_info[]. Closes PR port-hpcarm/52138 Patch by skrll ok pgoyette To generate a diff of this commit: cvs rdiff -u -r1.50 -r1.51 src/sys/arch/arm/arm/arm_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: sevan
Date: Tue Apr 4 11:46:13 UTC 2017
Modified Files:
src/sys/arch/arm/arm: arm_machdep.c
Log Message:
Define NCPUINFO and set it to 1 or MAXCPUS whether on single or multiprocessor
system.
Use NCPUINFO as the array size for *cpu_info[].
Closes PR port-hpcarm/52138
Patch by skrll
ok pgoyette
To generate a diff of this commit:
cvs rdiff -u -r1.50 -r1.51 src/sys/arch/arm/arm/arm_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/arm_machdep.c
diff -u src/sys/arch/arm/arm/arm_machdep.c:1.50 src/sys/arch/arm/arm/arm_machdep.c:1.51
--- src/sys/arch/arm/arm/arm_machdep.c:1.50 Thu Mar 16 16:13:20 2017
+++ src/sys/arch/arm/arm/arm_machdep.c Tue Apr 4 11:46:12 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: arm_machdep.c,v 1.50 2017/03/16 16:13:20 chs Exp $ */
+/* $NetBSD: arm_machdep.c,v 1.51 2017/04/04 11:46:12 sevan Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -80,7 +80,7 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: arm_machdep.c,v 1.50 2017/03/16 16:13:20 chs Exp $");
+__KERNEL_RCSID(0, "$NetBSD: arm_machdep.c,v 1.51 2017/04/04 11:46:12 sevan Exp $");
#include
#include
@@ -121,10 +121,14 @@ struct cpu_info cpu_info_store = {
};
#ifdef MULTIPROCESSOR
-struct cpu_info *cpu_info[MAXCPUS] = {
+#define NCPUINFO MAXCPUS
+#else
+#define NCPUINFO 1
+#endif
+
+struct cpu_info *cpu_info[NCPUINFO] = {
[0] = _info_store
};
-#endif
const pcu_ops_t * const pcu_ops_md_defs[PCU_UNIT_COUNT] = {
#if defined(FPU_VFP)
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Sat Mar 11 12:19:30 UTC 2017 Modified Files: src/sys/arch/arm/arm: disassem.c Log Message: Fixup the catchall for the media instructions that are currently unhandled so that swi, etc can match To generate a diff of this commit: cvs rdiff -u -r1.34 -r1.35 src/sys/arch/arm/arm/disassem.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: skrll
Date: Sat Mar 11 12:19:30 UTC 2017
Modified Files:
src/sys/arch/arm/arm: disassem.c
Log Message:
Fixup the catchall for the media instructions that are currently unhandled
so that swi, etc can match
To generate a diff of this commit:
cvs rdiff -u -r1.34 -r1.35 src/sys/arch/arm/arm/disassem.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/disassem.c
diff -u src/sys/arch/arm/arm/disassem.c:1.34 src/sys/arch/arm/arm/disassem.c:1.35
--- src/sys/arch/arm/arm/disassem.c:1.34 Mon Dec 14 15:29:45 2015
+++ src/sys/arch/arm/arm/disassem.c Sat Mar 11 12:19:30 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: disassem.c,v 1.34 2015/12/14 15:29:45 skrll Exp $ */
+/* $NetBSD: disassem.c,v 1.35 2017/03/11 12:19:30 skrll Exp $ */
/*
* Copyright (c) 1996 Mark Brinicombe.
@@ -49,7 +49,7 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: disassem.c,v 1.34 2015/12/14 15:29:45 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: disassem.c,v 1.35 2017/03/11 12:19:30 skrll Exp $");
#include
@@ -169,7 +169,7 @@ static const struct arm32_insn arm32_i[]
{ 0x0fe00070, 0x07e00050, "ubfx", "dmir" },
{ 0xfff000f0, 0xe7f0, "und", "x" }, /* Special immediate? */
-{ 0x0610, 0x0610, "und", "x" }, /* Remove when done with media */
+{ 0x0e10, 0x0610, "und", "x" }, /* Remove when done with media */
{ 0x0d70, 0x0420, "strt", "daW" },
{ 0x0d70, 0x0430, "ldrt", "daW" },
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Tue Feb 21 07:40:28 UTC 2017 Modified Files: src/sys/arch/arm/arm: process_machdep.c Log Message: KNF To generate a diff of this commit: cvs rdiff -u -r1.30 -r1.31 src/sys/arch/arm/arm/process_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Tue Feb 21 07:40:28 UTC 2017 Modified Files: src/sys/arch/arm/arm: process_machdep.c Log Message: KNF To generate a diff of this commit: cvs rdiff -u -r1.30 -r1.31 src/sys/arch/arm/arm/process_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/process_machdep.c diff -u src/sys/arch/arm/arm/process_machdep.c:1.30 src/sys/arch/arm/arm/process_machdep.c:1.31 --- src/sys/arch/arm/arm/process_machdep.c:1.30 Wed Aug 13 21:41:32 2014 +++ src/sys/arch/arm/arm/process_machdep.c Tue Feb 21 07:40:28 2017 @@ -1,4 +1,4 @@ -/* $NetBSD: process_machdep.c,v 1.30 2014/08/13 21:41:32 matt Exp $ */ +/* $NetBSD: process_machdep.c,v 1.31 2017/02/21 07:40:28 skrll Exp $ */ /* * Copyright (c) 1993 The Regents of the University of California. @@ -133,7 +133,7 @@ #include -__KERNEL_RCSID(0, "$NetBSD: process_machdep.c,v 1.30 2014/08/13 21:41:32 matt Exp $"); +__KERNEL_RCSID(0, "$NetBSD: process_machdep.c,v 1.31 2017/02/21 07:40:28 skrll Exp $"); #include #include @@ -165,7 +165,7 @@ process_read_regs(struct lwp *l, struct regs->r_pc |= 1; #endif - return(0); + return 0; } int @@ -209,7 +209,7 @@ process_write_regs(struct lwp *l, const tf->tf_r15 = regs->r_pc; #endif - return(0); + return 0; } int @@ -224,7 +224,7 @@ process_write_fpregs(struct lwp *l, cons pcb->pcb_vfp = regs->fpr_vfp; pcb->pcb_vfp.vfp_fpexc &= ~VFP_FPEXC_EN; #endif - return(0); + return 0; } int @@ -248,5 +248,5 @@ process_set_pc(struct lwp *l, void *addr tf->tf_r15 = (tf->tf_r15 & ~R15_PC) | (register_t)addr; #endif - return (0); + return 0; }
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: skrll
Date: Mon Feb 20 17:25:41 UTC 2017
Modified Files:
src/sys/arch/arm/arm: undefined.c
Log Message:
Trailing whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.56 -r1.57 src/sys/arch/arm/arm/undefined.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/undefined.c
diff -u src/sys/arch/arm/arm/undefined.c:1.56 src/sys/arch/arm/arm/undefined.c:1.57
--- src/sys/arch/arm/arm/undefined.c:1.56 Wed Apr 15 13:22:50 2015
+++ src/sys/arch/arm/arm/undefined.c Mon Feb 20 17:25:41 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: undefined.c,v 1.56 2015/04/15 13:22:50 matt Exp $ */
+/* $NetBSD: undefined.c,v 1.57 2017/02/20 17:25:41 skrll Exp $ */
/*
* Copyright (c) 2001 Ben Harris.
@@ -55,7 +55,7 @@
#include
#endif
-__KERNEL_RCSID(0, "$NetBSD: undefined.c,v 1.56 2015/04/15 13:22:50 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: undefined.c,v 1.57 2017/02/20 17:25:41 skrll Exp $");
#include
#include
@@ -432,8 +432,8 @@ undefinedinstruction(trapframe_t *tf)
if (uh == NULL) {
/* Fault has not been handled */
- ksiginfo_t ksi;
-
+ ksiginfo_t ksi;
+
#ifdef VERBOSE_ARM32
s = spltty();
@@ -454,7 +454,7 @@ undefinedinstruction(trapframe_t *tf)
splx(s);
#endif
-
+
if ((fault_code & FAULT_USER) == 0) {
#ifdef DDB
db_printf("Undefined instruction %#x in kernel at %#lx (LR %#x SP %#x)\n",
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Mon Feb 20 17:25:41 UTC 2017 Modified Files: src/sys/arch/arm/arm: undefined.c Log Message: Trailing whitespace To generate a diff of this commit: cvs rdiff -u -r1.56 -r1.57 src/sys/arch/arm/arm/undefined.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: jakllsch Date: Sat Jan 28 13:21:11 UTC 2017 Modified Files: src/sys/arch/arm/arm: cpufunc.c Log Message: Drop inadvertent redundant CPU_CONTROL_MMU_ENABLE ((1 < 22)) for PJ4Bv7. This was intended to be CPU_CONTROL_UNAL_ENABLE, which is already handled. Should fix PR kern/51921. To generate a diff of this commit: cvs rdiff -u -r1.162 -r1.163 src/sys/arch/arm/arm/cpufunc.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/cpufunc.c diff -u src/sys/arch/arm/arm/cpufunc.c:1.162 src/sys/arch/arm/arm/cpufunc.c:1.163 --- src/sys/arch/arm/arm/cpufunc.c:1.162 Tue Oct 18 13:58:52 2016 +++ src/sys/arch/arm/arm/cpufunc.c Sat Jan 28 13:21:11 2017 @@ -1,4 +1,4 @@ -/* $NetBSD: cpufunc.c,v 1.162 2016/10/18 13:58:52 kiyohara Exp $ */ +/* $NetBSD: cpufunc.c,v 1.163 2017/01/28 13:21:11 jakllsch Exp $ */ /* * arm7tdmi support code Copyright (c) 2001 John Fremlin @@ -49,7 +49,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.162 2016/10/18 13:58:52 kiyohara Exp $"); +__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.163 2017/01/28 13:21:11 jakllsch Exp $"); #include "opt_compat_netbsd.h" #include "opt_cpuoptions.h" @@ -3076,7 +3076,7 @@ pj4bv7_setup(char *args) cpuctrl |= CPU_CONTROL_IC_ENABLE; cpuctrl |= (0xf << 3); cpuctrl |= CPU_CONTROL_BPRD_ENABLE; - cpuctrl |= (0x5 << 16) | (1 < 22); + cpuctrl |= (0x5 << 16); cpuctrl |= CPU_CONTROL_XP_ENABLE; #ifndef ARM_HAS_VBAR
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: jakllsch Date: Sat Jan 28 13:21:11 UTC 2017 Modified Files: src/sys/arch/arm/arm: cpufunc.c Log Message: Drop inadvertent redundant CPU_CONTROL_MMU_ENABLE ((1 < 22)) for PJ4Bv7. This was intended to be CPU_CONTROL_UNAL_ENABLE, which is already handled. Should fix PR kern/51921. To generate a diff of this commit: cvs rdiff -u -r1.162 -r1.163 src/sys/arch/arm/arm/cpufunc.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: kiyohara Date: Sat Jan 7 15:22:11 UTC 2017 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_pj4b.S Log Message: Add a white-space into comment and `*/'. To generate a diff of this commit: cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/arm/cpufunc_asm_pj4b.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: kiyohara Date: Sat Jan 7 15:22:11 UTC 2017 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_pj4b.S Log Message: Add a white-space into comment and `*/'. To generate a diff of this commit: cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/arm/cpufunc_asm_pj4b.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/cpufunc_asm_pj4b.S diff -u src/sys/arch/arm/arm/cpufunc_asm_pj4b.S:1.11 src/sys/arch/arm/arm/cpufunc_asm_pj4b.S:1.12 --- src/sys/arch/arm/arm/cpufunc_asm_pj4b.S:1.11 Wed May 20 02:59:57 2015 +++ src/sys/arch/arm/arm/cpufunc_asm_pj4b.S Sat Jan 7 15:22:11 2017 @@ -1,4 +1,4 @@ -/* $NetBSD: cpufunc_asm_pj4b.S,v 1.11 2015/05/20 02:59:57 hsuenaga Exp $ */ +/* $NetBSD: cpufunc_asm_pj4b.S,v 1.12 2017/01/07 15:22:11 kiyohara Exp $ */ /*** Copyright (C) Marvell International Ltd. and its affiliates @@ -43,7 +43,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBI #define MV_FMC0_SMP (1 << 1) /* SMP/nAMP enable */ #define MV_FMC0_PARITY (1 << 2) /* Enable L1 Cache Parity */ -#define MV_FMC0_LFDIS (1 << 7) /* Disable DC Speculative linefill*/ +#define MV_FMC0_LFDIS (1 << 7) /* Disable DC Speculative linefill */ #define MV_FMC0_FW (1 << 8) /* Cache & TLB maintenance broadcast */ #define MPIDR_CPUID_MASK (0x3 << 0) /* CPUID */
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: kiyohara Date: Tue Oct 18 13:58:53 UTC 2016 Modified Files: src/sys/arch/arm/arm: cpufunc.c Log Message: Indent. To generate a diff of this commit: cvs rdiff -u -r1.161 -r1.162 src/sys/arch/arm/arm/cpufunc.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: kiyohara
Date: Tue Oct 18 13:58:53 UTC 2016
Modified Files:
src/sys/arch/arm/arm: cpufunc.c
Log Message:
Indent.
To generate a diff of this commit:
cvs rdiff -u -r1.161 -r1.162 src/sys/arch/arm/arm/cpufunc.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/cpufunc.c
diff -u src/sys/arch/arm/arm/cpufunc.c:1.161 src/sys/arch/arm/arm/cpufunc.c:1.162
--- src/sys/arch/arm/arm/cpufunc.c:1.161 Mon May 30 17:18:38 2016
+++ src/sys/arch/arm/arm/cpufunc.c Tue Oct 18 13:58:52 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc.c,v 1.161 2016/05/30 17:18:38 dholland Exp $ */
+/* $NetBSD: cpufunc.c,v 1.162 2016/10/18 13:58:52 kiyohara Exp $ */
/*
* arm7tdmi support code Copyright (c) 2001 John Fremlin
@@ -49,7 +49,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.161 2016/05/30 17:18:38 dholland Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.162 2016/10/18 13:58:52 kiyohara Exp $");
#include "opt_compat_netbsd.h"
#include "opt_cpuoptions.h"
@@ -2158,13 +2158,13 @@ set_cpufuncs(void)
cputype == CPU_ID_ARM_88SV581X_V6 ||
cputype == CPU_ID_ARM_88SV581X_V7) &&
(armreg_pfr0_read() & ARM_PFR0_THUMBEE_MASK)) {
- cpufuncs = pj4bv7_cpufuncs;
+ cpufuncs = pj4bv7_cpufuncs;
#if defined(CPU_ARMV6) || defined(CPU_PRE_ARMV6)
- cpu_armv7_p = true;
+ cpu_armv7_p = true;
#endif
- get_cachetype_cp15();
- pmap_pte_init_armv7();
- return 0;
+ get_cachetype_cp15();
+ pmap_pte_init_armv7();
+ return 0;
}
#endif /* CPU_PJ4B */
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: dholland Date: Mon May 30 17:18:38 UTC 2016 Modified Files: src/sys/arch/arm/arm: cpufunc.c Log Message: PR 50669 David Binderman: remove dead code To generate a diff of this commit: cvs rdiff -u -r1.160 -r1.161 src/sys/arch/arm/arm/cpufunc.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: dholland
Date: Mon May 30 17:18:38 UTC 2016
Modified Files:
src/sys/arch/arm/arm: cpufunc.c
Log Message:
PR 50669 David Binderman: remove dead code
To generate a diff of this commit:
cvs rdiff -u -r1.160 -r1.161 src/sys/arch/arm/arm/cpufunc.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/cpufunc.c
diff -u src/sys/arch/arm/arm/cpufunc.c:1.160 src/sys/arch/arm/arm/cpufunc.c:1.161
--- src/sys/arch/arm/arm/cpufunc.c:1.160 Sat Jan 23 21:39:17 2016
+++ src/sys/arch/arm/arm/cpufunc.c Mon May 30 17:18:38 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc.c,v 1.160 2016/01/23 21:39:17 christos Exp $ */
+/* $NetBSD: cpufunc.c,v 1.161 2016/05/30 17:18:38 dholland Exp $ */
/*
* arm7tdmi support code Copyright (c) 2001 John Fremlin
@@ -49,7 +49,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.160 2016/01/23 21:39:17 christos Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.161 2016/05/30 17:18:38 dholland Exp $");
#include "opt_compat_netbsd.h"
#include "opt_cpuoptions.h"
@@ -2330,8 +2330,7 @@ early_abort_fixup(void *arg)
registers[base] += offset;
DFC_PRINTF(("r%d=%08x\n", base, registers[base]));
}
- } else if ((fault_instruction & 0x0e00) == 0x0c00)
- return ABORT_FIXUP_FAILED;
+ }
if ((frame->tf_spsr & PSR_MODE) == PSR_SVC32_MODE) {
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: christos Date: Wed Mar 2 19:25:32 UTC 2016 Modified Files: src/sys/arch/arm/arm: bootconfig.c Log Message: PR/50881: David Binderman: Remove redundant code. To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.9 src/sys/arch/arm/arm/bootconfig.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: christos
Date: Wed Mar 2 19:25:32 UTC 2016
Modified Files:
src/sys/arch/arm/arm: bootconfig.c
Log Message:
PR/50881: David Binderman: Remove redundant code.
To generate a diff of this commit:
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/arm/arm/bootconfig.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/bootconfig.c
diff -u src/sys/arch/arm/arm/bootconfig.c:1.8 src/sys/arch/arm/arm/bootconfig.c:1.9
--- src/sys/arch/arm/arm/bootconfig.c:1.8 Mon Jan 5 19:43:21 2015
+++ src/sys/arch/arm/arm/bootconfig.c Wed Mar 2 14:25:32 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: bootconfig.c,v 1.8 2015/01/06 00:43:21 jmcneill Exp $ */
+/* $NetBSD: bootconfig.c,v 1.9 2016/03/02 19:25:32 christos Exp $ */
/*
* Copyright (c) 1994-1998 Mark Brinicombe.
@@ -40,7 +40,7 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: bootconfig.c,v 1.8 2015/01/06 00:43:21 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bootconfig.c,v 1.9 2016/03/02 19:25:32 christos Exp $");
#include
@@ -89,8 +89,7 @@ get_bootconf_option(char *opts, const ch
++ptr;
if (*ptr == '=' ||
- (*ptr != '=' &&
- ((type & BOOTOPT_TYPE_MASK) == BOOTOPT_TYPE_BOOLEAN))) {
+ (type & BOOTOPT_TYPE_MASK) == BOOTOPT_TYPE_BOOLEAN) {
/* compare the option */
if (strncmp(optstart, opt, (ptr - optstart)) == 0) {
/* found */
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Mon Dec 14 15:29:45 UTC 2015 Modified Files: src/sys/arch/arm/arm: disassem.c Log Message: Move mcrr and mrrc up the list so they match ahead of ldc/ldc2 To generate a diff of this commit: cvs rdiff -u -r1.33 -r1.34 src/sys/arch/arm/arm/disassem.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: skrll
Date: Mon Dec 14 15:29:45 UTC 2015
Modified Files:
src/sys/arch/arm/arm: disassem.c
Log Message:
Move mcrr and mrrc up the list so they match ahead of ldc/ldc2
To generate a diff of this commit:
cvs rdiff -u -r1.33 -r1.34 src/sys/arch/arm/arm/disassem.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/disassem.c
diff -u src/sys/arch/arm/arm/disassem.c:1.33 src/sys/arch/arm/arm/disassem.c:1.34
--- src/sys/arch/arm/arm/disassem.c:1.33 Sat May 2 16:18:49 2015
+++ src/sys/arch/arm/arm/disassem.c Mon Dec 14 15:29:45 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: disassem.c,v 1.33 2015/05/02 16:18:49 skrll Exp $ */
+/* $NetBSD: disassem.c,v 1.34 2015/12/14 15:29:45 skrll Exp $ */
/*
* Copyright (c) 1996 Mark Brinicombe.
@@ -49,7 +49,7 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: disassem.c,v 1.33 2015/05/02 16:18:49 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: disassem.c,v 1.34 2015/12/14 15:29:45 skrll Exp $");
#include
@@ -151,10 +151,10 @@ static const struct arm32_insn arm32_i[]
{ 0xfe00, 0xfa00, "blx", "t" }, /* Before b and bl */
{ 0xfe100090, 0xfc00, "stc2", "L#v" },
{ 0x0e100090, 0x0c00, "stc", "L#v" },
-{ 0xfe100090, 0xfc10, "ldc2", "L#v" },
-{ 0x0e100090, 0x0c10, "ldc", "L#v" },
{ 0x0ff0, 0x0c40, "mcrr", "#&" },
{ 0x0ff0, 0x0c50, "mrrc", "#&" },
+{ 0xfe100090, 0xfc10, "ldc2", "L#v" },
+{ 0x0e100090, 0x0c10, "ldc", "L#v" },
{ 0xff10, 0xfe00, "cdp2", "#y" },
{ 0x0f10, 0x0e00, "cdp", "#y" },
{ 0xff100010, 0xfe10, "mcr2", "#z" },
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: skrll
Date: Thu Dec 10 22:04:54 UTC 2015
Modified Files:
src/sys/arch/arm/arm: cpufunc.c
Log Message:
PR port-arm/50512: Source code condition impossible
Fix condition which broke ARM1136 function selection when ARM1176 support
was added
To generate a diff of this commit:
cvs rdiff -u -r1.158 -r1.159 src/sys/arch/arm/arm/cpufunc.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/cpufunc.c
diff -u src/sys/arch/arm/arm/cpufunc.c:1.158 src/sys/arch/arm/arm/cpufunc.c:1.159
--- src/sys/arch/arm/arm/cpufunc.c:1.158 Wed Nov 25 08:39:45 2015
+++ src/sys/arch/arm/arm/cpufunc.c Thu Dec 10 22:04:54 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc.c,v 1.158 2015/11/25 08:39:45 skrll Exp $ */
+/* $NetBSD: cpufunc.c,v 1.159 2015/12/10 22:04:54 skrll Exp $ */
/*
* arm7tdmi support code Copyright (c) 2001 John Fremlin
@@ -49,7 +49,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.158 2015/11/25 08:39:45 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.159 2015/12/10 22:04:54 skrll Exp $");
#include "opt_compat_netbsd.h"
#include "opt_cpuoptions.h"
@@ -1927,7 +1927,7 @@ set_cpufuncs(void)
cputype == CPU_ID_ARM1176JZS) {
cpufuncs = arm11_cpufuncs;
#if defined(CPU_ARM1136)
- if (cputype == CPU_ID_ARM1136JS &&
+ if (cputype == CPU_ID_ARM1136JS ||
cputype == CPU_ID_ARM1136JSR1) {
cpufuncs = arm1136_cpufuncs;
if (cputype == CPU_ID_ARM1136JS)
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Thu Dec 10 22:04:54 UTC 2015 Modified Files: src/sys/arch/arm/arm: cpufunc.c Log Message: PR port-arm/50512: Source code condition impossible Fix condition which broke ARM1136 function selection when ARM1176 support was added To generate a diff of this commit: cvs rdiff -u -r1.158 -r1.159 src/sys/arch/arm/arm/cpufunc.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Sun Jun 7 12:01:41 UTC 2015 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_armv7.S Log Message: Dont use magic number. No functional change. To generate a diff of this commit: cvs rdiff -u -r1.24 -r1.25 src/sys/arch/arm/arm/cpufunc_asm_armv7.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Sun Jun 7 12:01:41 UTC 2015 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_armv7.S Log Message: Dont use magic number. No functional change. To generate a diff of this commit: cvs rdiff -u -r1.24 -r1.25 src/sys/arch/arm/arm/cpufunc_asm_armv7.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/cpufunc_asm_armv7.S diff -u src/sys/arch/arm/arm/cpufunc_asm_armv7.S:1.24 src/sys/arch/arm/arm/cpufunc_asm_armv7.S:1.25 --- src/sys/arch/arm/arm/cpufunc_asm_armv7.S:1.24 Sat May 30 21:25:22 2015 +++ src/sys/arch/arm/arm/cpufunc_asm_armv7.S Sun Jun 7 12:01:41 2015 @@ -45,12 +45,31 @@ ENTRY(armv7_wait) bx lr END(armv7_wait) + +#define TTBR_C (1 0) +#define TTBR_S (1 1) +#define TTBR_IMP (1 2) +#define TTBR_RGN_MASK (3 3) +#define TTBR_RGN_NC (0 3) +#define TTBR_RGN_WBWA (1 3) +#define TTBR_RGN_WT (2 3) +#define TTBR_RGN_WBNWA (3 3) +#define TTBR_NOS (1 5) +#define TTBR_IRGN_MASK ((1 6) | (1 0)) +#define TTBR_IRGN_NC ((0 6) | (0 0)) +#define TTBR_IRGN_WBWA ((0 6) | (1 0)) +#define TTBR_IRGN_WT ((1 6) | (0 0)) +#define TTBR_IRGN_WBNWA ((1 6) | (1 0)) + +#define TTBR_UPATTR (TTBR_S | TTBR_RGN_WBNWA | TTBR_C) +#define TTBR_MPATTR (TTBR_S | TTBR_RGN_WBNWA /* | TTBR_NOS */ | TTBR_IRGN_WBNWA) + ENTRY(armv7_context_switch) dsb@ data synchronization barrier mrc p15, 0, ip, c0, c0, 5 @ get MPIDR cmp ip, #0 - orrlt r0, r0, #0x5b @ MP, cachable (Normal WB) - orrge r0, r0, #0x1b @ Non-MP, cacheable, normal WB + orrlt r0, r0, #TTBR_MPATTR @ MP, cachable (Normal WB) + orrge r0, r0, #TTBR_UPATTR @ Non-MP, cacheable, normal WB mcr p15, 0, r0, c2, c0, 0 @ set the new TTBR 0 #ifdef ARM_MMU_EXTENDED cmp r1, #0 @@ -126,8 +145,8 @@ END(armv7_tlb_flushID) ENTRY_NP(armv7_setttb) mrc p15, 0, ip, c0, c0, 5 @ get MPIDR cmp ip, #0 - orrlt r0, r0, #0x5b @ MP, cachable (Normal WB) - orrge r0, r0, #0x1b @ Non-MP, cacheable, normal WB + orrlt r0, r0, #TTBR_MPATTR @ MP, cachable (Normal WB) + orrge r0, r0, #TTBR_UPATTR @ Non-MP, cacheable, normal WB mcr p15, 0, r0, c2, c0, 0 @ load new TTBR 0 #ifdef ARM_MMU_EXTENDED cmp r1, #0
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: hsuenaga Date: Wed Jun 3 02:30:11 UTC 2015 Modified Files: src/sys/arch/arm/arm: cpufunc.c Log Message: initialize sdcache operations for PJ4B. otherwise the kernel crashes without 'options L2CACHE_ENABLE.' To generate a diff of this commit: cvs rdiff -u -r1.154 -r1.155 src/sys/arch/arm/arm/cpufunc.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: hsuenaga
Date: Wed Jun 3 02:30:11 UTC 2015
Modified Files:
src/sys/arch/arm/arm: cpufunc.c
Log Message:
initialize sdcache operations for PJ4B.
otherwise the kernel crashes without 'options L2CACHE_ENABLE.'
To generate a diff of this commit:
cvs rdiff -u -r1.154 -r1.155 src/sys/arch/arm/arm/cpufunc.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/cpufunc.c
diff -u src/sys/arch/arm/arm/cpufunc.c:1.154 src/sys/arch/arm/arm/cpufunc.c:1.155
--- src/sys/arch/arm/arm/cpufunc.c:1.154 Thu May 14 05:39:32 2015
+++ src/sys/arch/arm/arm/cpufunc.c Wed Jun 3 02:30:11 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc.c,v 1.154 2015/05/14 05:39:32 hsuenaga Exp $ */
+/* $NetBSD: cpufunc.c,v 1.155 2015/06/03 02:30:11 hsuenaga Exp $ */
/*
* arm7tdmi support code Copyright (c) 2001 John Fremlin
@@ -49,7 +49,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: cpufunc.c,v 1.154 2015/05/14 05:39:32 hsuenaga Exp $);
+__KERNEL_RCSID(0, $NetBSD: cpufunc.c,v 1.155 2015/06/03 02:30:11 hsuenaga Exp $);
#include opt_compat_netbsd.h
#include opt_cpuoptions.h
@@ -1380,6 +1380,10 @@ struct cpu_functions pj4bv7_cpufuncs = {
.cf_dcache_inv_range = armv7_dcache_inv_range,
.cf_dcache_wb_range = armv7_dcache_wb_range,
+ .cf_sdcache_wbinv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_inv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_wb_range = (void *)cpufunc_nullop,
+
.cf_idcache_wbinv_all = armv7_idcache_wbinv_all,
.cf_idcache_wbinv_range = armv7_idcache_wbinv_range,
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Sat May 30 21:23:17 UTC 2015 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_armv7.S Log Message: Provide a armv7_dcache_l1inv_all To generate a diff of this commit: cvs rdiff -u -r1.22 -r1.23 src/sys/arch/arm/arm/cpufunc_asm_armv7.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/cpufunc_asm_armv7.S diff -u src/sys/arch/arm/arm/cpufunc_asm_armv7.S:1.22 src/sys/arch/arm/arm/cpufunc_asm_armv7.S:1.23 --- src/sys/arch/arm/arm/cpufunc_asm_armv7.S:1.22 Sat May 16 07:22:37 2015 +++ src/sys/arch/arm/arm/cpufunc_asm_armv7.S Sat May 30 21:23:17 2015 @@ -339,6 +339,53 @@ ENTRY_NP(armv7_icache_inv_all) bx lr @ return END(armv7_icache_inv_all) +/* * LINTSTUB: void armv7_dcache_l1inv_all(void); */ +ENTRY_NP(armv7_cache_l1inv_all) + mrc p15, 1, r0, c0, c0, 1 @ read CLIDR + and r0, r0, #0x7 @ check L1 + bxeq lr @ return if no L1 cache + mov r3, #0 @ start with L1 + mcr p15, 2, r3, c0, c0, 0 @ select cache level + isb + mrc p15, 1, r0, c0, c0, 0 @ read CCSIDR + + ubfx ip, r0, #0, #3 @ get linesize from CCSIDR + add ip, ip, #4 @ apply bias + ubfx r2, r0, #13, #15 @ get numsets - 1 from CCSIDR + lsl r2, r2, ip @ shift to set position + orr r3, r3, r2 @ merge set into way/set/level + mov r1, #1 + lsl r1, r1, ip @ r1 = set decr + + ubfx ip, r0, #3, #10 @ get numways - 1 from [to be discarded] CCSIDR + clz r2, ip @ number of bits to MSB of way + lsl ip, ip, r2 @ shift by that into way position + mov r0, #1 @ + lsl r2, r0, r2 @ r2 now contains the way decr + mov r0, r3 @ get sets/level (no way yet) + orr r3, r3, ip @ merge way into way/set/level + bfc r0, #0, #4 @ clear low 4 bits (level) to get numset - 1 + sub r2, r2, r0 @ subtract from way decr + + /* r3 = ways/sets/level, r2 = way decr, r1 = set decr, r0 and ip are free */ +1: mcr p15, 0, r3, c7, c6, 2 @ invalidate line + cmp r3, #15 @ are we done with this level (way/set == 0) + bls .Ldone_l1inv @ yes, we've finished + ubfx r0, r3, #4, #18 @ extract set bits + cmp r0, #0 @ compare + subne r3, r3, r1 @ non-zero?, decrement set # + subeq r3, r3, r2 @ zero?, decrement way # and restore set count + b 1b + +.Ldone_l1inv: + dsb + mov r0, #0 @ default back to cache level 0 + mcr p15, 2, r0, c0, c0, 0 @ select cache level + dsb + isb + bx lr +END(armv7_dcache_l1inv_all) + /* * LINTSTUB: void armv7_dcache_inv_all(void); */ ENTRY_NP(armv7_dcache_inv_all) mrc p15, 1, r0, c0, c0, 1 @ read CLIDR
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Sat May 30 21:23:17 UTC 2015 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_armv7.S Log Message: Provide a armv7_dcache_l1inv_all To generate a diff of this commit: cvs rdiff -u -r1.22 -r1.23 src/sys/arch/arm/arm/cpufunc_asm_armv7.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Sat May 30 21:25:22 UTC 2015 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_armv7.S Log Message: Typo in previous To generate a diff of this commit: cvs rdiff -u -r1.23 -r1.24 src/sys/arch/arm/arm/cpufunc_asm_armv7.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Sat May 30 21:25:22 UTC 2015 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_armv7.S Log Message: Typo in previous To generate a diff of this commit: cvs rdiff -u -r1.23 -r1.24 src/sys/arch/arm/arm/cpufunc_asm_armv7.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/cpufunc_asm_armv7.S diff -u src/sys/arch/arm/arm/cpufunc_asm_armv7.S:1.23 src/sys/arch/arm/arm/cpufunc_asm_armv7.S:1.24 --- src/sys/arch/arm/arm/cpufunc_asm_armv7.S:1.23 Sat May 30 21:23:17 2015 +++ src/sys/arch/arm/arm/cpufunc_asm_armv7.S Sat May 30 21:25:22 2015 @@ -340,7 +340,7 @@ ENTRY_NP(armv7_icache_inv_all) END(armv7_icache_inv_all) /* * LINTSTUB: void armv7_dcache_l1inv_all(void); */ -ENTRY_NP(armv7_cache_l1inv_all) +ENTRY_NP(armv7_dcache_l1inv_all) mrc p15, 1, r0, c0, c0, 1 @ read CLIDR and r0, r0, #0x7 @ check L1 bxeq lr @ return if no L1 cache
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Sat May 16 07:22:37 UTC 2015 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_armv7.S Log Message: Add MULTIPROCESSOR tlb flushes to armv7_tlb_flushID. Also, invalidate the branch predictor. This function is only used by db_write_bytes and kobj_machdep To generate a diff of this commit: cvs rdiff -u -r1.21 -r1.22 src/sys/arch/arm/arm/cpufunc_asm_armv7.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/cpufunc_asm_armv7.S diff -u src/sys/arch/arm/arm/cpufunc_asm_armv7.S:1.21 src/sys/arch/arm/arm/cpufunc_asm_armv7.S:1.22 --- src/sys/arch/arm/arm/cpufunc_asm_armv7.S:1.21 Sun Nov 9 09:21:57 2014 +++ src/sys/arch/arm/arm/cpufunc_asm_armv7.S Sat May 16 07:22:37 2015 @@ -108,8 +108,15 @@ END(armv7_tlb_flushD) STRONG_ALIAS(armv7_tlb_flushI, armv7_tlb_flushID) ENTRY(armv7_tlb_flushID) + dsb mov r0, #0 +#ifdef MULTIPROCESSOR + mcr p15, 0, r0, c8, c3, 0 @ flush entire I+D tlb, IS + mcr p15, 0, r0, c7, c1, 6 @ branch predictor invalidate, IS +#else mcr p15, 0, r0, c8, c7, 0 @ flush entire I+D tlb + mcr p15, 0, r0, c7, c5, 6 @ branch predictor invalidate +#endif dsb@ data synchronization barrier isb bx lr
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Sat May 16 07:22:37 UTC 2015 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_armv7.S Log Message: Add MULTIPROCESSOR tlb flushes to armv7_tlb_flushID. Also, invalidate the branch predictor. This function is only used by db_write_bytes and kobj_machdep To generate a diff of this commit: cvs rdiff -u -r1.21 -r1.22 src/sys/arch/arm/arm/cpufunc_asm_armv7.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: matt Date: Thu May 14 17:15:56 UTC 2015 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_pj4b.S Log Message: Use movw/movw To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.9 src/sys/arch/arm/arm/cpufunc_asm_pj4b.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: matt Date: Thu May 14 17:15:56 UTC 2015 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_pj4b.S Log Message: Use movw/movw To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.9 src/sys/arch/arm/arm/cpufunc_asm_pj4b.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/cpufunc_asm_pj4b.S diff -u src/sys/arch/arm/arm/cpufunc_asm_pj4b.S:1.8 src/sys/arch/arm/arm/cpufunc_asm_pj4b.S:1.9 --- src/sys/arch/arm/arm/cpufunc_asm_pj4b.S:1.8 Thu May 14 05:39:32 2015 +++ src/sys/arch/arm/arm/cpufunc_asm_pj4b.S Thu May 14 17:15:56 2015 @@ -1,4 +1,4 @@ -/* $NetBSD: cpufunc_asm_pj4b.S,v 1.8 2015/05/14 05:39:32 hsuenaga Exp $ */ +/* $NetBSD: cpufunc_asm_pj4b.S,v 1.9 2015/05/14 17:15:56 matt Exp $ */ /*** Copyright (C) Marvell International Ltd. and its affiliates @@ -41,9 +41,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBI #include arm/asm.h #include arm/locore.h -.Lpj4b_l2_barrier_reg: - .word _C_LABEL(armadaxp_l2_barrier_reg) - /* LINTSTUB: void pj4b_cpu_sleep(int); */ ENTRY(pj4b_cpu_sleep) dsb @@ -92,7 +89,8 @@ END(pj4b_config) /* LINTSTUB: void pj4b_io_coherency_barrier(vaddr_t, paddr_t, vsize_t); */ ENTRY_NP(pj4b_io_coherency_barrier) - ldr r0, .Lpj4b_l2_barrier_reg + movw r0, #:lower16:_C_LABEL(armadaxp_l2_barrier_reg) + movt r0, #:upper16:_C_LABEL(armadaxp_l2_barrier_reg) ldr r0, [r0] @ MVSOC_MLMB_CIB_BARRIER mov r1, #1 @ MVSOC_MLMB_CIB_BARRIER_TRIGGER str r1, [r0]
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: skrll
Date: Sat May 2 16:20:41 UTC 2015
Modified Files:
src/sys/arch/arm/arm: arm_machdep.c
Log Message:
Remove unintended commit
To generate a diff of this commit:
cvs rdiff -u -r1.48 -r1.49 src/sys/arch/arm/arm/arm_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/arm_machdep.c
diff -u src/sys/arch/arm/arm/arm_machdep.c:1.48 src/sys/arch/arm/arm/arm_machdep.c:1.49
--- src/sys/arch/arm/arm/arm_machdep.c:1.48 Sat May 2 16:18:49 2015
+++ src/sys/arch/arm/arm/arm_machdep.c Sat May 2 16:20:41 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: arm_machdep.c,v 1.48 2015/05/02 16:18:49 skrll Exp $ */
+/* $NetBSD: arm_machdep.c,v 1.49 2015/05/02 16:20:41 skrll Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -80,7 +80,7 @@
#include sys/param.h
-__KERNEL_RCSID(0, $NetBSD: arm_machdep.c,v 1.48 2015/05/02 16:18:49 skrll Exp $);
+__KERNEL_RCSID(0, $NetBSD: arm_machdep.c,v 1.49 2015/05/02 16:20:41 skrll Exp $);
#include sys/exec.h
#include sys/proc.h
@@ -187,7 +187,7 @@ setregs(struct lwp *l, struct exec_packa
tf-tf_spsr = PSR_USR32_MODE | (CPU_IS_ARMV7_P() ? PSR_E_BIT : 0);
#else
tf-tf_spsr = PSR_USR32_MODE;
-#endif /* __ARMEB__ */
+#endif /* __ARMEB__ */
#ifdef THUMB_CODE
if (pack-ep_entry 1)
@@ -213,7 +213,7 @@ setregs(struct lwp *l, struct exec_packa
void
startlwp(void *arg)
{
- ucontext_t *uc = (ucontext_t *)arg;
+ ucontext_t *uc = (ucontext_t *)arg;
lwp_t *l = curlwp;
int error __diagused;
@@ -243,11 +243,9 @@ cpu_need_resched(struct cpu_info *ci, in
*/
return;
}
-#if 0
- /* XXXNH??? */
if (ci-ci_want_resched !immed)
return;
-#endif
+
if (l == ci-ci_data.cpu_idlelwp) {
#ifdef MULTIPROCESSOR
/*
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Sat May 2 16:20:41 UTC 2015 Modified Files: src/sys/arch/arm/arm: arm_machdep.c Log Message: Remove unintended commit To generate a diff of this commit: cvs rdiff -u -r1.48 -r1.49 src/sys/arch/arm/arm/arm_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: skrll
Date: Sat May 2 16:18:49 UTC 2015
Modified Files:
src/sys/arch/arm/arm: arm_machdep.c disassem.c
Log Message:
Move /* A5.2.10 Synchronisation primitives */ block earlier so it
matches correctly
To generate a diff of this commit:
cvs rdiff -u -r1.47 -r1.48 src/sys/arch/arm/arm/arm_machdep.c
cvs rdiff -u -r1.32 -r1.33 src/sys/arch/arm/arm/disassem.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/arm_machdep.c
diff -u src/sys/arch/arm/arm/arm_machdep.c:1.47 src/sys/arch/arm/arm/arm_machdep.c:1.48
--- src/sys/arch/arm/arm/arm_machdep.c:1.47 Wed Apr 15 21:26:48 2015
+++ src/sys/arch/arm/arm/arm_machdep.c Sat May 2 16:18:49 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: arm_machdep.c,v 1.47 2015/04/15 21:26:48 matt Exp $ */
+/* $NetBSD: arm_machdep.c,v 1.48 2015/05/02 16:18:49 skrll Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -80,7 +80,7 @@
#include sys/param.h
-__KERNEL_RCSID(0, $NetBSD: arm_machdep.c,v 1.47 2015/04/15 21:26:48 matt Exp $);
+__KERNEL_RCSID(0, $NetBSD: arm_machdep.c,v 1.48 2015/05/02 16:18:49 skrll Exp $);
#include sys/exec.h
#include sys/proc.h
@@ -187,7 +187,7 @@ setregs(struct lwp *l, struct exec_packa
tf-tf_spsr = PSR_USR32_MODE | (CPU_IS_ARMV7_P() ? PSR_E_BIT : 0);
#else
tf-tf_spsr = PSR_USR32_MODE;
-#endif /* __ARMEB__ */
+#endif /* __ARMEB__ */
#ifdef THUMB_CODE
if (pack-ep_entry 1)
@@ -213,7 +213,7 @@ setregs(struct lwp *l, struct exec_packa
void
startlwp(void *arg)
{
- ucontext_t *uc = (ucontext_t *)arg;
+ ucontext_t *uc = (ucontext_t *)arg;
lwp_t *l = curlwp;
int error __diagused;
@@ -243,9 +243,11 @@ cpu_need_resched(struct cpu_info *ci, in
*/
return;
}
+#if 0
+ /* XXXNH??? */
if (ci-ci_want_resched !immed)
return;
-
+#endif
if (l == ci-ci_data.cpu_idlelwp) {
#ifdef MULTIPROCESSOR
/*
Index: src/sys/arch/arm/arm/disassem.c
diff -u src/sys/arch/arm/arm/disassem.c:1.32 src/sys/arch/arm/arm/disassem.c:1.33
--- src/sys/arch/arm/arm/disassem.c:1.32 Tue Mar 31 16:15:07 2015
+++ src/sys/arch/arm/arm/disassem.c Sat May 2 16:18:49 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: disassem.c,v 1.32 2015/03/31 16:15:07 skrll Exp $ */
+/* $NetBSD: disassem.c,v 1.33 2015/05/02 16:18:49 skrll Exp $ */
/*
* Copyright (c) 1996 Mark Brinicombe.
@@ -49,7 +49,7 @@
#include sys/param.h
-__KERNEL_RCSID(0, $NetBSD: disassem.c,v 1.32 2015/03/31 16:15:07 skrll Exp $);
+__KERNEL_RCSID(0, $NetBSD: disassem.c,v 1.33 2015/05/02 16:18:49 skrll Exp $);
#include sys/systm.h
@@ -247,6 +247,18 @@ static const struct arm32_insn arm32_i[]
{ 0x0ff0, 0x0300, movw, dZ },
{ 0x0ff0, 0x0340, movt, dZ },
+/* A5.2.10 Synchronisation primitives */
+{ 0x0ff00ff0, 0x0190, swp, dmo },
+{ 0x0ff00ff0, 0x01400090, swpb, dmo },
+{ 0x0ff00fff, 0x01900f9f, ldrex, da },
+{ 0x0ff00fff, 0x01b00f9f, ldrexd, da },
+{ 0x0ff00fff, 0x01d00f9f, ldrexb, da },
+{ 0x0ff00fff, 0x01f00f9f, ldrexh, da },
+{ 0x0ff00ff0, 0x01800f90, strex, dma },
+{ 0x0ff00ff0, 0x01a00f90, strexd, dma },
+{ 0x0ff00ff0, 0x01c00f90, strexb, dma },
+{ 0x0ff00ff0, 0x01e00f90, strexh, dma },
+
/* A5.2 non-exceptions */
/* A5.2.1, A5.2.2, and A5.2.3 Data-processing */
@@ -275,18 +287,6 @@ static const struct arm32_insn arm32_i[]
{ 0x0fe000f0, 0x00a00090, umlal, Sdnms },
{ 0x0fe000f0, 0x00e00090, smlal, Sdnms },
-/* A5.2.10 Synchronisation primitives */
-{ 0x0ff00ff0, 0x0190, swp, dmo },
-{ 0x0ff00ff0, 0x01400090, swpb, dmo },
-{ 0x0ff00fff, 0x01900f9f, ldrex, da },
-{ 0x0ff00fff, 0x01b00f9f, ldrexd, da },
-{ 0x0ff00fff, 0x01d00f9f, ldrexb, da },
-{ 0x0ff00fff, 0x01f00f9f, ldrexh, da },
-{ 0x0ff00ff0, 0x01800f90, strex, dma },
-{ 0x0ff00ff0, 0x01a00f90, strexd, dma },
-{ 0x0ff00ff0, 0x01c00f90, strexb, dma },
-{ 0x0ff00ff0, 0x01e00f90, strexh, dma },
-
/* */
{ 0x0ff08f10, 0x0e000100, adf, PRfgh },
{ 0x0ff08f10, 0x0e100100, muf, PRfgh },
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Sat May 2 16:18:49 UTC 2015 Modified Files: src/sys/arch/arm/arm: arm_machdep.c disassem.c Log Message: Move /* A5.2.10 Synchronisation primitives */ block earlier so it matches correctly To generate a diff of this commit: cvs rdiff -u -r1.47 -r1.48 src/sys/arch/arm/arm/arm_machdep.c cvs rdiff -u -r1.32 -r1.33 src/sys/arch/arm/arm/disassem.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: hsuenaga
Date: Fri Apr 17 13:39:02 UTC 2015
Modified Files:
src/sys/arch/arm/arm: cpufunc.c
Log Message:
don't call L2 maintance function if L2 cache is disabled.
To generate a diff of this commit:
cvs rdiff -u -r1.152 -r1.153 src/sys/arch/arm/arm/cpufunc.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/cpufunc.c
diff -u src/sys/arch/arm/arm/cpufunc.c:1.152 src/sys/arch/arm/arm/cpufunc.c:1.153
--- src/sys/arch/arm/arm/cpufunc.c:1.152 Wed Apr 15 10:52:18 2015
+++ src/sys/arch/arm/arm/cpufunc.c Fri Apr 17 13:39:01 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc.c,v 1.152 2015/04/15 10:52:18 hsuenaga Exp $ */
+/* $NetBSD: cpufunc.c,v 1.153 2015/04/17 13:39:01 hsuenaga Exp $ */
/*
* arm7tdmi support code Copyright (c) 2001 John Fremlin
@@ -49,7 +49,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: cpufunc.c,v 1.152 2015/04/15 10:52:18 hsuenaga Exp $);
+__KERNEL_RCSID(0, $NetBSD: cpufunc.c,v 1.153 2015/04/17 13:39:01 hsuenaga Exp $);
#include opt_compat_netbsd.h
#include opt_cpuoptions.h
@@ -1381,7 +1381,9 @@ struct cpu_functions pj4bv7_cpufuncs = {
.cf_dcache_inv_range = armv7_dcache_inv_range,
.cf_dcache_wb_range = armv7_dcache_wb_range,
-#if !defined(AURORA_IO_CACHE_COHERENCY) defined(ARMADAXP)
+#if defined(L2CACHE_ENABLE) \
+!defined(AURORA_IO_CACHE_COHERENCY) \
+defined(ARMADAXP)
.cf_sdcache_wbinv_range = armadaxp_sdcache_wbinv_range,
.cf_sdcache_inv_range = armadaxp_sdcache_inv_range,
.cf_sdcache_wb_range = armadaxp_sdcache_wb_range,
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: hsuenaga Date: Fri Apr 17 13:39:02 UTC 2015 Modified Files: src/sys/arch/arm/arm: cpufunc.c Log Message: don't call L2 maintance function if L2 cache is disabled. To generate a diff of this commit: cvs rdiff -u -r1.152 -r1.153 src/sys/arch/arm/arm/cpufunc.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: matt Date: Wed Apr 15 13:22:50 UTC 2015 Modified Files: src/sys/arch/arm/arm: undefined.c Log Message: Remove FAST_FPE code To generate a diff of this commit: cvs rdiff -u -r1.55 -r1.56 src/sys/arch/arm/arm/undefined.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: matt
Date: Wed Apr 15 13:22:50 UTC 2015
Modified Files:
src/sys/arch/arm/arm: undefined.c
Log Message:
Remove FAST_FPE code
To generate a diff of this commit:
cvs rdiff -u -r1.55 -r1.56 src/sys/arch/arm/arm/undefined.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/undefined.c
diff -u src/sys/arch/arm/arm/undefined.c:1.55 src/sys/arch/arm/arm/undefined.c:1.56
--- src/sys/arch/arm/arm/undefined.c:1.55 Tue Oct 14 22:23:22 2014
+++ src/sys/arch/arm/arm/undefined.c Wed Apr 15 13:22:50 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: undefined.c,v 1.55 2014/10/14 22:23:22 skrll Exp $ */
+/* $NetBSD: undefined.c,v 1.56 2015/04/15 13:22:50 matt Exp $ */
/*
* Copyright (c) 2001 Ben Harris.
@@ -55,7 +55,7 @@
#include sys/kgdb.h
#endif
-__KERNEL_RCSID(0, $NetBSD: undefined.c,v 1.55 2014/10/14 22:23:22 skrll Exp $);
+__KERNEL_RCSID(0, $NetBSD: undefined.c,v 1.56 2015/04/15 13:22:50 matt Exp $);
#include sys/kmem.h
#include sys/queue.h
@@ -475,24 +475,5 @@ undefinedinstruction(trapframe_t *tf)
if ((fault_code FAULT_USER) == 0)
return;
-#ifdef FAST_FPE
- /* Optimised exit code */
- {
- /*
- * Check for reschedule request, at the moment there is only
- * 1 ast so this code should always be run
- */
- if (curcpu()-ci_want_resched) {
- /*
- * We are being preempted.
- */
- preempt();
- }
-
- /* Invoke MI userret code */
- mi_userret(l);
- }
-#else
userret(l);
-#endif
}
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: matt
Date: Wed Apr 8 16:37:32 UTC 2015
Modified Files:
src/sys/arch/arm/arm: arm_machdep.c
Log Message:
Small tweaks for preemption.
To generate a diff of this commit:
cvs rdiff -u -r1.44 -r1.45 src/sys/arch/arm/arm/arm_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/arm_machdep.c
diff -u src/sys/arch/arm/arm/arm_machdep.c:1.44 src/sys/arch/arm/arm/arm_machdep.c:1.45
--- src/sys/arch/arm/arm/arm_machdep.c:1.44 Wed Apr 8 07:29:44 2015
+++ src/sys/arch/arm/arm/arm_machdep.c Wed Apr 8 16:37:32 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: arm_machdep.c,v 1.44 2015/04/08 07:29:44 matt Exp $ */
+/* $NetBSD: arm_machdep.c,v 1.45 2015/04/08 16:37:32 matt Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -80,7 +80,7 @@
#include sys/param.h
-__KERNEL_RCSID(0, $NetBSD: arm_machdep.c,v 1.44 2015/04/08 07:29:44 matt Exp $);
+__KERNEL_RCSID(0, $NetBSD: arm_machdep.c,v 1.45 2015/04/08 16:37:32 matt Exp $);
#include sys/exec.h
#include sys/proc.h
@@ -266,7 +266,7 @@ cpu_need_resched(struct cpu_info *ci, in
#ifdef __HAVE_PREEMPTION
atomic_or_uint(l-l_dopreempt, DOPREEMPT_ACTIVE);
if (ci == cur_ci) {
- softint_trigger(SOFTINT_KPREEMPT);
+ ci-ci_astpending |= 2;
} else {
ipi = IPI_KPREEMPT;
goto send_ipi;
@@ -274,7 +274,7 @@ cpu_need_resched(struct cpu_info *ci, in
#endif /* __HAVE_PREEMPTION */
return;
}
- ci-ci_astpending = 1;
+ ci-ci_astpending |= 1;
#ifdef MULTIPROCESSOR
if (ci == curcpu() || !immed)
return;
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: matt Date: Wed Apr 8 16:37:32 UTC 2015 Modified Files: src/sys/arch/arm/arm: arm_machdep.c Log Message: Small tweaks for preemption. To generate a diff of this commit: cvs rdiff -u -r1.44 -r1.45 src/sys/arch/arm/arm/arm_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: skrll
Date: Tue Mar 31 16:15:07 UTC 2015
Modified Files:
src/sys/arch/arm/arm: disassem.c
Log Message:
More instructions. Lots left to do.
To generate a diff of this commit:
cvs rdiff -u -r1.31 -r1.32 src/sys/arch/arm/arm/disassem.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/disassem.c
diff -u src/sys/arch/arm/arm/disassem.c:1.31 src/sys/arch/arm/arm/disassem.c:1.32
--- src/sys/arch/arm/arm/disassem.c:1.31 Sun Jan 18 18:23:25 2015
+++ src/sys/arch/arm/arm/disassem.c Tue Mar 31 16:15:07 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: disassem.c,v 1.31 2015/01/18 18:23:25 skrll Exp $ */
+/* $NetBSD: disassem.c,v 1.32 2015/03/31 16:15:07 skrll Exp $ */
/*
* Copyright (c) 1996 Mark Brinicombe.
@@ -49,7 +49,7 @@
#include sys/param.h
-__KERNEL_RCSID(0, $NetBSD: disassem.c,v 1.31 2015/01/18 18:23:25 skrll Exp $);
+__KERNEL_RCSID(0, $NetBSD: disassem.c,v 1.32 2015/03/31 16:15:07 skrll Exp $);
#include sys/systm.h
@@ -71,16 +71,21 @@ __KERNEL_RCSID(0, $NetBSD: disassem.c,v
* the instruction. The only exception is the writeback flag which
* follows a operand.
*
- *
+ * !c - cps flags and mode
+ * !d - debug option (bit 0-3)
+ * !l - dmb/dsb limitation
+ * !m - mode
* 2 - print Operand 2 of a data processing instruction
* a - address operand of ldr/str instruction
* b - branch address
* c - comment field bits(0-23)
* d - destination register (bits 12-15)
- * e - address operand of ldrh/strh instruction
+ * e - address operand of ldrx/strx instruction
* f - 1st fp operand (register) (bits 12-14)
* g - 2nd fp operand (register) (bits 16-18)
* h - 3rd fp operand (register/immediate) (bits 0-4)
+ * i - lsb operand (bits 7-11)
+ * j - msb operand (bits 6,7,12-14)
* k - breakpoint comment (bits 0-3, 8-19)
* l - register list for ldm/stm instruction
* m - m register (bits 0-3)
@@ -88,6 +93,7 @@ __KERNEL_RCSID(0, $NetBSD: disassem.c,v
* o - indirect register rn (bits 16-19) (used by swap)
* p - saved or current status register
* q - neon N register (7, 19-16)
+ * r - width minus 1 (bits 16-20)
* s - s register (bits 8-11)
* t - thumb branch address (bits 24, 0-23)
* u - neon M register (5, 3-0)
@@ -96,6 +102,7 @@ __KERNEL_RCSID(0, $NetBSD: disassem.c,v
* x - instruction in hex
* y - co-processor data processing registers
* z - co-processor register transfer registers
+ * C - cps effect
* D - destination-is-r15 (P) flag on TST, TEQ, CMP, CMN
* F - PSR transfer fields
* I - NEON operand size
@@ -121,60 +128,128 @@ struct arm32_insn {
};
static const struct arm32_insn arm32_i[] = {
-{ 0x0fff, 0x0ff0, imb, c }, /* Before swi */
-{ 0x0fff, 0x0ff1, imbrange, c }, /* Before swi */
-{ 0x0fff, 0x0320f003, yield, }, /* Before swi */
-{ 0x0fff, 0x0320f002, wfe, }, /* Before swi */
-{ 0x0fff, 0x0320f003, wfi, }, /* Before swi */
-{ 0x0f00, 0x0f00, swi, c },
+/* A5.7 Unconditional instructions */
+/*
+ * A5.7.1 Memory hints, Advanced SIMD instructions, and
+ * miscellaneous instructions
+ */
+{ 0xfff10020, 0xf100, cps, C!c },
+{ 0xfff100f0, 0xf101, setend\tle, },
+{ 0xfff102f0, 0xf1010200, setend\tbe, },
+/* pli */
+/* pld */
+{ 0x, 0xf57ff01f, clrex, },
+{ 0xfff0, 0xf57ff040, dsb,!l },
+{ 0xfff0, 0xf57ff050, dmb,!l },
+{ 0xfff0, 0xf57ff060, isb, },
+/* pli */
+/* pld */
+
+//{ 0x0e10, 0x0800, stm, XnWl },
+{ 0xfe5fffe0, 0xf84d0500, srs, XnW!m },
+{ 0xfe50, 0xf8100a00, rfe, XnW },
{ 0xfe00, 0xfa00, blx, t }, /* Before b and bl */
-{ 0x0f00, 0x0a00, b, b },
-{ 0x0f00, 0x0b00, bl, b },
-{ 0x0fe000f0, 0x0090, mul, Snms },
-{ 0x0fe000f0, 0x00200090, mla, Snmsd },
-{ 0x0fe000f0, 0x00800090, umull, Sdnms },
-{ 0x0fe000f0, 0x00c00090, smull, Sdnms },
-{ 0x0fe000f0, 0x00a00090, umlal, Sdnms },
-{ 0x0fe000f0, 0x00e00090, smlal, Sdnms },
+{ 0xfe100090, 0xfc00, stc2, L#v },
+{ 0x0e100090, 0x0c00, stc, L#v },
+{ 0xfe100090, 0xfc10, ldc2, L#v },
+{ 0x0e100090, 0x0c10, ldc, L#v },
+{ 0x0ff0, 0x0c40, mcrr, # },
+{ 0x0ff0, 0x0c50, mrrc, # },
+{ 0xff10, 0xfe00, cdp2, #y },
+{ 0x0f10, 0x0e00, cdp, #y },
+{ 0xff100010, 0xfe10, mcr2, #z },
+{ 0x0f100010, 0x0e10, mcr, #z },
+{ 0xff100010, 0xfe100010, mrc2, #z },
+{ 0x0f100010, 0x0e100010, mrc, #z },
+
+/* A5.4 Media instructions */
+{ 0x0fe00070, 0x07c00050, sbfx, dmir },
+{ 0x0fe0007f, 0x07c0001f, bfc,dij },
+{ 0x0fe00070, 0x07c00010, bfi,dmij },
+{ 0x0fe00070, 0x07e00050, ubfx, dmir },
+{ 0xfff000f0, 0xe7f0, und, x }, /* Special immediate? */
+
+{ 0x0610, 0x0610, und, x }, /* Remove
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Tue Mar 31 16:15:07 UTC 2015 Modified Files: src/sys/arch/arm/arm: disassem.c Log Message: More instructions. Lots left to do. To generate a diff of this commit: cvs rdiff -u -r1.31 -r1.32 src/sys/arch/arm/arm/disassem.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: hsuenaga Date: Thu Mar 26 08:50:42 UTC 2015 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_pj4b.S Log Message: set ttbr0/1 using correct register(r2). To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/arm/cpufunc_asm_pj4b.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: hsuenaga Date: Thu Mar 26 08:50:42 UTC 2015 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_pj4b.S Log Message: set ttbr0/1 using correct register(r2). To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/arm/cpufunc_asm_pj4b.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/cpufunc_asm_pj4b.S diff -u src/sys/arch/arm/arm/cpufunc_asm_pj4b.S:1.5 src/sys/arch/arm/arm/cpufunc_asm_pj4b.S:1.6 --- src/sys/arch/arm/arm/cpufunc_asm_pj4b.S:1.5 Wed Oct 29 16:22:31 2014 +++ src/sys/arch/arm/arm/cpufunc_asm_pj4b.S Thu Mar 26 08:50:42 2015 @@ -1,4 +1,4 @@ -/* $NetBSD: cpufunc_asm_pj4b.S,v 1.5 2014/10/29 16:22:31 skrll Exp $ */ +/* $NetBSD: cpufunc_asm_pj4b.S,v 1.6 2015/03/26 08:50:42 hsuenaga Exp $ */ /*** Copyright (C) Marvell International Ltd. and its affiliates @@ -58,10 +58,10 @@ ENTRY(pj4b_setttb) #else bic r2, r0, #0x18 #endif - mcr p15, 0, r0, c2, c0, 0 /* load TTBR0 */ + mcr p15, 0, r2, c2, c0, 0 /* load TTBR0 */ #ifdef ARM_MMU_EXTENDED cmp r1, #0 - mcreq p15, 0, r0, c2, c0, 1 /* load TTBR1 */ + mcreq p15, 0, r2, c2, c0, 1 /* load TTBR1 */ #else mov r0, #0 mcr p15, 0, r0, c8, c7, 0 /* invalidate I+D TLBs */
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: christos
Date: Sat Mar 7 18:52:47 UTC 2015
Modified Files:
src/sys/arch/arm/arm: linux_syscall.c
Log Message:
adjust to new trace_{enter,exit}
To generate a diff of this commit:
cvs rdiff -u -r1.26 -r1.27 src/sys/arch/arm/arm/linux_syscall.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/linux_syscall.c
diff -u src/sys/arch/arm/arm/linux_syscall.c:1.26 src/sys/arch/arm/arm/linux_syscall.c:1.27
--- src/sys/arch/arm/arm/linux_syscall.c:1.26 Thu Apr 3 12:22:20 2014
+++ src/sys/arch/arm/arm/linux_syscall.c Sat Mar 7 13:52:46 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: linux_syscall.c,v 1.26 2014/04/03 16:22:20 rjs Exp $ */
+/* $NetBSD: linux_syscall.c,v 1.27 2015/03/07 18:52:46 christos Exp $ */
/*-
* Copyright (c) 2000, 2003 The NetBSD Foundation, Inc.
@@ -69,7 +69,7 @@
#include sys/param.h
-__KERNEL_RCSID(0, $NetBSD: linux_syscall.c,v 1.26 2014/04/03 16:22:20 rjs Exp $);
+__KERNEL_RCSID(0, $NetBSD: linux_syscall.c,v 1.27 2015/03/07 18:52:46 christos Exp $);
#include sys/device.h
#include sys/errno.h
@@ -182,7 +182,7 @@ linux_syscall_fancy(trapframe_t *frame,
args = frame-tf_r0;
callp = p-p_emul-e_sysent + code;
- if ((error = trace_enter(code, args, callp-sy_narg)) != 0)
+ if ((error = trace_enter(code, callp, args)) != 0)
goto out;
rval[0] = 0;
@@ -209,7 +209,7 @@ out:
break;
}
- trace_exit(code, rval, error);
+ trace_exit(code, callp, args, rval, error);
userret(l);
}
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: christos
Date: Sat Mar 7 18:52:47 UTC 2015
Modified Files:
src/sys/arch/arm/arm: linux_syscall.c
Log Message:
adjust to new trace_{enter,exit}
To generate a diff of this commit:
cvs rdiff -u -r1.26 -r1.27 src/sys/arch/arm/arm/linux_syscall.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Sun Feb 15 17:21:08 UTC 2015 Modified Files: src/sys/arch/arm/arm: cpu_in_cksum.S Log Message: Really fix arm_cksumdata for 4 bytes of data To generate a diff of this commit: cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/arm/cpu_in_cksum.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/cpu_in_cksum.S diff -u src/sys/arch/arm/arm/cpu_in_cksum.S:1.10 src/sys/arch/arm/arm/cpu_in_cksum.S:1.11 --- src/sys/arch/arm/arm/cpu_in_cksum.S:1.10 Sat Feb 14 23:12:29 2015 +++ src/sys/arch/arm/arm/cpu_in_cksum.S Sun Feb 15 17:21:08 2015 @@ -1,4 +1,4 @@ -/* $NetBSD: cpu_in_cksum.S,v 1.10 2015/02/14 23:12:29 skrll Exp $ */ +/* $NetBSD: cpu_in_cksum.S,v 1.11 2015/02/15 17:21:08 skrll Exp $ */ /* * Copyright 2003 Wasabi Systems, Inc. @@ -40,7 +40,7 @@ */ #include machine/asm.h -RCSID($NetBSD: cpu_in_cksum.S,v 1.10 2015/02/14 23:12:29 skrll Exp $) +RCSID($NetBSD: cpu_in_cksum.S,v 1.11 2015/02/15 17:21:08 skrll Exp $) #include assym.h @@ -190,7 +190,7 @@ ASENTRY_NP(arm_cksumdata) #else RETc(eq) /* done */ #endif - adds r7, r7, r1 /* undo sub */ + adds r1, r1, r7 /* undo sub */ subs r7, r7, r1 lsls r7, r7, #3 #if defined(__ARMEB__)
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Sun Feb 15 17:21:08 UTC 2015 Modified Files: src/sys/arch/arm/arm: cpu_in_cksum.S Log Message: Really fix arm_cksumdata for 4 bytes of data To generate a diff of this commit: cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/arm/cpu_in_cksum.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Sat Feb 14 23:12:29 UTC 2015 Modified Files: src/sys/arch/arm/arm: cpu_in_cksum.S Log Message: Correct arm_cksumdata for 4 bytes of data To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/arm/cpu_in_cksum.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Sat Feb 14 23:12:29 UTC 2015 Modified Files: src/sys/arch/arm/arm: cpu_in_cksum.S Log Message: Correct arm_cksumdata for 4 bytes of data To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/arm/cpu_in_cksum.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/cpu_in_cksum.S diff -u src/sys/arch/arm/arm/cpu_in_cksum.S:1.9 src/sys/arch/arm/arm/cpu_in_cksum.S:1.10 --- src/sys/arch/arm/arm/cpu_in_cksum.S:1.9 Tue Jan 6 16:24:58 2015 +++ src/sys/arch/arm/arm/cpu_in_cksum.S Sat Feb 14 23:12:29 2015 @@ -1,4 +1,4 @@ -/* $NetBSD: cpu_in_cksum.S,v 1.9 2015/01/06 16:24:58 christos Exp $ */ +/* $NetBSD: cpu_in_cksum.S,v 1.10 2015/02/14 23:12:29 skrll Exp $ */ /* * Copyright 2003 Wasabi Systems, Inc. @@ -40,7 +40,7 @@ */ #include machine/asm.h -RCSID($NetBSD: cpu_in_cksum.S,v 1.9 2015/01/06 16:24:58 christos Exp $) +RCSID($NetBSD: cpu_in_cksum.S,v 1.10 2015/02/14 23:12:29 skrll Exp $) #include assym.h @@ -191,8 +191,7 @@ ASENTRY_NP(arm_cksumdata) RETc(eq) /* done */ #endif adds r7, r7, r1 /* undo sub */ - adds r7, r7, r1 /* r7 = offset + len */ - rsb r7, r7, #4 + subs r7, r7, r1 lsls r7, r7, #3 #if defined(__ARMEB__) lsrs r2, r2, r7
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: skrll
Date: Sat Jan 24 15:44:32 UTC 2015
Modified Files:
src/sys/arch/arm/arm: db_trace.c
Log Message:
Fix crash(8) backtrace support.
To generate a diff of this commit:
cvs rdiff -u -r1.30 -r1.31 src/sys/arch/arm/arm/db_trace.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/db_trace.c
diff -u src/sys/arch/arm/arm/db_trace.c:1.30 src/sys/arch/arm/arm/db_trace.c:1.31
--- src/sys/arch/arm/arm/db_trace.c:1.30 Sat Mar 29 15:48:01 2014
+++ src/sys/arch/arm/arm/db_trace.c Sat Jan 24 15:44:32 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: db_trace.c,v 1.30 2014/03/29 15:48:01 skrll Exp $ */
+/* $NetBSD: db_trace.c,v 1.31 2015/01/24 15:44:32 skrll Exp $ */
/*
* Copyright (c) 2000, 2001 Ben Harris
@@ -31,7 +31,7 @@
#include sys/param.h
-__KERNEL_RCSID(0, $NetBSD: db_trace.c,v 1.30 2014/03/29 15:48:01 skrll Exp $);
+__KERNEL_RCSID(0, $NetBSD: db_trace.c,v 1.31 2015/01/24 15:44:32 skrll Exp $);
#include sys/proc.h
#include arm/armreg.h
@@ -155,9 +155,19 @@ db_stack_trace_print(db_expr_t addr, boo
} else
frame = (uint32_t *)(addr);
}
- lastframe = NULL;
scp_offset = -(get_pc_str_offset() 2);
+ if (frame == NULL)
+ return;
+
+ lastframe = frame;
+#ifndef _KERNEL
+ uint32_t frameb[4];
+ db_read_bytes((db_addr_t)(frame - 3), sizeof(frameb),
+ (char *)frameb);
+ frame = frameb + 3;
+#endif
+
/*
* In theory, the SCP isn't guaranteed to be in the function
* that generated the stack frame. We hope for the best.
@@ -169,7 +179,7 @@ db_stack_trace_print(db_expr_t addr, boo
#endif
pc = scp;
- while (count-- frame != NULL) {
+ while (count--) {
uint32_t savecode;
int r;
uint32_t *rp;
@@ -180,14 +190,8 @@ db_stack_trace_print(db_expr_t addr, boo
#else
scp = frame[FR_SCP];
#endif
- lastframe = frame;
- (*pr)(%p: , frame);
-#ifndef _KERNEL
- uint32_t frameb[4];
- db_read_bytes((db_addr_t)(frame - 3), sizeof(frameb),
- (char *)frameb);
- frame = frameb + 3;
-#endif
+ (*pr)(%p: , lastframe);
+
db_printsym(pc, DB_STGY_PROC, pr);
if (trace_full) {
(*pr)(\n\t);
@@ -244,6 +248,9 @@ db_stack_trace_print(db_expr_t addr, boo
frame = (uint32_t *)(frame[FR_RFP]);
+ if (frame == NULL)
+ break;
+
if (INKERNEL((int)frame)) {
/* staying in kernel */
if (frame = lastframe) {
@@ -262,5 +269,11 @@ db_stack_trace_print(db_expr_t addr, boo
break;
}
}
+ lastframe = frame;
+#ifndef _KERNEL
+ db_read_bytes((db_addr_t)(frame - 3), sizeof(frameb),
+ (char *)frameb);
+ frame = frameb + 3;
+#endif
}
}
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Sat Jan 24 15:44:32 UTC 2015 Modified Files: src/sys/arch/arm/arm: db_trace.c Log Message: Fix crash(8) backtrace support. To generate a diff of this commit: cvs rdiff -u -r1.30 -r1.31 src/sys/arch/arm/arm/db_trace.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Sun Jan 18 18:23:25 UTC 2015 Modified Files: src/sys/arch/arm/arm: disassem.c Log Message: Remove incorrect entries To generate a diff of this commit: cvs rdiff -u -r1.30 -r1.31 src/sys/arch/arm/arm/disassem.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: skrll
Date: Sun Jan 18 18:23:25 UTC 2015
Modified Files:
src/sys/arch/arm/arm: disassem.c
Log Message:
Remove incorrect entries
To generate a diff of this commit:
cvs rdiff -u -r1.30 -r1.31 src/sys/arch/arm/arm/disassem.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/disassem.c
diff -u src/sys/arch/arm/arm/disassem.c:1.30 src/sys/arch/arm/arm/disassem.c:1.31
--- src/sys/arch/arm/arm/disassem.c:1.30 Sat Jan 17 19:47:34 2015
+++ src/sys/arch/arm/arm/disassem.c Sun Jan 18 18:23:25 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: disassem.c,v 1.30 2015/01/17 19:47:34 skrll Exp $ */
+/* $NetBSD: disassem.c,v 1.31 2015/01/18 18:23:25 skrll Exp $ */
/*
* Copyright (c) 1996 Mark Brinicombe.
@@ -49,7 +49,7 @@
#include sys/param.h
-__KERNEL_RCSID(0, $NetBSD: disassem.c,v 1.30 2015/01/17 19:47:34 skrll Exp $);
+__KERNEL_RCSID(0, $NetBSD: disassem.c,v 1.31 2015/01/18 18:23:25 skrll Exp $);
#include sys/systm.h
@@ -158,8 +158,6 @@ static const struct arm32_insn arm32_i[]
{ 0x0ff00ff0, 0x01a00f90, strexd, dma },
{ 0x0ff00ff0, 0x01c00f90, strexb, dma },
{ 0x0ff00ff0, 0x01e00f90, strexh, dma },
-{ 0x0e1000f0, 0x00100090, ldrb, de },
-{ 0x0e1000f0, 0x0090, strb, de },
{ 0x0e1000f0, 0x001000d0, ldrsb, de },
{ 0x0e1000f0, 0x001000b0, ldrh, de },
{ 0x0e1000f0, 0x00b0, strh, de },
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Sat Jan 17 19:47:34 UTC 2015 Modified Files: src/sys/arch/arm/arm: disassem.c Log Message: Document 'e' To generate a diff of this commit: cvs rdiff -u -r1.29 -r1.30 src/sys/arch/arm/arm/disassem.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/disassem.c diff -u src/sys/arch/arm/arm/disassem.c:1.29 src/sys/arch/arm/arm/disassem.c:1.30 --- src/sys/arch/arm/arm/disassem.c:1.29 Sat Jan 17 19:46:41 2015 +++ src/sys/arch/arm/arm/disassem.c Sat Jan 17 19:47:34 2015 @@ -1,4 +1,4 @@ -/* $NetBSD: disassem.c,v 1.29 2015/01/17 19:46:41 skrll Exp $ */ +/* $NetBSD: disassem.c,v 1.30 2015/01/17 19:47:34 skrll Exp $ */ /* * Copyright (c) 1996 Mark Brinicombe. @@ -49,7 +49,7 @@ #include sys/param.h -__KERNEL_RCSID(0, $NetBSD: disassem.c,v 1.29 2015/01/17 19:46:41 skrll Exp $); +__KERNEL_RCSID(0, $NetBSD: disassem.c,v 1.30 2015/01/17 19:47:34 skrll Exp $); #include sys/systm.h @@ -77,6 +77,7 @@ __KERNEL_RCSID(0, $NetBSD: disassem.c,v * b - branch address * c - comment field bits(0-23) * d - destination register (bits 12-15) + * e - address operand of ldrh/strh instruction * f - 1st fp operand (register) (bits 12-14) * g - 2nd fp operand (register) (bits 16-18) * h - 3rd fp operand (register/immediate) (bits 0-4)
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Sat Jan 17 19:47:34 UTC 2015 Modified Files: src/sys/arch/arm/arm: disassem.c Log Message: Document 'e' To generate a diff of this commit: cvs rdiff -u -r1.29 -r1.30 src/sys/arch/arm/arm/disassem.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Sat Jan 17 19:46:41 UTC 2015 Modified Files: src/sys/arch/arm/arm: disassem.c Log Message: Remove duplicate entry To generate a diff of this commit: cvs rdiff -u -r1.28 -r1.29 src/sys/arch/arm/arm/disassem.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: skrll
Date: Sat Jan 17 19:46:41 UTC 2015
Modified Files:
src/sys/arch/arm/arm: disassem.c
Log Message:
Remove duplicate entry
To generate a diff of this commit:
cvs rdiff -u -r1.28 -r1.29 src/sys/arch/arm/arm/disassem.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/disassem.c
diff -u src/sys/arch/arm/arm/disassem.c:1.28 src/sys/arch/arm/arm/disassem.c:1.29
--- src/sys/arch/arm/arm/disassem.c:1.28 Fri Jan 2 15:52:33 2015
+++ src/sys/arch/arm/arm/disassem.c Sat Jan 17 19:46:41 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: disassem.c,v 1.28 2015/01/02 15:52:33 skrll Exp $ */
+/* $NetBSD: disassem.c,v 1.29 2015/01/17 19:46:41 skrll Exp $ */
/*
* Copyright (c) 1996 Mark Brinicombe.
@@ -49,7 +49,7 @@
#include sys/param.h
-__KERNEL_RCSID(0, $NetBSD: disassem.c,v 1.28 2015/01/02 15:52:33 skrll Exp $);
+__KERNEL_RCSID(0, $NetBSD: disassem.c,v 1.29 2015/01/17 19:46:41 skrll Exp $);
#include sys/systm.h
@@ -239,7 +239,6 @@ static const struct arm32_insn arm32_i[]
{ 0x0f100010, 0x0e100010, mrc, #z },
{ 0xff10, 0xfe00, cdp2, #y },
{ 0x0f10, 0x0e00, cdp, #y },
-{ 0x0f100010, 0x0e10, mcr, #z },
{ 0x0ff0, 0x0c40, mcrr, # },
{ 0x0ff0, 0x0c50, mrrc, # },
{ 0xfe100090, 0xfc10, ldc2, L#v },
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: christos Date: Tue Jan 6 16:24:58 UTC 2015 Modified Files: src/sys/arch/arm/arm: cpu_in_cksum.S Log Message: fix conditional; makes 0 len mbuf, 0 offset, 0 len test work. To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.9 src/sys/arch/arm/arm/cpu_in_cksum.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: skrll
Date: Fri Jan 2 10:03:42 UTC 2015
Modified Files:
src/sys/arch/arm/arm: disassem.c
Log Message:
The mode synonyms are different for stm and ldm - handle this.
PR/49520: arm/disassem.c doesn't use proper address mode name for loads
To generate a diff of this commit:
cvs rdiff -u -r1.25 -r1.26 src/sys/arch/arm/arm/disassem.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/disassem.c
diff -u src/sys/arch/arm/arm/disassem.c:1.25 src/sys/arch/arm/arm/disassem.c:1.26
--- src/sys/arch/arm/arm/disassem.c:1.25 Fri Nov 21 23:36:20 2014
+++ src/sys/arch/arm/arm/disassem.c Fri Jan 2 10:03:42 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: disassem.c,v 1.25 2014/11/21 23:36:20 joerg Exp $ */
+/* $NetBSD: disassem.c,v 1.26 2015/01/02 10:03:42 skrll Exp $ */
/*
* Copyright (c) 1996 Mark Brinicombe.
@@ -49,7 +49,7 @@
#include sys/param.h
-__KERNEL_RCSID(0, $NetBSD: disassem.c,v 1.25 2014/11/21 23:36:20 joerg Exp $);
+__KERNEL_RCSID(0, $NetBSD: disassem.c,v 1.26 2015/01/02 10:03:42 skrll Exp $);
#include sys/systm.h
@@ -276,7 +276,8 @@ static char const insn_block_transfers[]
};
static char const insn_stack_block_transfers[][4] = {
- ed, ea, fd, fa
+ ed, ea, fd, fa, /* stm */
+ fa, fd, ea, ed, /* ldm */
};
static char const op_shifts[][4] = {
@@ -298,7 +299,7 @@ static char const insn_fpaconstants[][8]
#define insn_condition(x) arm32_insn_conditions[(x 28) 0x0f]
#define insn_blktrans(x) insn_block_transfers[(x 23) 3]
-#define insn_stkblktrans(x) insn_stack_block_transfers[(x 23) 3]
+#define insn_stkblktrans(x) insn_stack_block_transfers[((x (20 - 2)) 4)|((x 23) 3)]
#define op2_shift(x) op_shifts[(x 5) 3]
#define insn_fparnd(x) insn_fpa_rounding[(x 5) 0x03]
#define insn_fpaprec(x) insn_fpa_precision[(((x 18) 2)|(x 7)) 1]
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: skrll
Date: Fri Jan 2 10:04:35 UTC 2015
Modified Files:
src/sys/arch/arm/arm: disassem.c
Log Message:
Trailing whitespace.
To generate a diff of this commit:
cvs rdiff -u -r1.26 -r1.27 src/sys/arch/arm/arm/disassem.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/disassem.c
diff -u src/sys/arch/arm/arm/disassem.c:1.26 src/sys/arch/arm/arm/disassem.c:1.27
--- src/sys/arch/arm/arm/disassem.c:1.26 Fri Jan 2 10:03:42 2015
+++ src/sys/arch/arm/arm/disassem.c Fri Jan 2 10:04:35 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: disassem.c,v 1.26 2015/01/02 10:03:42 skrll Exp $ */
+/* $NetBSD: disassem.c,v 1.27 2015/01/02 10:04:35 skrll Exp $ */
/*
* Copyright (c) 1996 Mark Brinicombe.
@@ -49,7 +49,7 @@
#include sys/param.h
-__KERNEL_RCSID(0, $NetBSD: disassem.c,v 1.26 2015/01/02 10:03:42 skrll Exp $);
+__KERNEL_RCSID(0, $NetBSD: disassem.c,v 1.27 2015/01/02 10:04:35 skrll Exp $);
#include sys/systm.h
@@ -146,9 +146,9 @@ static const struct arm32_insn arm32_i[]
{ 0x0fff, 0x092d, push, l }, /* separate out r13 base */
{ 0x0fff, 0x08bd, pop, l }, /* separate out r13 base */
{ 0x0e1f, 0x080d, stm, YnWl },/* separate out r13 base */
-{ 0x0e1f, 0x081d, ldm, YnWl },/* separate out r13 base */
+{ 0x0e1f, 0x081d, ldm, YnWl },/* separate out r13 base */
{ 0x0e10, 0x0800, stm, XnWl },
-{ 0x0e10, 0x0810, ldm, XnWl },
+{ 0x0e10, 0x0810, ldm, XnWl },
{ 0x0ff00fff, 0x01900f9f, ldrex, da },
{ 0x0ff00fff, 0x01b00f9f, ldrexd, da },
{ 0x0ff00fff, 0x01d00f9f, ldrexb, da },
@@ -384,7 +384,7 @@ disasm(const disasm_interface_t *di, vad
di-di_printf(#0x%08x,
(insn 0xff) (32 - rotate) |
(insn 0xff) rotate);
- } else {
+ } else {
disasm_register_shift(di, insn);
}
break;
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: skrll
Date: Fri Jan 2 15:52:33 UTC 2015
Modified Files:
src/sys/arch/arm/arm: disassem.c
Log Message:
Do revision 1.20: Decode movw/movt properly.
Hi Matt.
To generate a diff of this commit:
cvs rdiff -u -r1.27 -r1.28 src/sys/arch/arm/arm/disassem.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/disassem.c
diff -u src/sys/arch/arm/arm/disassem.c:1.27 src/sys/arch/arm/arm/disassem.c:1.28
--- src/sys/arch/arm/arm/disassem.c:1.27 Fri Jan 2 10:04:35 2015
+++ src/sys/arch/arm/arm/disassem.c Fri Jan 2 15:52:33 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: disassem.c,v 1.27 2015/01/02 10:04:35 skrll Exp $ */
+/* $NetBSD: disassem.c,v 1.28 2015/01/02 15:52:33 skrll Exp $ */
/*
* Copyright (c) 1996 Mark Brinicombe.
@@ -49,7 +49,7 @@
#include sys/param.h
-__KERNEL_RCSID(0, $NetBSD: disassem.c,v 1.27 2015/01/02 10:04:35 skrll Exp $);
+__KERNEL_RCSID(0, $NetBSD: disassem.c,v 1.28 2015/01/02 15:52:33 skrll Exp $);
#include sys/systm.h
@@ -174,24 +174,24 @@ static const struct arm32_insn arm32_i[]
{ 0x0fff0ff0, 0x016f0f10, clz, dm },
{ 0x0ff0, 0x012fff30, blx, m },
{ 0xfff000f0, 0xe1200070, bkpt, k },
-{ 0x0fe0, 0x0200, and, Sdn2 },
-{ 0x0fe0, 0x0220, eor, Sdn2 },
-{ 0x0fe0, 0x0240, sub, Sdn2 },
-{ 0x0fe0, 0x0260, rsb, Sdn2 },
-{ 0x0fe0, 0x0280, add, Sdn2 },
-{ 0x0fe0, 0x02a0, adc, Sdn2 },
-{ 0x0fe0, 0x02c0, sbc, Sdn2 },
-{ 0x0fe0, 0x02e0, rsc, Sdn2 },
{ 0x0ff0, 0x0300, movw, dZ },
-{ 0x0ff0, 0x0310, tst, Dn2 },
-{ 0x0ff0, 0x0330, teq, Dn2 },
{ 0x0ff0, 0x0340, movt, dZ },
-{ 0x0ff0, 0x0350, cmp, Dn2 },
-{ 0x0ff0, 0x0370, cmn, Dn2 },
-{ 0x0fe0, 0x0380, orr, Sdn2 },
+{ 0x0de0, 0x, and, Sdn2 },
+{ 0x0de0, 0x0020, eor, Sdn2 },
+{ 0x0de0, 0x0040, sub, Sdn2 },
+{ 0x0de0, 0x0060, rsb, Sdn2 },
+{ 0x0de0, 0x0080, add, Sdn2 },
+{ 0x0de0, 0x00a0, adc, Sdn2 },
+{ 0x0de0, 0x00c0, sbc, Sdn2 },
+{ 0x0de0, 0x00e0, rsc, Sdn2 },
+{ 0x0df0, 0x0110, tst, Dn2 },
+{ 0x0df0, 0x0130, teq, Dn2 },
+{ 0x0df0, 0x0150, cmp, Dn2 },
+{ 0x0df0, 0x0170, cmn, Dn2 },
+{ 0x0de0, 0x0180, orr, Sdn2 },
{ 0x0de0, 0x01a0, mov, Sd2 },
-{ 0x0fe0, 0x03c0, bic, Sdn2 },
-{ 0x0fe0, 0x03e0, mvn, Sd2 },
+{ 0x0de0, 0x01c0, bic, Sdn2 },
+{ 0x0de0, 0x01e0, mvn, Sd2 },
{ 0x0ff08f10, 0x0e000100, adf, PRfgh },
{ 0x0ff08f10, 0x0e100100, muf, PRfgh },
{ 0x0ff08f10, 0x0e200100, suf, PRfgh },
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Fri Jan 2 10:03:42 UTC 2015 Modified Files: src/sys/arch/arm/arm: disassem.c Log Message: The mode synonyms are different for stm and ldm - handle this. PR/49520: arm/disassem.c doesn't use proper address mode name for loads To generate a diff of this commit: cvs rdiff -u -r1.25 -r1.26 src/sys/arch/arm/arm/disassem.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Fri Jan 2 15:52:33 UTC 2015 Modified Files: src/sys/arch/arm/arm: disassem.c Log Message: Do revision 1.20: Decode movw/movt properly. Hi Matt. To generate a diff of this commit: cvs rdiff -u -r1.27 -r1.28 src/sys/arch/arm/arm/disassem.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Fri Jan 2 10:04:35 UTC 2015 Modified Files: src/sys/arch/arm/arm: disassem.c Log Message: Trailing whitespace. To generate a diff of this commit: cvs rdiff -u -r1.26 -r1.27 src/sys/arch/arm/arm/disassem.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: joerg
Date: Fri Nov 21 23:36:20 UTC 2014
Modified Files:
src/sys/arch/arm/arm: disassem.c
Log Message:
Preserve const.
To generate a diff of this commit:
cvs rdiff -u -r1.24 -r1.25 src/sys/arch/arm/arm/disassem.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/disassem.c
diff -u src/sys/arch/arm/arm/disassem.c:1.24 src/sys/arch/arm/arm/disassem.c:1.25
--- src/sys/arch/arm/arm/disassem.c:1.24 Mon Mar 3 08:51:39 2014
+++ src/sys/arch/arm/arm/disassem.c Fri Nov 21 23:36:20 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: disassem.c,v 1.24 2014/03/03 08:51:39 matt Exp $ */
+/* $NetBSD: disassem.c,v 1.25 2014/11/21 23:36:20 joerg Exp $ */
/*
* Copyright (c) 1996 Mark Brinicombe.
@@ -49,7 +49,7 @@
#include sys/param.h
-__KERNEL_RCSID(0, $NetBSD: disassem.c,v 1.24 2014/03/03 08:51:39 matt Exp $);
+__KERNEL_RCSID(0, $NetBSD: disassem.c,v 1.25 2014/11/21 23:36:20 joerg Exp $);
#include sys/systm.h
@@ -320,7 +320,7 @@ static void disassemble_printaddr(u_int
vaddr_t
disasm(const disasm_interface_t *di, vaddr_t loc, int altfmt)
{
- struct arm32_insn *i_ptr = (struct arm32_insn *)arm32_i;
+ const struct arm32_insn *i_ptr = (const struct arm32_insn *)arm32_i;
u_int insn;
int matchp;
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: joerg Date: Fri Nov 21 23:36:20 UTC 2014 Modified Files: src/sys/arch/arm/arm: disassem.c Log Message: Preserve const. To generate a diff of this commit: cvs rdiff -u -r1.24 -r1.25 src/sys/arch/arm/arm/disassem.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Sun Nov 9 09:21:57 UTC 2014 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_armv7.S Log Message: Ensure all memory operations are complete by before wfi. For example, the cpu could have just been in uvm_pageidlezero. To generate a diff of this commit: cvs rdiff -u -r1.20 -r1.21 src/sys/arch/arm/arm/cpufunc_asm_armv7.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/cpufunc_asm_armv7.S diff -u src/sys/arch/arm/arm/cpufunc_asm_armv7.S:1.20 src/sys/arch/arm/arm/cpufunc_asm_armv7.S:1.21 --- src/sys/arch/arm/arm/cpufunc_asm_armv7.S:1.20 Wed Oct 29 23:01:46 2014 +++ src/sys/arch/arm/arm/cpufunc_asm_armv7.S Sun Nov 9 09:21:57 2014 @@ -34,6 +34,7 @@ .arch armv7a ENTRY(armv7_cpu_sleep) + dsb wfi@ wait for an interrupt b irq_idle_entry @ assume we got an interrupt END(armv7_cpu_sleep)
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Sun Nov 9 09:21:57 UTC 2014 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_armv7.S Log Message: Ensure all memory operations are complete by before wfi. For example, the cpu could have just been in uvm_pageidlezero. To generate a diff of this commit: cvs rdiff -u -r1.20 -r1.21 src/sys/arch/arm/arm/cpufunc_asm_armv7.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: skrll
Date: Wed Oct 29 10:56:19 UTC 2014
Modified Files:
src/sys/arch/arm/arm: ast.c
Log Message:
If our ASID got released and access via TTBR0 is disable make sure we
re-activate the lwp before calling mi_userret; otherwise bad things
happen, e.g. for signals.
To generate a diff of this commit:
cvs rdiff -u -r1.24 -r1.25 src/sys/arch/arm/arm/ast.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/ast.c
diff -u src/sys/arch/arm/arm/ast.c:1.24 src/sys/arch/arm/arm/ast.c:1.25
--- src/sys/arch/arm/arm/ast.c:1.24 Wed Aug 13 21:41:32 2014
+++ src/sys/arch/arm/arm/ast.c Wed Oct 29 10:56:19 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: ast.c,v 1.24 2014/08/13 21:41:32 matt Exp $ */
+/* $NetBSD: ast.c,v 1.25 2014/10/29 10:56:19 skrll Exp $ */
/*
* Copyright (c) 1994,1995 Mark Brinicombe
@@ -41,7 +41,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: ast.c,v 1.24 2014/08/13 21:41:32 matt Exp $);
+__KERNEL_RCSID(0, $NetBSD: ast.c,v 1.25 2014/10/29 10:56:19 skrll Exp $);
#include opt_ddb.h
@@ -71,9 +71,6 @@ void ast(struct trapframe *);
void
userret(struct lwp *l)
{
- /* Invoke MI userret code */
- mi_userret(l);
-
#if defined(__PROG32) defined(ARM_MMU_EXTENDED)
/*
* If our ASID got released, access via TTBR0 will have been disabled.
@@ -83,8 +80,12 @@ userret(struct lwp *l)
if (armreg_ttbcr_read() TTBCR_S_PD0) {
pmap_activate(l);
}
+ KASSERT(!(armreg_ttbcr_read() TTBCR_S_PD0));
#endif
+ /* Invoke MI userret code */
+ mi_userret(l);
+
#if defined(__PROG32) defined(DIAGNOSTIC)
KASSERT(VALID_R15_PSR(lwp_trapframe(l)-tf_pc,
lwp_trapframe(l)-tf_spsr));
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Wed Oct 29 16:14:45 UTC 2014 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_arm11.S Log Message: Simplify #ifdefs To generate a diff of this commit: cvs rdiff -u -r1.15 -r1.16 src/sys/arch/arm/arm/cpufunc_asm_arm11.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/cpufunc_asm_arm11.S diff -u src/sys/arch/arm/arm/cpufunc_asm_arm11.S:1.15 src/sys/arch/arm/arm/cpufunc_asm_arm11.S:1.16 --- src/sys/arch/arm/arm/cpufunc_asm_arm11.S:1.15 Thu Jul 31 10:44:58 2014 +++ src/sys/arch/arm/arm/cpufunc_asm_arm11.S Wed Oct 29 16:14:45 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: cpufunc_asm_arm11.S,v 1.15 2014/07/31 10:44:58 skrll Exp $ */ +/* $NetBSD: cpufunc_asm_arm11.S,v 1.16 2014/10/29 16:14:45 skrll Exp $ */ /* * Copyright (c) 2002, 2005 ARM Limited @@ -68,12 +68,10 @@ ENTRY(arm11_context_switch) * We can assume that the caches will only contain kernel addresses * at this point. So no need to flush them again. */ -#ifdef ARM_MMU_EXTENDED - cmp r1, #0 -#endif mcr p15, 0, r0, c7, c10, 4 /* drain the write buffer */ mcr p15, 0, r0, c2, c0, 0 /* set the new TTBR0 */ #ifdef ARM_MMU_EXTENDED + cmp r1, #0 mcreq p15, 0, r0, c2, c0, 1 /* set the new TTBR1 */ #else mcr p15, 0, r0, c8, c7, 0 /* and flush the I+D tlbs */
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Wed Oct 29 16:22:32 UTC 2014 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_arm11.S cpufunc_asm_armv7.S cpufunc_asm_pj4b.S Log Message: Don't flush random ASIDs. Instead always assume KERNEL_PID, i.e. 0. All other TLB flushes are done via pmap_tlb_invalidate_addr - tlb_invalidate_addr OK matt@ To generate a diff of this commit: cvs rdiff -u -r1.16 -r1.17 src/sys/arch/arm/arm/cpufunc_asm_arm11.S cvs rdiff -u -r1.18 -r1.19 src/sys/arch/arm/arm/cpufunc_asm_armv7.S cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/arm/cpufunc_asm_pj4b.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/cpufunc_asm_arm11.S diff -u src/sys/arch/arm/arm/cpufunc_asm_arm11.S:1.16 src/sys/arch/arm/arm/cpufunc_asm_arm11.S:1.17 --- src/sys/arch/arm/arm/cpufunc_asm_arm11.S:1.16 Wed Oct 29 16:14:45 2014 +++ src/sys/arch/arm/arm/cpufunc_asm_arm11.S Wed Oct 29 16:22:31 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: cpufunc_asm_arm11.S,v 1.16 2014/10/29 16:14:45 skrll Exp $ */ +/* $NetBSD: cpufunc_asm_arm11.S,v 1.17 2014/10/29 16:22:31 skrll Exp $ */ /* * Copyright (c) 2002, 2005 ARM Limited @@ -97,7 +97,8 @@ END(arm11_tlb_flushI) ENTRY(arm11_tlb_flushI_SE) #ifdef ARM_MMU_EXTENDED - orr r0, r0, r1 /* insert ASID into MVA */ + bic r0, r0, #0xff + bic r0, r0, #0xf00 /* Always KERNEL_PID, i.e. 0 */ #endif mcr p15, 0, r0, c8, c5, 1 /* flush I tlb single entry */ #if PAGE_SIZE == 2 * L2_S_SIZE @@ -119,7 +120,8 @@ END(arm11_tlb_flushD) ENTRY(arm11_tlb_flushD_SE) #ifdef ARM_MMU_EXTENDED - orr r0, r0, r1 /* insert ASID into MVA */ + bic r0, r0, #0xff + bic r0, r0, #0xf00 /* Always KERNEL_PID, i.e. 0 */ #endif mcr p15, 0, r0, c8, c6, 1 /* flush D tlb single entry */ #if PAGE_SIZE == 2 * L2_S_SIZE @@ -140,7 +142,8 @@ END(arm11_tlb_flushID) ENTRY(arm11_tlb_flushID_SE) #ifdef ARM_MMU_EXTENDED - orr r0, r0, r1 /* insert ASID into MVA */ + bic r0, r0, #0xff + bic r0, r0, #0xf00 /* Always KERNEL_PID, i.e. 0 */ #endif mcr p15, 0, r0, c8, c7, 1 /* flush I+D tlb single entry */ #if PAGE_SIZE == 2 * L2_S_SIZE Index: src/sys/arch/arm/arm/cpufunc_asm_armv7.S diff -u src/sys/arch/arm/arm/cpufunc_asm_armv7.S:1.18 src/sys/arch/arm/arm/cpufunc_asm_armv7.S:1.19 --- src/sys/arch/arm/arm/cpufunc_asm_armv7.S:1.18 Thu Jul 31 06:26:06 2014 +++ src/sys/arch/arm/arm/cpufunc_asm_armv7.S Wed Oct 29 16:22:31 2014 @@ -78,10 +78,7 @@ END(armv7_tlb_flushID_ASID) STRONG_ALIAS(armv7_tlb_flushD_SE, armv7_tlb_flushID_SE) STRONG_ALIAS(armv7_tlb_flushI_SE, armv7_tlb_flushID_SE) ENTRY(armv7_tlb_flushID_SE) - bfc r0, #0, #12 @ clear ASID -#ifdef ARM_MMU_EXTENDED - bfi r0, r1, #0, #8 @ insert ASID into MVA -#endif + bfc r0, #0, #12 @ Always KERNEL_PID, i.e. 0 #ifdef MULTIPROCESSOR mcr p15, 0, r0, c8, c3, 1 @ flush I+D tlb single entry #if PAGE_SIZE == 2*L2_S_SIZE Index: src/sys/arch/arm/arm/cpufunc_asm_pj4b.S diff -u src/sys/arch/arm/arm/cpufunc_asm_pj4b.S:1.4 src/sys/arch/arm/arm/cpufunc_asm_pj4b.S:1.5 --- src/sys/arch/arm/arm/cpufunc_asm_pj4b.S:1.4 Sun Mar 30 01:15:03 2014 +++ src/sys/arch/arm/arm/cpufunc_asm_pj4b.S Wed Oct 29 16:22:31 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: cpufunc_asm_pj4b.S,v 1.4 2014/03/30 01:15:03 matt Exp $ */ +/* $NetBSD: cpufunc_asm_pj4b.S,v 1.5 2014/10/29 16:22:31 skrll Exp $ */ /*** Copyright (C) Marvell International Ltd. and its affiliates @@ -78,6 +78,7 @@ ENTRY(pj4b_tlb_flushID) END(pj4b_tlb_flushID) ENTRY(pj4b_tlb_flushID_SE) + bfc r0, #0, #12 @ always KERNEL_PID (i.e. 0) mcr p15, 0, r0, c8, c7, 1 @flush I+D tlb single entry #if PAGE_SIZE == 2 * L2_S_SIZE add r0, r0, L2_S_SIZE
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Wed Oct 29 23:01:46 UTC 2014 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_armv7.S Log Message: Add some dsb instructions to avoid Cortex A7 errata To generate a diff of this commit: cvs rdiff -u -r1.19 -r1.20 src/sys/arch/arm/arm/cpufunc_asm_armv7.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/cpufunc_asm_armv7.S diff -u src/sys/arch/arm/arm/cpufunc_asm_armv7.S:1.19 src/sys/arch/arm/arm/cpufunc_asm_armv7.S:1.20 --- src/sys/arch/arm/arm/cpufunc_asm_armv7.S:1.19 Wed Oct 29 16:22:31 2014 +++ src/sys/arch/arm/arm/cpufunc_asm_armv7.S Wed Oct 29 23:01:46 2014 @@ -377,6 +377,7 @@ ENTRY_NP(armv7_dcache_inv_all) b 1b .Lnext_level_inv: + dsb mrc p15, 1, r0, c0, c0, 1 @ read CLIDR ubfx ip, r0, #24, #3 @ narrow to LoC add r3, r3, #2 @ go to next level @@ -437,6 +438,7 @@ ENTRY_NP(armv7_dcache_wbinv_all) b 1b .Lnext_level_wbinv: + dsb mrc p15, 1, r0, c0, c0, 1 @ read CLIDR ubfx ip, r0, #24, #3 @ narrow to LoC add r3, r3, #2 @ go to next level
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Wed Oct 29 10:56:19 UTC 2014 Modified Files: src/sys/arch/arm/arm: ast.c Log Message: If our ASID got released and access via TTBR0 is disable make sure we re-activate the lwp before calling mi_userret; otherwise bad things happen, e.g. for signals. To generate a diff of this commit: cvs rdiff -u -r1.24 -r1.25 src/sys/arch/arm/arm/ast.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Wed Oct 29 16:14:45 UTC 2014 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_arm11.S Log Message: Simplify #ifdefs To generate a diff of this commit: cvs rdiff -u -r1.15 -r1.16 src/sys/arch/arm/arm/cpufunc_asm_arm11.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Wed Oct 29 16:22:32 UTC 2014 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_arm11.S cpufunc_asm_armv7.S cpufunc_asm_pj4b.S Log Message: Don't flush random ASIDs. Instead always assume KERNEL_PID, i.e. 0. All other TLB flushes are done via pmap_tlb_invalidate_addr - tlb_invalidate_addr OK matt@ To generate a diff of this commit: cvs rdiff -u -r1.16 -r1.17 src/sys/arch/arm/arm/cpufunc_asm_arm11.S cvs rdiff -u -r1.18 -r1.19 src/sys/arch/arm/arm/cpufunc_asm_armv7.S cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/arm/cpufunc_asm_pj4b.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Wed Oct 29 23:01:46 UTC 2014 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_armv7.S Log Message: Add some dsb instructions to avoid Cortex A7 errata To generate a diff of this commit: cvs rdiff -u -r1.19 -r1.20 src/sys/arch/arm/arm/cpufunc_asm_armv7.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Tue Oct 14 22:23:22 UTC 2014 Modified Files: src/sys/arch/arm/arm: undefined.c Log Message: Use KM_NOSLEEP in install_coproc_handler. To generate a diff of this commit: cvs rdiff -u -r1.54 -r1.55 src/sys/arch/arm/arm/undefined.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/undefined.c diff -u src/sys/arch/arm/arm/undefined.c:1.54 src/sys/arch/arm/arm/undefined.c:1.55 --- src/sys/arch/arm/arm/undefined.c:1.54 Fri Mar 28 21:44:35 2014 +++ src/sys/arch/arm/arm/undefined.c Tue Oct 14 22:23:22 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: undefined.c,v 1.54 2014/03/28 21:44:35 matt Exp $ */ +/* $NetBSD: undefined.c,v 1.55 2014/10/14 22:23:22 skrll Exp $ */ /* * Copyright (c) 2001 Ben Harris. @@ -55,7 +55,7 @@ #include sys/kgdb.h #endif -__KERNEL_RCSID(0, $NetBSD: undefined.c,v 1.54 2014/03/28 21:44:35 matt Exp $); +__KERNEL_RCSID(0, $NetBSD: undefined.c,v 1.55 2014/10/14 22:23:22 skrll Exp $); #include sys/kmem.h #include sys/queue.h @@ -102,7 +102,8 @@ install_coproc_handler(int coproc, undef KASSERT(coproc = 0 coproc NUM_UNKNOWN_HANDLERS); KASSERT(handler != NULL); /* Used to be legal. */ - uh = kmem_alloc(sizeof(*uh), KM_SLEEP); + uh = kmem_alloc(sizeof(*uh), KM_NOSLEEP); + KASSERT(uh != NULL); uh-uh_handler = handler; install_coproc_handler_static(coproc, uh); return uh;
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Tue Oct 14 22:23:22 UTC 2014 Modified Files: src/sys/arch/arm/arm: undefined.c Log Message: Use KM_NOSLEEP in install_coproc_handler. To generate a diff of this commit: cvs rdiff -u -r1.54 -r1.55 src/sys/arch/arm/arm/undefined.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: matt
Date: Fri Sep 5 05:24:53 UTC 2014
Modified Files:
src/sys/arch/arm/arm: bootconfig.c
Log Message:
Don't use not as a variable since it's reserved in C++.
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/arm/bootconfig.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/bootconfig.c
diff -u src/sys/arch/arm/arm/bootconfig.c:1.6 src/sys/arch/arm/arm/bootconfig.c:1.7
--- src/sys/arch/arm/arm/bootconfig.c:1.6 Sun Aug 2 11:32:05 2009
+++ src/sys/arch/arm/arm/bootconfig.c Fri Sep 5 05:24:53 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: bootconfig.c,v 1.6 2009/08/02 11:32:05 gavan Exp $ */
+/* $NetBSD: bootconfig.c,v 1.7 2014/09/05 05:24:53 matt Exp $ */
/*
* Copyright (c) 1994-1998 Mark Brinicombe.
@@ -38,7 +38,7 @@
#include sys/param.h
-__KERNEL_RCSID(0, $NetBSD: bootconfig.c,v 1.6 2009/08/02 11:32:05 gavan Exp $);
+__KERNEL_RCSID(0, $NetBSD: bootconfig.c,v 1.7 2014/09/05 05:24:53 matt Exp $);
#include sys/systm.h
@@ -56,7 +56,7 @@ get_bootconf_option(char *opts, const ch
{
char *ptr;
char *optstart;
- int not;
+ bool neg;
ptr = opts;
@@ -68,12 +68,12 @@ get_bootconf_option(char *opts, const ch
if (*ptr == 0)
break;
- not = 0;
+ neg = false;
/* Is it a negate option */
if ((type BOOTOPT_TYPE_MASK) == BOOTOPT_TYPE_BOOLEAN
*ptr == '!') {
- not = 1;
+ neg = true;
++ptr;
}
@@ -99,7 +99,7 @@ get_bootconf_option(char *opts, const ch
((u_int)strtoul(ptr, NULL,
10) != 0);
else
- *((int *)result) = !not;
+ *((int *)result) = !neg;
break;
case BOOTOPT_TYPE_STRING :
*((char **)result) = ptr;
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: matt Date: Fri Sep 5 05:24:53 UTC 2014 Modified Files: src/sys/arch/arm/arm: bootconfig.c Log Message: Don't use not as a variable since it's reserved in C++. To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/arm/bootconfig.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: matt Date: Wed Aug 13 21:10:31 UTC 2014 Modified Files: src/sys/arch/arm/arm: sig_machdep.c Log Message: When creating a mcontext, make sure the PSR we are saving is actually valid. To generate a diff of this commit: cvs rdiff -u -r1.47 -r1.48 src/sys/arch/arm/arm/sig_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/sig_machdep.c diff -u src/sys/arch/arm/arm/sig_machdep.c:1.47 src/sys/arch/arm/arm/sig_machdep.c:1.48 --- src/sys/arch/arm/arm/sig_machdep.c:1.47 Sun Aug 18 06:28:18 2013 +++ src/sys/arch/arm/arm/sig_machdep.c Wed Aug 13 21:10:31 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: sig_machdep.c,v 1.47 2013/08/18 06:28:18 matt Exp $ */ +/* $NetBSD: sig_machdep.c,v 1.48 2014/08/13 21:10:31 matt Exp $ */ /* * Copyright (c) 1994-1998 Mark Brinicombe. @@ -44,7 +44,7 @@ #include sys/param.h -__KERNEL_RCSID(0, $NetBSD: sig_machdep.c,v 1.47 2013/08/18 06:28:18 matt Exp $); +__KERNEL_RCSID(0, $NetBSD: sig_machdep.c,v 1.48 2014/08/13 21:10:31 matt Exp $); #include sys/mount.h /* XXX only needed by syscallargs.h */ #include sys/cpu.h @@ -184,6 +184,9 @@ cpu_getmcontext(struct lwp *l, mcontext_ gr[_REG_PC] = tf-tf_pc; gr[_REG_CPSR] = tf-tf_spsr; + KASSERTMSG(VALID_R15_PSR(gr[_REG_PC], gr[_REG_CPSR]), %#x %#x, + gr[_REG_PC], gr[_REG_CPSR]); + if ((ras_pc = (__greg_t)ras_lookup(l-l_proc, (void *) gr[_REG_PC])) != -1) gr[_REG_PC] = ras_pc;
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: matt Date: Thu Jul 31 06:26:06 UTC 2014 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_armv7.S Log Message: Remove a leftover _XXX To generate a diff of this commit: cvs rdiff -u -r1.17 -r1.18 src/sys/arch/arm/arm/cpufunc_asm_armv7.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/cpufunc_asm_armv7.S diff -u src/sys/arch/arm/arm/cpufunc_asm_armv7.S:1.17 src/sys/arch/arm/arm/cpufunc_asm_armv7.S:1.18 --- src/sys/arch/arm/arm/cpufunc_asm_armv7.S:1.17 Thu Apr 10 02:55:13 2014 +++ src/sys/arch/arm/arm/cpufunc_asm_armv7.S Thu Jul 31 06:26:06 2014 @@ -79,7 +79,7 @@ STRONG_ALIAS(armv7_tlb_flushD_SE, armv7_ STRONG_ALIAS(armv7_tlb_flushI_SE, armv7_tlb_flushID_SE) ENTRY(armv7_tlb_flushID_SE) bfc r0, #0, #12 @ clear ASID -#ifdef ARM_MMU_EXTENDED_XXX +#ifdef ARM_MMU_EXTENDED bfi r0, r1, #0, #8 @ insert ASID into MVA #endif #ifdef MULTIPROCESSOR
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Thu Jul 31 07:14:03 UTC 2014 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_arm11.S Log Message: Trailing whitespace To generate a diff of this commit: cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/arm/cpufunc_asm_arm11.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/cpufunc_asm_arm11.S diff -u src/sys/arch/arm/arm/cpufunc_asm_arm11.S:1.13 src/sys/arch/arm/arm/cpufunc_asm_arm11.S:1.14 --- src/sys/arch/arm/arm/cpufunc_asm_arm11.S:1.13 Tue Jul 29 07:01:02 2014 +++ src/sys/arch/arm/arm/cpufunc_asm_arm11.S Thu Jul 31 07:14:03 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: cpufunc_asm_arm11.S,v 1.13 2014/07/29 07:01:02 skrll Exp $ */ +/* $NetBSD: cpufunc_asm_arm11.S,v 1.14 2014/07/31 07:14:03 skrll Exp $ */ /* * Copyright (c) 2002, 2005 ARM Limited @@ -30,7 +30,7 @@ * * ARM11 assembly functions for CPU / MMU / TLB specific operations */ - + #include assym.h #include machine/asm.h #include arm/locore.h
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: skrll
Date: Thu Jul 31 07:14:42 UTC 2014
Modified Files:
src/sys/arch/arm/arm: cpufunc.c
Log Message:
Trailing whitespace.
To generate a diff of this commit:
cvs rdiff -u -r1.149 -r1.150 src/sys/arch/arm/arm/cpufunc.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/cpufunc.c
diff -u src/sys/arch/arm/arm/cpufunc.c:1.149 src/sys/arch/arm/arm/cpufunc.c:1.150
--- src/sys/arch/arm/arm/cpufunc.c:1.149 Wed Jul 30 20:52:18 2014
+++ src/sys/arch/arm/arm/cpufunc.c Thu Jul 31 07:14:42 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc.c,v 1.149 2014/07/30 20:52:18 skrll Exp $ */
+/* $NetBSD: cpufunc.c,v 1.150 2014/07/31 07:14:42 skrll Exp $ */
/*
* arm7tdmi support code Copyright (c) 2001 John Fremlin
@@ -49,7 +49,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: cpufunc.c,v 1.149 2014/07/30 20:52:18 skrll Exp $);
+__KERNEL_RCSID(0, $NetBSD: cpufunc.c,v 1.150 2014/07/31 07:14:42 skrll Exp $);
#include opt_compat_netbsd.h
#include opt_cpuoptions.h
@@ -1734,7 +1734,7 @@ get_cachetype_table(void)
cachetab[i].ct_pdcache_line_size;
arm_pcache.dcache_ways = cachetab[i].ct_pdcache_ways;
if (arm_pcache.dcache_ways) {
-arm_pcache.dcache_way_size =
+arm_pcache.dcache_way_size =
arm_pcache.dcache_line_size
/ arm_pcache.dcache_ways;
}
@@ -1743,7 +1743,7 @@ get_cachetype_table(void)
cachetab[i].ct_picache_line_size;
arm_pcache.icache_ways = cachetab[i].ct_picache_ways;
if (arm_pcache.icache_ways) {
-arm_pcache.icache_way_size =
+arm_pcache.icache_way_size =
arm_pcache.icache_line_size
/ arm_pcache.icache_ways;
}
@@ -3135,7 +3135,7 @@ armv7_setup(char *args)
#endif /* CPU_ARMV7 */
-#if defined(CPU_ARM1136) || defined(CPU_ARM1176)
+#if defined(CPU_ARM1136) || defined(CPU_ARM1176)
void
arm11x6_setup(char *args)
{
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Thu Jul 31 10:44:58 UTC 2014 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_arm11.S Log Message: Comments. To generate a diff of this commit: cvs rdiff -u -r1.14 -r1.15 src/sys/arch/arm/arm/cpufunc_asm_arm11.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/cpufunc_asm_arm11.S diff -u src/sys/arch/arm/arm/cpufunc_asm_arm11.S:1.14 src/sys/arch/arm/arm/cpufunc_asm_arm11.S:1.15 --- src/sys/arch/arm/arm/cpufunc_asm_arm11.S:1.14 Thu Jul 31 07:14:03 2014 +++ src/sys/arch/arm/arm/cpufunc_asm_arm11.S Thu Jul 31 10:44:58 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: cpufunc_asm_arm11.S,v 1.14 2014/07/31 07:14:03 skrll Exp $ */ +/* $NetBSD: cpufunc_asm_arm11.S,v 1.15 2014/07/31 10:44:58 skrll Exp $ */ /* * Copyright (c) 2002, 2005 ARM Limited @@ -47,9 +47,9 @@ ENTRY(arm11_setttb) #endif cmp r1, #0 - mcr p15, 0, r0, c2, c0, 0 /* TTBR0 set */ + mcr p15, 0, r0, c2, c0, 0 /* set the new TTBR0 */ #ifdef ARM_MMU_EXTENDED - mcreq p15, 0, r0, c2, c0, 1 /* TTBR1 set */ + mcreq p15, 0, r0, c2, c0, 1 /* set the new TTBR1 */ #else mcrne p15, 0, r0, c8, c7, 0 /* invalidate I+D TLBs */ mcrne p15, 0, r0, c7, c10, 4 /* drain write buffer */ @@ -72,9 +72,9 @@ ENTRY(arm11_context_switch) cmp r1, #0 #endif mcr p15, 0, r0, c7, c10, 4 /* drain the write buffer */ - mcr p15, 0, r0, c2, c0, 0 /* TTBR0 set */ + mcr p15, 0, r0, c2, c0, 0 /* set the new TTBR0 */ #ifdef ARM_MMU_EXTENDED - mcreq p15, 0, r0, c2, c0, 1 /* TTBR1 set is asid 0 */ + mcreq p15, 0, r0, c2, c0, 1 /* set the new TTBR1 */ #else mcr p15, 0, r0, c8, c7, 0 /* and flush the I+D tlbs */ #endif
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Fri Aug 1 05:53:31 UTC 2014 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_armv6.S Log Message: Whitespace. To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/arm/cpufunc_asm_armv6.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/cpufunc_asm_armv6.S diff -u src/sys/arch/arm/arm/cpufunc_asm_armv6.S:1.6 src/sys/arch/arm/arm/cpufunc_asm_armv6.S:1.7 --- src/sys/arch/arm/arm/cpufunc_asm_armv6.S:1.6 Sun Aug 18 06:28:18 2013 +++ src/sys/arch/arm/arm/cpufunc_asm_armv6.S Fri Aug 1 05:53:31 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: cpufunc_asm_armv6.S,v 1.6 2013/08/18 06:28:18 matt Exp $ */ +/* $NetBSD: cpufunc_asm_armv6.S,v 1.7 2014/08/01 05:53:31 skrll Exp $ */ /* * Copyright (c) 2002, 2005 ARM Limited @@ -33,7 +33,7 @@ * These routines can be used by any core that supports the mcrr address * range operations. */ - + #include assym.h #include machine/asm.h #include arm/locore.h
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: matt Date: Thu Jul 31 06:26:06 UTC 2014 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_armv7.S Log Message: Remove a leftover _XXX To generate a diff of this commit: cvs rdiff -u -r1.17 -r1.18 src/sys/arch/arm/arm/cpufunc_asm_armv7.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Thu Jul 31 07:14:03 UTC 2014 Modified Files: src/sys/arch/arm/arm: cpufunc_asm_arm11.S Log Message: Trailing whitespace To generate a diff of this commit: cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/arm/cpufunc_asm_arm11.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
