CVS commit: [netbsd-8] src/sys/arch/mips/mips
Module Name:src Committed By: martin Date: Tue Dec 25 11:22:43 UTC 2018 Modified Files: src/sys/arch/mips/mips [netbsd-8]: fp.S Log Message: Pull up following revision(s) (requested by sevan in ticket #1143): sys/arch/mips/mips/fp.S: revision 1.49 Load curlwp into a0 to call fpu_save(curlwp), not fpu_save(garbage). The lwp argument to fpu_save was added by chuq in revision 1.14 of mips_fpu.c, but this call was not updated to pass it. This is the correct lwp to pass because we are in the middle of executing a kernel-emulated fp instruction, so curlwp must own the fpu state, and we are trying to write the fp registers to memory so we can adjust them there when ctc1 would fail. Fixes PR port-cobalt/53090, PR port-sgimips/53791. To generate a diff of this commit: cvs rdiff -u -r1.48 -r1.48.6.1 src/sys/arch/mips/mips/fp.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/mips/fp.S diff -u src/sys/arch/mips/mips/fp.S:1.48 src/sys/arch/mips/mips/fp.S:1.48.6.1 --- src/sys/arch/mips/mips/fp.S:1.48 Mon Feb 27 06:57:45 2017 +++ src/sys/arch/mips/mips/fp.S Tue Dec 25 11:22:43 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: fp.S,v 1.48 2017/02/27 06:57:45 chs Exp $ */ +/* $NetBSD: fp.S,v 1.48.6.1 2018/12/25 11:22:43 martin Exp $ */ /* * Copyright (c) 1992, 1993 @@ -2827,6 +2827,7 @@ fpe_trap: * ctc1 with fpe bits set causes FPE in kernel mode panic on 5231. */ REG_S a2, CALLFRAME_SIZ + 3*SZREG(sp) + move a0, MIPS_CURLWP # get current lwp jal _C_LABEL(fpu_save) # on RM5231 REG_L a2, CALLFRAME_SIZ + 3*SZREG(sp)
CVS commit: [netbsd-8] src/sys/arch/mips/mips
Module Name:src
Committed By: bouyer
Date: Mon Apr 9 13:29:01 UTC 2018
Modified Files:
src/sys/arch/mips/mips [netbsd-8]: cpu_subr.c
Log Message:
Pull up following revision(s) (requested by msaitoh in ticket #722):
sys/arch/mips/mips/cpu_subr.c: revision 1.33
spl leak, found by mootja
To generate a diff of this commit:
cvs rdiff -u -r1.32 -r1.32.2.1 src/sys/arch/mips/mips/cpu_subr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/cpu_subr.c
diff -u src/sys/arch/mips/mips/cpu_subr.c:1.32 src/sys/arch/mips/mips/cpu_subr.c:1.32.2.1
--- src/sys/arch/mips/mips/cpu_subr.c:1.32 Sun May 7 04:14:20 2017
+++ src/sys/arch/mips/mips/cpu_subr.c Mon Apr 9 13:29:01 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu_subr.c,v 1.32 2017/05/07 04:14:20 skrll Exp $ */
+/* $NetBSD: cpu_subr.c,v 1.32.2.1 2018/04/09 13:29:01 bouyer Exp $ */
/*-
* Copyright (c) 2010 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: cpu_subr.c,v 1.32 2017/05/07 04:14:20 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu_subr.c,v 1.32.2.1 2018/04/09 13:29:01 bouyer Exp $");
#include "opt_cputype.h"
#include "opt_ddb.h"
@@ -771,8 +771,10 @@ cpu_pause(struct reg *regsp)
int s = splhigh();
cpuid_t cii = cpu_index(curcpu());
- if (__predict_false(cold))
+ if (__predict_false(cold)) {
+ splx(s);
return;
+ }
do {
kcpuset_atomic_set(cpus_paused, cii);
CVS commit: [netbsd-8] src/sys/arch/mips/mips
Module Name:src
Committed By: martin
Date: Tue Mar 6 09:27:28 UTC 2018
Modified Files:
src/sys/arch/mips/mips [netbsd-8]: cache.c
Log Message:
Pull up following revision(s) (requested by flxd in ticket #601):
sys/arch/mips/mips/cache.c: revision 1.59
Add missing call to mips_dcache_compute_align() affecting "modern" MIPS
(MIPS32{,R2}/MIPS64{,R2}). Thanks jmcneill@; OK skrll@.
To generate a diff of this commit:
cvs rdiff -u -r1.58 -r1.58.2.1 src/sys/arch/mips/mips/cache.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/cache.c
diff -u src/sys/arch/mips/mips/cache.c:1.58 src/sys/arch/mips/mips/cache.c:1.58.2.1
--- src/sys/arch/mips/mips/cache.c:1.58 Sun May 14 09:37:13 2017
+++ src/sys/arch/mips/mips/cache.c Tue Mar 6 09:27:27 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: cache.c,v 1.58 2017/05/14 09:37:13 skrll Exp $ */
+/* $NetBSD: cache.c,v 1.58.2.1 2018/03/06 09:27:27 martin Exp $ */
/*
* Copyright 2001, 2002 Wasabi Systems, Inc.
@@ -68,7 +68,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: cache.c,v 1.58 2017/05/14 09:37:13 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cache.c,v 1.58.2.1 2018/03/06 09:27:27 martin Exp $");
#include "opt_cputype.h"
#include "opt_mips_cache.h"
@@ -1455,5 +1455,7 @@ mips_config_cache_modern(uint32_t cpu_id
mco->mco_intern_pdcache_sync_range_index = no_cache_op_range_index;
mco->mco_intern_pdcache_sync_range = no_cache_op_range;
}
+
+ mips_dcache_compute_align();
}
#endif /* MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2 > 0 */
CVS commit: [netbsd-8] src/sys/arch/mips/mips
Module Name:src
Committed By: snj
Date: Sat Jun 10 06:25:29 UTC 2017
Modified Files:
src/sys/arch/mips/mips [netbsd-8]: locore_mips1.S
Log Message:
Pull up following revision(s) (requested by skrll in ticket #25):
sys/arch/mips/mips/locore_mips1.S: revision 1.92, 1.93
fix tlb_record_asids 2nd arg to match usage - it's a maximum asid value
and not a mask
--
Add a missing ".set at" to make previous build
To generate a diff of this commit:
cvs rdiff -u -r1.91 -r1.91.8.1 src/sys/arch/mips/mips/locore_mips1.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/locore_mips1.S
diff -u src/sys/arch/mips/mips/locore_mips1.S:1.91 src/sys/arch/mips/mips/locore_mips1.S:1.91.8.1
--- src/sys/arch/mips/mips/locore_mips1.S:1.91 Wed Jul 27 09:32:35 2016
+++ src/sys/arch/mips/mips/locore_mips1.S Sat Jun 10 06:25:29 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: locore_mips1.S,v 1.91 2016/07/27 09:32:35 skrll Exp $ */
+/* $NetBSD: locore_mips1.S,v 1.91.8.1 2017/06/10 06:25:29 snj Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -57,7 +57,7 @@
#include
#include
-RCSID("$NetBSD: locore_mips1.S,v 1.91 2016/07/27 09:32:35 skrll Exp $")
+RCSID("$NetBSD: locore_mips1.S,v 1.91.8.1 2017/06/10 06:25:29 snj Exp $")
#include "assym.h"
@@ -1035,6 +1035,7 @@ LEAF_NOPROFILE(MIPSX(kern_tlb_miss))
tlbwr # write random TLB
j k1
rfe
+ .set at
END(MIPSX(kern_tlb_miss))
#if 0
@@ -1368,7 +1369,7 @@ LEAF(MIPSX(tlb_invalidate_all))
END(MIPSX(tlb_invalidate_all))
/*
- * u_int mipsN_tlb_record_asids(u_long *bitmap, uint32_t asid_mask)
+ * u_int mipsN_tlb_record_asids(u_long *bitmap, uint32_t asid_max)
*
* Scan the random part of the TLB looking at non-global entries and
* record each ASID in use into the bitmap. Additionally, return the
@@ -1402,7 +1403,8 @@ LEAF(MIPSX(tlb_record_asids))
nop
and t0, MIPS1_TLB_PID
srl t0, MIPS1_TLB_PID_SHIFT # shift to low bits
- and t0, a1# focus on asid_mask
+ bgt t0, a1, 4f # > ASID max? skip
+ nop
srl a2, t0, 3 + LONG_SCALESHIFT # drop low 5 bits
sll a2, LONG_SCALESHIFT # make an index for the bitmap
CVS commit: [netbsd-8] src/sys/arch/mips/mips
Module Name:src
Committed By: snj
Date: Sat Jun 10 06:18:52 UTC 2017
Modified Files:
src/sys/arch/mips/mips [netbsd-8]: mips_machdep.c pmap_machdep.c
Log Message:
Pull up following revision(s) (requested by skrll in ticket #22):
sys/arch/mips/mips/mips_machdep.c: revision 1.278
sys/arch/mips/mips/pmap_machdep.c: revision 1.21
Always use XKPHYS for pool pages on _LP64; otherwise use KSEG0
--
Maintain the split of physical memory into the defined freelists, but
only force pool pages to VM_FREELIST_FIRST512M for non _LP64
To generate a diff of this commit:
cvs rdiff -u -r1.277 -r1.277.2.1 src/sys/arch/mips/mips/mips_machdep.c
cvs rdiff -u -r1.19.2.1 -r1.19.2.2 src/sys/arch/mips/mips/pmap_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/mips_machdep.c
diff -u src/sys/arch/mips/mips/mips_machdep.c:1.277 src/sys/arch/mips/mips/mips_machdep.c:1.277.2.1
--- src/sys/arch/mips/mips/mips_machdep.c:1.277 Sun May 7 05:45:07 2017
+++ src/sys/arch/mips/mips/mips_machdep.c Sat Jun 10 06:18:52 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: mips_machdep.c,v 1.277 2017/05/07 05:45:07 skrll Exp $ */
+/* $NetBSD: mips_machdep.c,v 1.277.2.1 2017/06/10 06:18:52 snj Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -111,7 +111,7 @@
*/
#include /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.277 2017/05/07 05:45:07 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.277.2.1 2017/06/10 06:18:52 snj Exp $");
#define __INTR_PRIVATE
#include "opt_cputype.h"
@@ -2104,13 +2104,14 @@ mips_page_physload(vaddr_t vkernstart, v
#ifdef VM_FREELIST_FIRST4G
if (round_page(segs[i].start + segs[i].size) > FOURGIG) {
need4g = true;
- mips_poolpage_vmfreelist = VM_FREELIST_FIRST4G;
}
#endif
#ifdef VM_FREELIST_FIRST512M
if (round_page(segs[i].start + segs[i].size) > HALFGIG) {
need512m = true;
+#if !defined(_LP64)
mips_poolpage_vmfreelist = VM_FREELIST_FIRST512M;
+#endif
}
#endif
}
Index: src/sys/arch/mips/mips/pmap_machdep.c
diff -u src/sys/arch/mips/mips/pmap_machdep.c:1.19.2.1 src/sys/arch/mips/mips/pmap_machdep.c:1.19.2.2
--- src/sys/arch/mips/mips/pmap_machdep.c:1.19.2.1 Tue Jun 6 09:25:49 2017
+++ src/sys/arch/mips/mips/pmap_machdep.c Sat Jun 10 06:18:52 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap_machdep.c,v 1.19.2.1 2017/06/06 09:25:49 martin Exp $ */
+/* $NetBSD: pmap_machdep.c,v 1.19.2.2 2017/06/10 06:18:52 snj Exp $ */
/*-
* Copyright (c) 1998, 2001 The NetBSD Foundation, Inc.
@@ -67,7 +67,7 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: pmap_machdep.c,v 1.19.2.1 2017/06/06 09:25:49 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap_machdep.c,v 1.19.2.2 2017/06/10 06:18:52 snj Exp $");
/*
* Manages physical address maps.
@@ -1065,12 +1065,10 @@ vaddr_t
pmap_md_pool_phystov(paddr_t pa)
{
#ifdef _LP64
- if ((pa & ~MIPS_PHYS_MASK) != 0) {
- KASSERT(mips_options.mips3_xkphys_cached);
- return MIPS_PHYS_TO_XKPHYS_CACHED(pa);
- }
+ KASSERT(mips_options.mips3_xkphys_cached);
+ return MIPS_PHYS_TO_XKPHYS_CACHED(pa);
#else
KASSERT((pa & ~MIPS_PHYS_MASK) == 0);
-#endif
return MIPS_PHYS_TO_KSEG0(pa);
+#endif
}
CVS commit: [netbsd-8] src/sys/arch/mips/mips
Module Name:src Committed By: martin Date: Tue Jun 6 09:25:49 UTC 2017 Modified Files: src/sys/arch/mips/mips [netbsd-8]: pmap_machdep.c Log Message: Pull up following revision(s) (requested by skrll in ticket #10): sys/arch/mips/mips/pmap_machdep.c: revision 1.20 Fix the PMAP_NO_PV_UNCACHED pmap_md_vca_add case where the pmap_update call would cause problems for pmap_remove_all case where the deferred activate should not be done... Add a comment about what's going on. To generate a diff of this commit: cvs rdiff -u -r1.19 -r1.19.2.1 src/sys/arch/mips/mips/pmap_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/mips/pmap_machdep.c diff -u src/sys/arch/mips/mips/pmap_machdep.c:1.19 src/sys/arch/mips/mips/pmap_machdep.c:1.19.2.1 --- src/sys/arch/mips/mips/pmap_machdep.c:1.19 Thu May 18 13:20:37 2017 +++ src/sys/arch/mips/mips/pmap_machdep.c Tue Jun 6 09:25:49 2017 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap_machdep.c,v 1.19 2017/05/18 13:20:37 skrll Exp $ */ +/* $NetBSD: pmap_machdep.c,v 1.19.2.1 2017/06/06 09:25:49 martin Exp $ */ /*- * Copyright (c) 1998, 2001 The NetBSD Foundation, Inc. @@ -67,7 +67,7 @@ #include -__KERNEL_RCSID(0, "$NetBSD: pmap_machdep.c,v 1.19 2017/05/18 13:20:37 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: pmap_machdep.c,v 1.19.2.1 2017/06/06 09:25:49 martin Exp $"); /* * Manages physical address maps. @@ -954,7 +954,14 @@ pmap_md_vca_add(struct vm_page *pg, vadd pmap_t npm = npv->pv_pmap; VM_PAGEMD_PVLIST_UNLOCK(mdpg); pmap_remove(npm, nva, nva + PAGE_SIZE); - pmap_update(npm); + + /* + * pmap_update is not required here as we're the pmap + * and we know that the invalidation happened or the + * asid has been released (and activation is deferred) + * + * A deferred activation should NOT occur here. + */ (void)VM_PAGEMD_PVLIST_LOCK(mdpg); npv = pv;
