CVS commit: src/sys/arch/amd64/amd64

2021-05-23 Thread Taylor R Campbell
Module Name:src
Committed By:   riastradh
Date:   Sun May 23 08:59:08 UTC 2021

Modified Files:
src/sys/arch/amd64/amd64: db_disasm.c

Log Message:
ddb/amd64: Don't go out of the way to detect invalid addresses.

db_disasm had logic to detect invalid addresses before trying to
disassemble them.  But when disassembling a null instruction address,
the logic to detect invalid addresses itself tried to dereference an
invalid address.

db_get_value can already handle this situation gracefully, so there is
no need for this faulty fault-avoidance logic.

Fixes double-fault in ddb on calling null function pointers.  With
any luck, this should make diagnosing such bugs easier in the future!


To generate a diff of this commit:
cvs rdiff -u -r1.27 -r1.28 src/sys/arch/amd64/amd64/db_disasm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/db_disasm.c
diff -u src/sys/arch/amd64/amd64/db_disasm.c:1.27 src/sys/arch/amd64/amd64/db_disasm.c:1.28
--- src/sys/arch/amd64/amd64/db_disasm.c:1.27	Sat Mar  9 08:42:25 2019
+++ src/sys/arch/amd64/amd64/db_disasm.c	Sun May 23 08:59:08 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: db_disasm.c,v 1.27 2019/03/09 08:42:25 maxv Exp $	*/
+/*	$NetBSD: db_disasm.c,v 1.28 2021/05/23 08:59:08 riastradh Exp $	*/
 
 /* 
  * Mach Operating System
@@ -33,7 +33,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: db_disasm.c,v 1.27 2019/03/09 08:42:25 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_disasm.c,v 1.28 2021/05/23 08:59:08 riastradh Exp $");
 
 #ifndef _KERNEL
 #include 
@@ -1191,33 +1191,8 @@ db_disasm(db_addr_t loc, bool altfmt)
 	uint64_t imm64;
 	int	len;
 	struct i_addr	address;
-#ifdef _KERNEL
-	pt_entry_t *pte, *pde;
-#endif
 	u_int	rex = 0;
 
-#ifdef _KERNEL
-	/*
-	 * Don't try to disassemble the location if the mapping is invalid.
-	 * If we do, we'll fault, and end up debugging the debugger!
-	 * in the case of largepages, "pte" is really the pde and "pde" is
-	 * really the entry for the pdp itself.
-	 */
-	if ((vaddr_t)loc >= VM_MIN_KERNEL_ADDRESS)
-		pte = kvtopte((vaddr_t)loc);
-	else
-		pte = vtopte((vaddr_t)loc);
-	if ((vaddr_t)pte >= VM_MIN_KERNEL_ADDRESS)
-		pde = kvtopte((vaddr_t)pte);
-	else
-		pde = vtopte((vaddr_t)pte);
-
-	if ((*pde & PTE_P) == 0 || (*pte & PTE_P) == 0) {
-		db_printf("invalid address\n");
-		return (loc);
-	}
-#endif
-
 	get_value_inc(inst, loc, 1, false);
 	short_addr = false;
 	size = LONG;



CVS commit: src/sys/arch/amd64/amd64

2021-01-24 Thread Simon Burge
Module Name:src
Committed By:   simonb
Date:   Sun Jan 24 14:17:11 UTC 2021

Modified Files:
src/sys/arch/amd64/amd64: machdep.c

Log Message:
Fix a tyop in a comment.


To generate a diff of this commit:
cvs rdiff -u -r1.357 -r1.358 src/sys/arch/amd64/amd64/machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/machdep.c
diff -u src/sys/arch/amd64/amd64/machdep.c:1.357 src/sys/arch/amd64/amd64/machdep.c:1.358
--- src/sys/arch/amd64/amd64/machdep.c:1.357	Mon Sep  7 00:47:27 2020
+++ src/sys/arch/amd64/amd64/machdep.c	Sun Jan 24 14:17:10 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: machdep.c,v 1.357 2020/09/07 00:47:27 mrg Exp $	*/
+/*	$NetBSD: machdep.c,v 1.358 2021/01/24 14:17:10 simonb Exp $	*/
 
 /*
  * Copyright (c) 1996, 1997, 1998, 2000, 2006, 2007, 2008, 2011
@@ -110,7 +110,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.357 2020/09/07 00:47:27 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.358 2021/01/24 14:17:10 simonb Exp $");
 
 #include "opt_modular.h"
 #include "opt_user_ldt.h"
@@ -344,7 +344,7 @@ cpu_startup(void)
 	consinit();
 
 	/*
-	 * Initialize error message buffer (et end of core).
+	 * Initialize error message buffer (at end of core).
 	 */
 	if (msgbuf_p_cnt == 0)
 		panic("msgbuf paddr map has not been set up");



CVS commit: src/sys/arch/amd64/amd64

2020-11-20 Thread Jason R Thorpe
Module Name:src
Committed By:   thorpej
Date:   Fri Nov 20 17:44:56 UTC 2020

Modified Files:
src/sys/arch/amd64/amd64: netbsd32_machdep.c

Log Message:
malloc(9) -> kmem(9)


To generate a diff of this commit:
cvs rdiff -u -r1.136 -r1.137 src/sys/arch/amd64/amd64/netbsd32_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/netbsd32_machdep.c
diff -u src/sys/arch/amd64/amd64/netbsd32_machdep.c:1.136 src/sys/arch/amd64/amd64/netbsd32_machdep.c:1.137
--- src/sys/arch/amd64/amd64/netbsd32_machdep.c:1.136	Sat Apr 25 15:26:16 2020
+++ src/sys/arch/amd64/amd64/netbsd32_machdep.c	Fri Nov 20 17:44:56 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: netbsd32_machdep.c,v 1.136 2020/04/25 15:26:16 bouyer Exp $	*/
+/*	$NetBSD: netbsd32_machdep.c,v 1.137 2020/11/20 17:44:56 thorpej Exp $	*/
 
 /*
  * Copyright (c) 2001 Wasabi Systems, Inc.
@@ -36,7 +36,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: netbsd32_machdep.c,v 1.136 2020/04/25 15:26:16 bouyer Exp $");
+__KERNEL_RCSID(0, "$NetBSD: netbsd32_machdep.c,v 1.137 2020/11/20 17:44:56 thorpej Exp $");
 
 #ifdef _KERNEL_OPT
 #include "opt_compat_netbsd.h"
@@ -50,7 +50,7 @@ __KERNEL_RCSID(0, "$NetBSD: netbsd32_mac
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
@@ -632,14 +632,16 @@ x86_64_set_ldt32(struct lwp *l, void *ar
 	if (ua.num < 0 || ua.num > MAX_USERLDT_SLOTS)
 		return EINVAL;
 
-	descv = malloc(sizeof(*descv) * ua.num, M_TEMP, M_WAITOK);
+	const size_t alloc_size = sizeof(*descv) * ua.num;
+
+	descv = kmem_alloc(alloc_size, KM_SLEEP);
 	error = copyin((void *)(uintptr_t)ua32.desc, descv,
 	sizeof(*descv) * ua.num);
 	if (error == 0)
 		error = x86_set_ldt1(l, , descv);
 	*retval = ua.start;
 
-	free(descv, M_TEMP);
+	kmem_free(descv, alloc_size);
 	return error;
 }
 
@@ -660,14 +662,16 @@ x86_64_get_ldt32(struct lwp *l, void *ar
 	if (ua.num < 0 || ua.num > MAX_USERLDT_SLOTS)
 		return EINVAL;
 
-	cp = malloc(ua.num * sizeof(union descriptor), M_TEMP, M_WAITOK);
+	const size_t alloc_size = ua.num * sizeof(union descriptor);
+
+	cp = kmem_alloc(alloc_size, KM_SLEEP);
 	error = x86_get_ldt1(l, , cp);
 	*retval = ua.num;
 	if (error == 0)
 		error = copyout(cp, (void *)(uintptr_t)ua32.desc,
 		ua.num * sizeof(*cp));
 
-	free(cp, M_TEMP);
+	kmem_free(cp, alloc_size);
 	return error;
 }
 #endif



CVS commit: src/sys/arch/amd64/amd64

2020-09-06 Thread matthew green
Module Name:src
Committed By:   mrg
Date:   Mon Sep  7 00:47:27 UTC 2020

Modified Files:
src/sys/arch/amd64/amd64: machdep.c

Log Message:
adjust some fallback code to be slightly less ugly and avoid
upsetting GCC 9.


To generate a diff of this commit:
cvs rdiff -u -r1.356 -r1.357 src/sys/arch/amd64/amd64/machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/machdep.c
diff -u src/sys/arch/amd64/amd64/machdep.c:1.356 src/sys/arch/amd64/amd64/machdep.c:1.357
--- src/sys/arch/amd64/amd64/machdep.c:1.356	Tue Jul 14 00:45:52 2020
+++ src/sys/arch/amd64/amd64/machdep.c	Mon Sep  7 00:47:27 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: machdep.c,v 1.356 2020/07/14 00:45:52 yamaguchi Exp $	*/
+/*	$NetBSD: machdep.c,v 1.357 2020/09/07 00:47:27 mrg Exp $	*/
 
 /*
  * Copyright (c) 1996, 1997, 1998, 2000, 2006, 2007, 2008, 2011
@@ -110,7 +110,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.356 2020/07/14 00:45:52 yamaguchi Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.357 2020/09/07 00:47:27 mrg Exp $");
 
 #include "opt_modular.h"
 #include "opt_user_ldt.h"
@@ -1518,9 +1518,12 @@ init_x86_64_ksyms(void)
 		tesym = (vaddr_t)symtab->esym + KERNBASE;
 #endif
 		ksyms_addsyms_elf(symtab->nsym, (void *)tssym, (void *)tesym);
-	} else
-		ksyms_addsyms_elf(*(long *)(void *),
-		((long *)(void *)) + 1, esym);
+	} else {
+		uintptr_t endp = (uintptr_t)(void *)
+
+		ksyms_addsyms_elf(*(long *)endp,
+		((long *)endp) + 1, esym);
+	}
 #endif
 }
 #endif /* XENPV */



CVS commit: src/sys/arch/amd64/amd64

2020-08-29 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Aug 29 07:16:04 UTC 2020

Modified Files:
src/sys/arch/amd64/amd64: spl.S

Log Message:
'doreti_checkast' isn't global anymore, localify.


To generate a diff of this commit:
cvs rdiff -u -r1.46 -r1.47 src/sys/arch/amd64/amd64/spl.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/spl.S
diff -u src/sys/arch/amd64/amd64/spl.S:1.46 src/sys/arch/amd64/amd64/spl.S:1.47
--- src/sys/arch/amd64/amd64/spl.S:1.46	Sun May 17 12:11:11 2020
+++ src/sys/arch/amd64/amd64/spl.S	Sat Aug 29 07:16:03 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: spl.S,v 1.46 2020/05/17 12:11:11 ad Exp $	*/
+/*	$NetBSD: spl.S,v 1.47 2020/08/29 07:16:03 maxv Exp $	*/
 
 /*
  * Copyright (c) 2003 Wasabi Systems, Inc.
@@ -331,9 +331,7 @@ IDTVEC(doreti)
 5:
 	testb	$SEL_RPL,TF_CS(%rsp)
 	jz	6f
-
-	.type	_C_LABEL(doreti_checkast), @function
-LABEL(doreti_checkast)
+.Ldoreti_checkast:
 	movq	CPUVAR(CURLWP),%r14
 	CHECK_ASTPENDING(%r14)
 	je	3f
@@ -345,7 +343,7 @@ LABEL(doreti_checkast)
 	KMSAN_INIT_ARG(8)
 	call	_C_LABEL(trap)
 	CLI(si)
-	jmp	doreti_checkast
+	jmp	.Ldoreti_checkast
 3:
 	CHECK_DEFERRED_SWITCH
 	jnz	9f
@@ -356,6 +354,5 @@ LABEL(doreti_checkast)
 	STI(si)
 	call	_C_LABEL(do_pmap_load)
 	CLI(si)
-	jmp	doreti_checkast		/* recheck ASTs */
-END(doreti_checkast)
+	jmp	.Ldoreti_checkast		/* recheck ASTs */
 IDTVEC_END(doreti)



CVS commit: src/sys/arch/amd64/amd64

2020-06-21 Thread Manuel Bouyer
Module Name:src
Committed By:   bouyer
Date:   Sun Jun 21 16:57:18 UTC 2020

Modified Files:
src/sys/arch/amd64/amd64: amd64_trap.S locore.S

Log Message:
On amd64, Xen PV calls syscalls and traps with events enabled.
Disable events on entry to be safe.
It should have been mostly safe for most cases, but for FPU traps
we need to reload the FPU state if we got interrupted at trap entry.

Hopefully fixes:
panic: kernel diagnostic assertion "curlwp->l_md.md_flags & MDL_FPU_IN_CPU" 
failed: file "/home/source/ab/HEAD/src/sys/arch/x86/x86/fpu.c", line 524

when running tests.


To generate a diff of this commit:
cvs rdiff -u -r1.51 -r1.52 src/sys/arch/amd64/amd64/amd64_trap.S
cvs rdiff -u -r1.209 -r1.210 src/sys/arch/amd64/amd64/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/amd64_trap.S
diff -u src/sys/arch/amd64/amd64/amd64_trap.S:1.51 src/sys/arch/amd64/amd64/amd64_trap.S:1.52
--- src/sys/arch/amd64/amd64/amd64_trap.S:1.51	Sat Dec  7 10:19:35 2019
+++ src/sys/arch/amd64/amd64/amd64_trap.S	Sun Jun 21 16:57:18 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: amd64_trap.S,v 1.51 2019/12/07 10:19:35 maxv Exp $	*/
+/*	$NetBSD: amd64_trap.S,v 1.52 2020/06/21 16:57:18 bouyer Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008, 2017 The NetBSD Foundation, Inc.
@@ -90,7 +90,7 @@
  */
 
 #ifdef	XENPV
-#define	PRE_TRAP	movq (%rsp),%rcx ; movq 8(%rsp),%r11 ; addq $0x10,%rsp
+#define	PRE_TRAP	CLI(cx); movq (%rsp),%rcx ; movq 8(%rsp),%r11 ; addq $0x10,%rsp
 #else
 #define	PRE_TRAP
 #endif
@@ -231,9 +231,9 @@ IDTVEC(trap01)
 	movw	%ds,TF_DS(%rsp)
 
 	jmp	.Lalltraps_noentry
-#else
+#else /* !XENPV */
 	ZTRAP(T_TRCTRAP)
-#endif
+#endif /* !XENPV */
 IDTVEC_END(trap01)
 
 /*
@@ -250,7 +250,7 @@ IDTVEC_END(trap01)
 IDTVEC(trap02)
 #if defined(XENPV)
 	ZTRAP(T_NMI)
-#else
+#else /* XENPV */
 	ZTRAP_NJ(T_NMI)
 	subq	$TF_REGSIZE,%rsp
 	INTR_SAVE_GPRS
@@ -299,7 +299,7 @@ IDTVEC(trap02)
 	INTR_RESTORE_GPRS
 	addq	$TF_REGSIZE+16,%rsp
 	iretq
-#endif
+#endif /* XENPV */
 IDTVEC_END(trap02)
 
 IDTVEC(trap03)
@@ -361,7 +361,7 @@ IDTVEC_END(trap07)
 IDTVEC(trap08)
 #if defined(XENPV)
 	TRAP(T_DOUBLEFLT)
-#else
+#else /* XENPV */
 	TRAP_NJ(T_DOUBLEFLT)
 	subq	$TF_REGSIZE,%rsp
 	INTR_SAVE_GPRS
@@ -396,7 +396,7 @@ IDTVEC(trap08)
 	INTR_RESTORE_GPRS
 	addq	$TF_REGSIZE+16,%rsp
 	iretq
-#endif
+#endif /* XENPV */
 IDTVEC_END(trap08)
 
 IDTVEC(trap09)
@@ -414,7 +414,7 @@ IDTVEC_END(trap10)
  * in order to copy the user segment registers into the fault frame.
  */
 #define kernuser_reenter alltraps
-#endif
+#endif /* XENPV */
 
 IDTVEC(trap11)		/* #NP() Segment not present */
 	TRAP_NJ(T_SEGNPFLT)
@@ -448,6 +448,14 @@ IDTVEC(trap16)
 	ZTRAP_NJ(T_ARITHTRAP)
 .Ldo_fputrap:
 	INTRENTRY
+#ifdef XENPV
+	/* traps are called with interrupts enabled, and we may have been
+	 * interrupted just before the CLI in the trap macro.
+	 * we have to check if a FPU reload is needed.
+	 */ 
+	movqCPUVAR(CURLWP),%r14
+	HANDLE_DEFERRED_FPU
+#endif /* XENPV */
 #ifdef DIAGNOSTIC
 	movl	CPUVAR(ILEVEL),%ebx
 #endif

Index: src/sys/arch/amd64/amd64/locore.S
diff -u src/sys/arch/amd64/amd64/locore.S:1.209 src/sys/arch/amd64/amd64/locore.S:1.210
--- src/sys/arch/amd64/amd64/locore.S:1.209	Wed May 27 19:33:40 2020
+++ src/sys/arch/amd64/amd64/locore.S	Sun Jun 21 16:57:18 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.S,v 1.209 2020/05/27 19:33:40 ad Exp $	*/
+/*	$NetBSD: locore.S,v 1.210 2020/06/21 16:57:18 bouyer Exp $	*/
 
 /*
  * Copyright-o-rama!
@@ -1481,7 +1481,13 @@ IDTVEC(\name)
 	movq	$2,TF_ERR(%rsp)		/* syscall instruction size */
 	movq	$T_ASTFLT,TF_TRAPNO(%rsp)
 #else
-	/* Xen already switched to kernel stack */
+	/*
+	 * Xen already switched to kernel stack.
+	 * But it didn't disable events
+	 */
+	pushq	%rsi
+	CLI(si)
+	popq	%rsi
 	addq	$0x10,%rsp	/* gap to match cs:rip */
 	pushq	$2		/* error code */
 	pushq	$T_ASTFLT
@@ -1524,6 +1530,9 @@ IDTVEC_END(syscall32)
 	TEXT_USER_BEGIN
 IDTVEC(osyscall)
 #ifdef XENPV
+	pushq	%rsi
+	CLI(si)
+	popq	%rsi
 	movq (%rsp),%rcx
 	movq 8(%rsp),%r11
 	addq $0x10,%rsp



CVS commit: src/sys/arch/amd64/amd64

2020-06-06 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Jun  6 07:03:21 UTC 2020

Modified Files:
src/sys/arch/amd64/amd64: db_machdep.c

Log Message:
If the frame is not aligned, leave right away. This place probably needs
to be revisited, because %rbp could easily contain garbage.

Reported-by: syzbot+ecb40cf7f8acc102c...@syzkaller.appspotmail.com


To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/amd64/amd64/db_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/db_machdep.c
diff -u src/sys/arch/amd64/amd64/db_machdep.c:1.7 src/sys/arch/amd64/amd64/db_machdep.c:1.8
--- src/sys/arch/amd64/amd64/db_machdep.c:1.7	Thu May 14 16:57:53 2020
+++ src/sys/arch/amd64/amd64/db_machdep.c	Sat Jun  6 07:03:21 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: db_machdep.c,v 1.7 2020/05/14 16:57:53 maxv Exp $	*/
+/*	$NetBSD: db_machdep.c,v 1.8 2020/06/06 07:03:21 maxv Exp $	*/
 
 /*
  * Mach Operating System
@@ -26,7 +26,7 @@
  * rights to redistribute these changes.
  */
 #include 
-__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.7 2020/05/14 16:57:53 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.8 2020/06/06 07:03:21 maxv Exp $");
 
 #include 
 #include 
@@ -151,6 +151,8 @@ db_nextframe(long **nextframe, long **re
 			db_get_value((long)>tf_rbp, 8, false);
 		if (fp == NULL)
 			return 0;
+		if (((uintptr_t)fp & 7) != 0)
+			return 0;
 		*nextframe = (long *)>f_frame;
 		*retaddr = (long *)>f_retaddr;
 		*arg0 = (long *)>f_arg0;



CVS commit: src/sys/arch/amd64/amd64

2020-05-27 Thread Andrew Doran
Module Name:src
Committed By:   ad
Date:   Wed May 27 20:48:43 UTC 2020

Modified Files:
src/sys/arch/amd64/amd64: cpufunc.S

Log Message:
- mismatched END pointed out by maxv@
- ditch the frame, tracer should be able to deal without it in leaf on x86_64


To generate a diff of this commit:
cvs rdiff -u -r1.57 -r1.58 src/sys/arch/amd64/amd64/cpufunc.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/cpufunc.S
diff -u src/sys/arch/amd64/amd64/cpufunc.S:1.57 src/sys/arch/amd64/amd64/cpufunc.S:1.58
--- src/sys/arch/amd64/amd64/cpufunc.S:1.57	Wed May 27 19:33:40 2020
+++ src/sys/arch/amd64/amd64/cpufunc.S	Wed May 27 20:48:42 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: cpufunc.S,v 1.57 2020/05/27 19:33:40 ad Exp $	*/
+/*	$NetBSD: cpufunc.S,v 1.58 2020/05/27 20:48:42 ad Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008, 2020 The NetBSD Foundation, Inc.
@@ -422,22 +422,16 @@ ENTRY(outl)
 END(outl)
 
 ENTRY(x86_stos)
-	pushq	%rbp
-	movq	%rsp,%rbp
 	movq	%rsi,%rax
 	movq	%rdx,%rcx
 	rep
 	stosq
-	leave
 	ret
 END(x86_stos)
 
 ENTRY(x86_movs)
-	pushq	%rbp
-	movq	%rsp,%rbp
 	movq	%rdx,%rcx
 	rep
 	movsq
-	leave
 	ret
-END(x86_stos)
+END(x86_movs)



CVS commit: src/sys/arch/amd64/amd64

2020-05-20 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Wed May 20 18:52:48 UTC 2020

Modified Files:
src/sys/arch/amd64/amd64: cpufunc.S

Log Message:
this is kmsan


To generate a diff of this commit:
cvs rdiff -u -r1.55 -r1.56 src/sys/arch/amd64/amd64/cpufunc.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/cpufunc.S
diff -u src/sys/arch/amd64/amd64/cpufunc.S:1.55 src/sys/arch/amd64/amd64/cpufunc.S:1.56
--- src/sys/arch/amd64/amd64/cpufunc.S:1.55	Wed May 20 18:39:25 2020
+++ src/sys/arch/amd64/amd64/cpufunc.S	Wed May 20 18:52:48 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: cpufunc.S,v 1.55 2020/05/20 18:39:25 ad Exp $	*/
+/*	$NetBSD: cpufunc.S,v 1.56 2020/05/20 18:52:48 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008, 2020 The NetBSD Foundation, Inc.
@@ -206,7 +206,8 @@ ENTRY(x86_hotpatch)
 END(x86_hotpatch)
 #endif /* !XENPV */
 
-/* Could be exact same as cpu_counter but for KASAN fussiness. */
+/* Could be exact same as cpu_counter, but KMSAN needs to have the correct
+ * size of the return value. */
 ENTRY(cpu_counter32)
 	movq	CPUVAR(CURLWP), %rcx
 1:



CVS commit: src/sys/arch/amd64/amd64

2020-05-20 Thread Andrew Doran
Module Name:src
Committed By:   ad
Date:   Wed May 20 18:39:25 UTC 2020

Modified Files:
src/sys/arch/amd64/amd64: cpufunc.S

Log Message:
Deal with KMSAN fussiness.  Pointed out by msaitoh@.


To generate a diff of this commit:
cvs rdiff -u -r1.54 -r1.55 src/sys/arch/amd64/amd64/cpufunc.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/cpufunc.S
diff -u src/sys/arch/amd64/amd64/cpufunc.S:1.54 src/sys/arch/amd64/amd64/cpufunc.S:1.55
--- src/sys/arch/amd64/amd64/cpufunc.S:1.54	Tue May 19 21:54:10 2020
+++ src/sys/arch/amd64/amd64/cpufunc.S	Wed May 20 18:39:25 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: cpufunc.S,v 1.54 2020/05/19 21:54:10 ad Exp $	*/
+/*	$NetBSD: cpufunc.S,v 1.55 2020/05/20 18:39:25 ad Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008, 2020 The NetBSD Foundation, Inc.
@@ -206,7 +206,23 @@ ENTRY(x86_hotpatch)
 END(x86_hotpatch)
 #endif /* !XENPV */
 
-ENTRY(tsc_get_timecount)
+/* Could be exact same as cpu_counter but for KASAN fussiness. */
+ENTRY(cpu_counter32)
+	movq	CPUVAR(CURLWP), %rcx
+1:
+	movq	L_NCSW(%rcx), %rdi
+	rdtsc
+	addl	CPUVAR(CC_SKEW), %eax
+	cmpq	%rdi, L_NCSW(%rcx)
+	jne	2f
+	KMSAN_INIT_RET(4)
+	ret
+2:
+	jmp	1b
+END(cpu_counter32)
+STRONG_ALIAS(tsc_get_timecount, cpu_counter32)
+
+ENTRY(cpu_counter)
 	movq	CPUVAR(CURLWP), %rcx
 1:
 	movq	L_NCSW(%rcx), %rdi
@@ -216,14 +232,11 @@ ENTRY(tsc_get_timecount)
 	addq	CPUVAR(CC_SKEW), %rax
 	cmpq	%rdi, L_NCSW(%rcx)
 	jne	2f
-	KMSAN_INIT_RET(4)
+	KMSAN_INIT_RET(8)
 	ret
 2:
 	jmp	1b
-END(tsc_get_timecount)
-
-STRONG_ALIAS(cpu_counter, tsc_get_timecount)
-STRONG_ALIAS(cpu_counter32, tsc_get_timecount)
+END(cpu_counter)
 
 ENTRY(rdmsr_safe)
 	movq	CPUVAR(CURLWP), %r8



CVS commit: src/sys/arch/amd64/amd64

2020-05-19 Thread Andrew Doran
Module Name:src
Committed By:   ad
Date:   Tue May 19 21:54:10 UTC 2020

Modified Files:
src/sys/arch/amd64/amd64: cpufunc.S

Log Message:
xen needs the TSC funcs too


To generate a diff of this commit:
cvs rdiff -u -r1.53 -r1.54 src/sys/arch/amd64/amd64/cpufunc.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/cpufunc.S
diff -u src/sys/arch/amd64/amd64/cpufunc.S:1.53 src/sys/arch/amd64/amd64/cpufunc.S:1.54
--- src/sys/arch/amd64/amd64/cpufunc.S:1.53	Tue May 19 21:40:55 2020
+++ src/sys/arch/amd64/amd64/cpufunc.S	Tue May 19 21:54:10 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: cpufunc.S,v 1.53 2020/05/19 21:40:55 ad Exp $	*/
+/*	$NetBSD: cpufunc.S,v 1.54 2020/05/19 21:54:10 ad Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008, 2020 The NetBSD Foundation, Inc.
@@ -167,25 +167,6 @@ END(x86_write_flags)
 
 STRONG_ALIAS(x86_write_psl,x86_write_flags)
 
-ENTRY(tsc_get_timecount)
-	movq	CPUVAR(CURLWP), %rcx
-1:
-	movq	L_NCSW(%rcx), %rdi
-	rdtsc
-	shlq	$32, %rdx
-	orq	%rdx, %rax
-	addq	CPUVAR(CC_SKEW), %rax
-	cmpq	%rdi, L_NCSW(%rcx)
-	jne	2f
-	KMSAN_INIT_RET(4)
-	ret
-2:
-	jmp	1b
-END(tsc_get_timecount)
-
-STRONG_ALIAS(cpu_counter, tsc_get_timecount)
-STRONG_ALIAS(cpu_counter32, tsc_get_timecount)
-
 /*
  * %rdi = name
  * %rsi = sel
@@ -225,6 +206,25 @@ ENTRY(x86_hotpatch)
 END(x86_hotpatch)
 #endif /* !XENPV */
 
+ENTRY(tsc_get_timecount)
+	movq	CPUVAR(CURLWP), %rcx
+1:
+	movq	L_NCSW(%rcx), %rdi
+	rdtsc
+	shlq	$32, %rdx
+	orq	%rdx, %rax
+	addq	CPUVAR(CC_SKEW), %rax
+	cmpq	%rdi, L_NCSW(%rcx)
+	jne	2f
+	KMSAN_INIT_RET(4)
+	ret
+2:
+	jmp	1b
+END(tsc_get_timecount)
+
+STRONG_ALIAS(cpu_counter, tsc_get_timecount)
+STRONG_ALIAS(cpu_counter32, tsc_get_timecount)
+
 ENTRY(rdmsr_safe)
 	movq	CPUVAR(CURLWP), %r8
 	movq	L_PCB(%r8), %r8



CVS commit: src/sys/arch/amd64/amd64

2020-05-17 Thread Andrew Doran
Module Name:src
Committed By:   ad
Date:   Sun May 17 12:11:11 UTC 2020

Modified Files:
src/sys/arch/amd64/amd64: spl.S

Log Message:
comments


To generate a diff of this commit:
cvs rdiff -u -r1.45 -r1.46 src/sys/arch/amd64/amd64/spl.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/spl.S
diff -u src/sys/arch/amd64/amd64/spl.S:1.45 src/sys/arch/amd64/amd64/spl.S:1.46
--- src/sys/arch/amd64/amd64/spl.S:1.45	Sat May  2 11:12:49 2020
+++ src/sys/arch/amd64/amd64/spl.S	Sun May 17 12:11:11 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: spl.S,v 1.45 2020/05/02 11:12:49 maxv Exp $	*/
+/*	$NetBSD: spl.S,v 1.46 2020/05/17 12:11:11 ad Exp $	*/
 
 /*
  * Copyright (c) 2003 Wasabi Systems, Inc.
@@ -157,7 +157,12 @@ IDTVEC(softintr)
 	movq	L_PCB(%r15),%rcx
 	movq	PCB_RSP(%rcx),%rsp
 
-	xchgq	%r15,CPUVAR(CURLWP)	/* must be globally visible */
+	/*
+	 * for non-interlocked mutex release to work safely the change
+	 * to ci_curlwp must not languish in the store buffer. therefore
+	 * we use XCHG and not MOV here.  see kern_mutex.c.
+	 */
+	xchgq	%r15,CPUVAR(CURLWP)	/* restore curlwp */
 	popq	%r15			/* unwind switchframe */
 	addq	$(5 * 8),%rsp
 	jmp	*%r13			/* back to Xspllower/Xdoreti */



CVS commit: src/sys/arch/amd64/amd64

2020-05-14 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Thu May 14 16:57:53 UTC 2020

Modified Files:
src/sys/arch/amd64/amd64: db_machdep.c

Log Message:
Don't even try to go past a syscall. Fixes severe panic recursions in
KUBSAN.


To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/amd64/amd64/db_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/db_machdep.c
diff -u src/sys/arch/amd64/amd64/db_machdep.c:1.6 src/sys/arch/amd64/amd64/db_machdep.c:1.7
--- src/sys/arch/amd64/amd64/db_machdep.c:1.6	Fri Mar 16 08:48:34 2018
+++ src/sys/arch/amd64/amd64/db_machdep.c	Thu May 14 16:57:53 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: db_machdep.c,v 1.6 2018/03/16 08:48:34 maxv Exp $	*/
+/*	$NetBSD: db_machdep.c,v 1.7 2020/05/14 16:57:53 maxv Exp $	*/
 
 /*
  * Mach Operating System
@@ -26,7 +26,7 @@
  * rights to redistribute these changes.
  */
 #include 
-__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.6 2018/03/16 08:48:34 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.7 2020/05/14 16:57:53 maxv Exp $");
 
 #include 
 #include 
@@ -125,22 +125,23 @@ db_nextframe(long **nextframe, long **re
 		*arg0 = (long *)>f_arg0;
 		break;
 
-	case TRAP:
 	case SYSCALL:
+		tf = (struct trapframe *)argp;
+		(*pr)("--- syscall (number %"DDB_EXPR_FMT"u) ---\n",
+		db_get_value((long)>tf_rax, 8, false));
+		return 0;
+
+	case TRAP:
 	case INTERRUPT:
 	default:
 
-		/* The only argument to trap() or syscall() is the trapframe. */
+		/* The only argument to trap() is the trapframe. */
 		tf = (struct trapframe *)argp;
 		switch (is_trap) {
 		case TRAP:
 			(*pr)("--- trap (number %"DDB_EXPR_FMT"u) ---\n",
 db_get_value((long)>tf_trapno, 8, false));
 			break;
-		case SYSCALL:
-			(*pr)("--- syscall (number %"DDB_EXPR_FMT"u) ---\n",
-db_get_value((long)>tf_rax, 8, false));
-			break;
 		case INTERRUPT:
 			(*pr)("--- interrupt ---\n");
 			break;



CVS commit: src/sys/arch/amd64/amd64

2020-05-08 Thread Andrew Doran
Module Name:src
Committed By:   ad
Date:   Fri May  8 21:58:03 UTC 2020

Modified Files:
src/sys/arch/amd64/amd64: cpufunc.S

Log Message:
cpu_counter: only need to clear %eax (zero extends).


To generate a diff of this commit:
cvs rdiff -u -r1.51 -r1.52 src/sys/arch/amd64/amd64/cpufunc.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/cpufunc.S
diff -u src/sys/arch/amd64/amd64/cpufunc.S:1.51 src/sys/arch/amd64/amd64/cpufunc.S:1.52
--- src/sys/arch/amd64/amd64/cpufunc.S:1.51	Sat May  2 17:14:01 2020
+++ src/sys/arch/amd64/amd64/cpufunc.S	Fri May  8 21:58:03 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: cpufunc.S,v 1.51 2020/05/02 17:14:01 bouyer Exp $	*/
+/*	$NetBSD: cpufunc.S,v 1.52 2020/05/08 21:58:03 ad Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008 The NetBSD Foundation, Inc.
@@ -253,7 +253,7 @@ ENTRY(msr_onfault)
 END(msr_onfault)
 
 ENTRY(cpu_counter)
-	xorq	%rax, %rax
+	xorl	%eax, %eax
 	rdtsc
 	shlq	$32, %rdx
 	orq	%rdx, %rax



CVS commit: src/sys/arch/amd64/amd64

2020-05-05 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Tue May  5 06:32:43 UTC 2020

Modified Files:
src/sys/arch/amd64/amd64: locore.S

Log Message:
Fix KASAN, init_xen_early must be called after kasan_early_init.


To generate a diff of this commit:
cvs rdiff -u -r1.207 -r1.208 src/sys/arch/amd64/amd64/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/locore.S
diff -u src/sys/arch/amd64/amd64/locore.S:1.207 src/sys/arch/amd64/amd64/locore.S:1.208
--- src/sys/arch/amd64/amd64/locore.S:1.207	Sat May  2 19:01:08 2020
+++ src/sys/arch/amd64/amd64/locore.S	Tue May  5 06:32:43 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.S,v 1.207 2020/05/02 19:01:08 christos Exp $	*/
+/*	$NetBSD: locore.S,v 1.208 2020/05/05 06:32:43 maxv Exp $	*/
 
 /*
  * Copyright-o-rama!
@@ -991,14 +991,15 @@ longmode_hi:
 #endif	/* XENPV */
 
 	pushq	%rdi
-#if defined(XEN) && !defined(XENPV)
-	call	_C_LABEL(init_xen_early)
-#endif
 	call	_C_LABEL(init_bootspace)
 #ifdef KASAN
 	movq	_C_LABEL(lwp0uarea)(%rip),%rdi
 	call	_C_LABEL(kasan_early_init)
 #endif
+	/* <-- DO NOT INSERT C CALLS BEFORE THIS POINT --> */
+#if defined(XEN) && !defined(XENPV)
+	call	_C_LABEL(init_xen_early)
+#endif
 	call	_C_LABEL(init_slotspace)
 	popq	%rdi
 	call	_C_LABEL(init_x86_64)



CVS commit: src/sys/arch/amd64/amd64

2020-05-02 Thread Christos Zoulas
Module Name:src
Committed By:   christos
Date:   Sat May  2 19:01:08 UTC 2020

Modified Files:
src/sys/arch/amd64/amd64: locore.S

Log Message:
Fix build without XEN


To generate a diff of this commit:
cvs rdiff -u -r1.206 -r1.207 src/sys/arch/amd64/amd64/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/locore.S
diff -u src/sys/arch/amd64/amd64/locore.S:1.206 src/sys/arch/amd64/amd64/locore.S:1.207
--- src/sys/arch/amd64/amd64/locore.S:1.206	Sat May  2 12:44:34 2020
+++ src/sys/arch/amd64/amd64/locore.S	Sat May  2 15:01:08 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.S,v 1.206 2020/05/02 16:44:34 bouyer Exp $	*/
+/*	$NetBSD: locore.S,v 1.207 2020/05/02 19:01:08 christos Exp $	*/
 
 /*
  * Copyright-o-rama!
@@ -1005,7 +1005,8 @@ longmode_hi:
 	call 	_C_LABEL(main)
 END(start)
 
-#ifndef XENPV
+#if defined(XEN)
+# if !defined(XENPV)
 /* entry point for Xen PVH */
 	.code32
 ENTRY(start_xen32)
@@ -1062,8 +1063,7 @@ ENTRY(start_xen32)
 	jmp .Lbiosbasemem_finished
 END(start_xen32)
 	.code64
-#endif /* XENPV */
-#if defined(XEN)
+# endif /* !XENPV */
 /* space for the hypercall call page */
 #define HYPERCALL_PAGE_OFFSET 0x1000
 .align HYPERCALL_PAGE_OFFSET



CVS commit: src/sys/arch/amd64/amd64

2020-05-02 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat May  2 11:12:50 UTC 2020

Modified Files:
src/sys/arch/amd64/amd64: spl.S

Log Message:
Remove unused.


To generate a diff of this commit:
cvs rdiff -u -r1.44 -r1.45 src/sys/arch/amd64/amd64/spl.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/spl.S
diff -u src/sys/arch/amd64/amd64/spl.S:1.44 src/sys/arch/amd64/amd64/spl.S:1.45
--- src/sys/arch/amd64/amd64/spl.S:1.44	Sat Apr 25 15:26:16 2020
+++ src/sys/arch/amd64/amd64/spl.S	Sat May  2 11:12:49 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: spl.S,v 1.44 2020/04/25 15:26:16 bouyer Exp $	*/
+/*	$NetBSD: spl.S,v 1.45 2020/05/02 11:12:49 maxv Exp $	*/
 
 /*
  * Copyright (c) 2003 Wasabi Systems, Inc.
@@ -187,7 +187,6 @@ ENTRY(softint_trigger)
 	ret
 END(softint_trigger)
 
-
 /*
  * Xrecurse_preempt()
  *
@@ -255,10 +254,7 @@ ENTRY(spllower)
 2:
 	movq	%r8,%rbx
 	jmp	_C_LABEL(Xspllower)
-
-	.align	16
 END(spllower)
-LABEL(spllower_end)
 
 /*
  * void Xspllower(int s);
@@ -277,9 +273,6 @@ LABEL(spllower_end)
  * the sending CPU will never see the that CPU accept the IPI
  * (see pmap_tlb_shootnow).
  */
-	nop
-	.align	4	/* Avoid confusion with cx8_spllower_end */
-
 IDTVEC(spllower)
 	pushq	%rbx
 	pushq	%r13



CVS commit: src/sys/arch/amd64/amd64

2020-05-01 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Fri May  1 07:03:02 UTC 2020

Modified Files:
src/sys/arch/amd64/amd64: vector.S

Log Message:
Explicitly align to 8 bytes, found by kUBSan.

Reported-by: syzbot+f1e1561ed739db869...@syzkaller.appspotmail.com


To generate a diff of this commit:
cvs rdiff -u -r1.75 -r1.76 src/sys/arch/amd64/amd64/vector.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/vector.S
diff -u src/sys/arch/amd64/amd64/vector.S:1.75 src/sys/arch/amd64/amd64/vector.S:1.76
--- src/sys/arch/amd64/amd64/vector.S:1.75	Mon Apr 27 16:55:50 2020
+++ src/sys/arch/amd64/amd64/vector.S	Fri May  1 07:03:02 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: vector.S,v 1.75 2020/04/27 16:55:50 bouyer Exp $	*/
+/*	$NetBSD: vector.S,v 1.76 2020/05/01 07:03:02 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008 The NetBSD Foundation, Inc.
@@ -630,6 +630,7 @@ INTRSTUB(x2apic_level,31,voidop,x2apic_a
  */
 #define INTRSTUB_ARRAY_16(name) 		; \
 	.type _C_LABEL(name ## _stubs), @object	; \
+	.align 8; \
 LABEL(name ## _stubs); \
 	INTRSTUB_ENTRY(name ## 0)		; \
 	INTRSTUB_ENTRY(name ## 1)		; \
@@ -654,6 +655,7 @@ END(name ## _stubs)
  */
 #define INTRSTUB_ARRAY_32(name) 		; \
 	.type _C_LABEL(name ## _stubs), @object	; \
+	.align 8; \
 LABEL(name ## _stubs); \
 	INTRSTUB_ENTRY(name ## 0)		; \
 	INTRSTUB_ENTRY(name ## 1)		; \
@@ -745,6 +747,7 @@ END(entry_xenev)
 	.quad entry_xenev , _C_LABEL(Xrecurse_ ## name ## sir); \
 	.quad _C_LABEL(Xresume_ ## name ## sir);
 
+	.align 8
 LABEL(xenev_stubs)
 	XENINTRSTUB_ENTRY(xenev, SIR_XENIPL_VM) ;
 	XENINTRSTUB_ENTRY(xenev, SIR_XENIPL_SCHED) ;



CVS commit: src/sys/arch/amd64/amd64

2020-04-30 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Thu Apr 30 17:21:12 UTC 2020

Modified Files:
src/sys/arch/amd64/amd64: locore.S

Log Message:
The labels are already global, drop unused.


To generate a diff of this commit:
cvs rdiff -u -r1.203 -r1.204 src/sys/arch/amd64/amd64/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/locore.S
diff -u src/sys/arch/amd64/amd64/locore.S:1.203 src/sys/arch/amd64/amd64/locore.S:1.204
--- src/sys/arch/amd64/amd64/locore.S:1.203	Thu Apr 30 17:17:33 2020
+++ src/sys/arch/amd64/amd64/locore.S	Thu Apr 30 17:21:12 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.S,v 1.203 2020/04/30 17:17:33 maxv Exp $	*/
+/*	$NetBSD: locore.S,v 1.204 2020/04/30 17:21:12 maxv Exp $	*/
 
 /*
  * Copyright-o-rama!
@@ -1610,11 +1610,6 @@ LABEL(hp_stac)
 LABEL(hp_stac_end)
 
 #ifdef SVS
-	.globl	svs_enter, svs_enter_end
-	.globl	svs_enter_altstack, svs_enter_altstack_end
-	.globl	svs_leave, svs_leave_end
-	.globl	svs_leave_altstack, svs_leave_altstack_end
-
 LABEL(svs_enter)
 	movabs	SVS_UTLS+UTLS_KPDIRPA,%rax
 	movq	%rax,%cr3
@@ -1656,9 +1651,6 @@ LABEL(svs_leave_nmi)
 LABEL(svs_leave_nmi_end)
 #endif
 
-	.globl	ibrs_enter, ibrs_enter_end
-	.globl	ibrs_leave, ibrs_leave_end
-
 	/* IBRS <- 1 */
 LABEL(ibrs_enter)
 	movl	$MSR_IA32_SPEC_CTRL,%ecx
@@ -1683,8 +1675,6 @@ LABEL(noibrs_leave)
 	NOIBRS_LEAVE
 LABEL(noibrs_leave_end)
 
-	.globl	mds_leave, mds_leave_end
-
 LABEL(mds_leave)
 	pushq	$GSEL(GDATA_SEL, SEL_KPL)
 	verw	(%rsp)



CVS commit: src/sys/arch/amd64/amd64

2020-04-27 Thread Manuel Bouyer
Module Name:src
Committed By:   bouyer
Date:   Mon Apr 27 16:55:50 UTC 2020

Modified Files:
src/sys/arch/amd64/amd64: vector.S

Log Message:
Limit the amount of code in TEXT_USER_BEGIN/TEXT_USER_END for
hypervisor_pvhvm_callback, for the benefit of SVS. Suggested by maxv@


To generate a diff of this commit:
cvs rdiff -u -r1.74 -r1.75 src/sys/arch/amd64/amd64/vector.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/vector.S
diff -u src/sys/arch/amd64/amd64/vector.S:1.74 src/sys/arch/amd64/amd64/vector.S:1.75
--- src/sys/arch/amd64/amd64/vector.S:1.74	Sat Apr 25 15:26:16 2020
+++ src/sys/arch/amd64/amd64/vector.S	Mon Apr 27 16:55:50 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: vector.S,v 1.74 2020/04/25 15:26:16 bouyer Exp $	*/
+/*	$NetBSD: vector.S,v 1.75 2020/04/27 16:55:50 bouyer Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008 The NetBSD Foundation, Inc.
@@ -761,12 +761,10 @@ ENTRY(hypervisor_callback)
 	movq	(%rsp),%rcx
 	movq	8(%rsp),%r11
 	addq	$16,%rsp
-	jmp _C_LABEL(Xhypervisor_pvhvm_callback)
-	TEXT_USER_BEGIN
-IDTVEC(hypervisor_pvhvm_callback)
 	pushq	$0		/* Dummy error code */
 	pushq	$T_ASTFLT
 	INTRENTRY
+IDTVEC(handle_hypervisor_callback)
 	movlCPUVAR(ILEVEL),%edi
 	pushq   %rdi /* for Xdoreti */
 	incl	CPUVAR(IDEPTH)
@@ -781,9 +779,17 @@ IDTVEC(hypervisor_pvhvm_callback)
 1:
 #endif
 	jmp 	_C_LABEL(Xdoreti)
+IDTVEC_END(handle_hypervisor_callback)
+END(hypervisor_callback)
+
+	TEXT_USER_BEGIN
+IDTVEC(hypervisor_pvhvm_callback)
+	pushq	$0		/* Dummy error code */
+	pushq	$T_ASTFLT
+	INTRENTRY
+	jmp _C_LABEL(Xhandle_hypervisor_callback)
 IDTVEC_END(hypervisor_pvhvm_callback)
 	TEXT_USER_END
-END(hypervisor_callback)
 #endif /* XEN */
 
 #ifdef XENPV



CVS commit: src/sys/arch/amd64/amd64

2020-04-26 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sun Apr 26 14:07:43 UTC 2020

Modified Files:
src/sys/arch/amd64/amd64: locore.S

Log Message:
Put the template functions in the rodata section; they get hotpatched
into other places, but never execute directly.


To generate a diff of this commit:
cvs rdiff -u -r1.201 -r1.202 src/sys/arch/amd64/amd64/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/locore.S
diff -u src/sys/arch/amd64/amd64/locore.S:1.201 src/sys/arch/amd64/amd64/locore.S:1.202
--- src/sys/arch/amd64/amd64/locore.S:1.201	Sat Apr 25 15:26:16 2020
+++ src/sys/arch/amd64/amd64/locore.S	Sun Apr 26 14:07:43 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.S,v 1.201 2020/04/25 15:26:16 bouyer Exp $	*/
+/*	$NetBSD: locore.S,v 1.202 2020/04/26 14:07:43 maxv Exp $	*/
 
 /*
  * Copyright-o-rama!
@@ -1587,6 +1587,8 @@ END(intrfastexit)
 
 	TEXT_USER_END
 
+	.section .rodata
+
 #ifdef SVS
 	.globl	svs_enter, svs_enter_end
 	.globl	svs_enter_altstack, svs_enter_altstack_end



CVS commit: src/sys/arch/amd64/amd64

2020-04-23 Thread Christos Zoulas
Module Name:src
Committed By:   christos
Date:   Thu Apr 23 16:16:15 UTC 2020

Modified Files:
src/sys/arch/amd64/amd64: netbsd32_machdep.c

Log Message:
use shortcut variables for readability.


To generate a diff of this commit:
cvs rdiff -u -r1.133 -r1.134 src/sys/arch/amd64/amd64/netbsd32_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/netbsd32_machdep.c
diff -u src/sys/arch/amd64/amd64/netbsd32_machdep.c:1.133 src/sys/arch/amd64/amd64/netbsd32_machdep.c:1.134
--- src/sys/arch/amd64/amd64/netbsd32_machdep.c:1.133	Wed Dec 11 21:15:42 2019
+++ src/sys/arch/amd64/amd64/netbsd32_machdep.c	Thu Apr 23 12:16:14 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: netbsd32_machdep.c,v 1.133 2019/12/12 02:15:42 pgoyette Exp $	*/
+/*	$NetBSD: netbsd32_machdep.c,v 1.134 2020/04/23 16:16:14 christos Exp $	*/
 
 /*
  * Copyright (c) 2001 Wasabi Systems, Inc.
@@ -36,7 +36,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: netbsd32_machdep.c,v 1.133 2019/12/12 02:15:42 pgoyette Exp $");
+__KERNEL_RCSID(0, "$NetBSD: netbsd32_machdep.c,v 1.134 2020/04/23 16:16:14 christos Exp $");
 
 #ifdef _KERNEL_OPT
 #include "opt_compat_netbsd.h"
@@ -214,18 +214,20 @@ netbsd32_sendsig_siginfo(const ksiginfo_
 	int onstack, error;
 	int sig = ksi->ksi_signo;
 	struct netbsd32_sigframe_siginfo *fp, frame;
-	sig_t catcher = SIGACTION(p, sig).sa_handler;
+	const struct sigaction *sa = (p, sig);
+	sig_t catcher = sa->sa_handler;
 	struct trapframe *tf = l->l_md.md_regs;
+	struct sigaltstack * const ss = >l_sigstk;
 
 	/* Do we need to jump onto the signal stack? */
 	onstack =
-	(l->l_sigstk.ss_flags & (SS_DISABLE | SS_ONSTACK)) == 0 &&
-	(SIGACTION(p, sig).sa_flags & SA_ONSTACK) != 0;
+	(ss->ss_flags & (SS_DISABLE | SS_ONSTACK)) == 0 &&
+	(sa->sa_flags & SA_ONSTACK) != 0;
 
 	/* Allocate space for the signal handler context. */
 	if (onstack)
 		fp = (struct netbsd32_sigframe_siginfo *)
-		((char *)l->l_sigstk.ss_sp + l->l_sigstk.ss_size);
+		((char *)ss->ss_sp + ss->ss_size);
 	else
 		fp = (struct netbsd32_sigframe_siginfo *)tf->tf_rsp;
 
@@ -252,7 +254,7 @@ netbsd32_sendsig_siginfo(const ksiginfo_
 	frame.sf_uc.uc_flags = _UC_SIGMASK;
 	frame.sf_uc.uc_sigmask = *mask;
 	frame.sf_uc.uc_link = (uint32_t)(uintptr_t)l->l_ctxlink;
-	frame.sf_uc.uc_flags |= (l->l_sigstk.ss_flags & SS_ONSTACK)
+	frame.sf_uc.uc_flags |= (ss->ss_flags & SS_ONSTACK)
 	? _UC_SETSTACK : _UC_CLRSTACK;
 	sendsig_reset(l, sig);
 



CVS commit: src/sys/arch/amd64/amd64

2020-02-29 Thread Christos Zoulas
Module Name:src
Committed By:   christos
Date:   Sat Feb 29 15:00:28 UTC 2020

Modified Files:
src/sys/arch/amd64/amd64: db_interface.c

Log Message:
Fix boot -c or -d by avoiding ipi handling before the vector is initialized.


To generate a diff of this commit:
cvs rdiff -u -r1.36 -r1.37 src/sys/arch/amd64/amd64/db_interface.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/db_interface.c
diff -u src/sys/arch/amd64/amd64/db_interface.c:1.36 src/sys/arch/amd64/amd64/db_interface.c:1.37
--- src/sys/arch/amd64/amd64/db_interface.c:1.36	Thu Feb 14 02:12:40 2019
+++ src/sys/arch/amd64/amd64/db_interface.c	Sat Feb 29 10:00:28 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: db_interface.c,v 1.36 2019/02/14 07:12:40 cherry Exp $	*/
+/*	$NetBSD: db_interface.c,v 1.37 2020/02/29 15:00:28 christos Exp $	*/
 
 /*
  * Mach Operating System
@@ -33,7 +33,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.36 2019/02/14 07:12:40 cherry Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.37 2020/02/29 15:00:28 christos Exp $");
 
 #include "opt_ddb.h"
 #include "opt_multiprocessor.h"
@@ -150,7 +150,9 @@ db_suspend_others(void)
 		xen_broadcast_ipi(XEN_IPI_DDB);
 #else
 #if NLAPIC > 0
-		x86_ipi(ddb_vec, LAPIC_DEST_ALLEXCL, LAPIC_DLMODE_FIXED);
+		if (ddb_vec != 0)
+			x86_ipi(ddb_vec, LAPIC_DEST_ALLEXCL,
+			LAPIC_DLMODE_FIXED);
 #endif
 #endif /* XENPV */
 	}



CVS commit: src/sys/arch/amd64/amd64

2020-01-13 Thread Andrew Doran
Module Name:src
Committed By:   ad
Date:   Mon Jan 13 11:40:15 UTC 2020

Modified Files:
src/sys/arch/amd64/amd64: locore.S

Log Message:
It looks like Xen cpu_hatch() calls cpu_switchto() with prevlwp=NULL,
instead of calling idle_loop() directly.  I can't test a change to
cpu_hatch() right now so allow for prevlwp=NULL.


To generate a diff of this commit:
cvs rdiff -u -r1.198 -r1.199 src/sys/arch/amd64/amd64/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/locore.S
diff -u src/sys/arch/amd64/amd64/locore.S:1.198 src/sys/arch/amd64/amd64/locore.S:1.199
--- src/sys/arch/amd64/amd64/locore.S:1.198	Thu Jan  9 00:42:24 2020
+++ src/sys/arch/amd64/amd64/locore.S	Mon Jan 13 11:40:15 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.S,v 1.198 2020/01/09 00:42:24 manu Exp $	*/
+/*	$NetBSD: locore.S,v 1.199 2020/01/13 11:40:15 ad Exp $	*/
 
 /*
  * Copyright-o-rama!
@@ -1079,10 +1079,14 @@ ENTRY(cpu_switchto)
 	movq	%rdi,%r13	/* oldlwp */
 	movq	%rsi,%r12	/* newlwp */
 
+	testq	%r13,%r13	/* oldlwp = NULL ? */
+	jz	.Lskip_save
+
 	/* Save old context. */
 	movq	L_PCB(%r13),%rax
 	movq	%rsp,PCB_RSP(%rax)
 	movq	%rbp,PCB_RBP(%rax)
+.Lskip_save:
 
 	/* Switch to newlwp's stack. */
 	movq	L_PCB(%r12),%r14



CVS commit: src/sys/arch/amd64/amd64

2019-12-14 Thread Emmanuel Dreyfus
Module Name:src
Committed By:   manu
Date:   Sun Dec 15 02:58:22 UTC 2019

Modified Files:
src/sys/arch/amd64/amd64: locore.S

Log Message:
Fix typo that caused two instructions  to be commented out

Oddly, that did not break booting.


To generate a diff of this commit:
cvs rdiff -u -r1.194 -r1.195 src/sys/arch/amd64/amd64/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/locore.S
diff -u src/sys/arch/amd64/amd64/locore.S:1.194 src/sys/arch/amd64/amd64/locore.S:1.195
--- src/sys/arch/amd64/amd64/locore.S:1.194	Sun Dec 15 02:56:40 2019
+++ src/sys/arch/amd64/amd64/locore.S	Sun Dec 15 02:58:21 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.S,v 1.194 2019/12/15 02:56:40 manu Exp $	*/
+/*	$NetBSD: locore.S,v 1.195 2019/12/15 02:58:21 manu Exp $	*/
 
 /*
  * Copyright-o-rama!
@@ -544,7 +544,7 @@ next:	pop	%r8
 	mov	$(KERNTEXTOFF - KERNBASE), %rdi			/* dest */
 	mov	%r8, %rsi		
 	sub	$(start - kernel_text), %rsi			/* src */
-	mov	$(__kernel_end - kernel_text), %rcx		/* size *.
+	mov	$(__kernel_end - kernel_text), %rcx		/* size */
 	mov	%rcx, %r12		
 	movq	%rdi, %r11		/* for misaligned check */
 



CVS commit: src/sys/arch/amd64/amd64

2019-12-13 Thread Andrew Doran
Module Name:src
Committed By:   ad
Date:   Fri Dec 13 20:14:25 UTC 2019

Modified Files:
src/sys/arch/amd64/amd64: machdep.c

Log Message:
Break the global uvm_pageqlock into a per-page identity lock and a private
lock for use of the pagedaemon policy code.  Discussed on tech-kern.

PR kern/54209: NetBSD 8 large memory performance extremely low
PR kern/54210: NetBSD-8 processes presumably not exiting
PR kern/54727: writing a large file causes unreasonable system behaviour


To generate a diff of this commit:
cvs rdiff -u -r1.343 -r1.344 src/sys/arch/amd64/amd64/machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/machdep.c
diff -u src/sys/arch/amd64/amd64/machdep.c:1.343 src/sys/arch/amd64/amd64/machdep.c:1.344
--- src/sys/arch/amd64/amd64/machdep.c:1.343	Tue Dec 10 02:06:07 2019
+++ src/sys/arch/amd64/amd64/machdep.c	Fri Dec 13 20:14:25 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: machdep.c,v 1.343 2019/12/10 02:06:07 manu Exp $	*/
+/*	$NetBSD: machdep.c,v 1.344 2019/12/13 20:14:25 ad Exp $	*/
 
 /*
  * Copyright (c) 1996, 1997, 1998, 2000, 2006, 2007, 2008, 2011
@@ -110,7 +110,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.343 2019/12/10 02:06:07 manu Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.344 2019/12/13 20:14:25 ad Exp $");
 
 #include "opt_modular.h"
 #include "opt_multiboot.h"
@@ -865,7 +865,7 @@ sparse_dump_mark(void)
 		 pfn++) {
 			pg = PHYS_TO_VM_PAGE(ptoa(pfn));
 
-			if (pg->uanon || (pg->pqflags & PQ_FREE) ||
+			if (pg->uanon || (pg->flags & PG_FREE) ||
 			(pg->uobject && pg->uobject->pgops)) {
 p = VM_PAGE_TO_PHYS(pg) / PAGE_SIZE;
 clrbit(sparse_dump_physmap, p);



CVS commit: src/sys/arch/amd64/amd64

2019-12-07 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Dec  7 10:19:35 UTC 2019

Modified Files:
src/sys/arch/amd64/amd64: amd64_trap.S

Log Message:
Panic instead of printf, same as syscall.


To generate a diff of this commit:
cvs rdiff -u -r1.50 -r1.51 src/sys/arch/amd64/amd64/amd64_trap.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/amd64_trap.S
diff -u src/sys/arch/amd64/amd64/amd64_trap.S:1.50 src/sys/arch/amd64/amd64/amd64_trap.S:1.51
--- src/sys/arch/amd64/amd64/amd64_trap.S:1.50	Thu Nov 14 16:23:52 2019
+++ src/sys/arch/amd64/amd64/amd64_trap.S	Sat Dec  7 10:19:35 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: amd64_trap.S,v 1.50 2019/11/14 16:23:52 maxv Exp $	*/
+/*	$NetBSD: amd64_trap.S,v 1.51 2019/12/07 10:19:35 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008, 2017 The NetBSD Foundation, Inc.
@@ -694,13 +694,8 @@ calltrap:
 	STI(si)
 	movabsq	$4f,%rdi
 	movl	CPUVAR(ILEVEL),%esi
-	movl	%ebx,%edx
-	xorq	%rax,%rax
-	call	_C_LABEL(printf)
-	movl	%ebx,%edi
-	call	_C_LABEL(spllower)
-	jmp	.Lalltraps_checkast
-4:	.asciz	"WARNING: SPL NOT LOWERED ON TRAP EXIT %x %x\n"
+	call	_C_LABEL(panic)
+4:	.asciz	"spl not lowered on trap exit, ilevel=%x"
 #endif
 END(alltraps)
 



CVS commit: src/sys/arch/amd64/amd64

2019-03-07 Thread NONAKA Kimihiro
Module Name:src
Committed By:   nonaka
Date:   Thu Mar  7 10:16:07 UTC 2019

Modified Files:
src/sys/arch/amd64/amd64: vector.S

Log Message:
Use IDTVEC instead of NENTRY for handle_hyperv_hypercall.


To generate a diff of this commit:
cvs rdiff -u -r1.69 -r1.70 src/sys/arch/amd64/amd64/vector.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/vector.S
diff -u src/sys/arch/amd64/amd64/vector.S:1.69 src/sys/arch/amd64/amd64/vector.S:1.70
--- src/sys/arch/amd64/amd64/vector.S:1.69	Fri Feb 15 08:54:01 2019
+++ src/sys/arch/amd64/amd64/vector.S	Thu Mar  7 10:16:07 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: vector.S,v 1.69 2019/02/15 08:54:01 nonaka Exp $	*/
+/*	$NetBSD: vector.S,v 1.70 2019/03/07 10:16:07 nonaka Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008 The NetBSD Foundation, Inc.
@@ -277,12 +277,12 @@ IDTVEC(recurse_hyperv_hypercall)
 	INTR_RECURSE_ENTRY
 	jmp	1f
 IDTVEC_END(recurse_hyperv_hypercall)
-NENTRY(handle_hyperv_hypercall)
+IDTVEC(handle_hyperv_hypercall)
 	movl	CPUVAR(ILEVEL),%ebx
 	cmpl	$IPL_NET,%ebx
 	jae	2f
 	jmp	1f
-END(handle_hyperv_hypercall)
+IDTVEC_END(handle_hyperv_hypercall)
 IDTVEC(resume_hyperv_hypercall)
 1:
 	incl	CPUVAR(IDEPTH)
@@ -302,7 +302,7 @@ IDTVEC(intr_hyperv_hypercall)
 	pushq	$0
 	pushq	$T_ASTFLT
 	INTRENTRY
-	jmp	_C_LABEL(handle_hyperv_hypercall)
+	jmp	_C_LABEL(Xhandle_hyperv_hypercall)
 IDTVEC_END(intr_hyperv_hypercall)
 	TEXT_USER_END
 #endif	/* NHYPERV > 0 */



CVS commit: src/sys/arch/amd64/amd64

2018-12-24 Thread Christos Zoulas
Module Name:src
Committed By:   christos
Date:   Mon Dec 24 21:48:53 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: kobj_machdep.c

Log Message:
Treat R_X86_64_PLT32 relocation as R_X86_64_PC32 for binutils-2.31
See: https://lore.kernel.org/patchwork/patch/892629/


To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/amd64/amd64/kobj_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/kobj_machdep.c
diff -u src/sys/arch/amd64/amd64/kobj_machdep.c:1.6 src/sys/arch/amd64/amd64/kobj_machdep.c:1.7
--- src/sys/arch/amd64/amd64/kobj_machdep.c:1.6	Fri Nov  3 05:59:08 2017
+++ src/sys/arch/amd64/amd64/kobj_machdep.c	Mon Dec 24 16:48:52 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: kobj_machdep.c,v 1.6 2017/11/03 09:59:08 maxv Exp $	*/
+/*	$NetBSD: kobj_machdep.c,v 1.7 2018/12/24 21:48:52 christos Exp $	*/
 
 /*-
  * Copyright (c) 2008 The NetBSD Foundation, Inc.
@@ -55,7 +55,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: kobj_machdep.c,v 1.6 2017/11/03 09:59:08 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: kobj_machdep.c,v 1.7 2018/12/24 21:48:52 christos Exp $");
 
 #define	ELFSIZE		ARCH_ELFSIZE
 
@@ -119,6 +119,7 @@ kobj_reloc(kobj_t ko, uintptr_t relocbas
 		break;
 
 	case R_X86_64_PC32:	/* S + A - P */
+	case R_X86_64_PLT32:
 		error = kobj_sym_lookup(ko, symidx, );
 		if (error)
 			return -1;



CVS commit: src/sys/arch/amd64/amd64

2018-11-11 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sun Nov 11 10:58:40 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: machdep.c

Log Message:
Fix stack info leak. There is a big padding in struct sigframe_siginfo.

[  224.006287] kleak: Possible leak in copyout: [len=920, leaked=92]
[  224.016977] #0 0x80224d0a in kleak_note 
[  224.026268] #1 0x80224d8a in kleak_copyout 
[  224.026268] #2 0x802224b5 in sendsig_siginfo 
[  224.036261] #3 0x80b51564 in sendsig 
[  224.046475] #4 0x80b51282 in postsig 
[  224.046475] #5 0x80b2fc5d in lwp_userret 
[  224.056273] #6 0x8025a951 in mi_userret 
[  224.066277] #7 0x8025ab89 in syscall 


To generate a diff of this commit:
cvs rdiff -u -r1.320 -r1.321 src/sys/arch/amd64/amd64/machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/machdep.c
diff -u src/sys/arch/amd64/amd64/machdep.c:1.320 src/sys/arch/amd64/amd64/machdep.c:1.321
--- src/sys/arch/amd64/amd64/machdep.c:1.320	Wed Oct 31 06:26:25 2018
+++ src/sys/arch/amd64/amd64/machdep.c	Sun Nov 11 10:58:40 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: machdep.c,v 1.320 2018/10/31 06:26:25 maxv Exp $	*/
+/*	$NetBSD: machdep.c,v 1.321 2018/11/11 10:58:40 maxv Exp $	*/
 
 /*
  * Copyright (c) 1996, 1997, 1998, 2000, 2006, 2007, 2008, 2011
@@ -110,7 +110,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.320 2018/10/31 06:26:25 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.321 2018/11/11 10:58:40 maxv Exp $");
 
 #include "opt_modular.h"
 #include "opt_user_ldt.h"
@@ -626,6 +626,7 @@ sendsig_siginfo(const ksiginfo_t *ksi, c
 	/* Round down the stackpointer to a multiple of 16 for the ABI. */
 	fp = (struct sigframe_siginfo *)(((unsigned long)sp & ~15) - 8);
 
+	memset(, 0, sizeof(frame));
 	frame.sf_ra = (uint64_t)ps->sa_sigdesc[sig].sd_tramp;
 	frame.sf_si._info = ksi->ksi_info;
 	frame.sf_uc.uc_flags = _UC_SIGMASK;
@@ -633,7 +634,6 @@ sendsig_siginfo(const ksiginfo_t *ksi, c
 	frame.sf_uc.uc_link = l->l_ctxlink;
 	frame.sf_uc.uc_flags |= (l->l_sigstk.ss_flags & SS_ONSTACK)
 	? _UC_SETSTACK : _UC_CLRSTACK;
-	memset(_uc.uc_stack, 0, sizeof(frame.sf_uc.uc_stack));
 	sendsig_reset(l, sig);
 
 	mutex_exit(p->p_lock);



CVS commit: src/sys/arch/amd64/amd64

2018-10-27 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Oct 27 06:35:54 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: asan.c

Log Message:
Rename kasan_shadow_fill, remove one check in it, and inline it. Remove
the use-after-scope code for now, because our GCC does not support that
and when it does we will want to test the feature for real rather than
letting a potentially broken code compile.


To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/amd64/amd64/asan.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/asan.c
diff -u src/sys/arch/amd64/amd64/asan.c:1.9 src/sys/arch/amd64/amd64/asan.c:1.10
--- src/sys/arch/amd64/amd64/asan.c:1.9	Sat Oct 27 06:06:31 2018
+++ src/sys/arch/amd64/amd64/asan.c	Sat Oct 27 06:35:54 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: asan.c,v 1.9 2018/10/27 06:06:31 maxv Exp $	*/
+/*	$NetBSD: asan.c,v 1.10 2018/10/27 06:35:54 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: asan.c,v 1.9 2018/10/27 06:06:31 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: asan.c,v 1.10 2018/10/27 06:35:54 maxv Exp $");
 
 #include 
 #include 
@@ -330,13 +330,20 @@ kasan_report(unsigned long addr, size_t 
 #define KASAN_STACK_PARTIAL	0xF4
 #define KASAN_USE_AFTER_SCOPE	0xF8
 
-static void
-kasan_shadow_fill(const void *addr, size_t size, uint8_t val)
+static __always_inline void
+kasan_shadow_1byte_markvalid(unsigned long addr)
+{
+	int8_t *byte = kasan_addr_to_shad((void *)addr);
+	int8_t last = (addr & KASAN_SHADOW_MASK) + 1;
+
+	*byte = last;
+}
+
+static __always_inline void
+kasan_shadow_Nbyte_fill(const void *addr, size_t size, uint8_t val)
 {
 	void *shad;
 
-	if (__predict_false(!kasan_enabled))
-		return;
 	if (__predict_false(size == 0))
 		return;
 	if (__predict_false(kasan_unsupported((vaddr_t)addr)))
@@ -351,15 +358,6 @@ kasan_shadow_fill(const void *addr, size
 	__builtin_memset(shad, val, size);
 }
 
-static __always_inline void
-kasan_shadow_1byte_markvalid(unsigned long addr)
-{
-	int8_t *byte = kasan_addr_to_shad((void *)addr);
-	int8_t last = (addr & KASAN_SHADOW_MASK) + 1;
-
-	*byte = last;
-}
-
 void
 kasan_add_redzone(size_t *size)
 {
@@ -380,7 +378,7 @@ kasan_markmem(const void *addr, size_t s
 		}
 	} else {
 		KASSERT(size % KASAN_SHADOW_SCALE_SIZE == 0);
-		kasan_shadow_fill(addr, size, KASAN_MEMORY_REDZONE);
+		kasan_shadow_Nbyte_fill(addr, size, KASAN_MEMORY_REDZONE);
 	}
 }
 
@@ -389,7 +387,7 @@ kasan_softint(struct lwp *l)
 {
 	const void *stk = (const void *)uvm_lwp_getuarea(l);
 
-	kasan_shadow_fill(stk, USPACE, 0);
+	kasan_shadow_Nbyte_fill(stk, USPACE, 0);
 }
 
 void
@@ -681,8 +679,6 @@ void __asan_loadN_noabort(unsigned long,
 void __asan_storeN(unsigned long, size_t);
 void __asan_storeN_noabort(unsigned long, size_t);
 void __asan_handle_no_return(void);
-void __asan_poison_stack_memory(const void *, size_t);
-void __asan_unpoison_stack_memory(const void *, size_t);
 
 void
 __asan_loadN(unsigned long addr, size_t size)
@@ -714,20 +710,6 @@ __asan_handle_no_return(void)
 	/* nothing */
 }
 
-void
-__asan_poison_stack_memory(const void *addr, size_t size)
-{
-	KASSERT((vaddr_t)addr % KASAN_SHADOW_SCALE_SIZE == 0);
-	kasan_shadow_fill(addr, size, KASAN_USE_AFTER_SCOPE);
-}
-
-void
-__asan_unpoison_stack_memory(const void *addr, size_t size)
-{
-	KASSERT((vaddr_t)addr % KASAN_SHADOW_SCALE_SIZE == 0);
-	kasan_shadow_fill(addr, size, 0);
-}
-
 #define ASAN_SET_SHADOW(byte) \
 	void __asan_set_shadow_##byte(void *, size_t);			\
 	void __asan_set_shadow_##byte(void *addr, size_t size)		\



CVS commit: src/sys/arch/amd64/amd64

2018-10-27 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Oct 27 06:06:31 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: asan.c

Log Message:
Remove functions that aren't supposed to be used.


To generate a diff of this commit:
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/amd64/amd64/asan.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/asan.c
diff -u src/sys/arch/amd64/amd64/asan.c:1.8 src/sys/arch/amd64/amd64/asan.c:1.9
--- src/sys/arch/amd64/amd64/asan.c:1.8	Mon Sep 24 05:47:33 2018
+++ src/sys/arch/amd64/amd64/asan.c	Sat Oct 27 06:06:31 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: asan.c,v 1.8 2018/09/24 05:47:33 maxv Exp $	*/
+/*	$NetBSD: asan.c,v 1.9 2018/10/27 06:06:31 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: asan.c,v 1.8 2018/09/24 05:47:33 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: asan.c,v 1.9 2018/10/27 06:06:31 maxv Exp $");
 
 #include 
 #include 
@@ -683,8 +683,6 @@ void __asan_storeN_noabort(unsigned long
 void __asan_handle_no_return(void);
 void __asan_poison_stack_memory(const void *, size_t);
 void __asan_unpoison_stack_memory(const void *, size_t);
-void __asan_alloca_poison(unsigned long, size_t);
-void __asan_allocas_unpoison(const void *, const void *);
 
 void
 __asan_loadN(unsigned long addr, size_t size)
@@ -730,18 +728,6 @@ __asan_unpoison_stack_memory(const void 
 	kasan_shadow_fill(addr, size, 0);
 }
 
-void
-__asan_alloca_poison(unsigned long addr, size_t size)
-{
-	panic("%s: impossible!", __func__);
-}
-
-void
-__asan_allocas_unpoison(const void *stack_top, const void *stack_bottom)
-{
-	panic("%s: impossible!", __func__);
-}
-
 #define ASAN_SET_SHADOW(byte) \
 	void __asan_set_shadow_##byte(void *, size_t);			\
 	void __asan_set_shadow_##byte(void *addr, size_t size)		\



CVS commit: src/sys/arch/amd64/amd64

2018-09-23 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Mon Sep 24 05:47:33 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: asan.c

Log Message:
Don't go beyond start().


To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/amd64/amd64/asan.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/asan.c
diff -u src/sys/arch/amd64/amd64/asan.c:1.7 src/sys/arch/amd64/amd64/asan.c:1.8
--- src/sys/arch/amd64/amd64/asan.c:1.7	Mon Aug 27 08:53:19 2018
+++ src/sys/arch/amd64/amd64/asan.c	Mon Sep 24 05:47:33 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: asan.c,v 1.7 2018/08/27 08:53:19 maxv Exp $	*/
+/*	$NetBSD: asan.c,v 1.8 2018/09/24 05:47:33 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: asan.c,v 1.7 2018/08/27 08:53:19 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: asan.c,v 1.8 2018/09/24 05:47:33 maxv Exp $");
 
 #include 
 #include 
@@ -297,6 +297,9 @@ kasan_unwind(void)
 		}
 
 		rbp = (uint64_t *)*(rbp);
+		if (rbp == 0) {
+			break;
+		}
 		nsym++;
 
 		if (nsym >= 15) {



CVS commit: src/sys/arch/amd64/amd64

2018-09-08 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Sep  8 12:40:17 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: db_disasm.c

Log Message:
Work around dumb KASSERT in vtopte(), the PTE area can now be above the
MAIN area. I guess the KASSERT should be removed because it doesn't make
a lot of sense.


To generate a diff of this commit:
cvs rdiff -u -r1.24 -r1.25 src/sys/arch/amd64/amd64/db_disasm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/db_disasm.c
diff -u src/sys/arch/amd64/amd64/db_disasm.c:1.24 src/sys/arch/amd64/amd64/db_disasm.c:1.25
--- src/sys/arch/amd64/amd64/db_disasm.c:1.24	Sun Jan 21 16:51:14 2018
+++ src/sys/arch/amd64/amd64/db_disasm.c	Sat Sep  8 12:40:17 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: db_disasm.c,v 1.24 2018/01/21 16:51:14 christos Exp $	*/
+/*	$NetBSD: db_disasm.c,v 1.25 2018/09/08 12:40:17 maxv Exp $	*/
 
 /* 
  * Mach Operating System
@@ -33,7 +33,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: db_disasm.c,v 1.24 2018/01/21 16:51:14 christos Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_disasm.c,v 1.25 2018/09/08 12:40:17 maxv Exp $");
 
 #ifndef _KERNEL
 #include 
@@ -1207,7 +1207,11 @@ db_disasm(db_addr_t loc, bool altfmt)
 		pte = kvtopte((vaddr_t)loc);
 	else
 		pte = vtopte((vaddr_t)loc);
-	pde = vtopte((vaddr_t)pte);
+	if ((vaddr_t)pte >= VM_MIN_KERNEL_ADDRESS)
+		pde = kvtopte((vaddr_t)pte);
+	else
+		pde = vtopte((vaddr_t)pte);
+
 	if ((*pde & PG_V) == 0 || (*pte & PG_V) == 0) {
 		db_printf("invalid address\n");
 		return (loc);



CVS commit: src/sys/arch/amd64/amd64

2018-08-23 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Thu Aug 23 11:56:10 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: asan.c

Log Message:
Improve the detection on global variables, no need to round up.


To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/amd64/amd64/asan.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/asan.c
diff -u src/sys/arch/amd64/amd64/asan.c:1.5 src/sys/arch/amd64/amd64/asan.c:1.6
--- src/sys/arch/amd64/amd64/asan.c:1.5	Wed Aug 22 17:25:02 2018
+++ src/sys/arch/amd64/amd64/asan.c	Thu Aug 23 11:56:10 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: asan.c,v 1.5 2018/08/22 17:25:02 maxv Exp $	*/
+/*	$NetBSD: asan.c,v 1.6 2018/08/23 11:56:10 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: asan.c,v 1.5 2018/08/22 17:25:02 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: asan.c,v 1.6 2018/08/23 11:56:10 maxv Exp $");
 
 #include 
 #include 
@@ -579,28 +579,21 @@ struct __asan_global {
 void __asan_register_globals(struct __asan_global *, size_t);
 void __asan_unregister_globals(struct __asan_global *, size_t);
 
-static void
-kasan_register_global(struct __asan_global *global)
-{
-	size_t aligned_size = roundup(global->size, KASAN_SHADOW_SCALE_SIZE);
-
-	/* Poison the redzone following the var. */
-	kasan_shadow_fill((void *)((uintptr_t)global->beg + aligned_size),
-	global->size_with_redzone - aligned_size, KASAN_GLOBAL_REDZONE);
-}
-
 void
-__asan_register_globals(struct __asan_global *globals, size_t size)
+__asan_register_globals(struct __asan_global *globals, size_t n)
 {
 	size_t i;
-	for (i = 0; i < size; i++) {
-		kasan_register_global([i]);
+
+	for (i = 0; i < n; i++) {
+		kasan_alloc(globals[i].beg, globals[i].size,
+		globals[i].size_with_redzone);
 	}
 }
 
 void
-__asan_unregister_globals(struct __asan_global *globals, size_t size)
+__asan_unregister_globals(struct __asan_global *globals, size_t n)
 {
+	/* never called */
 }
 
 #define ASAN_LOAD_STORE(size)	\



CVS commit: src/sys/arch/amd64/amd64

2018-08-22 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Wed Aug 22 17:25:02 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: asan.c

Log Message:
Unwind the stack on error, to get the full path that led to the illegal
access. Example of output:

kASan: Unauthorized Access In 0x80e6219c: Addr 0xbb007a39fd03 [1 
byte, read]
#0 0x80e6219c in ras_purgeall 
#1 0x80e62330 in sys_rasctl 
#2 0x80265008 in syscall 

(I manually added a one-byte stack read overflow in rasctl to demonstrate.)


To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/amd64/amd64/asan.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/asan.c
diff -u src/sys/arch/amd64/amd64/asan.c:1.4 src/sys/arch/amd64/amd64/asan.c:1.5
--- src/sys/arch/amd64/amd64/asan.c:1.4	Wed Aug 22 17:04:36 2018
+++ src/sys/arch/amd64/amd64/asan.c	Wed Aug 22 17:25:02 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: asan.c,v 1.4 2018/08/22 17:04:36 maxv Exp $	*/
+/*	$NetBSD: asan.c,v 1.5 2018/08/22 17:25:02 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: asan.c,v 1.4 2018/08/22 17:04:36 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: asan.c,v 1.5 2018/08/22 17:25:02 maxv Exp $");
 
 #include 
 #include 
@@ -40,6 +40,7 @@ __KERNEL_RCSID(0, "$NetBSD: asan.c,v 1.4
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -248,12 +249,69 @@ kasan_init(void)
 
 /* -- */
 
+static inline bool
+kasan_unwind_end(const char *name)
+{
+	if (!strcmp(name, "syscall") ||
+	!strcmp(name, "handle_syscall") ||
+	!strncmp(name, "Xintr", 5) ||
+	!strncmp(name, "Xhandle", 7) ||
+	!strncmp(name, "Xresume", 7) ||
+	!strncmp(name, "Xstray", 6) ||
+	!strncmp(name, "Xhold", 5) ||
+	!strncmp(name, "Xrecurse", 8) ||
+	!strcmp(name, "Xdoreti") ||
+	!strncmp(name, "Xsoft", 5)) {
+		return true;
+	}
+
+	return false;
+}
+
+static void
+kasan_unwind(void)
+{
+	uint64_t *rbp, rip;
+	const char *mod;
+	const char *sym;
+	size_t nsym;
+	int error;
+
+	rbp = (uint64_t *)__builtin_frame_address(0);
+	nsym = 0;
+
+	while (1) {
+		/* 8(%rbp) contains the saved %rip. */
+		rip = *(rbp + 1);
+
+		if (rip < KERNBASE) {
+			break;
+		}
+		error = ksyms_getname(, , (vaddr_t)rip, KSYMS_PROC);
+		if (error) {
+			break;
+		}
+		printf("#%zu %p in %s <%s>\n", nsym, (void *)rip, sym, mod);
+		if (kasan_unwind_end(sym)) {
+			break;
+		}
+
+		rbp = (uint64_t *)*(rbp);
+		nsym++;
+
+		if (nsym >= 15) {
+			break;
+		}
+	}
+}
+
 static void
 kasan_report(unsigned long addr, size_t size, bool write, unsigned long rip)
 {
 	printf("kASan: Unauthorized Access In %p: Addr %p [%zu byte%s, %s]\n",
 	(void *)rip, (void *)addr, size, (size > 1 ? "s" : ""),
 	(write ? "write" : "read"));
+	kasan_unwind();
 }
 
 /* -- */



CVS commit: src/sys/arch/amd64/amd64

2018-08-22 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Wed Aug 22 17:04:36 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: asan.c spl.S

Log Message:
Explicitly unpoison the stack when entering a softint.

Softints are the only place where we "discard" a part of the stack: we may
have left the thread without allowing the asan instrumentation to clear
the poison, and in this case, we can get false positives when we hit a
poisoned area of the stack while executing another handler within the same
softint thread.

(I was actually getting a rare false positive in ip6intr.)


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/amd64/amd64/asan.c
cvs rdiff -u -r1.35 -r1.36 src/sys/arch/amd64/amd64/spl.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/asan.c
diff -u src/sys/arch/amd64/amd64/asan.c:1.3 src/sys/arch/amd64/amd64/asan.c:1.4
--- src/sys/arch/amd64/amd64/asan.c:1.3	Wed Aug 22 12:07:42 2018
+++ src/sys/arch/amd64/amd64/asan.c	Wed Aug 22 17:04:36 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: asan.c,v 1.3 2018/08/22 12:07:42 maxv Exp $	*/
+/*	$NetBSD: asan.c,v 1.4 2018/08/22 17:04:36 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: asan.c,v 1.3 2018/08/22 12:07:42 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: asan.c,v 1.4 2018/08/22 17:04:36 maxv Exp $");
 
 #include 
 #include 
@@ -59,6 +59,7 @@ __KERNEL_RCSID(0, "$NetBSD: asan.c,v 1.3
 
 #define __RET_ADDR	(unsigned long)__builtin_return_address(0)
 
+void kasan_softint(struct lwp *);
 void kasan_shadow_map(void *, size_t);
 void kasan_early_init(void);
 void kasan_init(void);
@@ -323,6 +324,14 @@ kasan_markmem(const void *addr, size_t s
 }
 
 void
+kasan_softint(struct lwp *l)
+{
+	const void *stk = (const void *)uvm_lwp_getuarea(l);
+
+	kasan_shadow_fill(stk, USPACE, 0);
+}
+
+void
 kasan_alloc(const void *addr, size_t size, size_t sz_with_redz)
 {
 	kasan_markmem(addr, sz_with_redz, false);

Index: src/sys/arch/amd64/amd64/spl.S
diff -u src/sys/arch/amd64/amd64/spl.S:1.35 src/sys/arch/amd64/amd64/spl.S:1.36
--- src/sys/arch/amd64/amd64/spl.S:1.35	Sat Jul 14 14:29:40 2018
+++ src/sys/arch/amd64/amd64/spl.S	Wed Aug 22 17:04:36 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: spl.S,v 1.35 2018/07/14 14:29:40 maxv Exp $	*/
+/*	$NetBSD: spl.S,v 1.36 2018/08/22 17:04:36 maxv Exp $	*/
 
 /*
  * Copyright (c) 2003 Wasabi Systems, Inc.
@@ -65,6 +65,7 @@
  */
 
 #include "opt_ddb.h"
+#include "opt_kasan.h"
 
 #define ALIGN_TEXT	.align 16,0x90
 
@@ -105,6 +106,17 @@ IDTVEC(softintr)
 	movq	L_PCB(%r15),%rcx
 	movq	%rdi,CPUVAR(CURLWP)
 
+#ifdef KASAN
+	/* clear the new stack */
+	pushq	%rax
+	pushq	%rdx
+	pushq	%rcx
+	callq	_C_LABEL(kasan_softint)
+	popq	%rcx
+	popq	%rdx
+	popq	%rax
+#endif
+
 	/* save old context */
 	movq	%rsp,PCB_RSP(%rcx)
 	movq	%rbp,PCB_RBP(%rcx)



CVS commit: src/sys/arch/amd64/amd64

2018-08-22 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Wed Aug 22 09:11:47 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: asan.c

Log Message:
Fix the computation in kasan_shadow_map, we may need one more page because
of the rounddown.


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/amd64/amd64/asan.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/asan.c
diff -u src/sys/arch/amd64/amd64/asan.c:1.1 src/sys/arch/amd64/amd64/asan.c:1.2
--- src/sys/arch/amd64/amd64/asan.c:1.1	Mon Aug 20 15:04:51 2018
+++ src/sys/arch/amd64/amd64/asan.c	Wed Aug 22 09:11:47 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: asan.c,v 1.1 2018/08/20 15:04:51 maxv Exp $	*/
+/*	$NetBSD: asan.c,v 1.2 2018/08/22 09:11:47 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: asan.c,v 1.1 2018/08/20 15:04:51 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: asan.c,v 1.2 2018/08/22 09:11:47 maxv Exp $");
 
 #include 
 #include 
@@ -109,17 +109,24 @@ void
 kasan_shadow_map(void *addr, size_t size)
 {
 	size_t sz, npages, i;
-	vaddr_t va;
+	vaddr_t sva, eva;
+
+	KASSERT((vaddr_t)addr % KASAN_SHADOW_SCALE_SIZE == 0);
 
-	va = (vaddr_t)kasan_addr_to_shad(addr);
 	sz = roundup(size, KASAN_SHADOW_SCALE_SIZE) / KASAN_SHADOW_SCALE_SIZE;
-	va = rounddown(va, PAGE_SIZE);
-	npages = roundup(sz, PAGE_SIZE) / PAGE_SIZE;
 
-	KASSERT(va >= KASAN_SHADOW_START && va < KASAN_SHADOW_END);
+	sva = (vaddr_t)kasan_addr_to_shad(addr);
+	eva = (vaddr_t)kasan_addr_to_shad(addr) + sz;
+
+	sva = rounddown(sva, PAGE_SIZE);
+	eva = roundup(eva, PAGE_SIZE);
+
+	npages = (eva - sva) / PAGE_SIZE;
+
+	KASSERT(sva >= KASAN_SHADOW_START && eva < KASAN_SHADOW_END);
 
 	for (i = 0; i < npages; i++) {
-		kasan_shadow_map_page(va + i * PAGE_SIZE);
+		kasan_shadow_map_page(sva + i * PAGE_SIZE);
 	}
 }
 



CVS commit: src/sys/arch/amd64/amd64

2018-08-12 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sun Aug 12 06:11:47 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: amd64_trap.S genassym.cf

Log Message:
Eliminate the only ASM reference to VM_MIN_KERNEL_ADDRESS. Rename the
value to VM_SPACE_SEP_HIGH32, it is now the highest 32bits of the first
va of the higher half of the address space (right after the canonical
hole).


To generate a diff of this commit:
cvs rdiff -u -r1.44 -r1.45 src/sys/arch/amd64/amd64/amd64_trap.S
cvs rdiff -u -r1.68 -r1.69 src/sys/arch/amd64/amd64/genassym.cf

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/amd64_trap.S
diff -u src/sys/arch/amd64/amd64/amd64_trap.S:1.44 src/sys/arch/amd64/amd64/amd64_trap.S:1.45
--- src/sys/arch/amd64/amd64/amd64_trap.S:1.44	Sat Jul 14 14:29:40 2018
+++ src/sys/arch/amd64/amd64/amd64_trap.S	Sun Aug 12 06:11:47 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: amd64_trap.S,v 1.44 2018/07/14 14:29:40 maxv Exp $	*/
+/*	$NetBSD: amd64_trap.S,v 1.45 2018/08/12 06:11:47 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008, 2017 The NetBSD Foundation, Inc.
@@ -192,7 +192,7 @@ IDTVEC(trap01)
 
 	movl	$MSR_GSBASE,%ecx
 	rdmsr
-	cmpl	$VM_MIN_KERNEL_ADDRESS_HIGH32,%edx
+	cmpl	$VM_SPACE_SEP_HIGH32,%edx
 	jae	.Lkern_dbentry
 
 	/* SS shadow, ignore the exception. */
@@ -265,7 +265,7 @@ IDTVEC(trap02)
 
 	movl	$MSR_GSBASE,%ecx
 	rdmsr
-	cmpl	$VM_MIN_KERNEL_ADDRESS_HIGH32,%edx
+	cmpl	$VM_SPACE_SEP_HIGH32,%edx
 	jae	.Lnoswapgs
 
 	swapgs

Index: src/sys/arch/amd64/amd64/genassym.cf
diff -u src/sys/arch/amd64/amd64/genassym.cf:1.68 src/sys/arch/amd64/amd64/genassym.cf:1.69
--- src/sys/arch/amd64/amd64/genassym.cf:1.68	Fri Mar 30 10:01:36 2018
+++ src/sys/arch/amd64/amd64/genassym.cf	Sun Aug 12 06:11:47 2018
@@ -1,4 +1,4 @@
-#	$NetBSD: genassym.cf,v 1.68 2018/03/30 10:01:36 maxv Exp $
+#	$NetBSD: genassym.cf,v 1.69 2018/08/12 06:11:47 maxv Exp $
 
 #
 # Copyright (c) 1998, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -367,7 +367,7 @@ define	NKL2_KIMG_ENTRIES	NKL2_KIMG_ENTRI
 define	PGOFSET			PGOFSET
 define	PGSHIFT			PGSHIFT
 
-define	VM_MIN_KERNEL_ADDRESS_HIGH32	(VM_MIN_KERNEL_ADDRESS >> 32)
+define	VM_SPACE_SEP_HIGH32	(0x8000 >> 32)
 
 define	RESCHED_KPREEMPT	RESCHED_KPREEMPT
 



CVS commit: src/sys/arch/amd64/amd64

2018-08-02 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Thu Aug  2 16:58:00 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: prekern.c

Log Message:
Don't forget to call init_slotspace when we're booted via the prekern.


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/amd64/amd64/prekern.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/prekern.c
diff -u src/sys/arch/amd64/amd64/prekern.c:1.1 src/sys/arch/amd64/amd64/prekern.c:1.2
--- src/sys/arch/amd64/amd64/prekern.c:1.1	Sun Oct  8 08:26:01 2017
+++ src/sys/arch/amd64/amd64/prekern.c	Thu Aug  2 16:58:00 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: prekern.c,v 1.1 2017/10/08 08:26:01 maxv Exp $	*/
+/*	$NetBSD: prekern.c,v 1.2 2018/08/02 16:58:00 maxv Exp $	*/
 
 /*
  * Copyright (c) 2017 The NetBSD Foundation, Inc. All rights reserved.
@@ -62,6 +62,7 @@ struct prekern_args {
 };
 
 void main(void);
+void init_slotspace(void);
 void init_x86_64(paddr_t);
 
 static void prekern_copy_args(struct prekern_args *);
@@ -124,6 +125,7 @@ start_prekern(struct prekern_args *pkarg
 	prekern_copy_args(pkargs);
 	first_avail = pkargs->first_avail;
 
+	init_slotspace();
 	init_x86_64(first_avail);
 
 	prekern_unmap();



CVS commit: src/sys/arch/amd64/amd64

2018-07-09 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Mon Jul  9 18:52:04 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: locore.S

Log Message:
Don't push/pop %rdx, we don't care about preserving its value.


To generate a diff of this commit:
cvs rdiff -u -r1.168 -r1.169 src/sys/arch/amd64/amd64/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/locore.S
diff -u src/sys/arch/amd64/amd64/locore.S:1.168 src/sys/arch/amd64/amd64/locore.S:1.169
--- src/sys/arch/amd64/amd64/locore.S:1.168	Mon Jul  9 18:43:05 2018
+++ src/sys/arch/amd64/amd64/locore.S	Mon Jul  9 18:52:04 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.S,v 1.168 2018/07/09 18:43:05 maxv Exp $	*/
+/*	$NetBSD: locore.S,v 1.169 2018/07/09 18:52:04 maxv Exp $	*/
 
 /*
  * Copyright-o-rama!
@@ -1105,21 +1105,17 @@ ENTRY(cpu_switchto)
 	jnz	.Lswitch_return
 
 #ifdef SVS
-	pushq	%rdx
 	movb	_C_LABEL(svs_enabled),%dl
 	testb	%dl,%dl
 	jz	.Lskip_svs
 	callq	_C_LABEL(svs_lwp_switch)
 .Lskip_svs:
-	popq	%rdx
 #endif
 
 #ifndef XEN
-	pushq	%rdx
 	movq	%r13,%rdi
 	movq	%r12,%rsi
 	callq	_C_LABEL(speculation_barrier)
-	popq	%rdx
 #endif
 
 	/* Switch ring0 stack */
@@ -1147,7 +1143,6 @@ ENTRY(cpu_switchto)
 .Lring0_switched:
 
 #ifndef XEN
-	pushq	%rdx
 	movb	_C_LABEL(x86_fpu_eager),%dl
 	testb	%dl,%dl
 	jz	.Lno_eagerfpu
@@ -1155,7 +1150,6 @@ ENTRY(cpu_switchto)
 	movq	%r12,%rsi
 	callq	_C_LABEL(fpu_eagerswitch)
 .Lno_eagerfpu:
-	popq	%rdx
 #endif
 
 	/* Don't bother with the rest if switching to a system process. */



CVS commit: src/sys/arch/amd64/amd64

2018-07-09 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Mon Jul  9 18:43:05 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: locore.S

Log Message:
Small optimization: don't execute the Meltdown/SpectreV2 cswitch code if
we're leaving a softint. We were executing the softint with the LWP's
context, so no need to switch the SVS/IBRS contexts, we already are in
the desired contexts.


To generate a diff of this commit:
cvs rdiff -u -r1.167 -r1.168 src/sys/arch/amd64/amd64/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/locore.S
diff -u src/sys/arch/amd64/amd64/locore.S:1.167 src/sys/arch/amd64/amd64/locore.S:1.168
--- src/sys/arch/amd64/amd64/locore.S:1.167	Fri Jun 29 19:21:43 2018
+++ src/sys/arch/amd64/amd64/locore.S	Mon Jul  9 18:43:05 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.S,v 1.167 2018/06/29 19:21:43 maxv Exp $	*/
+/*	$NetBSD: locore.S,v 1.168 2018/07/09 18:43:05 maxv Exp $	*/
 
 /*
  * Copyright-o-rama!
@@ -1088,26 +1088,6 @@ ENTRY(cpu_switchto)
 	movq	%rbp,PCB_RBP(%rax)
 .Lskip_save:
 
-#ifdef SVS
-	pushq	%rdx
-	movb	_C_LABEL(svs_enabled),%dl
-	testb	%dl,%dl
-	jz	.Lskip_svs
-	callq	_C_LABEL(svs_lwp_switch)
-.Lskip_svs:
-	popq	%rdx
-
-	/* RDI/RSI got clobbered. */
-	movq	%r13,%rdi
-	movq	%r12,%rsi
-#endif
-
-#ifndef XEN
-	pushq	%rdx
-	callq	_C_LABEL(speculation_barrier)
-	popq	%rdx
-#endif
-
 	/* Switch to newlwp's stack. */
 	movq	L_PCB(%r12),%r14
 	movq	PCB_RSP(%r14),%rsp
@@ -1124,6 +1104,24 @@ ENTRY(cpu_switchto)
 	testb	%dl,%dl		/* returning = true ? */
 	jnz	.Lswitch_return
 
+#ifdef SVS
+	pushq	%rdx
+	movb	_C_LABEL(svs_enabled),%dl
+	testb	%dl,%dl
+	jz	.Lskip_svs
+	callq	_C_LABEL(svs_lwp_switch)
+.Lskip_svs:
+	popq	%rdx
+#endif
+
+#ifndef XEN
+	pushq	%rdx
+	movq	%r13,%rdi
+	movq	%r12,%rsi
+	callq	_C_LABEL(speculation_barrier)
+	popq	%rdx
+#endif
+
 	/* Switch ring0 stack */
 #ifdef SVS
 	movb	_C_LABEL(svs_enabled),%al



CVS commit: src/sys/arch/amd64/amd64

2018-06-20 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Wed Jun 20 11:45:25 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: vector.S

Log Message:
Put these arrays in .rodata, they aren't supposed to be executable.


To generate a diff of this commit:
cvs rdiff -u -r1.62 -r1.63 src/sys/arch/amd64/amd64/vector.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/vector.S
diff -u src/sys/arch/amd64/amd64/vector.S:1.62 src/sys/arch/amd64/amd64/vector.S:1.63
--- src/sys/arch/amd64/amd64/vector.S:1.62	Tue Apr  3 07:20:52 2018
+++ src/sys/arch/amd64/amd64/vector.S	Wed Jun 20 11:45:25 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: vector.S,v 1.62 2018/04/03 07:20:52 christos Exp $	*/
+/*	$NetBSD: vector.S,v 1.63 2018/06/20 11:45:25 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008 The NetBSD Foundation, Inc.
@@ -631,6 +631,8 @@ LABEL(name ## _stubs); \
 	INTRSTUB_ENTRY(name ## 31)		; \
 END(name ## _stubs)
 
+	.section .rodata
+
 INTRSTUB_ARRAY_16(legacy)
 
 #if NIOAPIC > 0



CVS commit: src/sys/arch/amd64/amd64

2018-05-25 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Fri May 25 15:33:56 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: amd64_trap.S

Log Message:
When the previous contrext is in kernel mode we are not guaranteed to have
a 16-byte-aligned stack pointer, so align it. That's what the CPU would do
on exception entry.


To generate a diff of this commit:
cvs rdiff -u -r1.41 -r1.42 src/sys/arch/amd64/amd64/amd64_trap.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/amd64_trap.S
diff -u src/sys/arch/amd64/amd64/amd64_trap.S:1.41 src/sys/arch/amd64/amd64/amd64_trap.S:1.42
--- src/sys/arch/amd64/amd64/amd64_trap.S:1.41	Tue May  8 17:20:44 2018
+++ src/sys/arch/amd64/amd64/amd64_trap.S	Fri May 25 15:33:56 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: amd64_trap.S,v 1.41 2018/05/08 17:20:44 maxv Exp $	*/
+/*	$NetBSD: amd64_trap.S,v 1.42 2018/05/25 15:33:56 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008, 2017 The NetBSD Foundation, Inc.
@@ -121,6 +121,7 @@
 		movq	PCB_RSP0(%rax),%rax
 	.else
 		movq	TF_RSP(%rsp),%rax
+		andq	$(~0xF),%rax
 	.endif
 
 	subq	$(5*8),%rax



CVS commit: src/sys/arch/amd64/amd64

2018-04-23 Thread Joerg Sonnenberger
Module Name:src
Committed By:   joerg
Date:   Mon Apr 23 22:53:04 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: locore.S

Log Message:
Adjust Xsyscall_svs to not use movq for 64bit immediates either.


To generate a diff of this commit:
cvs rdiff -u -r1.164 -r1.165 src/sys/arch/amd64/amd64/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/locore.S
diff -u src/sys/arch/amd64/amd64/locore.S:1.164 src/sys/arch/amd64/amd64/locore.S:1.165
--- src/sys/arch/amd64/amd64/locore.S:1.164	Sat Apr 21 23:25:01 2018
+++ src/sys/arch/amd64/amd64/locore.S	Mon Apr 23 22:53:04 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.S,v 1.164 2018/04/21 23:25:01 joerg Exp $	*/
+/*	$NetBSD: locore.S,v 1.165 2018/04/23 22:53:04 joerg Exp $	*/
 
 /*
  * Copyright-o-rama!
@@ -1388,8 +1388,8 @@ IDTVEC(\name)
 
 	/* Get the LWP's kernel stack pointer in %rax */
 	.if	\is_svs
-		movq	%rax,SVS_UTLS+UTLS_SCRATCH
-		movq	SVS_UTLS+UTLS_RSP0,%rax
+		movabs	%rax,SVS_UTLS+UTLS_SCRATCH
+		movabs	SVS_UTLS+UTLS_RSP0,%rax
 	.else
 		movq	%rax,CPUVAR(SCRATCH)
 		movq	CPUVAR(CURLWP),%rax
@@ -1407,7 +1407,7 @@ IDTVEC(\name)
 
 	/* Restore %rax */
 	.if	\is_svs
-		movq	SVS_UTLS+UTLS_SCRATCH,%rax
+		movabs	SVS_UTLS+UTLS_SCRATCH,%rax
 	.else
 		movq	CPUVAR(SCRATCH),%rax
 	.endif



CVS commit: src/sys/arch/amd64/amd64

2018-04-21 Thread Joerg Sonnenberger
Module Name:src
Committed By:   joerg
Date:   Sat Apr 21 23:25:01 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: locore.S

Log Message:
Do not use movq for loading arbitrary 64bit immediates. The ISA
restricts it to 32bit immediates.


To generate a diff of this commit:
cvs rdiff -u -r1.163 -r1.164 src/sys/arch/amd64/amd64/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/locore.S
diff -u src/sys/arch/amd64/amd64/locore.S:1.163 src/sys/arch/amd64/amd64/locore.S:1.164
--- src/sys/arch/amd64/amd64/locore.S:1.163	Fri Mar 30 09:53:08 2018
+++ src/sys/arch/amd64/amd64/locore.S	Sat Apr 21 23:25:01 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.S,v 1.163 2018/03/30 09:53:08 maxv Exp $	*/
+/*	$NetBSD: locore.S,v 1.164 2018/04/21 23:25:01 joerg Exp $	*/
 
 /*
  * Copyright-o-rama!
@@ -1616,7 +1616,7 @@ END(intrfastexit)
 	.globl	nosvs_leave_altstack, nosvs_leave_altstack_end
 
 LABEL(svs_enter)
-	movq	SVS_UTLS+UTLS_KPDIRPA,%rax
+	movabs	SVS_UTLS+UTLS_KPDIRPA,%rax
 	movq	%rax,%cr3
 	movq	CPUVAR(KRSP0),%rsp
 LABEL(svs_enter_end)
@@ -1624,7 +1624,7 @@ LABEL(svs_enter_end)
 LABEL(svs_enter_altstack)
 	testb	$SEL_UPL,TF_CS(%rsp)
 	jz	1234f
-	movq	SVS_UTLS+UTLS_KPDIRPA,%rax
+	movabs	SVS_UTLS+UTLS_KPDIRPA,%rax
 	movq	%rax,%cr3
 1234:
 LABEL(svs_enter_altstack_end)



CVS commit: src/sys/arch/amd64/amd64

2018-04-02 Thread Michael van Elst
Module Name:src
Committed By:   mlelstv
Date:   Mon Apr  2 22:29:33 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: spl.S

Log Message:
typo


To generate a diff of this commit:
cvs rdiff -u -r1.32 -r1.33 src/sys/arch/amd64/amd64/spl.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/spl.S
diff -u src/sys/arch/amd64/amd64/spl.S:1.32 src/sys/arch/amd64/amd64/spl.S:1.33
--- src/sys/arch/amd64/amd64/spl.S:1.32	Mon Apr  2 20:54:47 2018
+++ src/sys/arch/amd64/amd64/spl.S	Mon Apr  2 22:29:33 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: spl.S,v 1.32 2018/04/02 20:54:47 christos Exp $	*/
+/*	$NetBSD: spl.S,v 1.33 2018/04/02 22:29:33 mlelstv Exp $	*/
 
 /*
  * Copyright (c) 2003 Wasabi Systems, Inc.
@@ -311,7 +311,7 @@ IDTVEC(spllower)
 	popq	%r13
 	popq	%rbx
 	ret
-ITDVEC_END(spllower)
+IDTVEC_END(spllower)
 
 /*
  * void Xdoreti(void);



CVS commit: src/sys/arch/amd64/amd64

2018-04-02 Thread Christos Zoulas
Module Name:src
Committed By:   christos
Date:   Mon Apr  2 20:54:47 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: spl.S

Log Message:
use the right end macro: IDTVEC_END(name) instead of END(Xname)


To generate a diff of this commit:
cvs rdiff -u -r1.31 -r1.32 src/sys/arch/amd64/amd64/spl.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/spl.S
diff -u src/sys/arch/amd64/amd64/spl.S:1.31 src/sys/arch/amd64/amd64/spl.S:1.32
--- src/sys/arch/amd64/amd64/spl.S:1.31	Tue Nov 28 03:43:49 2017
+++ src/sys/arch/amd64/amd64/spl.S	Mon Apr  2 16:54:47 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: spl.S,v 1.31 2017/11/28 08:43:49 maxv Exp $	*/
+/*	$NetBSD: spl.S,v 1.32 2018/04/02 20:54:47 christos Exp $	*/
 
 /*
  * Copyright (c) 2003 Wasabi Systems, Inc.
@@ -127,7 +127,7 @@ IDTVEC(softintr)
 	popq	%r15			/* unwind switchframe */
 	addq	$(5 * 8),%rsp
 	jmp	*%r13			/* back to Xspllower/Xdoreti */
-END(Xsoftintr)
+IDTVEC_END(softintr)
 
 /*
  * softintr_ret()
@@ -167,7 +167,7 @@ IDTVEC(preemptrecurse)
 	call	_C_LABEL(kpreempt)
 	cli
 	jmp	*%r13			/* back to Xspllower */
-END(Xpreemptrecurse)
+IDTVEC_END(preemptrecurse)
 
 /*
  * Xpreemptresume()
@@ -187,7 +187,7 @@ IDTVEC(preemptresume)
 	call	_C_LABEL(preempt)	/* from user */
 	cli
 	jmp	*%r13			/* back to Xdoreti */
-END(Xpreemptresume)
+IDTVEC_END(preemptresume)
 
 /*
  * int splraise(int s);
@@ -311,7 +311,7 @@ IDTVEC(spllower)
 	popq	%r13
 	popq	%rbx
 	ret
-END(Xspllower)
+ITDVEC_END(spllower)
 
 /*
  * void Xdoreti(void);
@@ -365,4 +365,4 @@ LABEL(doreti_checkast)
 	CLI(si)
 	jmp	doreti_checkast		/* recheck ASTs */
 END(doreti_checkast)
-END(Xdoreti)
+IDTVEC_END(doreti)



CVS commit: src/sys/arch/amd64/amd64

2018-03-30 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Fri Mar 30 10:01:36 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: genassym.cf

Log Message:
Fix warning when compiling Xen; FLAT_RING3_CS64 is defined in a child of
xen.h, which is already included in genassym.cf. So don't redefine it.


To generate a diff of this commit:
cvs rdiff -u -r1.67 -r1.68 src/sys/arch/amd64/amd64/genassym.cf

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/genassym.cf
diff -u src/sys/arch/amd64/amd64/genassym.cf:1.67 src/sys/arch/amd64/amd64/genassym.cf:1.68
--- src/sys/arch/amd64/amd64/genassym.cf:1.67	Thu Jan 18 07:25:34 2018
+++ src/sys/arch/amd64/amd64/genassym.cf	Fri Mar 30 10:01:36 2018
@@ -1,4 +1,4 @@
-#	$NetBSD: genassym.cf,v 1.67 2018/01/18 07:25:34 maxv Exp $
+#	$NetBSD: genassym.cf,v 1.68 2018/03/30 10:01:36 maxv Exp $
 
 #
 # Copyright (c) 1998, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -358,7 +358,6 @@ define EVTCHN_UPCALL_MASK	offsetof(struc
 define XEN_PT_BASE		offsetof(struct start_info, pt_base)
 define XEN_NR_PT_FRAMES		offsetof(struct start_info, nr_pt_frames)
 define __HYPERVISOR_iret	__HYPERVISOR_iret
-define FLAT_RING3_CS64		FLAT_RING3_CS64
 endif
 
 define	NKL4_KIMG_ENTRIES	NKL4_KIMG_ENTRIES



CVS commit: src/sys/arch/amd64/amd64

2018-03-30 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Fri Mar 30 09:53:08 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: locore.S

Log Message:
Add #ifndef XEN, xen doesn't have speculation_barrier.


To generate a diff of this commit:
cvs rdiff -u -r1.162 -r1.163 src/sys/arch/amd64/amd64/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/locore.S
diff -u src/sys/arch/amd64/amd64/locore.S:1.162 src/sys/arch/amd64/amd64/locore.S:1.163
--- src/sys/arch/amd64/amd64/locore.S:1.162	Thu Mar 29 07:21:24 2018
+++ src/sys/arch/amd64/amd64/locore.S	Fri Mar 30 09:53:08 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.S,v 1.162 2018/03/29 07:21:24 maxv Exp $	*/
+/*	$NetBSD: locore.S,v 1.163 2018/03/30 09:53:08 maxv Exp $	*/
 
 /*
  * Copyright-o-rama!
@@ -1102,9 +1102,11 @@ ENTRY(cpu_switchto)
 	movq	%r12,%rsi
 #endif
 
+#ifndef XEN
 	pushq	%rdx
 	callq	_C_LABEL(speculation_barrier)
 	popq	%rdx
+#endif
 
 	/* Switch to newlwp's stack. */
 	movq	L_PCB(%r12),%r14



CVS commit: src/sys/arch/amd64/amd64

2018-03-28 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Wed Mar 28 19:56:40 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: locore.S

Log Message:
The call to svs_lwp_switch can clobber %rdi/%rsi, so restore them before
calling speculation_barrier.


To generate a diff of this commit:
cvs rdiff -u -r1.160 -r1.161 src/sys/arch/amd64/amd64/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/locore.S
diff -u src/sys/arch/amd64/amd64/locore.S:1.160 src/sys/arch/amd64/amd64/locore.S:1.161
--- src/sys/arch/amd64/amd64/locore.S:1.160	Wed Mar 28 16:02:49 2018
+++ src/sys/arch/amd64/amd64/locore.S	Wed Mar 28 19:56:40 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.S,v 1.160 2018/03/28 16:02:49 maxv Exp $	*/
+/*	$NetBSD: locore.S,v 1.161 2018/03/28 19:56:40 maxv Exp $	*/
 
 /*
  * Copyright-o-rama!
@@ -1096,6 +1096,10 @@ ENTRY(cpu_switchto)
 	callq	_C_LABEL(svs_lwp_switch)
 .Lskip_svs:
 	popq	%rdx
+
+	/* Restore rdi/rsi for speculation_barrier */
+	movq	%r13,%rdi
+	movq	%r12,%rsi
 #endif
 
 	pushq	%rdx



CVS commit: src/sys/arch/amd64/amd64

2018-03-20 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Tue Mar 20 18:27:58 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: amd64_trap.S locore.S

Log Message:
(Re)Fix handling of segment register faults. My previous attempt did fix
faults occuring when reloading %es/%ds/%fs/%gs, but it did not fix faults
occuring when executing 'iretq', because before iretq we needed to do +16
in %rsp, and the resulting stack layout was not the one kernuser_reenter()
expected (tf_trapno and tf_err were not there).

So now: pop tf_trapno and tf_err right away in intrfastexit(), and update
the layout in kernuser_reenter() accordingly. The resulting code is
actually simpler.

Tested by "hardcoding" an iretq fault; the process correctly receives a
SIGSEGV.

(Note that segment register faults do not happen in the wild, you really
need to try hard to trigger one.)


To generate a diff of this commit:
cvs rdiff -u -r1.38 -r1.39 src/sys/arch/amd64/amd64/amd64_trap.S
cvs rdiff -u -r1.158 -r1.159 src/sys/arch/amd64/amd64/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/amd64_trap.S
diff -u src/sys/arch/amd64/amd64/amd64_trap.S:1.38 src/sys/arch/amd64/amd64/amd64_trap.S:1.39
--- src/sys/arch/amd64/amd64/amd64_trap.S:1.38	Tue Mar 20 14:26:49 2018
+++ src/sys/arch/amd64/amd64/amd64_trap.S	Tue Mar 20 18:27:58 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: amd64_trap.S,v 1.38 2018/03/20 14:26:49 maxv Exp $	*/
+/*	$NetBSD: amd64_trap.S,v 1.39 2018/03/20 18:27:58 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008, 2017 The NetBSD Foundation, Inc.
@@ -388,8 +388,8 @@ IDTVEC_END(intrspurious)
  * When this happens, the kernel is re-entered in kernel mode, but the
  * previous context is in kernel mode too.
  *
- * We have two iret frames in the stack. In the first one, the 'rsp' field
- * points to the outer iret frame:
+ * We have two iret frames in the stack. In the first one, we also pushed
+ * 'trapno' and 'err'. The 'rsp' field points to the outer iret frame:
  *
  * +---+
  * | trapno | err | rip | cs=ring0 | rflags | rsp | ss |
@@ -397,19 +397,19 @@ IDTVEC_END(intrspurious)
  * |
  *   +-+
  *   |
- *   |+---+
- *   +--> | trapno | err | rip | cs=ring3 | rflags | rsp | ss |
- *+---+
+ *   |++
+ *   +--> | rip | cs=ring3 | rflags | rsp | ss |
+ *++
  *
  * We perform a three-step procedure:
  *
- *  o We copy the 'trapno' field of the current frame into the 'trapno'
- *field of the outer frame.
- *
  *  o We update RSP to point to the outer frame. This outer frame is in the
  *same stack as the current frame, and likely just after the current
  *frame.
  *
+ *  o We push, in this outer frame, the 'err' and 'trapno' fields of the
+ *CURRENT frame.
+ *
  *  o We do a normal INTRENTRY. Now that RSP points to the outer frame,
  *everything behaves as if we had received a trap from the outer frame,
  *that is to say, from userland directly.
@@ -429,7 +429,7 @@ IDTVEC_END(intrspurious)
  *stack (nested), and would double-fault because it touches the redzone
  *below the stack (see the documentation in x86/x86/svs.c). By popping
  *the GPR part of the stack, we leave enough stack for the CPU to push
- *an iret frame, and for us to push two 8-byte registers too.
+ *an iret frame, and for us to push one 8-byte register (%rdi) too.
  */
 	_ALIGN_TEXT
 LABEL(kernuser_reenter)
@@ -480,14 +480,19 @@ LABEL(kernuser_reenter)
 	jmp	.Lnormal_entry
 
 .Lkernelmode_but_user:
-	movq	TF_SMALL_REGPUSHED(TF_RSP, %rsp),%rdi
+	/*
+	 * Here we have %rdi pushed on the stack, hence 8+.
+	 */
+	movq	%rsp,%rdi
+	movq	TF_SMALL_REGPUSHED(TF_RSP, %rsp),%rsp
+
+	/* Push tf_err and tf_trapno */
+	pushq	8+8(%rdi)	/* 8+8(%rdi) = current TF_ERR */
+	pushq	8+0(%rdi)	/* 8+0(%rdi) = current TF_TRAPNO */
 
-	pushq	%rax
-	movq	16(%rsp),%rax	/* 16(%rsp) = current TF_TRAPNO */
-	movq	%rax,(%rdi)	/* (%rdi) = outer TF_TRAPNO */
-	popq	%rax
+	/* Restore %rdi */
+	movq	(%rdi),%rdi
 
-	movq	%rdi,%rsp
 	jmp	.Lnormal_entry
 END(kernuser_reenter)
 #endif

Index: src/sys/arch/amd64/amd64/locore.S
diff -u src/sys/arch/amd64/amd64/locore.S:1.158 src/sys/arch/amd64/amd64/locore.S:1.159
--- src/sys/arch/amd64/amd64/locore.S:1.158	Tue Mar 20 14:26:49 2018
+++ src/sys/arch/amd64/amd64/locore.S	Tue Mar 20 18:27:58 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.S,v 1.158 2018/03/20 14:26:49 maxv Exp $	*/
+/*	$NetBSD: locore.S,v 1.159 2018/03/20 18:27:58 maxv Exp $	*/
 
 /*
  * Copyright-o-rama!
@@ -1548,14 +1548,14 @@ END(pagezero)
  * documentation in 

CVS commit: src/sys/arch/amd64/amd64

2018-03-20 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Tue Mar 20 14:26:49 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: amd64_trap.S locore.S

Log Message:
Remove the sysretq fault handler. It is broken with SVS, and not really
needed anyway. Initially I had added it so that if such a fault was
received the kernel would panic "cleanly" instead of crashing in a
potentially undefined way.

I'll re-add this handler later.


To generate a diff of this commit:
cvs rdiff -u -r1.37 -r1.38 src/sys/arch/amd64/amd64/amd64_trap.S
cvs rdiff -u -r1.157 -r1.158 src/sys/arch/amd64/amd64/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/amd64_trap.S
diff -u src/sys/arch/amd64/amd64/amd64_trap.S:1.37 src/sys/arch/amd64/amd64/amd64_trap.S:1.38
--- src/sys/arch/amd64/amd64/amd64_trap.S:1.37	Sun Feb 25 12:37:16 2018
+++ src/sys/arch/amd64/amd64/amd64_trap.S	Tue Mar 20 14:26:49 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: amd64_trap.S,v 1.37 2018/02/25 12:37:16 maxv Exp $	*/
+/*	$NetBSD: amd64_trap.S,v 1.38 2018/03/20 14:26:49 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008, 2017 The NetBSD Foundation, Inc.
@@ -377,9 +377,8 @@ IDTVEC_END(intrspurious)
 
 /*
  * It is possible that we received a trap in kernel mode, but with the user
- * context loaded. There are six cases where this can happen:
+ * context loaded. There are five cases where this can happen:
  *
- *  o Execution of SYSRETQ.
  *  o Execution of IRETQ.
  *  o Reload of ES.
  *  o Reload of DS.
@@ -446,12 +445,7 @@ LABEL(kernuser_reenter)
 	/* We will clobber %rdi */
 	pushq	%rdi
 
-	/* Case 1: fault on sysretq? */
-	leaq	do_sysret(%rip),%rdi
-	cmpq	%rdi,TF_SMALL_REGPUSHED(TF_RIP, %rsp)
-	je	.Lkernelmode_but_user
-
-	/* Case 2: fault on iretq? */
+	/* Case 1: fault on iretq? */
 	leaq	do_iret(%rip),%rdi
 	cmpq	%rdi,TF_SMALL_REGPUSHED(TF_RIP, %rsp)
 	jne	5f
@@ -461,22 +455,22 @@ LABEL(kernuser_reenter)
 	jmp	.Lkernelmode_but_user	/* to user - must restore %gs */
 5:
 
-	/* Case 3: move to %es? */
+	/* Case 2: move to %es? */
 	leaq	do_mov_es(%rip),%rdi
 	cmpq	%rdi,TF_SMALL_REGPUSHED(TF_RIP, %rsp)
 	je	.Lkernelmode_but_user
 
-	/* Case 4: move to %ds? */
+	/* Case 3: move to %ds? */
 	leaq	do_mov_ds(%rip),%rdi
 	cmpq	%rdi,TF_SMALL_REGPUSHED(TF_RIP, %rsp)
 	je	.Lkernelmode_but_user
 
-	/* Case 5: move to %fs? */
+	/* Case 4: move to %fs? */
 	leaq	do_mov_fs(%rip),%rdi
 	cmpq	%rdi,TF_SMALL_REGPUSHED(TF_RIP, %rsp)
 	je	.Lkernelmode_but_user
 
-	/* Case 6: move to %gs? */
+	/* Case 5: move to %gs? */
 	leaq	do_mov_gs(%rip),%rdi
 	cmpq	%rdi,TF_SMALL_REGPUSHED(TF_RIP, %rsp)
 	je	.Lkernelmode_but_user

Index: src/sys/arch/amd64/amd64/locore.S
diff -u src/sys/arch/amd64/amd64/locore.S:1.157 src/sys/arch/amd64/amd64/locore.S:1.158
--- src/sys/arch/amd64/amd64/locore.S:1.157	Sun Feb 25 12:37:16 2018
+++ src/sys/arch/amd64/amd64/locore.S	Tue Mar 20 14:26:49 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.S,v 1.157 2018/02/25 12:37:16 maxv Exp $	*/
+/*	$NetBSD: locore.S,v 1.158 2018/03/20 14:26:49 maxv Exp $	*/
 
 /*
  * Copyright-o-rama!
@@ -330,7 +330,6 @@
 	.globl	_C_LABEL(biosbasemem)
 	.globl	_C_LABEL(biosextmem)
 	.globl	_C_LABEL(lwp0uarea)
-	.globl	do_sysret
 	.globl	do_mov_es
 	.globl	do_mov_ds
 	.globl	do_mov_fs
@@ -1471,7 +1470,6 @@ LABEL(syscall_sysret)
 	movq	TF_RIP(%rsp),%rcx	/* %rip for sysret */
 	movq	TF_RFLAGS(%rsp),%r11	/* %flags for sysret */
 	movq	TF_RSP(%rsp),%rsp
-do_sysret:
 	sysretq
 #else
 	addq	$TF_RIP,%rsp



CVS commit: src/sys/arch/amd64/amd64

2018-03-17 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Mar 17 17:12:39 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: machdep.c

Log Message:
Add missing opt_svs.h.


To generate a diff of this commit:
cvs rdiff -u -r1.301 -r1.302 src/sys/arch/amd64/amd64/machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/machdep.c
diff -u src/sys/arch/amd64/amd64/machdep.c:1.301 src/sys/arch/amd64/amd64/machdep.c:1.302
--- src/sys/arch/amd64/amd64/machdep.c:1.301	Thu Feb 22 13:27:17 2018
+++ src/sys/arch/amd64/amd64/machdep.c	Sat Mar 17 17:12:39 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: machdep.c,v 1.301 2018/02/22 13:27:17 maxv Exp $	*/
+/*	$NetBSD: machdep.c,v 1.302 2018/03/17 17:12:39 maxv Exp $	*/
 
 /*
  * Copyright (c) 1996, 1997, 1998, 2000, 2006, 2007, 2008, 2011
@@ -110,7 +110,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.301 2018/02/22 13:27:17 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.302 2018/03/17 17:12:39 maxv Exp $");
 
 /* #define XENDEBUG_LOW  */
 
@@ -122,6 +122,7 @@ __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 
 #include "opt_mtrr.h"
 #include "opt_realmem.h"
 #include "opt_xen.h"
+#include "opt_svs.h"
 #include "opt_kaslr.h"
 #ifndef XEN
 #include "opt_physmem.h"



CVS commit: src/sys/arch/amd64/amd64

2018-03-16 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Fri Mar 16 08:48:34 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: db_machdep.c vector.S

Log Message:
Rename "handle_" -> "Xhandle_", and add the function names (introduced by
SVS) in db_machdep.c.

Should fix the DDB part of PR/53060.


To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/amd64/amd64/db_machdep.c
cvs rdiff -u -r1.60 -r1.61 src/sys/arch/amd64/amd64/vector.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/db_machdep.c
diff -u src/sys/arch/amd64/amd64/db_machdep.c:1.5 src/sys/arch/amd64/amd64/db_machdep.c:1.6
--- src/sys/arch/amd64/amd64/db_machdep.c:1.5	Sun Feb 11 08:27:18 2018
+++ src/sys/arch/amd64/amd64/db_machdep.c	Fri Mar 16 08:48:34 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: db_machdep.c,v 1.5 2018/02/11 08:27:18 maxv Exp $	*/
+/*	$NetBSD: db_machdep.c,v 1.6 2018/03/16 08:48:34 maxv Exp $	*/
 
 /*
  * Mach Operating System
@@ -26,7 +26,7 @@
  * rights to redistribute these changes.
  */
 #include 
-__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.5 2018/02/11 08:27:18 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.6 2018/03/16 08:48:34 maxv Exp $");
 
 #include 
 #include 
@@ -213,11 +213,13 @@ db_frame_info(long *frame, db_addr_t cal
 		if (!strcmp(name, "trap")) {
 			*is_trap = TRAP;
 			narg = 0;
-		} else if (!strcmp(name, "syscall")) {
+		} else if (!strcmp(name, "syscall") ||
+		!strcmp(name, "handle_syscall")) {
 			*is_trap = SYSCALL;
 			narg = 0;
 		} else if (name[0] == 'X') {
 			if (!strncmp(name, "Xintr", 5) ||
+			!strncmp(name, "Xhandle", 7) ||
 			!strncmp(name, "Xresume", 7) ||
 			!strncmp(name, "Xstray", 6) ||
 			!strncmp(name, "Xhold", 5) ||

Index: src/sys/arch/amd64/amd64/vector.S
diff -u src/sys/arch/amd64/amd64/vector.S:1.60 src/sys/arch/amd64/amd64/vector.S:1.61
--- src/sys/arch/amd64/amd64/vector.S:1.60	Sat Feb 17 19:26:20 2018
+++ src/sys/arch/amd64/amd64/vector.S	Fri Mar 16 08:48:34 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: vector.S,v 1.60 2018/02/17 19:26:20 maxv Exp $	*/
+/*	$NetBSD: vector.S,v 1.61 2018/03/16 08:48:34 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008 The NetBSD Foundation, Inc.
@@ -114,7 +114,7 @@ IDTVEC(recurse_lapic_ipi)
 	INTR_RECURSE_ENTRY
 	jmp	1f
 IDTVEC_END(recurse_lapic_ipi)
-NENTRY(handle_x2apic_ipi)
+IDTVEC(handle_x2apic_ipi)
 	movl	$(MSR_X2APIC_BASE + MSR_X2APIC_EOI),%ecx
 	xorl	%eax,%eax
 	xorl	%edx,%edx
@@ -123,15 +123,15 @@ NENTRY(handle_x2apic_ipi)
 	cmpl	$IPL_HIGH,%ebx
 	jae	2f
 	jmp	1f
-END(handle_x2apic_ipi)
-NENTRY(handle_lapic_ipi)
+IDTVEC_END(handle_x2apic_ipi)
+IDTVEC(handle_lapic_ipi)
 	movq	_C_LABEL(local_apic_va),%rbx
 	movl	$0,LAPIC_EOI(%rbx)
 	movl	CPUVAR(ILEVEL),%ebx
 	cmpl	$IPL_HIGH,%ebx
 	jae	2f
 	jmp	1f
-END(handle_lapic_ipi)
+IDTVEC_END(handle_lapic_ipi)
 IDTVEC(resume_lapic_ipi)
 1:
 	incl	CPUVAR(IDEPTH)
@@ -150,18 +150,18 @@ IDTVEC(intr_x2apic_ipi)
 	pushq	$0
 	pushq	$T_ASTFLT
 	INTRENTRY
-	jmp	_C_LABEL(handle_x2apic_ipi)
+	jmp	_C_LABEL(Xhandle_x2apic_ipi)
 IDTVEC_END(intr_x2apic_ipi)
 IDTVEC(intr_lapic_ipi)
 	pushq	$0
 	pushq	$T_ASTFLT
 	INTRENTRY
-	jmp	_C_LABEL(handle_lapic_ipi)
+	jmp	_C_LABEL(Xhandle_lapic_ipi)
 IDTVEC_END(intr_lapic_ipi)
 	TEXT_USER_END
 
 #if defined(DDB)
-NENTRY(handle_intrddbipi)
+IDTVEC(handle_intrddbipi)
 	movl	$0xf,%eax
 	movq	%rax,%cr8
 	movq	_C_LABEL(local_apic_va),%rbx
@@ -171,8 +171,8 @@ NENTRY(handle_intrddbipi)
 	xorl	%eax,%eax
 	movq	%rax,%cr8
 	INTRFASTEXIT
-END(handle_intrddbipi)
-NENTRY(handle_x2apic_intrddbipi)
+IDTVEC_END(handle_intrddbipi)
+IDTVEC(handle_x2apic_intrddbipi)
 	movl	$0xf,%eax
 	movq	%rax,%cr8
 	movl	$(MSR_X2APIC_BASE + MSR_X2APIC_EOI),%ecx
@@ -184,20 +184,20 @@ NENTRY(handle_x2apic_intrddbipi)
 	xorl	%eax,%eax
 	movq	%rax,%cr8
 	INTRFASTEXIT
-END(handle_x2apic_intrddbipi)
+IDTVEC_END(handle_x2apic_intrddbipi)
 
 	TEXT_USER_BEGIN
 IDTVEC(intrddbipi)
 	pushq	$0
 	pushq	$T_BPTFLT
 	INTRENTRY
-	jmp	_C_LABEL(handle_intrddbipi)
+	jmp	_C_LABEL(Xhandle_intrddbipi)
 IDTVEC_END(intrddbipi)
 IDTVEC(x2apic_intrddbipi)
 	pushq	$0
 	pushq	$T_BPTFLT
 	INTRENTRY
-	jmp	_C_LABEL(handle_x2apic_intrddbipi)
+	jmp	_C_LABEL(Xhandle_x2apic_intrddbipi)
 IDTVEC_END(x2apic_intrddbipi)
 	TEXT_USER_END
 
@@ -214,7 +214,7 @@ IDTVEC(recurse_lapic_ltimer)
 	INTR_RECURSE_ENTRY
 	jmp	1f
 IDTVEC_END(recurse_lapic_ltimer)
-NENTRY(handle_x2apic_ltimer)
+IDTVEC(handle_x2apic_ltimer)
 	movl	$(MSR_X2APIC_BASE + MSR_X2APIC_EOI),%ecx
 	xorl	%eax,%eax
 	xorl	%edx,%edx
@@ -223,15 +223,15 @@ NENTRY(handle_x2apic_ltimer)
 	cmpl	$IPL_CLOCK,%ebx
 	jae	2f
 	jmp	1f
-END(handle_x2apic_ltimer)
-NENTRY(handle_lapic_ltimer)
+IDTVEC_END(handle_x2apic_ltimer)
+IDTVEC(handle_lapic_ltimer)
 	movq	_C_LABEL(local_apic_va),%rbx
 	movl	$0,LAPIC_EOI(%rbx)
 	movl	CPUVAR(ILEVEL),%ebx
 	cmpl	$IPL_CLOCK,%ebx
 	jae	2f
 	jmp	1f
-END(handle_lapic_ltimer)
+IDTVEC_END(handle_lapic_ltimer)
 

CVS commit: src/sys/arch/amd64/amd64

2018-02-25 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sun Feb 25 13:09:34 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: trap.c

Log Message:
Mmh. We shouldn't read %cr2 here. %cr2 is initialized by the CPU only
during page faults (T_PAGEFLT), so here we're reading a value that comes
from a previous page fault.

That's a real problem; if you launch an unprivileged process, set up a
signal handler, make it sleep 10 seconds, and trigger a T_ALIGNFLT fault,
you get in si_addr the address of another LWP's page - and perhaps this
can be used to defeat userland ASLR.

This bug has been there since 2003.


To generate a diff of this commit:
cvs rdiff -u -r1.112 -r1.113 src/sys/arch/amd64/amd64/trap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/trap.c
diff -u src/sys/arch/amd64/amd64/trap.c:1.112 src/sys/arch/amd64/amd64/trap.c:1.113
--- src/sys/arch/amd64/amd64/trap.c:1.112	Sun Feb 25 12:37:16 2018
+++ src/sys/arch/amd64/amd64/trap.c	Sun Feb 25 13:09:33 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: trap.c,v 1.112 2018/02/25 12:37:16 maxv Exp $	*/
+/*	$NetBSD: trap.c,v 1.113 2018/02/25 13:09:33 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2000, 2017 The NetBSD Foundation, Inc.
@@ -64,7 +64,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.112 2018/02/25 12:37:16 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.113 2018/02/25 13:09:33 maxv Exp $");
 
 #include "opt_ddb.h"
 #include "opt_kgdb.h"
@@ -376,7 +376,7 @@ trap(struct trapframe *frame)
 	case T_ALIGNFLT|T_USER:
 		KSI_INIT_TRAP();
 		ksi.ksi_trap = type & ~T_USER;
-		ksi.ksi_addr = (void *)rcr2();
+		ksi.ksi_addr = (void *)frame->tf_rip;
 		switch (type) {
 		case T_SEGNPFLT|T_USER:
 		case T_STKFLT|T_USER:



CVS commit: src/sys/arch/amd64/amd64

2018-02-25 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sun Feb 25 12:37:16 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: amd64_trap.S locore.S trap.c

Log Message:
Fix handling of segment register faults when running with SVS. The behavior
is changed also in the non-SVS case.

I've put a documentation in amd64_trap.S. Basically, the problem with SVS
is that if iret faults, we already have a full trapframe pushed on the
stack and the CPU will push another frame on this stack (nested), but it
hits the redzone below the stack since it is still running with the user
page table loaded.

To fix that, we pop a good part of the trapframe earlier in intrfastexit.
If iret faults, the current %rsp has enough room for an iret frame, and
the CPU can push that without problem. We then switch back to the outer
iret frame (the frame the CPU was trying to pop by executing iret, but that
it didn't pop for real because iret faulted), call INTRENTRY, and handle
the trap as if it had been received from userland directly.


To generate a diff of this commit:
cvs rdiff -u -r1.36 -r1.37 src/sys/arch/amd64/amd64/amd64_trap.S
cvs rdiff -u -r1.156 -r1.157 src/sys/arch/amd64/amd64/locore.S
cvs rdiff -u -r1.111 -r1.112 src/sys/arch/amd64/amd64/trap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/amd64_trap.S
diff -u src/sys/arch/amd64/amd64/amd64_trap.S:1.36 src/sys/arch/amd64/amd64/amd64_trap.S:1.37
--- src/sys/arch/amd64/amd64/amd64_trap.S:1.36	Sun Feb 25 11:57:44 2018
+++ src/sys/arch/amd64/amd64/amd64_trap.S	Sun Feb 25 12:37:16 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: amd64_trap.S,v 1.36 2018/02/25 11:57:44 maxv Exp $	*/
+/*	$NetBSD: amd64_trap.S,v 1.37 2018/02/25 12:37:16 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008, 2017 The NetBSD Foundation, Inc.
@@ -368,69 +368,139 @@ IDTVEC_END(intrspurious)
 #ifndef kernuser_reenter
 /*
  * We need to worry about traps in kernel mode while the kernel %gs isn't
- * loaded. These are either faults on iretq during return to user or loads to
- * %gs.
+ * loaded. When such traps happen, we have CPL=0 and %gs=userland, and we
+ * must perform an additional swapgs to get %gs=kernel.
+ */
+
+#define TF_SMALL(val, reg)		(val - TF_REGSIZE)(reg)
+#define TF_SMALL_REGPUSHED(val, reg)	(val - (TF_REGSIZE - 8))(reg)
+
+/*
+ * It is possible that we received a trap in kernel mode, but with the user
+ * context loaded. There are six cases where this can happen:
  *
- * When such traps happen, we have CPL=0 and %gs=userland, and we must perform
- * an additional swapgs to get %gs=kernel.
+ *  o Execution of SYSRETQ.
+ *  o Execution of IRETQ.
+ *  o Reload of ES.
+ *  o Reload of DS.
+ *  o Reload of FS.
+ *  o Reload of GS.
+ *
+ * When this happens, the kernel is re-entered in kernel mode, but the
+ * previous context is in kernel mode too.
+ *
+ * We have two iret frames in the stack. In the first one, the 'rsp' field
+ * points to the outer iret frame:
+ *
+ * +---+
+ * | trapno | err | rip | cs=ring0 | rflags | rsp | ss |
+ * +---|---+
+ * |
+ *   +-+
+ *   |
+ *   |+---+
+ *   +--> | trapno | err | rip | cs=ring3 | rflags | rsp | ss |
+ *+---+
+ *
+ * We perform a three-step procedure:
+ *
+ *  o We copy the 'trapno' field of the current frame into the 'trapno'
+ *field of the outer frame.
+ *
+ *  o We update RSP to point to the outer frame. This outer frame is in the
+ *same stack as the current frame, and likely just after the current
+ *frame.
+ *
+ *  o We do a normal INTRENTRY. Now that RSP points to the outer frame,
+ *everything behaves as if we had received a trap from the outer frame,
+ *that is to say, from userland directly.
+ *
+ * Finally, we jump to 'calltrap' and handle the trap smoothly.
+ *
+ * Two notes regarding SVS:
+ *
+ *  o With SVS, we will receive the trap while the user page tables are
+ *loaded. That's not a problem, we don't touch anything unmapped here.
+ *
+ *  o With SVS, when the user page tables are loaded, the stack is really
+ *small, and can contain only one trapframe structure. Therefore, in
+ *intrfastexit, we must save the GPRs and pop their part of the stack
+ *right away. If we weren't doing that, and the reload of ES faulted for
+ *example, then the CPU would try to push an iret frame on the current
+ *stack (nested), and would double-fault because it touches the redzone
+ *below the stack (see the documentation in x86/x86/svs.c). By popping
+ *the GPR part of the stack, we leave enough stack for the CPU to push
+ *an iret frame, and for us to push two 8-byte 

CVS commit: src/sys/arch/amd64/amd64

2018-02-25 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sun Feb 25 11:57:44 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: amd64_trap.S

Log Message:
Ah. Don't use NENTRY() to declare check_swapgs, use LABEL() instead. NENTRY
puts the code in the .text section, so the effect of TEXT_USER_BEGIN was
overwritten, and check_swapgs was not put in the .text.user section.

As a result kernels running SVS would crash when jumping here - because we
execute this place with the user page table loaded, and in this page table
only .text.user is mapped.

While here, rename check_swapgs -> kernuser_reenter, because we do more
things than just SWAPGS.


To generate a diff of this commit:
cvs rdiff -u -r1.35 -r1.36 src/sys/arch/amd64/amd64/amd64_trap.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/amd64_trap.S
diff -u src/sys/arch/amd64/amd64/amd64_trap.S:1.35 src/sys/arch/amd64/amd64/amd64_trap.S:1.36
--- src/sys/arch/amd64/amd64/amd64_trap.S:1.35	Sun Feb 25 08:28:55 2018
+++ src/sys/arch/amd64/amd64/amd64_trap.S	Sun Feb 25 11:57:44 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: amd64_trap.S,v 1.35 2018/02/25 08:28:55 maxv Exp $	*/
+/*	$NetBSD: amd64_trap.S,v 1.36 2018/02/25 11:57:44 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008, 2017 The NetBSD Foundation, Inc.
@@ -273,22 +273,22 @@ IDTVEC_END(trap10)
  * equivalent of iret, if it does this code would be needed
  * in order to copy the user segment registers into the fault frame.
  */
-#define check_swapgs alltraps
+#define kernuser_reenter alltraps
 #endif
 
 IDTVEC(trap11)		/* #NP() Segment not present */
 	TRAP_NJ(T_SEGNPFLT)
-	jmp	check_swapgs
+	jmp	kernuser_reenter
 IDTVEC_END(trap11)
 
 IDTVEC(trap12)		/* #SS() Stack exception */
 	TRAP_NJ(T_STKFLT)
-	jmp	check_swapgs
+	jmp	kernuser_reenter
 IDTVEC_END(trap12)
 
 IDTVEC(trap13)		/* #GP() General protection */
 	TRAP_NJ(T_PROTFLT)
-	jmp	check_swapgs
+	jmp	kernuser_reenter
 IDTVEC_END(trap13)
 
 IDTVEC(trap14)
@@ -365,7 +365,7 @@ IDTVEC(intrspurious)
 	jmp	.Lalltraps_checkusr
 IDTVEC_END(intrspurious)
 
-#ifndef check_swapgs
+#ifndef kernuser_reenter
 /*
  * We need to worry about traps in kernel mode while the kernel %gs isn't
  * loaded. These are either faults on iretq during return to user or loads to
@@ -374,7 +374,8 @@ IDTVEC_END(intrspurious)
  * When such traps happen, we have CPL=0 and %gs=userland, and we must perform
  * an additional swapgs to get %gs=kernel.
  */
-NENTRY(check_swapgs)
+	_ALIGN_TEXT
+LABEL(kernuser_reenter)
 	INTRENTRY_L(3f,1:)
 2:
 	sti
@@ -406,7 +407,7 @@ NENTRY(check_swapgs)
 
 	/* None of the above cases */
 	jmp	2b	/* normal kernel fault */
-END(check_swapgs)
+END(kernuser_reenter)
 #endif
 
 	TEXT_USER_END



CVS commit: src/sys/arch/amd64/amd64

2018-02-25 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sun Feb 25 08:28:55 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: amd64_trap.S

Log Message:
Replace %rax -> %rdi, so that check_swapgs clobbers only one register.


To generate a diff of this commit:
cvs rdiff -u -r1.34 -r1.35 src/sys/arch/amd64/amd64/amd64_trap.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/amd64_trap.S
diff -u src/sys/arch/amd64/amd64/amd64_trap.S:1.34 src/sys/arch/amd64/amd64/amd64_trap.S:1.35
--- src/sys/arch/amd64/amd64/amd64_trap.S:1.34	Sun Feb 25 08:09:07 2018
+++ src/sys/arch/amd64/amd64/amd64_trap.S	Sun Feb 25 08:28:55 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: amd64_trap.S,v 1.34 2018/02/25 08:09:07 maxv Exp $	*/
+/*	$NetBSD: amd64_trap.S,v 1.35 2018/02/25 08:28:55 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008, 2017 The NetBSD Foundation, Inc.
@@ -393,8 +393,8 @@ NENTRY(check_swapgs)
 	leaq	do_iret(%rip),%rdi
 	cmpq	%rdi,TF_RIP(%rsp)
 	jne	5f
-	movq	TF_RSP(%rsp),%rax	/* Must read %rsp, may be a pad word */
-	testb	$SEL_UPL,8(%rax)	/* Check %cs of outer iret frame */
+	movq	TF_RSP(%rsp),%rdi	/* Must read %rsp, may be a pad word */
+	testb	$SEL_UPL,8(%rdi)	/* Check %cs of outer iret frame */
 	je	2b			/* jump if iret was to kernel  */
 	jmp	1b			/* to user - must restore %gs */
 5:



CVS commit: src/sys/arch/amd64/amd64

2018-02-25 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sun Feb 25 08:09:07 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: amd64_trap.S

Log Message:
There are two places where we reload %gs:

 * In setusergs. Here we can't fault. So we don't need to handle this
   case.

 * In intrfastexit for 32bit processes. This case needs to be handled,
   and we already have a label.

So use the label instead of disassembling %rip.


To generate a diff of this commit:
cvs rdiff -u -r1.33 -r1.34 src/sys/arch/amd64/amd64/amd64_trap.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/amd64_trap.S
diff -u src/sys/arch/amd64/amd64/amd64_trap.S:1.33 src/sys/arch/amd64/amd64/amd64_trap.S:1.34
--- src/sys/arch/amd64/amd64/amd64_trap.S:1.33	Thu Feb 22 08:36:31 2018
+++ src/sys/arch/amd64/amd64/amd64_trap.S	Sun Feb 25 08:09:07 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: amd64_trap.S,v 1.33 2018/02/22 08:36:31 maxv Exp $	*/
+/*	$NetBSD: amd64_trap.S,v 1.34 2018/02/25 08:09:07 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008, 2017 The NetBSD Foundation, Inc.
@@ -400,12 +400,12 @@ NENTRY(check_swapgs)
 5:
 
 	/* Case 3: move to %gs? */
-	movq	TF_RIP(%rsp),%rax
-	movw	(%rax),%ax
-	andb	$070,%ah		/* mask mod/rm from mod/reg/rm */
-	cmpw	$0x8e+050*256,%ax	/* Any move to %gs (reg 5) */
-	jne	2b			/* No - normal kernel fault */
-	jmp	1b			/* Yes - restore %gs */
+	leaq	do_mov_gs(%rip),%rdi
+	cmpq	%rdi,TF_RIP(%rsp)
+	je	1b
+
+	/* None of the above cases */
+	jmp	2b	/* normal kernel fault */
 END(check_swapgs)
 #endif
 



CVS commit: src/sys/arch/amd64/amd64

2018-02-24 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Feb 24 17:12:10 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: locore.S

Log Message:
Use %rax instead of %r15 in the non-SVS case, to reduce the diff against
SVS. In SVS we use %rax instead of %r15 because the following instructions
cannot be encoded:

movq%r15,SVS_UTLS+UTLS_SCRATCH
movqSVS_UTLS+UTLS_RSP0,%r15


To generate a diff of this commit:
cvs rdiff -u -r1.155 -r1.156 src/sys/arch/amd64/amd64/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/locore.S
diff -u src/sys/arch/amd64/amd64/locore.S:1.155 src/sys/arch/amd64/amd64/locore.S:1.156
--- src/sys/arch/amd64/amd64/locore.S:1.155	Thu Feb 22 14:57:11 2018
+++ src/sys/arch/amd64/amd64/locore.S	Sat Feb 24 17:12:10 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.S,v 1.155 2018/02/22 14:57:11 maxv Exp $	*/
+/*	$NetBSD: locore.S,v 1.156 2018/02/24 17:12:10 maxv Exp $	*/
 
 /*
  * Copyright-o-rama!
@@ -1358,6 +1358,7 @@ END(lwp_trampoline)
  * Entry points of the 'syscall' instruction, 64bit and 32bit mode.
  */
 
+#define SP(x)	(x)-(TF_SS+8)(%rax)
 
 .macro	SYSCALL_ENTRY	name,is_svs
 IDTVEC(\name)
@@ -1376,40 +1377,32 @@ IDTVEC(\name)
 	 */
 	swapgs
 
-#define SP(x,reg)	(x)-(TF_SS+8)(reg)
-
+	/* Get the LWP's kernel stack pointer in %rax */
 	.if	\is_svs
 		movq	%rax,SVS_UTLS+UTLS_SCRATCH
 		movq	SVS_UTLS+UTLS_RSP0,%rax
+	.else
+		movq	%rax,CPUVAR(SCRATCH)
+		movq	CPUVAR(CURLWP),%rax
+		movq	L_PCB(%rax),%rax
+		movq	PCB_RSP0(%rax),%rax
+	.endif
 
-		/* Make stack look like an 'int nn' frame */
-		movq	$(LSEL(LUDATA_SEL, SEL_UPL)),SP(TF_SS,%rax)	/* user %ss */
-		movq	%rsp,SP(TF_RSP,%rax)/* user %rsp */
-		movq	%r11,SP(TF_RFLAGS,%rax)/* user %rflags */
-		movq	$(LSEL(LUCODE_SEL, SEL_UPL)),SP(TF_CS,%rax)	/* user %cs */
-		movq	%rcx,SP(TF_RIP,%rax)/* user %rip */
-		leaq	SP(0,%rax),%rsp			/* %rsp now valid after frame */
+	/* Make stack look like an 'int nn' frame */
+	movq	$(LSEL(LUDATA_SEL, SEL_UPL)),SP(TF_SS)	/* user %ss */
+	movq	%rsp,SP(TF_RSP)/* user %rsp */
+	movq	%r11,SP(TF_RFLAGS)			/* user %rflags */
+	movq	$(LSEL(LUCODE_SEL, SEL_UPL)),SP(TF_CS)	/* user %cs */
+	movq	%rcx,SP(TF_RIP)/* user %rip */
+	leaq	SP(0),%rsp		/* %rsp now valid after frame */
 
+	/* Restore %rax */
+	.if	\is_svs
 		movq	SVS_UTLS+UTLS_SCRATCH,%rax
 	.else
-		movq	%r15,CPUVAR(SCRATCH)
-		movq	CPUVAR(CURLWP),%r15
-		movq	L_PCB(%r15),%r15
-		movq	PCB_RSP0(%r15),%r15	/* LWP's kernel stack pointer */
-
-		/* Make stack look like an 'int nn' frame */
-		movq	$(LSEL(LUDATA_SEL, SEL_UPL)),SP(TF_SS,%r15)	/* user %ss */
-		movq	%rsp,SP(TF_RSP,%r15)/* user %rsp */
-		movq	%r11,SP(TF_RFLAGS,%r15)/* user %rflags */
-		movq	$(LSEL(LUCODE_SEL, SEL_UPL)),SP(TF_CS,%r15)	/* user %cs */
-		movq	%rcx,SP(TF_RIP,%r15)/* user %rip */
-		leaq	SP(0,%r15),%rsp			/* %rsp now valid after frame */
-
-		movq	CPUVAR(SCRATCH),%r15
+		movq	CPUVAR(SCRATCH),%rax
 	.endif
 
-#undef SP
-
 	movq	$2,TF_ERR(%rsp)		/* syscall instruction size */
 	movq	$T_ASTFLT,TF_TRAPNO(%rsp)
 #else



CVS commit: src/sys/arch/amd64/amd64

2018-02-22 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Thu Feb 22 14:57:11 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: locore.S

Log Message:
Adapt previous; put #ifdef SVS around the declaration directly.


To generate a diff of this commit:
cvs rdiff -u -r1.154 -r1.155 src/sys/arch/amd64/amd64/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/locore.S
diff -u src/sys/arch/amd64/amd64/locore.S:1.154 src/sys/arch/amd64/amd64/locore.S:1.155
--- src/sys/arch/amd64/amd64/locore.S:1.154	Thu Feb 22 14:08:48 2018
+++ src/sys/arch/amd64/amd64/locore.S	Thu Feb 22 14:57:11 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.S,v 1.154 2018/02/22 14:08:48 martin Exp $	*/
+/*	$NetBSD: locore.S,v 1.155 2018/02/22 14:57:11 maxv Exp $	*/
 
 /*
  * Copyright-o-rama!
@@ -1378,7 +1378,6 @@ IDTVEC(\name)
 
 #define SP(x,reg)	(x)-(TF_SS+8)(reg)
 
-#ifdef SVS
 	.if	\is_svs
 		movq	%rax,SVS_UTLS+UTLS_SCRATCH
 		movq	SVS_UTLS+UTLS_RSP0,%rax
@@ -1393,7 +1392,6 @@ IDTVEC(\name)
 
 		movq	SVS_UTLS+UTLS_SCRATCH,%rax
 	.else
-#endif
 		movq	%r15,CPUVAR(SCRATCH)
 		movq	CPUVAR(CURLWP),%r15
 		movq	L_PCB(%r15),%r15
@@ -1408,9 +1406,7 @@ IDTVEC(\name)
 		leaq	SP(0,%r15),%rsp			/* %rsp now valid after frame */
 
 		movq	CPUVAR(SCRATCH),%r15
-#ifdef SVS
 	.endif
-#endif
 
 #undef SP
 
@@ -1440,7 +1436,9 @@ SYSCALL_ENTRY	syscall,is_svs=0
 
 	TEXT_USER_BEGIN
 
+#ifdef SVS
 SYSCALL_ENTRY	syscall_svs,is_svs=1
+#endif
 
 IDTVEC(syscall32)
 	sysret		/* go away please */



CVS commit: src/sys/arch/amd64/amd64

2018-02-22 Thread Martin Husemann
Module Name:src
Committed By:   martin
Date:   Thu Feb 22 14:08:48 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: locore.S

Log Message:
Protect the SVS part of SYSCALL_ENTRY by #ifdef SVS to make non-SVS
kernels compile again.


To generate a diff of this commit:
cvs rdiff -u -r1.153 -r1.154 src/sys/arch/amd64/amd64/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/locore.S
diff -u src/sys/arch/amd64/amd64/locore.S:1.153 src/sys/arch/amd64/amd64/locore.S:1.154
--- src/sys/arch/amd64/amd64/locore.S:1.153	Thu Feb 22 10:42:10 2018
+++ src/sys/arch/amd64/amd64/locore.S	Thu Feb 22 14:08:48 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.S,v 1.153 2018/02/22 10:42:10 maxv Exp $	*/
+/*	$NetBSD: locore.S,v 1.154 2018/02/22 14:08:48 martin Exp $	*/
 
 /*
  * Copyright-o-rama!
@@ -1378,6 +1378,7 @@ IDTVEC(\name)
 
 #define SP(x,reg)	(x)-(TF_SS+8)(reg)
 
+#ifdef SVS
 	.if	\is_svs
 		movq	%rax,SVS_UTLS+UTLS_SCRATCH
 		movq	SVS_UTLS+UTLS_RSP0,%rax
@@ -1392,6 +1393,7 @@ IDTVEC(\name)
 
 		movq	SVS_UTLS+UTLS_SCRATCH,%rax
 	.else
+#endif
 		movq	%r15,CPUVAR(SCRATCH)
 		movq	CPUVAR(CURLWP),%r15
 		movq	L_PCB(%r15),%r15
@@ -1406,7 +1408,9 @@ IDTVEC(\name)
 		leaq	SP(0,%r15),%rsp			/* %rsp now valid after frame */
 
 		movq	CPUVAR(SCRATCH),%r15
+#ifdef SVS
 	.endif
+#endif
 
 #undef SP
 



CVS commit: src/sys/arch/amd64/amd64

2018-02-22 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Thu Feb 22 10:26:32 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: machdep.c

Log Message:
Mmh, add #ifdef SVS around svs_init().


To generate a diff of this commit:
cvs rdiff -u -r1.299 -r1.300 src/sys/arch/amd64/amd64/machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/machdep.c
diff -u src/sys/arch/amd64/amd64/machdep.c:1.299 src/sys/arch/amd64/amd64/machdep.c:1.300
--- src/sys/arch/amd64/amd64/machdep.c:1.299	Thu Feb 22 09:41:06 2018
+++ src/sys/arch/amd64/amd64/machdep.c	Thu Feb 22 10:26:32 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: machdep.c,v 1.299 2018/02/22 09:41:06 maxv Exp $	*/
+/*	$NetBSD: machdep.c,v 1.300 2018/02/22 10:26:32 maxv Exp $	*/
 
 /*
  * Copyright (c) 1996, 1997, 1998, 2000, 2006, 2007, 2008, 2011
@@ -110,7 +110,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.299 2018/02/22 09:41:06 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.300 2018/02/22 10:26:32 maxv Exp $");
 
 /* #define XENDEBUG_LOW  */
 
@@ -1598,7 +1598,9 @@ init_x86_64(paddr_t first_avail)
 	uvm_lwp_setuarea(, lwp0uarea);
 
 	cpu_probe(_info_primary);
+#ifdef SVS
 	svs_init(true);
+#endif
 	cpu_init_msrs(_info_primary, true);
 
 	use_pae = 1; /* PAE always enabled in long mode */



CVS commit: src/sys/arch/amd64/amd64

2018-02-22 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Thu Feb 22 08:36:31 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: amd64_trap.S

Log Message:
Revert all my latest changes, and restore this file back to how it was
in rev1.24. I wanted to replace the functions dynamically for SVS, but
that was a dumb idea, we'll just hotpatch instead.


To generate a diff of this commit:
cvs rdiff -u -r1.32 -r1.33 src/sys/arch/amd64/amd64/amd64_trap.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/amd64_trap.S
diff -u src/sys/arch/amd64/amd64/amd64_trap.S:1.32 src/sys/arch/amd64/amd64/amd64_trap.S:1.33
--- src/sys/arch/amd64/amd64/amd64_trap.S:1.32	Sun Feb 18 14:32:31 2018
+++ src/sys/arch/amd64/amd64/amd64_trap.S	Thu Feb 22 08:36:31 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: amd64_trap.S,v 1.32 2018/02/18 14:32:31 maxv Exp $	*/
+/*	$NetBSD: amd64_trap.S,v 1.33 2018/02/22 08:36:31 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008, 2017 The NetBSD Foundation, Inc.
@@ -95,48 +95,27 @@
 #define	PRE_TRAP
 #endif
 
-#ifdef XEN
-/*
- * I don't believe XEN generates in-kernel traps for the
- * equivalent of iret, if it does this code would be needed
- * in order to copy the user segment registers into the fault frame.
- */
-#define check_swapgs alltraps
-#endif
+#define TRAPENTRY			\
+	INTRENTRY			; \
+	jmp	.Lalltraps_noentry
 
-#define	TRAP(a)		PRE_TRAP ; pushq $(a)
-#define	ZTRAP(a)	PRE_TRAP ; pushq $0 ; pushq $(a)
+#define	TRAP_NJ(a)	PRE_TRAP ; pushq $(a)
+#define	ZTRAP_NJ(a)	PRE_TRAP ; pushq $0 ; pushq $(a)
+#define	TRAP(a)		TRAP_NJ(a) ; TRAPENTRY
+#define	ZTRAP(a)	ZTRAP_NJ(a) ; TRAPENTRY
 
-.macro	TRAP_ENTRY_POINT	name,code,is_ztrap
-IDTVEC(\name)
-	.if	\is_ztrap
-		ZTRAP(\code)
-	.else
-		TRAP(\code)
-	.endif
-	INTRENTRY
-	jmp	.Lalltraps_noentry
-IDTVEC_END(\name)
-.endm
+	.text
 
-.macro	TRAP_ENTRY_POINT_SWAPGS	name,code,is_ztrap
-IDTVEC(\name)
-	.if	\is_ztrap
-		ZTRAP(\code)
-	.else
-		TRAP(\code)
-	.endif
-	jmp	check_swapgs
-IDTVEC_END(\name)
-.endm
+	TEXT_USER_BEGIN
+
+IDTVEC(trap00)
+	ZTRAP(T_DIVIDE)
+IDTVEC_END(trap00)
+
+IDTVEC(trap01)
+	ZTRAP(T_TRCTRAP)
+IDTVEC_END(trap01)
 
-.macro	TRAP_ENTRY_POINT_NMI	name,code
-IDTVEC(\name)
-	ZTRAP(\code)
-#if defined(XEN)
-	INTRENTRY
-	jmp	.Lalltraps_noentry
-#else
 /*
  * Non Maskable Interrupts are a special case: they can be triggered even
  * with interrupts disabled, and once triggered they block further NMIs
@@ -148,6 +127,11 @@ IDTVEC(\name)
  * We need to be careful about %gs too, because it is possible that we were
  * running in kernel mode with a userland %gs.
  */
+IDTVEC(trap02)
+#if defined(XEN)
+	ZTRAP(T_NMI)
+#else
+	ZTRAP_NJ(T_NMI)
 	subq	$TF_REGSIZE,%rsp
 	INTR_SAVE_GPRS
 	SVS_ENTER_ALTSTACK
@@ -182,16 +166,14 @@ IDTVEC(\name)
 	addq	$TF_REGSIZE+16,%rsp
 	iretq
 #endif
-IDTVEC_END(\name)
-.endm
+IDTVEC_END(trap02)
 
-.macro	TRAP_ENTRY_POINT_BPT	name,code
-IDTVEC(\name)
-	ZTRAP(\code)
-	INTRENTRY
+IDTVEC(trap03)
 #ifndef KDTRACE_HOOKS
-	jmp	.Lalltraps_noentry
+	ZTRAP(T_BPTFLT)
 #else
+	ZTRAP_NJ(T_BPTFLT)
+	INTRENTRY
 	STI(si)
 	/*
 	 * DTrace Function Boundary Trace (fbt) probes are triggered
@@ -213,12 +195,22 @@ IDTVEC(\name)
 	movq	dtrace_invop_jump_addr, %rax
 	jmpq	*dtrace_invop_jump_addr
 #endif
-IDTVEC_END(\name)
-.endm
+IDTVEC_END(trap03)
 
-.macro	TRAP_ENTRY_POINT_DNA	name,code
-IDTVEC(\name)
-	ZTRAP(\code)
+IDTVEC(trap04)
+	ZTRAP(T_OFLOW)
+IDTVEC_END(trap04)
+
+IDTVEC(trap05)
+	ZTRAP(T_BOUND)
+IDTVEC_END(trap05)
+
+IDTVEC(trap06)
+	ZTRAP(T_PRIVINFLT)
+IDTVEC_END(trap06)
+
+IDTVEC(trap07)
+	ZTRAP_NJ(T_DNA)
 	INTRENTRY
 #ifdef DIAGNOSTIC
 	movl	CPUVAR(ILEVEL),%ebx
@@ -226,20 +218,17 @@ IDTVEC(\name)
 	movq	%rsp,%rdi
 	call	_C_LABEL(fpudna)
 	jmp	.Lalltraps_checkusr
-IDTVEC_END(\name)
-.endm
+IDTVEC_END(trap07)
 
-.macro	TRAP_ENTRY_POINT_DOUBLE	name,code
-IDTVEC(\name)
-	TRAP(\code)
-#if defined(XEN)
-	INTRENTRY
-	jmp	.Lalltraps_noentry
-#else
 /*
  * Double faults execute on a particular stack, and we must not jump out
  * of it. So don't enable interrupts.
  */
+IDTVEC(trap08)
+#if defined(XEN)
+	TRAP(T_DOUBLEFLT)
+#else
+	TRAP_NJ(T_DOUBLEFLT)
 	subq	$TF_REGSIZE,%rsp
 	INTR_SAVE_GPRS
 	SVS_ENTER_ALTSTACK
@@ -268,16 +257,56 @@ IDTVEC(\name)
 	addq	$TF_REGSIZE+16,%rsp
 	iretq
 #endif
-IDTVEC_END(\name)
-.endm
+IDTVEC_END(trap08)
+
+IDTVEC(trap09)
+	ZTRAP(T_FPOPFLT)
+IDTVEC_END(trap09)
+
+IDTVEC(trap10)
+	TRAP(T_TSSFLT)
+IDTVEC_END(trap10)
+
+#ifdef XEN
+/*
+ * I don't believe XEN generates in-kernel traps for the
+ * equivalent of iret, if it does this code would be needed
+ * in order to copy the user segment registers into the fault frame.
+ */
+#define check_swapgs alltraps
+#endif
+
+IDTVEC(trap11)		/* #NP() Segment not present */
+	TRAP_NJ(T_SEGNPFLT)
+	jmp	check_swapgs
+IDTVEC_END(trap11)
+
+IDTVEC(trap12)		/* #SS() Stack exception */
+	TRAP_NJ(T_STKFLT)
+	jmp	check_swapgs
+IDTVEC_END(trap12)
+
+IDTVEC(trap13)		/* 

CVS commit: src/sys/arch/amd64/amd64

2018-02-18 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sun Feb 18 14:32:31 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: amd64_trap.S

Log Message:
Pass the name of the function as argument in SWAPGS_HANDLER.


To generate a diff of this commit:
cvs rdiff -u -r1.31 -r1.32 src/sys/arch/amd64/amd64/amd64_trap.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/amd64_trap.S
diff -u src/sys/arch/amd64/amd64/amd64_trap.S:1.31 src/sys/arch/amd64/amd64/amd64_trap.S:1.32
--- src/sys/arch/amd64/amd64/amd64_trap.S:1.31	Sat Feb 17 21:05:58 2018
+++ src/sys/arch/amd64/amd64/amd64_trap.S	Sun Feb 18 14:32:31 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: amd64_trap.S,v 1.31 2018/02/17 21:05:58 maxv Exp $	*/
+/*	$NetBSD: amd64_trap.S,v 1.32 2018/02/18 14:32:31 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008, 2017 The NetBSD Foundation, Inc.
@@ -312,8 +312,8 @@ IDTVEC_END(\name)
  * When such traps happen, we have CPL=0 and %gs=userland, and we must perform
  * an additional swapgs to get %gs=kernel.
  */
-.macro	SWAPGS_HANDLER
-NENTRY(check_swapgs)
+.macro	SWAPGS_HANDLER	name
+NENTRY(\name)
 	INTRENTRY_L(3f,1:)
 2:
 	sti
@@ -345,7 +345,7 @@ NENTRY(check_swapgs)
 	cmpw	$0x8e+050*256,%ax	/* Any move to %gs (reg 5) */
 	jne	2b			/* No - normal kernel fault */
 	jmp	1b			/* Yes - restore %gs */
-END(check_swapgs)
+END(\name)
 .endm
 #endif
 
@@ -389,7 +389,7 @@ TRAP_ENTRY_POINT	trap31,T_RESERVED,1
 TRAP_ENTRY_POINT_SPUR	intrspurious,T_ASTFLT,1
 
 #ifndef check_swapgs
-SWAPGS_HANDLER
+SWAPGS_HANDLER		check_swapgs
 #endif
 
 	TEXT_USER_END



CVS commit: src/sys/arch/amd64/amd64

2018-02-17 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Feb 17 21:05:58 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: amd64_trap.S

Log Message:
Declare check_swapgs in an ASM macro. No real functional change.


To generate a diff of this commit:
cvs rdiff -u -r1.30 -r1.31 src/sys/arch/amd64/amd64/amd64_trap.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/amd64_trap.S
diff -u src/sys/arch/amd64/amd64/amd64_trap.S:1.30 src/sys/arch/amd64/amd64/amd64_trap.S:1.31
--- src/sys/arch/amd64/amd64/amd64_trap.S:1.30	Sat Feb 17 20:59:14 2018
+++ src/sys/arch/amd64/amd64/amd64_trap.S	Sat Feb 17 21:05:58 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: amd64_trap.S,v 1.30 2018/02/17 20:59:14 maxv Exp $	*/
+/*	$NetBSD: amd64_trap.S,v 1.31 2018/02/17 21:05:58 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008, 2017 The NetBSD Foundation, Inc.
@@ -303,45 +303,6 @@ IDTVEC(\name)
 IDTVEC_END(\name)
 .endm
 
-	.text
-
-	TEXT_USER_BEGIN
-
-TRAP_ENTRY_POINT	trap00,T_DIVIDE,1
-TRAP_ENTRY_POINT	trap01,T_TRCTRAP,1
-TRAP_ENTRY_POINT_NMI	trap02,T_NMI
-TRAP_ENTRY_POINT_BPT	trap03,T_BPTFLT
-TRAP_ENTRY_POINT	trap04,T_OFLOW,1
-TRAP_ENTRY_POINT	trap05,T_BOUND,1
-TRAP_ENTRY_POINT	trap06,T_PRIVINFLT,1
-TRAP_ENTRY_POINT_DNA	trap07,T_DNA
-TRAP_ENTRY_POINT_DOUBLE	trap08,T_DOUBLEFLT
-TRAP_ENTRY_POINT	trap09,T_FPOPFLT,1
-TRAP_ENTRY_POINT	trap10,T_TSSFLT,0
-TRAP_ENTRY_POINT_SWAPGS	trap11,T_SEGNPFLT,0
-TRAP_ENTRY_POINT_SWAPGS	trap12,T_STKFLT,0
-TRAP_ENTRY_POINT_SWAPGS	trap13,T_PROTFLT,0
-TRAP_ENTRY_POINT	trap14,T_PAGEFLT,0
-TRAP_ENTRY_POINT_SPUR	trap15,T_ASTFLT,1
-TRAP_ENTRY_POINT_FPU	trap16,T_ARITHTRAP,1
-TRAP_ENTRY_POINT	trap17,T_ALIGNFLT,0
-TRAP_ENTRY_POINT	trap18,T_MCA,1
-TRAP_ENTRY_POINT_FPU	trap19,T_XMM,1
-TRAP_ENTRY_POINT	trap20,T_RESERVED,1
-TRAP_ENTRY_POINT	trap21,T_RESERVED,1
-TRAP_ENTRY_POINT	trap22,T_RESERVED,1
-TRAP_ENTRY_POINT	trap23,T_RESERVED,1
-TRAP_ENTRY_POINT	trap24,T_RESERVED,1
-TRAP_ENTRY_POINT	trap25,T_RESERVED,1
-TRAP_ENTRY_POINT	trap26,T_RESERVED,1
-TRAP_ENTRY_POINT	trap27,T_RESERVED,1
-TRAP_ENTRY_POINT	trap28,T_RESERVED,1
-TRAP_ENTRY_POINT	trap29,T_RESERVED,1
-TRAP_ENTRY_POINT	trap30,T_RESERVED,1
-TRAP_ENTRY_POINT	trap31,T_RESERVED,1
-
-TRAP_ENTRY_POINT_SPUR	intrspurious,T_ASTFLT,1
-
 #ifndef check_swapgs
 /*
  * We need to worry about traps in kernel mode while the kernel %gs isn't
@@ -351,6 +312,7 @@ TRAP_ENTRY_POINT_SPUR	intrspurious,T_AST
  * When such traps happen, we have CPL=0 and %gs=userland, and we must perform
  * an additional swapgs to get %gs=kernel.
  */
+.macro	SWAPGS_HANDLER
 NENTRY(check_swapgs)
 	INTRENTRY_L(3f,1:)
 2:
@@ -384,6 +346,50 @@ NENTRY(check_swapgs)
 	jne	2b			/* No - normal kernel fault */
 	jmp	1b			/* Yes - restore %gs */
 END(check_swapgs)
+.endm
+#endif
+
+	.text
+
+	TEXT_USER_BEGIN
+
+TRAP_ENTRY_POINT	trap00,T_DIVIDE,1
+TRAP_ENTRY_POINT	trap01,T_TRCTRAP,1
+TRAP_ENTRY_POINT_NMI	trap02,T_NMI
+TRAP_ENTRY_POINT_BPT	trap03,T_BPTFLT
+TRAP_ENTRY_POINT	trap04,T_OFLOW,1
+TRAP_ENTRY_POINT	trap05,T_BOUND,1
+TRAP_ENTRY_POINT	trap06,T_PRIVINFLT,1
+TRAP_ENTRY_POINT_DNA	trap07,T_DNA
+TRAP_ENTRY_POINT_DOUBLE	trap08,T_DOUBLEFLT
+TRAP_ENTRY_POINT	trap09,T_FPOPFLT,1
+TRAP_ENTRY_POINT	trap10,T_TSSFLT,0
+TRAP_ENTRY_POINT_SWAPGS	trap11,T_SEGNPFLT,0
+TRAP_ENTRY_POINT_SWAPGS	trap12,T_STKFLT,0
+TRAP_ENTRY_POINT_SWAPGS	trap13,T_PROTFLT,0
+TRAP_ENTRY_POINT	trap14,T_PAGEFLT,0
+TRAP_ENTRY_POINT_SPUR	trap15,T_ASTFLT,1
+TRAP_ENTRY_POINT_FPU	trap16,T_ARITHTRAP,1
+TRAP_ENTRY_POINT	trap17,T_ALIGNFLT,0
+TRAP_ENTRY_POINT	trap18,T_MCA,1
+TRAP_ENTRY_POINT_FPU	trap19,T_XMM,1
+TRAP_ENTRY_POINT	trap20,T_RESERVED,1
+TRAP_ENTRY_POINT	trap21,T_RESERVED,1
+TRAP_ENTRY_POINT	trap22,T_RESERVED,1
+TRAP_ENTRY_POINT	trap23,T_RESERVED,1
+TRAP_ENTRY_POINT	trap24,T_RESERVED,1
+TRAP_ENTRY_POINT	trap25,T_RESERVED,1
+TRAP_ENTRY_POINT	trap26,T_RESERVED,1
+TRAP_ENTRY_POINT	trap27,T_RESERVED,1
+TRAP_ENTRY_POINT	trap28,T_RESERVED,1
+TRAP_ENTRY_POINT	trap29,T_RESERVED,1
+TRAP_ENTRY_POINT	trap30,T_RESERVED,1
+TRAP_ENTRY_POINT	trap31,T_RESERVED,1
+
+TRAP_ENTRY_POINT_SPUR	intrspurious,T_ASTFLT,1
+
+#ifndef check_swapgs
+SWAPGS_HANDLER
 #endif
 
 	TEXT_USER_END



CVS commit: src/sys/arch/amd64/amd64

2018-02-17 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Feb 17 20:41:57 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: amd64_trap.S

Log Message:
Now that [Z]TRAP and [Z]TRAP_NJ are identical, put back the

INTRENTRY
jmp .Lalltraps_noentry

instructions for Xen, and remove [Z]TRAP_NJ.


To generate a diff of this commit:
cvs rdiff -u -r1.27 -r1.28 src/sys/arch/amd64/amd64/amd64_trap.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/amd64_trap.S
diff -u src/sys/arch/amd64/amd64/amd64_trap.S:1.27 src/sys/arch/amd64/amd64/amd64_trap.S:1.28
--- src/sys/arch/amd64/amd64/amd64_trap.S:1.27	Sat Feb 17 20:33:28 2018
+++ src/sys/arch/amd64/amd64/amd64_trap.S	Sat Feb 17 20:41:57 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: amd64_trap.S,v 1.27 2018/02/17 20:33:28 maxv Exp $	*/
+/*	$NetBSD: amd64_trap.S,v 1.28 2018/02/17 20:41:57 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008, 2017 The NetBSD Foundation, Inc.
@@ -104,10 +104,8 @@
 #define check_swapgs alltraps
 #endif
 
-#define	TRAP_NJ(a)	PRE_TRAP ; pushq $(a)
-#define	ZTRAP_NJ(a)	PRE_TRAP ; pushq $0 ; pushq $(a)
-#define	TRAP(a)		TRAP_NJ(a) ;
-#define	ZTRAP(a)	ZTRAP_NJ(a) ;
+#define	TRAP(a)	PRE_TRAP ; pushq $(a)
+#define	ZTRAP(a)	PRE_TRAP ; pushq $0 ; pushq $(a)
 
 .macro	TRAP_ENTRY_POINT	name,code,is_ztrap
 IDTVEC(\name)
@@ -124,9 +122,9 @@ IDTVEC_END(\name)
 .macro	TRAP_ENTRY_POINT_SWAPGS	name,code,is_ztrap
 IDTVEC(\name)
 	.if	\is_ztrap
-		ZTRAP_NJ(\code)
+		ZTRAP(\code)
 	.else
-		TRAP_NJ(\code)
+		TRAP(\code)
 	.endif
 	jmp	check_swapgs
 IDTVEC_END(\name)
@@ -135,9 +133,9 @@ IDTVEC_END(\name)
 .macro	TRAP_ENTRY_POINT_FPU	name,code,is_ztrap
 IDTVEC(\name)
 	.if	\is_ztrap
-		ZTRAP_NJ(\code)
+		ZTRAP(\code)
 	.else
-		TRAP_NJ(\code)
+		TRAP(\code)
 	.endif
 	INTRENTRY
 #ifdef DIAGNOSTIC
@@ -152,9 +150,9 @@ IDTVEC_END(\name)
 .macro	TRAP_ENTRY_POINT_SPUR	name,code,is_ztrap
 IDTVEC(\name)
 	.if	\is_ztrap
-		ZTRAP_NJ(\code)
+		ZTRAP(\code)
 	.else
-		TRAP_NJ(\code)
+		TRAP(\code)
 	.endif
 	INTRENTRY
 #ifdef DIAGNOSTIC
@@ -185,8 +183,10 @@ TRAP_ENTRY_POINT	trap01,T_TRCTRAP,1
 IDTVEC(trap02)
 #if defined(XEN)
 	ZTRAP(T_NMI)
+	INTRENTRY
+	jmp	.Lalltraps_noentry
 #else
-	ZTRAP_NJ(T_NMI)
+	ZTRAP(T_NMI)
 	subq	$TF_REGSIZE,%rsp
 	INTR_SAVE_GPRS
 	SVS_ENTER_ALTSTACK
@@ -226,8 +226,10 @@ IDTVEC_END(trap02)
 IDTVEC(trap03)
 #ifndef KDTRACE_HOOKS
 	ZTRAP(T_BPTFLT)
+	INTRENTRY
+	jmp	.Lalltraps_noentry
 #else
-	ZTRAP_NJ(T_BPTFLT)
+	ZTRAP(T_BPTFLT)
 	INTRENTRY
 	STI(si)
 	/*
@@ -257,7 +259,7 @@ TRAP_ENTRY_POINT	trap05,T_BOUND,1
 TRAP_ENTRY_POINT	trap06,T_PRIVINFLT,1
 
 IDTVEC(trap07)
-	ZTRAP_NJ(T_DNA)
+	ZTRAP(T_DNA)
 	INTRENTRY
 #ifdef DIAGNOSTIC
 	movl	CPUVAR(ILEVEL),%ebx
@@ -274,8 +276,10 @@ IDTVEC_END(trap07)
 IDTVEC(trap08)
 #if defined(XEN)
 	TRAP(T_DOUBLEFLT)
+	INTRENTRY
+	jmp	.Lalltraps_noentry
 #else
-	TRAP_NJ(T_DOUBLEFLT)
+	TRAP(T_DOUBLEFLT)
 	subq	$TF_REGSIZE,%rsp
 	INTR_SAVE_GPRS
 	SVS_ENTER_ALTSTACK



CVS commit: src/sys/arch/amd64/amd64

2018-02-17 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Feb 17 20:33:28 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: amd64_trap.S

Log Message:
Declare and use TRAP_ENTRY_POINT_SPUR. No real functional change.


To generate a diff of this commit:
cvs rdiff -u -r1.26 -r1.27 src/sys/arch/amd64/amd64/amd64_trap.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/amd64_trap.S
diff -u src/sys/arch/amd64/amd64/amd64_trap.S:1.26 src/sys/arch/amd64/amd64/amd64_trap.S:1.27
--- src/sys/arch/amd64/amd64/amd64_trap.S:1.26	Sat Feb 17 20:28:18 2018
+++ src/sys/arch/amd64/amd64/amd64_trap.S	Sat Feb 17 20:33:28 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: amd64_trap.S,v 1.26 2018/02/17 20:28:18 maxv Exp $	*/
+/*	$NetBSD: amd64_trap.S,v 1.27 2018/02/17 20:33:28 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008, 2017 The NetBSD Foundation, Inc.
@@ -149,6 +149,21 @@ IDTVEC(\name)
 IDTVEC_END(\name)
 .endm
 
+.macro	TRAP_ENTRY_POINT_SPUR	name,code,is_ztrap
+IDTVEC(\name)
+	.if	\is_ztrap
+		ZTRAP_NJ(\code)
+	.else
+		TRAP_NJ(\code)
+	.endif
+	INTRENTRY
+#ifdef DIAGNOSTIC
+	movl	CPUVAR(ILEVEL),%ebx
+#endif
+	jmp	.Lalltraps_checkusr
+IDTVEC_END(\name)
+.endm
+
 	.text
 
 	TEXT_USER_BEGIN
@@ -297,16 +312,7 @@ TRAP_ENTRY_POINT_SWAPGS	trap11,T_SEGNPFL
 TRAP_ENTRY_POINT_SWAPGS	trap12,T_STKFLT,0
 TRAP_ENTRY_POINT_SWAPGS	trap13,T_PROTFLT,0
 TRAP_ENTRY_POINT	trap14,T_PAGEFLT,0
-
-IDTVEC(trap15)
-	ZTRAP_NJ(T_ASTFLT)
-	INTRENTRY
-#ifdef DIAGNOSTIC
-	movl	CPUVAR(ILEVEL),%ebx
-#endif
-	jmp	.Lalltraps_checkusr
-IDTVEC_END(trap15)
-
+TRAP_ENTRY_POINT_SPUR	trap15,T_ASTFLT,1
 TRAP_ENTRY_POINT_FPU	trap16,T_ARITHTRAP,1
 TRAP_ENTRY_POINT	trap17,T_ALIGNFLT,0
 TRAP_ENTRY_POINT	trap18,T_MCA,1
@@ -324,14 +330,7 @@ TRAP_ENTRY_POINT	trap29,T_RESERVED,1
 TRAP_ENTRY_POINT	trap30,T_RESERVED,1
 TRAP_ENTRY_POINT	trap31,T_RESERVED,1
 
-IDTVEC(intrspurious)
-	ZTRAP_NJ(T_ASTFLT)
-	INTRENTRY
-#ifdef DIAGNOSTIC
-	movl	CPUVAR(ILEVEL),%ebx
-#endif
-	jmp	.Lalltraps_checkusr
-IDTVEC_END(intrspurious)
+TRAP_ENTRY_POINT_SPUR	intrspurious,T_ASTFLT,1
 
 #ifndef check_swapgs
 /*



CVS commit: src/sys/arch/amd64/amd64

2018-02-17 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Feb 17 20:28:18 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: amd64_trap.S

Log Message:
Declare and use TRAP_ENTRY_POINT_FPU. No real functional change.


To generate a diff of this commit:
cvs rdiff -u -r1.25 -r1.26 src/sys/arch/amd64/amd64/amd64_trap.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/amd64_trap.S
diff -u src/sys/arch/amd64/amd64/amd64_trap.S:1.25 src/sys/arch/amd64/amd64/amd64_trap.S:1.26
--- src/sys/arch/amd64/amd64/amd64_trap.S:1.25	Sat Feb 17 20:22:05 2018
+++ src/sys/arch/amd64/amd64/amd64_trap.S	Sat Feb 17 20:28:18 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: amd64_trap.S,v 1.25 2018/02/17 20:22:05 maxv Exp $	*/
+/*	$NetBSD: amd64_trap.S,v 1.26 2018/02/17 20:28:18 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008, 2017 The NetBSD Foundation, Inc.
@@ -132,6 +132,23 @@ IDTVEC(\name)
 IDTVEC_END(\name)
 .endm
 
+.macro	TRAP_ENTRY_POINT_FPU	name,code,is_ztrap
+IDTVEC(\name)
+	.if	\is_ztrap
+		ZTRAP_NJ(\code)
+	.else
+		TRAP_NJ(\code)
+	.endif
+	INTRENTRY
+#ifdef DIAGNOSTIC
+	movl	CPUVAR(ILEVEL),%ebx
+#endif
+	movq	%rsp,%rdi
+	call	_C_LABEL(fputrap)
+	jmp	.Lalltraps_checkusr
+IDTVEC_END(\name)
+.endm
+
 	.text
 
 	TEXT_USER_BEGIN
@@ -290,26 +307,10 @@ IDTVEC(trap15)
 	jmp	.Lalltraps_checkusr
 IDTVEC_END(trap15)
 
-IDTVEC(trap16)
-	ZTRAP_NJ(T_ARITHTRAP)
-.Ldo_fputrap:
-	INTRENTRY
-#ifdef DIAGNOSTIC
-	movl	CPUVAR(ILEVEL),%ebx
-#endif
-	movq	%rsp,%rdi
-	call	_C_LABEL(fputrap)
-	jmp	.Lalltraps_checkusr
-IDTVEC_END(trap16)
-
+TRAP_ENTRY_POINT_FPU	trap16,T_ARITHTRAP,1
 TRAP_ENTRY_POINT	trap17,T_ALIGNFLT,0
 TRAP_ENTRY_POINT	trap18,T_MCA,1
-
-IDTVEC(trap19)
-	ZTRAP_NJ(T_XMM)
-	jmp	.Ldo_fputrap
-IDTVEC_END(trap19)
-
+TRAP_ENTRY_POINT_FPU	trap19,T_XMM,1
 TRAP_ENTRY_POINT	trap20,T_RESERVED,1
 TRAP_ENTRY_POINT	trap21,T_RESERVED,1
 TRAP_ENTRY_POINT	trap22,T_RESERVED,1



CVS commit: src/sys/arch/amd64/amd64

2018-02-17 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Feb 17 20:22:05 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: amd64_trap.S

Log Message:
Start using ASM macros to define the trap entry points. No real functional
change.


To generate a diff of this commit:
cvs rdiff -u -r1.24 -r1.25 src/sys/arch/amd64/amd64/amd64_trap.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/amd64_trap.S
diff -u src/sys/arch/amd64/amd64/amd64_trap.S:1.24 src/sys/arch/amd64/amd64/amd64_trap.S:1.25
--- src/sys/arch/amd64/amd64/amd64_trap.S:1.24	Fri Feb  9 08:54:11 2018
+++ src/sys/arch/amd64/amd64/amd64_trap.S	Sat Feb 17 20:22:05 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: amd64_trap.S,v 1.24 2018/02/09 08:54:11 maxv Exp $	*/
+/*	$NetBSD: amd64_trap.S,v 1.25 2018/02/17 20:22:05 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008, 2017 The NetBSD Foundation, Inc.
@@ -95,26 +95,49 @@
 #define	PRE_TRAP
 #endif
 
-#define TRAPENTRY			\
-	INTRENTRY			; \
-	jmp	.Lalltraps_noentry
+#ifdef XEN
+/*
+ * I don't believe XEN generates in-kernel traps for the
+ * equivalent of iret, if it does this code would be needed
+ * in order to copy the user segment registers into the fault frame.
+ */
+#define check_swapgs alltraps
+#endif
 
 #define	TRAP_NJ(a)	PRE_TRAP ; pushq $(a)
 #define	ZTRAP_NJ(a)	PRE_TRAP ; pushq $0 ; pushq $(a)
-#define	TRAP(a)		TRAP_NJ(a) ; TRAPENTRY
-#define	ZTRAP(a)	ZTRAP_NJ(a) ; TRAPENTRY
+#define	TRAP(a)		TRAP_NJ(a) ;
+#define	ZTRAP(a)	ZTRAP_NJ(a) ;
+
+.macro	TRAP_ENTRY_POINT	name,code,is_ztrap
+IDTVEC(\name)
+	.if	\is_ztrap
+		ZTRAP(\code)
+	.else
+		TRAP(\code)
+	.endif
+	INTRENTRY
+	jmp	.Lalltraps_noentry
+IDTVEC_END(\name)
+.endm
+
+.macro	TRAP_ENTRY_POINT_SWAPGS	name,code,is_ztrap
+IDTVEC(\name)
+	.if	\is_ztrap
+		ZTRAP_NJ(\code)
+	.else
+		TRAP_NJ(\code)
+	.endif
+	jmp	check_swapgs
+IDTVEC_END(\name)
+.endm
 
 	.text
 
 	TEXT_USER_BEGIN
 
-IDTVEC(trap00)
-	ZTRAP(T_DIVIDE)
-IDTVEC_END(trap00)
-
-IDTVEC(trap01)
-	ZTRAP(T_TRCTRAP)
-IDTVEC_END(trap01)
+TRAP_ENTRY_POINT	trap00,T_DIVIDE,1
+TRAP_ENTRY_POINT	trap01,T_TRCTRAP,1
 
 /*
  * Non Maskable Interrupts are a special case: they can be triggered even
@@ -197,17 +220,9 @@ IDTVEC(trap03)
 #endif
 IDTVEC_END(trap03)
 
-IDTVEC(trap04)
-	ZTRAP(T_OFLOW)
-IDTVEC_END(trap04)
-
-IDTVEC(trap05)
-	ZTRAP(T_BOUND)
-IDTVEC_END(trap05)
-
-IDTVEC(trap06)
-	ZTRAP(T_PRIVINFLT)
-IDTVEC_END(trap06)
+TRAP_ENTRY_POINT	trap04,T_OFLOW,1
+TRAP_ENTRY_POINT	trap05,T_BOUND,1
+TRAP_ENTRY_POINT	trap06,T_PRIVINFLT,1
 
 IDTVEC(trap07)
 	ZTRAP_NJ(T_DNA)
@@ -259,41 +274,12 @@ IDTVEC(trap08)
 #endif
 IDTVEC_END(trap08)
 
-IDTVEC(trap09)
-	ZTRAP(T_FPOPFLT)
-IDTVEC_END(trap09)
-
-IDTVEC(trap10)
-	TRAP(T_TSSFLT)
-IDTVEC_END(trap10)
-
-#ifdef XEN
-/*
- * I don't believe XEN generates in-kernel traps for the
- * equivalent of iret, if it does this code would be needed
- * in order to copy the user segment registers into the fault frame.
- */
-#define check_swapgs alltraps
-#endif
-
-IDTVEC(trap11)		/* #NP() Segment not present */
-	TRAP_NJ(T_SEGNPFLT)
-	jmp	check_swapgs
-IDTVEC_END(trap11)
-
-IDTVEC(trap12)		/* #SS() Stack exception */
-	TRAP_NJ(T_STKFLT)
-	jmp	check_swapgs
-IDTVEC_END(trap12)
-
-IDTVEC(trap13)		/* #GP() General protection */
-	TRAP_NJ(T_PROTFLT)
-	jmp	check_swapgs
-IDTVEC_END(trap13)
-
-IDTVEC(trap14)
-	TRAP(T_PAGEFLT)
-IDTVEC_END(trap14)
+TRAP_ENTRY_POINT	trap09,T_FPOPFLT,1
+TRAP_ENTRY_POINT	trap10,T_TSSFLT,0
+TRAP_ENTRY_POINT_SWAPGS	trap11,T_SEGNPFLT,0
+TRAP_ENTRY_POINT_SWAPGS	trap12,T_STKFLT,0
+TRAP_ENTRY_POINT_SWAPGS	trap13,T_PROTFLT,0
+TRAP_ENTRY_POINT	trap14,T_PAGEFLT,0
 
 IDTVEC(trap15)
 	ZTRAP_NJ(T_ASTFLT)
@@ -316,45 +302,26 @@ IDTVEC(trap16)
 	jmp	.Lalltraps_checkusr
 IDTVEC_END(trap16)
 
-IDTVEC(trap17)
-	TRAP(T_ALIGNFLT)
-IDTVEC_END(trap17)
-
-IDTVEC(trap18)
-	ZTRAP(T_MCA)
-IDTVEC_END(trap18)
+TRAP_ENTRY_POINT	trap17,T_ALIGNFLT,0
+TRAP_ENTRY_POINT	trap18,T_MCA,1
 
 IDTVEC(trap19)
 	ZTRAP_NJ(T_XMM)
 	jmp	.Ldo_fputrap
 IDTVEC_END(trap19)
 
-IDTVEC(trap20)
-IDTVEC(trap21)
-IDTVEC(trap22)
-IDTVEC(trap23)
-IDTVEC(trap24)
-IDTVEC(trap25)
-IDTVEC(trap26)
-IDTVEC(trap27)
-IDTVEC(trap28)
-IDTVEC(trap29)
-IDTVEC(trap30)
-IDTVEC(trap31)
-	/* 20 - 31 reserved for future exp */
-	ZTRAP(T_RESERVED)
-IDTVEC_END(trap20)
-IDTVEC_END(trap21)
-IDTVEC_END(trap22)
-IDTVEC_END(trap23)
-IDTVEC_END(trap24)
-IDTVEC_END(trap25)
-IDTVEC_END(trap26)
-IDTVEC_END(trap27)
-IDTVEC_END(trap28)
-IDTVEC_END(trap29)
-IDTVEC_END(trap30)
-IDTVEC_END(trap31)
+TRAP_ENTRY_POINT	trap20,T_RESERVED,1
+TRAP_ENTRY_POINT	trap21,T_RESERVED,1
+TRAP_ENTRY_POINT	trap22,T_RESERVED,1
+TRAP_ENTRY_POINT	trap23,T_RESERVED,1
+TRAP_ENTRY_POINT	trap24,T_RESERVED,1
+TRAP_ENTRY_POINT	trap25,T_RESERVED,1
+TRAP_ENTRY_POINT	trap26,T_RESERVED,1
+TRAP_ENTRY_POINT	trap27,T_RESERVED,1
+TRAP_ENTRY_POINT	trap28,T_RESERVED,1
+TRAP_ENTRY_POINT	trap29,T_RESERVED,1
+TRAP_ENTRY_POINT	trap30,T_RESERVED,1
+TRAP_ENTRY_POINT	

CVS commit: src/sys/arch/amd64/amd64

2018-02-17 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Feb 17 19:26:20 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: vector.S

Log Message:
Define legacy_stubs in a macro.


To generate a diff of this commit:
cvs rdiff -u -r1.59 -r1.60 src/sys/arch/amd64/amd64/vector.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/vector.S
diff -u src/sys/arch/amd64/amd64/vector.S:1.59 src/sys/arch/amd64/amd64/vector.S:1.60
--- src/sys/arch/amd64/amd64/vector.S:1.59	Sat Feb 17 18:51:53 2018
+++ src/sys/arch/amd64/amd64/vector.S	Sat Feb 17 19:26:20 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: vector.S,v 1.59 2018/02/17 18:51:53 maxv Exp $	*/
+/*	$NetBSD: vector.S,v 1.60 2018/02/17 19:26:20 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008 The NetBSD Foundation, Inc.
@@ -305,7 +305,7 @@ IDTVEC_END(intr_x2apic_tlb)
 #ifndef XEN
 
 /*
- * This macro defines the generic stub code. Its arguments modifiy it
+ * This macro defines the generic stub code. Its arguments modify it
  * for specific PICs.
  */
 
@@ -560,44 +560,6 @@ INTRSTUB(x2apic_level,31,voidop,x2apic_a
 
 #endif
 
-	.type _C_LABEL(legacy_stubs), @object
-LABEL(legacy_stubs)
-	.quad _C_LABEL(Xintr_legacy0), _C_LABEL(Xrecurse_legacy0)
-	.quad _C_LABEL(Xresume_legacy0)
-	.quad _C_LABEL(Xintr_legacy1), _C_LABEL(Xrecurse_legacy1)
-	.quad _C_LABEL(Xresume_legacy1)
-	.quad _C_LABEL(Xintr_legacy2), _C_LABEL(Xrecurse_legacy2)
-	.quad _C_LABEL(Xresume_legacy2)
-	.quad _C_LABEL(Xintr_legacy3), _C_LABEL(Xrecurse_legacy3)
-	.quad _C_LABEL(Xresume_legacy3)
-	.quad _C_LABEL(Xintr_legacy4), _C_LABEL(Xrecurse_legacy4)
-	.quad _C_LABEL(Xresume_legacy4)
-	.quad _C_LABEL(Xintr_legacy5), _C_LABEL(Xrecurse_legacy5)
-	.quad _C_LABEL(Xresume_legacy5)
-	.quad _C_LABEL(Xintr_legacy6), _C_LABEL(Xrecurse_legacy6)
-	.quad _C_LABEL(Xresume_legacy6)
-	.quad _C_LABEL(Xintr_legacy7), _C_LABEL(Xrecurse_legacy7)
-	.quad _C_LABEL(Xresume_legacy7)
-	.quad _C_LABEL(Xintr_legacy8), _C_LABEL(Xrecurse_legacy8)
-	.quad _C_LABEL(Xresume_legacy8)
-	.quad _C_LABEL(Xintr_legacy9), _C_LABEL(Xrecurse_legacy9)
-	.quad _C_LABEL(Xresume_legacy9)
-	.quad _C_LABEL(Xintr_legacy10), _C_LABEL(Xrecurse_legacy10)
-	.quad _C_LABEL(Xresume_legacy10)
-	.quad _C_LABEL(Xintr_legacy11), _C_LABEL(Xrecurse_legacy11)
-	.quad _C_LABEL(Xresume_legacy11)
-	.quad _C_LABEL(Xintr_legacy12), _C_LABEL(Xrecurse_legacy12)
-	.quad _C_LABEL(Xresume_legacy12)
-	.quad _C_LABEL(Xintr_legacy13), _C_LABEL(Xrecurse_legacy13)
-	.quad _C_LABEL(Xresume_legacy13)
-	.quad _C_LABEL(Xintr_legacy14), _C_LABEL(Xrecurse_legacy14)
-	.quad _C_LABEL(Xresume_legacy14)
-	.quad _C_LABEL(Xintr_legacy15), _C_LABEL(Xrecurse_legacy15)
-	.quad _C_LABEL(Xresume_legacy15)
-END(legacy_stubs)
-
-#if NIOAPIC > 0
-
 /*
  * Create a struct intrstub.
  */
@@ -606,9 +568,33 @@ END(legacy_stubs)
 	.quad _C_LABEL(Xresume_ ## name ) ;
 
 /*
- * Create an array of structs intrstub.
+ * Create an array of structs intrstub (16 entries).
+ */
+#define INTRSTUB_ARRAY_16(name) 		; \
+	.type _C_LABEL(name ## _stubs), @object	; \
+LABEL(name ## _stubs); \
+	INTRSTUB_ENTRY(name ## 0)		; \
+	INTRSTUB_ENTRY(name ## 1)		; \
+	INTRSTUB_ENTRY(name ## 2)		; \
+	INTRSTUB_ENTRY(name ## 3)		; \
+	INTRSTUB_ENTRY(name ## 4)		; \
+	INTRSTUB_ENTRY(name ## 5)		; \
+	INTRSTUB_ENTRY(name ## 6)		; \
+	INTRSTUB_ENTRY(name ## 7)		; \
+	INTRSTUB_ENTRY(name ## 8)		; \
+	INTRSTUB_ENTRY(name ## 9)		; \
+	INTRSTUB_ENTRY(name ## 10)		; \
+	INTRSTUB_ENTRY(name ## 11)		; \
+	INTRSTUB_ENTRY(name ## 12)		; \
+	INTRSTUB_ENTRY(name ## 13)		; \
+	INTRSTUB_ENTRY(name ## 14)		; \
+	INTRSTUB_ENTRY(name ## 15)		; \
+END(name ## _stubs)
+
+/*
+ * Create an array of structs intrstub (32 entries).
  */
-#define INTRSTUB_ARRAY(name) 			; \
+#define INTRSTUB_ARRAY_32(name) 		; \
 	.type _C_LABEL(name ## _stubs), @object	; \
 LABEL(name ## _stubs); \
 	INTRSTUB_ENTRY(name ## 0)		; \
@@ -645,12 +631,14 @@ LABEL(name ## _stubs); \
 	INTRSTUB_ENTRY(name ## 31)		; \
 END(name ## _stubs)
 
-INTRSTUB_ARRAY(ioapic_edge)
-INTRSTUB_ARRAY(ioapic_level)
+INTRSTUB_ARRAY_16(legacy)
 
-INTRSTUB_ARRAY(x2apic_edge)
-INTRSTUB_ARRAY(x2apic_level)
+#if NIOAPIC > 0
+INTRSTUB_ARRAY_32(ioapic_edge)
+INTRSTUB_ARRAY_32(ioapic_level)
 
+INTRSTUB_ARRAY_32(x2apic_edge)
+INTRSTUB_ARRAY_32(x2apic_level)
 #endif
 
 #endif /* !defined(XEN) */



CVS commit: src/sys/arch/amd64/amd64

2018-02-09 Thread Christos Zoulas
Module Name:src
Committed By:   christos
Date:   Sat Feb 10 03:55:59 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: db_interface.c

Log Message:
make it compile without MULTIPROCESSOR (xen?)


To generate a diff of this commit:
cvs rdiff -u -r1.28 -r1.29 src/sys/arch/amd64/amd64/db_interface.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/db_interface.c
diff -u src/sys/arch/amd64/amd64/db_interface.c:1.28 src/sys/arch/amd64/amd64/db_interface.c:1.29
--- src/sys/arch/amd64/amd64/db_interface.c:1.28	Fri Feb  9 04:36:42 2018
+++ src/sys/arch/amd64/amd64/db_interface.c	Fri Feb  9 22:55:58 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: db_interface.c,v 1.28 2018/02/09 09:36:42 maxv Exp $	*/
+/*	$NetBSD: db_interface.c,v 1.29 2018/02/10 03:55:58 christos Exp $	*/
 
 /*
  * Mach Operating System
@@ -33,7 +33,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.28 2018/02/09 09:36:42 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.29 2018/02/10 03:55:58 christos Exp $");
 
 #include "opt_ddb.h"
 #include "opt_multiprocessor.h"
@@ -189,7 +189,6 @@ int
 kdb_trap(int type, int code, db_regs_t *regs)
 {
 	int s;
-	db_regs_t dbreg;
 
 	switch (type) {
 	case T_NMI:	/* NMI */
@@ -211,6 +210,7 @@ kdb_trap(int type, int code, db_regs_t *
 	}
 
 #ifdef MULTIPROCESSOR
+	db_regs_t dbreg;
 	if (!db_suspend_others()) {
 		ddb_suspend(regs);
 	} else {



CVS commit: src/sys/arch/amd64/amd64

2018-02-09 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Fri Feb  9 08:54:12 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: amd64_trap.S

Log Message:
Don't restore segment registers when leaving NMIs. In nmitrap (and the
functions it later calls), we are not allowing the trap frame to change;
so the segregs don't change since we are running with interrupts disabled
and there is no rescheduling in this case.


To generate a diff of this commit:
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/amd64/amd64/amd64_trap.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/amd64_trap.S
diff -u src/sys/arch/amd64/amd64/amd64_trap.S:1.23 src/sys/arch/amd64/amd64/amd64_trap.S:1.24
--- src/sys/arch/amd64/amd64/amd64_trap.S:1.23	Sun Jan 21 11:21:40 2018
+++ src/sys/arch/amd64/amd64/amd64_trap.S	Fri Feb  9 08:54:11 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: amd64_trap.S,v 1.23 2018/01/21 11:21:40 maxv Exp $	*/
+/*	$NetBSD: amd64_trap.S,v 1.24 2018/02/09 08:54:11 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008, 2017 The NetBSD Foundation, Inc.
@@ -162,8 +162,6 @@ IDTVEC(trap02)
 	SVS_LEAVE_ALTSTACK
 
 .Lnmileave:
-	movw	TF_ES(%rsp),%es
-	movw	TF_DS(%rsp),%ds
 	INTR_RESTORE_GPRS
 	addq	$TF_REGSIZE+16,%rsp
 	iretq



CVS commit: src/sys/arch/amd64/amd64

2018-02-09 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Fri Feb  9 08:42:26 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: vector.S

Log Message:
Define INTRSTUB_ARRAY, simplifies a lot.


To generate a diff of this commit:
cvs rdiff -u -r1.57 -r1.58 src/sys/arch/amd64/amd64/vector.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/vector.S
diff -u src/sys/arch/amd64/amd64/vector.S:1.57 src/sys/arch/amd64/amd64/vector.S:1.58
--- src/sys/arch/amd64/amd64/vector.S:1.57	Sat Jan 27 18:17:57 2018
+++ src/sys/arch/amd64/amd64/vector.S	Fri Feb  9 08:42:26 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: vector.S,v 1.57 2018/01/27 18:17:57 maxv Exp $	*/
+/*	$NetBSD: vector.S,v 1.58 2018/02/09 08:42:26 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008 The NetBSD Foundation, Inc.
@@ -87,8 +87,6 @@
 
 	.text
 
-/*/
-
 /*
  * Macros for interrupt entry, call to handler, and exit.
  *
@@ -599,277 +597,60 @@ LABEL(i8259_stubs)
 END(i8259_stubs)
 
 #if NIOAPIC > 0
-	.type _C_LABEL(ioapic_edge_stubs), @object
-LABEL(ioapic_edge_stubs)
-	.quad _C_LABEL(Xintr_ioapic_edge0), _C_LABEL(Xrecurse_ioapic_edge0)
-	.quad _C_LABEL(Xresume_ioapic_edge0)
-	.quad _C_LABEL(Xintr_ioapic_edge1), _C_LABEL(Xrecurse_ioapic_edge1)
-	.quad _C_LABEL(Xresume_ioapic_edge1)
-	.quad _C_LABEL(Xintr_ioapic_edge2), _C_LABEL(Xrecurse_ioapic_edge2)
-	.quad _C_LABEL(Xresume_ioapic_edge2)
-	.quad _C_LABEL(Xintr_ioapic_edge3), _C_LABEL(Xrecurse_ioapic_edge3)
-	.quad _C_LABEL(Xresume_ioapic_edge3)
-	.quad _C_LABEL(Xintr_ioapic_edge4), _C_LABEL(Xrecurse_ioapic_edge4)
-	.quad _C_LABEL(Xresume_ioapic_edge4)
-	.quad _C_LABEL(Xintr_ioapic_edge5), _C_LABEL(Xrecurse_ioapic_edge5)
-	.quad _C_LABEL(Xresume_ioapic_edge5)
-	.quad _C_LABEL(Xintr_ioapic_edge6), _C_LABEL(Xrecurse_ioapic_edge6)
-	.quad _C_LABEL(Xresume_ioapic_edge6)
-	.quad _C_LABEL(Xintr_ioapic_edge7), _C_LABEL(Xrecurse_ioapic_edge7)
-	.quad _C_LABEL(Xresume_ioapic_edge7)
-	.quad _C_LABEL(Xintr_ioapic_edge8), _C_LABEL(Xrecurse_ioapic_edge8)
-	.quad _C_LABEL(Xresume_ioapic_edge8)
-	.quad _C_LABEL(Xintr_ioapic_edge9), _C_LABEL(Xrecurse_ioapic_edge9)
-	.quad _C_LABEL(Xresume_ioapic_edge9)
-	.quad _C_LABEL(Xintr_ioapic_edge10), _C_LABEL(Xrecurse_ioapic_edge10)
-	.quad _C_LABEL(Xresume_ioapic_edge10)
-	.quad _C_LABEL(Xintr_ioapic_edge11), _C_LABEL(Xrecurse_ioapic_edge11)
-	.quad _C_LABEL(Xresume_ioapic_edge11)
-	.quad _C_LABEL(Xintr_ioapic_edge12), _C_LABEL(Xrecurse_ioapic_edge12)
-	.quad _C_LABEL(Xresume_ioapic_edge12)
-	.quad _C_LABEL(Xintr_ioapic_edge13), _C_LABEL(Xrecurse_ioapic_edge13)
-	.quad _C_LABEL(Xresume_ioapic_edge13)
-	.quad _C_LABEL(Xintr_ioapic_edge14), _C_LABEL(Xrecurse_ioapic_edge14)
-	.quad _C_LABEL(Xresume_ioapic_edge14)
-	.quad _C_LABEL(Xintr_ioapic_edge15), _C_LABEL(Xrecurse_ioapic_edge15)
-	.quad _C_LABEL(Xresume_ioapic_edge15)
-	.quad _C_LABEL(Xintr_ioapic_edge16), _C_LABEL(Xrecurse_ioapic_edge16)
-	.quad _C_LABEL(Xresume_ioapic_edge16)
-	.quad _C_LABEL(Xintr_ioapic_edge17), _C_LABEL(Xrecurse_ioapic_edge17)
-	.quad _C_LABEL(Xresume_ioapic_edge17)
-	.quad _C_LABEL(Xintr_ioapic_edge18), _C_LABEL(Xrecurse_ioapic_edge18)
-	.quad _C_LABEL(Xresume_ioapic_edge18)
-	.quad _C_LABEL(Xintr_ioapic_edge19), _C_LABEL(Xrecurse_ioapic_edge19)
-	.quad _C_LABEL(Xresume_ioapic_edge19)
-	.quad _C_LABEL(Xintr_ioapic_edge20), _C_LABEL(Xrecurse_ioapic_edge20)
-	.quad _C_LABEL(Xresume_ioapic_edge20)
-	.quad _C_LABEL(Xintr_ioapic_edge21), _C_LABEL(Xrecurse_ioapic_edge21)
-	.quad _C_LABEL(Xresume_ioapic_edge21)
-	.quad _C_LABEL(Xintr_ioapic_edge22), _C_LABEL(Xrecurse_ioapic_edge22)
-	.quad _C_LABEL(Xresume_ioapic_edge22)
-	.quad _C_LABEL(Xintr_ioapic_edge23), _C_LABEL(Xrecurse_ioapic_edge23)
-	.quad _C_LABEL(Xresume_ioapic_edge23)
-	.quad _C_LABEL(Xintr_ioapic_edge24), _C_LABEL(Xrecurse_ioapic_edge24)
-	.quad _C_LABEL(Xresume_ioapic_edge24)
-	.quad _C_LABEL(Xintr_ioapic_edge25), _C_LABEL(Xrecurse_ioapic_edge25)
-	.quad _C_LABEL(Xresume_ioapic_edge25)
-	.quad _C_LABEL(Xintr_ioapic_edge26), _C_LABEL(Xrecurse_ioapic_edge26)
-	.quad _C_LABEL(Xresume_ioapic_edge26)
-	.quad _C_LABEL(Xintr_ioapic_edge27), _C_LABEL(Xrecurse_ioapic_edge27)
-	.quad _C_LABEL(Xresume_ioapic_edge27)
-	.quad _C_LABEL(Xintr_ioapic_edge28), _C_LABEL(Xrecurse_ioapic_edge28)
-	.quad _C_LABEL(Xresume_ioapic_edge28)
-	.quad _C_LABEL(Xintr_ioapic_edge29), _C_LABEL(Xrecurse_ioapic_edge29)
-	.quad _C_LABEL(Xresume_ioapic_edge29)
-	.quad _C_LABEL(Xintr_ioapic_edge30), _C_LABEL(Xrecurse_ioapic_edge30)
-	.quad _C_LABEL(Xresume_ioapic_edge30)
-	.quad _C_LABEL(Xintr_ioapic_edge31), _C_LABEL(Xrecurse_ioapic_edge31)
-	.quad _C_LABEL(Xresume_ioapic_edge31)
-END(ioapic_edge_stubs)
-
-	.type _C_LABEL(ioapic_level_stubs), @object
-LABEL(ioapic_level_stubs)
-	.quad _C_LABEL(Xintr_ioapic_level0), _C_LABEL(Xrecurse_ioapic_level0)
-	.quad _C_LABEL(Xresume_ioapic_level0)
-	

CVS commit: src/sys/arch/amd64/amd64

2018-02-04 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sun Feb  4 17:03:21 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: machdep.c

Log Message:
Add a TODO list for SVS.


To generate a diff of this commit:
cvs rdiff -u -r1.296 -r1.297 src/sys/arch/amd64/amd64/machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/machdep.c
diff -u src/sys/arch/amd64/amd64/machdep.c:1.296 src/sys/arch/amd64/amd64/machdep.c:1.297
--- src/sys/arch/amd64/amd64/machdep.c:1.296	Fri Jan 26 14:38:46 2018
+++ src/sys/arch/amd64/amd64/machdep.c	Sun Feb  4 17:03:21 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: machdep.c,v 1.296 2018/01/26 14:38:46 maxv Exp $	*/
+/*	$NetBSD: machdep.c,v 1.297 2018/02/04 17:03:21 maxv Exp $	*/
 
 /*
  * Copyright (c) 1996, 1997, 1998, 2000, 2006, 2007, 2008, 2011
@@ -110,7 +110,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.296 2018/01/26 14:38:46 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.297 2018/02/04 17:03:21 maxv Exp $");
 
 /* #define XENDEBUG_LOW  */
 
@@ -2267,6 +2267,23 @@ mm_md_direct_mapped_phys(paddr_t paddr, 
  * Remote PCPU Areas [OK]
  * Kernel Heap   [OK]
  * Kernel Image  [OK]
+ *
+ * TODO:
+ *
+ * (a) The NMI stack is not double-entered. Therefore if we ever receive
+ * an NMI and leave it, the content of the stack will be visible to
+ * userland (via Meltdown). Normally we never leave NMIs, unless a
+ * privileged user launched PMCs. That's unlikely to happen, our PMC
+ * support is pretty minimal.
+ *
+ * (b) Enable SVS depending on the CPU model, and add a sysctl to disable
+ * it dynamically.
+ *
+ * (c) Narrow down the entry points: hide the 'jmp handler' instructions.
+ * This makes sense on GENERIC_KASLR kernels.
+ *
+ * (d) Right now there is only one global LDT, and that's not compatible
+ * with USER_LDT.
  */
 
 struct svs_utls {



CVS commit: src/sys/arch/amd64/amd64

2018-01-27 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Jan 27 17:54:13 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: locore.S

Log Message:
Use testb, faster.


To generate a diff of this commit:
cvs rdiff -u -r1.149 -r1.150 src/sys/arch/amd64/amd64/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/locore.S
diff -u src/sys/arch/amd64/amd64/locore.S:1.149 src/sys/arch/amd64/amd64/locore.S:1.150
--- src/sys/arch/amd64/amd64/locore.S:1.149	Mon Jan 22 08:14:09 2018
+++ src/sys/arch/amd64/amd64/locore.S	Sat Jan 27 17:54:13 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.S,v 1.149 2018/01/22 08:14:09 maxv Exp $	*/
+/*	$NetBSD: locore.S,v 1.150 2018/01/27 17:54:13 maxv Exp $	*/
 
 /*
  * Copyright-o-rama!
@@ -1522,7 +1522,7 @@ LABEL(intrfastexit)
 	NOT_XEN(cli;)
 	SVS_LEAVE
 	INTR_RESTORE_GPRS
-	testw	$SEL_UPL,TF_CS(%rsp)	/* interrupted %cs */
+	testb	$SEL_UPL,TF_CS(%rsp)	/* interrupted %cs */
 	jz	.Lkexit
 	cmpw	$LSEL(LUCODE_SEL, SEL_UPL),TF_CS(%rsp)
 	je	.Luexit64



CVS commit: src/sys/arch/amd64/amd64

2018-01-26 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Fri Jan 26 14:38:46 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: machdep.c

Log Message:
Zero out the scratch value in the UTLS page during context switches. We
temporarily put %rax there when processing syscalls, and we wouldn't
want the new lwp to see the %rax value of the previous lwp.


To generate a diff of this commit:
cvs rdiff -u -r1.295 -r1.296 src/sys/arch/amd64/amd64/machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/machdep.c
diff -u src/sys/arch/amd64/amd64/machdep.c:1.295 src/sys/arch/amd64/amd64/machdep.c:1.296
--- src/sys/arch/amd64/amd64/machdep.c:1.295	Sun Jan 21 11:21:40 2018
+++ src/sys/arch/amd64/amd64/machdep.c	Fri Jan 26 14:38:46 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: machdep.c,v 1.295 2018/01/21 11:21:40 maxv Exp $	*/
+/*	$NetBSD: machdep.c,v 1.296 2018/01/26 14:38:46 maxv Exp $	*/
 
 /*
  * Copyright (c) 1996, 1997, 1998, 2000, 2006, 2007, 2008, 2011
@@ -110,7 +110,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.295 2018/01/21 11:21:40 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.296 2018/01/26 14:38:46 maxv Exp $");
 
 /* #define XENDEBUG_LOW  */
 
@@ -2522,6 +2522,7 @@ void
 svs_lwp_switch(struct lwp *oldlwp, struct lwp *newlwp)
 {
 	struct cpu_info *ci = curcpu();
+	struct svs_utls *utls;
 	struct pcb *pcb;
 	pt_entry_t *pte;
 	uintptr_t rsp0;
@@ -2551,6 +2552,9 @@ svs_lwp_switch(struct lwp *oldlwp, struc
 	KASSERT((ci->ci_svs_krsp0 % PAGE_SIZE) ==
 	(ci->ci_svs_ursp0 % PAGE_SIZE));
 
+	utls = (struct svs_utls *)ci->ci_svs_utls;
+	utls->scratch = 0;
+
 	/*
 	 * Enter the user rsp0. We don't need to flush the TLB here, since
 	 * the user page tables are not loaded.



CVS commit: src/sys/arch/amd64/amd64

2018-01-22 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Mon Jan 22 08:14:09 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: locore.S

Log Message:
Ah, remove duplicate SVS_LEAVE. Fixes 32bit binaries. While here remove
duplicate 'cli', but that's harmless.


To generate a diff of this commit:
cvs rdiff -u -r1.148 -r1.149 src/sys/arch/amd64/amd64/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/locore.S
diff -u src/sys/arch/amd64/amd64/locore.S:1.148 src/sys/arch/amd64/amd64/locore.S:1.149
--- src/sys/arch/amd64/amd64/locore.S:1.148	Sun Jan 21 11:21:40 2018
+++ src/sys/arch/amd64/amd64/locore.S	Mon Jan 22 08:14:09 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.S,v 1.148 2018/01/21 11:21:40 maxv Exp $	*/
+/*	$NetBSD: locore.S,v 1.149 2018/01/22 08:14:09 maxv Exp $	*/
 
 /*
  * Copyright-o-rama!
@@ -1534,14 +1534,12 @@ LABEL(intrfastexit)
 #endif
 
 .Luexit32:
-	NOT_XEN(cli;)
 do_mov_es:
 	movw	TF_ES(%rsp),%es
 do_mov_ds:
 	movw	TF_DS(%rsp),%ds
 do_mov_fs:
 	movw	TF_FS(%rsp),%fs
-	SVS_LEAVE
 	SWAPGS
 #ifndef XEN
 do_mov_gs:
@@ -1550,7 +1548,6 @@ do_mov_gs:
 	jmp	.Lkexit
 
 .Luexit64:
-	NOT_XEN(cli;)
 	SWAPGS
 
 .Lkexit:



CVS commit: src/sys/arch/amd64/amd64

2018-01-21 Thread Christos Zoulas
Module Name:src
Committed By:   christos
Date:   Sun Jan 21 16:51:15 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: db_disasm.c

Log Message:
CID-1364351: Fix uninitialized warnings.


To generate a diff of this commit:
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/amd64/amd64/db_disasm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/db_disasm.c
diff -u src/sys/arch/amd64/amd64/db_disasm.c:1.23 src/sys/arch/amd64/amd64/db_disasm.c:1.24
--- src/sys/arch/amd64/amd64/db_disasm.c:1.23	Fri Mar 25 06:14:43 2016
+++ src/sys/arch/amd64/amd64/db_disasm.c	Sun Jan 21 11:51:14 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: db_disasm.c,v 1.23 2016/03/25 10:14:43 shm Exp $	*/
+/*	$NetBSD: db_disasm.c,v 1.24 2018/01/21 16:51:14 christos Exp $	*/
 
 /* 
  * Mach Operating System
@@ -33,7 +33,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: db_disasm.c,v 1.23 2016/03/25 10:14:43 shm Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_disasm.c,v 1.24 2018/01/21 16:51:14 christos Exp $");
 
 #ifndef _KERNEL
 #include 
@@ -1376,20 +1376,33 @@ db_disasm(db_addr_t loc, bool altfmt)
 
 		switch (i_mode & 0xFF) {
 		case E:
-			db_print_address(seg, rex, size, );
-			break;
 		case Eind:
-			db_printf("*");
-			db_print_address(seg, rex, size, );
-			break;
 		case Ed:
-			db_print_address(seg, rex, LONG, );
-			break;
 		case Ew:
-			db_print_address(seg, rex, WORD, );
-			break;
 		case Eb:
-			db_print_address(seg, rex, BYTE, );
+			if (!ip->i_has_modrm) {
+db_printf("Bad address mode %#x without modrm",
+i_mode);
+break;
+			}
+			switch (i_mode & 0xFF) {
+			case E:
+db_print_address(seg, rex, size, );
+break;
+			case Eind:
+db_printf("*");
+db_print_address(seg, rex, size, );
+break;
+			case Ed:
+db_print_address(seg, rex, LONG, );
+break;
+			case Ew:
+db_print_address(seg, rex, WORD, );
+break;
+			case Eb:
+db_print_address(seg, rex, BYTE, );
+break;
+			}
 			break;
 		case R: {
 			int ext = ((rex & REX_R) != 0);



CVS commit: src/sys/arch/amd64/amd64

2018-01-21 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sun Jan 21 08:20:31 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: machdep.c

Log Message:
Make it possible for SVS to map in the user page tables a 4K kernel page
contained in a 2MB large page. Will be used soon.


To generate a diff of this commit:
cvs rdiff -u -r1.293 -r1.294 src/sys/arch/amd64/amd64/machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/machdep.c
diff -u src/sys/arch/amd64/amd64/machdep.c:1.293 src/sys/arch/amd64/amd64/machdep.c:1.294
--- src/sys/arch/amd64/amd64/machdep.c:1.293	Sat Jan 20 13:42:07 2018
+++ src/sys/arch/amd64/amd64/machdep.c	Sun Jan 21 08:20:30 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: machdep.c,v 1.293 2018/01/20 13:42:07 maxv Exp $	*/
+/*	$NetBSD: machdep.c,v 1.294 2018/01/21 08:20:30 maxv Exp $	*/
 
 /*
  * Copyright (c) 1996, 1997, 1998, 2000, 2006, 2007, 2008, 2011
@@ -110,7 +110,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.293 2018/01/20 13:42:07 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.294 2018/01/21 08:20:30 maxv Exp $");
 
 /* #define XENDEBUG_LOW  */
 
@@ -2278,12 +2278,11 @@ struct svs_utls {
 static pd_entry_t *
 svs_tree_add(struct cpu_info *ci, vaddr_t va)
 {
-	extern pd_entry_t * const normal_pdes[];
 	extern const vaddr_t ptp_masks[];
 	extern const int ptp_shifts[];
 	extern const long nbpd[];
-	pd_entry_t *srcpde, *dstpde;
-	size_t i, idx, pidx, mod;
+	pd_entry_t *dstpde;
+	size_t i, pidx, mod;
 	struct vm_page *pg;
 	paddr_t pa;
 
@@ -2291,12 +2290,6 @@ svs_tree_add(struct cpu_info *ci, vaddr_
 	mod = (size_t)-1;
 
 	for (i = PTP_LEVELS; i > 1; i--) {
-		idx = pl_i(va, i);
-		srcpde = normal_pdes[i - 2];
-
-		if (!pmap_valid_entry(srcpde[idx])) {
-			panic("%s: page not mapped", __func__);
-		}
 		pidx = pl_i(va % mod, i);
 
 		if (!pmap_valid_entry(dstpde[pidx])) {
@@ -2320,19 +2313,44 @@ svs_tree_add(struct cpu_info *ci, vaddr_
 static void
 svs_page_add(struct cpu_info *ci, vaddr_t va)
 {
-	pd_entry_t *srcpde, *dstpde;
+	pd_entry_t *srcpde, *dstpde, pde;
 	size_t idx, pidx;
+	paddr_t pa;
 
 	/* Create levels L4, L3 and L2. */
 	dstpde = svs_tree_add(ci, va);
 
-	/* Enter L1. */
+	pidx = pl1_i(va % NBPD_L2);
+
+	/*
+	 * If 'va' is in a large page, we need to compute its physical
+	 * address manually.
+	 */
+	idx = pl2_i(va);
+	srcpde = L2_BASE;
+	if (!pmap_valid_entry(srcpde[idx])) {
+		panic("%s: L2 page not mapped", __func__);
+	}
+	if (srcpde[idx] & PG_PS) {
+		pa = srcpde[idx] & PG_2MFRAME;
+		pa += (paddr_t)(va % NBPD_L2);
+		pde = (srcpde[idx] & ~(PG_PS|PG_2MFRAME)) | pa;
+
+		if (pmap_valid_entry(dstpde[pidx])) {
+			panic("%s: L1 page already mapped", __func__);
+		}
+		dstpde[pidx] = pde;
+		return;
+	}
+
+	/*
+	 * Normal page, just copy the PDE.
+	 */
 	idx = pl1_i(va);
 	srcpde = L1_BASE;
 	if (!pmap_valid_entry(srcpde[idx])) {
 		panic("%s: L1 page not mapped", __func__);
 	}
-	pidx = pl1_i(va % NBPD_L2);
 	if (pmap_valid_entry(dstpde[pidx])) {
 		panic("%s: L1 page already mapped", __func__);
 	}



CVS commit: src/sys/arch/amd64/amd64

2018-01-20 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Jan 20 14:08:08 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: vector.S

Log Message:
Start with .text not to inherit the last section of amd64_trap.S, and
remove outdated #define.


To generate a diff of this commit:
cvs rdiff -u -r1.53 -r1.54 src/sys/arch/amd64/amd64/vector.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/vector.S
diff -u src/sys/arch/amd64/amd64/vector.S:1.53 src/sys/arch/amd64/amd64/vector.S:1.54
--- src/sys/arch/amd64/amd64/vector.S:1.53	Wed Nov  8 18:29:04 2017
+++ src/sys/arch/amd64/amd64/vector.S	Sat Jan 20 14:08:08 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: vector.S,v 1.53 2017/11/08 18:29:04 maxv Exp $	*/
+/*	$NetBSD: vector.S,v 1.54 2018/01/20 14:08:08 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008 The NetBSD Foundation, Inc.
@@ -87,9 +87,9 @@
 
 #include "amd64_trap.S"
 
-/*/
+	.text
 
-#define __HAVE_GENERIC_SOFT_INTERRUPTS	/* XXX */
+/*/
 
 /*
  * Macros for interrupt entry, call to handler, and exit.



CVS commit: src/sys/arch/amd64/amd64

2018-01-20 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Jan 20 13:45:15 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: amd64_trap.S

Log Message:
Eliminate a '.text'.


To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/amd64/amd64/amd64_trap.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/amd64_trap.S
diff -u src/sys/arch/amd64/amd64/amd64_trap.S:1.20 src/sys/arch/amd64/amd64/amd64_trap.S:1.21
--- src/sys/arch/amd64/amd64/amd64_trap.S:1.20	Sat Jan 20 13:42:07 2018
+++ src/sys/arch/amd64/amd64/amd64_trap.S	Sat Jan 20 13:45:15 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: amd64_trap.S,v 1.20 2018/01/20 13:42:07 maxv Exp $	*/
+/*	$NetBSD: amd64_trap.S,v 1.21 2018/01/20 13:45:15 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008, 2017 The NetBSD Foundation, Inc.
@@ -66,7 +66,7 @@
 
 #if 0
 #include 
-__KERNEL_RCSID(0, "$NetBSD: amd64_trap.S,v 1.20 2018/01/20 13:42:07 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: amd64_trap.S,v 1.21 2018/01/20 13:45:15 maxv Exp $");
 #endif
 
 /*
@@ -183,21 +183,6 @@ IDTVEC(trap03)
 	/* Jump to the code hooked in by DTrace. */
 	movq	dtrace_invop_jump_addr, %rax
 	jmpq	*dtrace_invop_jump_addr
-
-	.bss
-	.globl	dtrace_invop_jump_addr
-	.align	8
-	.type	dtrace_invop_jump_addr, @object
-	.size	dtrace_invop_jump_addr, 8
-dtrace_invop_jump_addr:
-	.zero	8
-	.globl	dtrace_invop_calltrap_addr
-	.align	8
-	.type	dtrace_invop_calltrap_addr, @object
-	.size	dtrace_invop_calltrap_addr, 8
-dtrace_invop_calltrap_addr:
-	.zero	8
-	.text
 #endif
 IDTVEC_END(trap03)
 
@@ -493,6 +478,22 @@ calltrap:
 #endif
 END(alltraps)
 
+#ifdef KDTRACE_HOOKS
+	.bss
+	.globl	dtrace_invop_jump_addr
+	.align	8
+	.type	dtrace_invop_jump_addr, @object
+	.size	dtrace_invop_jump_addr, 8
+dtrace_invop_jump_addr:
+	.zero	8
+	.globl	dtrace_invop_calltrap_addr
+	.align	8
+	.type	dtrace_invop_calltrap_addr, @object
+	.size	dtrace_invop_calltrap_addr, 8
+dtrace_invop_calltrap_addr:
+	.zero	8
+#endif
+
 	.section .rodata
 
 LABEL(x86_exceptions)



CVS commit: src/sys/arch/amd64/amd64

2018-01-20 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Jan 20 13:42:07 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: amd64_trap.S machdep.c

Log Message:
Don't declare exceptions[] with IDTVEC, it's an array, not a function.
Rename it to x86_exceptions[], and move it to .rodata.


To generate a diff of this commit:
cvs rdiff -u -r1.19 -r1.20 src/sys/arch/amd64/amd64/amd64_trap.S
cvs rdiff -u -r1.292 -r1.293 src/sys/arch/amd64/amd64/machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/amd64_trap.S
diff -u src/sys/arch/amd64/amd64/amd64_trap.S:1.19 src/sys/arch/amd64/amd64/amd64_trap.S:1.20
--- src/sys/arch/amd64/amd64/amd64_trap.S:1.19	Sat Jan 20 08:30:53 2018
+++ src/sys/arch/amd64/amd64/amd64_trap.S	Sat Jan 20 13:42:07 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: amd64_trap.S,v 1.19 2018/01/20 08:30:53 maxv Exp $	*/
+/*	$NetBSD: amd64_trap.S,v 1.20 2018/01/20 13:42:07 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008, 2017 The NetBSD Foundation, Inc.
@@ -66,7 +66,7 @@
 
 #if 0
 #include 
-__KERNEL_RCSID(0, "$NetBSD: amd64_trap.S,v 1.19 2018/01/20 08:30:53 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: amd64_trap.S,v 1.20 2018/01/20 13:42:07 maxv Exp $");
 #endif
 
 /*
@@ -360,25 +360,6 @@ IDTVEC_END(trap29)
 IDTVEC_END(trap30)
 IDTVEC_END(trap31)
 
-IDTVEC(exceptions)
-	.quad	_C_LABEL(Xtrap00), _C_LABEL(Xtrap01)
-	.quad	_C_LABEL(Xtrap02), _C_LABEL(Xtrap03)
-	.quad	_C_LABEL(Xtrap04), _C_LABEL(Xtrap05)
-	.quad	_C_LABEL(Xtrap06), _C_LABEL(Xtrap07)
-	.quad	_C_LABEL(Xtrap08), _C_LABEL(Xtrap09)
-	.quad	_C_LABEL(Xtrap10), _C_LABEL(Xtrap11)
-	.quad	_C_LABEL(Xtrap12), _C_LABEL(Xtrap13)
-	.quad	_C_LABEL(Xtrap14), _C_LABEL(Xtrap15)
-	.quad	_C_LABEL(Xtrap16), _C_LABEL(Xtrap17)
-	.quad	_C_LABEL(Xtrap18), _C_LABEL(Xtrap19)
-	.quad	_C_LABEL(Xtrap20), _C_LABEL(Xtrap21)
-	.quad	_C_LABEL(Xtrap22), _C_LABEL(Xtrap23)
-	.quad	_C_LABEL(Xtrap24), _C_LABEL(Xtrap25)
-	.quad	_C_LABEL(Xtrap26), _C_LABEL(Xtrap27)
-	.quad	_C_LABEL(Xtrap28), _C_LABEL(Xtrap29)
-	.quad	_C_LABEL(Xtrap30), _C_LABEL(Xtrap31)
-IDTVEC_END(exceptions)
-
 IDTVEC(intrspurious)
 	ZTRAP_NJ(T_ASTFLT)
 	INTRENTRY
@@ -512,3 +493,24 @@ calltrap:
 #endif
 END(alltraps)
 
+	.section .rodata
+
+LABEL(x86_exceptions)
+	.quad	_C_LABEL(Xtrap00), _C_LABEL(Xtrap01)
+	.quad	_C_LABEL(Xtrap02), _C_LABEL(Xtrap03)
+	.quad	_C_LABEL(Xtrap04), _C_LABEL(Xtrap05)
+	.quad	_C_LABEL(Xtrap06), _C_LABEL(Xtrap07)
+	.quad	_C_LABEL(Xtrap08), _C_LABEL(Xtrap09)
+	.quad	_C_LABEL(Xtrap10), _C_LABEL(Xtrap11)
+	.quad	_C_LABEL(Xtrap12), _C_LABEL(Xtrap13)
+	.quad	_C_LABEL(Xtrap14), _C_LABEL(Xtrap15)
+	.quad	_C_LABEL(Xtrap16), _C_LABEL(Xtrap17)
+	.quad	_C_LABEL(Xtrap18), _C_LABEL(Xtrap19)
+	.quad	_C_LABEL(Xtrap20), _C_LABEL(Xtrap21)
+	.quad	_C_LABEL(Xtrap22), _C_LABEL(Xtrap23)
+	.quad	_C_LABEL(Xtrap24), _C_LABEL(Xtrap25)
+	.quad	_C_LABEL(Xtrap26), _C_LABEL(Xtrap27)
+	.quad	_C_LABEL(Xtrap28), _C_LABEL(Xtrap29)
+	.quad	_C_LABEL(Xtrap30), _C_LABEL(Xtrap31)
+END(x86_exceptions)
+

Index: src/sys/arch/amd64/amd64/machdep.c
diff -u src/sys/arch/amd64/amd64/machdep.c:1.292 src/sys/arch/amd64/amd64/machdep.c:1.293
--- src/sys/arch/amd64/amd64/machdep.c:1.292	Sat Jan 20 07:43:28 2018
+++ src/sys/arch/amd64/amd64/machdep.c	Sat Jan 20 13:42:07 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: machdep.c,v 1.292 2018/01/20 07:43:28 maxv Exp $	*/
+/*	$NetBSD: machdep.c,v 1.293 2018/01/20 13:42:07 maxv Exp $	*/
 
 /*
  * Copyright (c) 1996, 1997, 1998, 2000, 2006, 2007, 2008, 2011
@@ -110,7 +110,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.292 2018/01/20 07:43:28 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.293 2018/01/20 13:42:07 maxv Exp $");
 
 /* #define XENDEBUG_LOW  */
 
@@ -1488,7 +1488,7 @@ typedef void (vector)(void);
 extern vector IDTVEC(syscall);
 extern vector IDTVEC(syscall32);
 extern vector IDTVEC(osyscall);
-extern vector *IDTVEC(exceptions)[];
+extern vector *x86_exceptions[];
 
 static void
 init_x86_64_ksyms(void)
@@ -1777,7 +1777,7 @@ init_x86_64(paddr_t first_avail)
 			ist = 0;
 			break;
 		}
-		setgate([x], IDTVEC(exceptions)[x], ist, SDT_SYS386IGT,
+		setgate([x], x86_exceptions[x], ist, SDT_SYS386IGT,
 		(x == 3 || x == 4) ? SEL_UPL : SEL_KPL,
 		GSEL(GCODE_SEL, SEL_KPL));
 #else /* XEN */
@@ -1801,7 +1801,7 @@ init_x86_64(paddr_t first_avail)
 
 		xen_idt[xen_idt_idx].cs = GSEL(GCODE_SEL, SEL_KPL);
 		xen_idt[xen_idt_idx].address =
-		(unsigned long)IDTVEC(exceptions)[x];
+		(unsigned long)x86_exceptions[x];
 		xen_idt_idx++;
 #endif /* XEN */
 	}



CVS commit: src/sys/arch/amd64/amd64

2018-01-20 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Jan 20 08:30:53 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: amd64_trap.S trap.c

Log Message:
Fix the double-fault handler. We're executing on ist1 and must not jump
out of it, so don't enable interrupts. And use the SVS_*_ALTSTACK macros.

While here, fix the NMI handler too: it should use SVS_LEAVE_ALTSTACK.


To generate a diff of this commit:
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/amd64/amd64/amd64_trap.S
cvs rdiff -u -r1.110 -r1.111 src/sys/arch/amd64/amd64/trap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/amd64_trap.S
diff -u src/sys/arch/amd64/amd64/amd64_trap.S:1.18 src/sys/arch/amd64/amd64/amd64_trap.S:1.19
--- src/sys/arch/amd64/amd64/amd64_trap.S:1.18	Thu Jan 18 07:25:34 2018
+++ src/sys/arch/amd64/amd64/amd64_trap.S	Sat Jan 20 08:30:53 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: amd64_trap.S,v 1.18 2018/01/18 07:25:34 maxv Exp $	*/
+/*	$NetBSD: amd64_trap.S,v 1.19 2018/01/20 08:30:53 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008, 2017 The NetBSD Foundation, Inc.
@@ -66,7 +66,7 @@
 
 #if 0
 #include 
-__KERNEL_RCSID(0, "$NetBSD: amd64_trap.S,v 1.18 2018/01/18 07:25:34 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: amd64_trap.S,v 1.19 2018/01/20 08:30:53 maxv Exp $");
 #endif
 
 /*
@@ -146,7 +146,7 @@ IDTVEC(trap02)
 	movq	%rsp,%rdi
 	incq	CPUVAR(NTRAP)
 	call	_C_LABEL(nmitrap)
-	SVS_LEAVE
+	SVS_LEAVE_ALTSTACK
 
 .Lnmileave:
 	movw	TF_ES(%rsp),%es
@@ -224,8 +224,43 @@ IDTVEC(trap07)
 	jmp	.Lalltraps_checkusr
 IDTVEC_END(trap07)
 
+/*
+ * Double faults execute on a particular stack, and we must not jump out
+ * of it. So don't enable interrupts.
+ */
 IDTVEC(trap08)
+#if defined(XEN)
 	TRAP(T_DOUBLEFLT)
+#else
+	TRAP_NJ(T_DOUBLEFLT)
+	subq	$TF_REGSIZE,%rsp
+	INTR_SAVE_GPRS
+	SVS_ENTER_ALTSTACK
+	testb	$SEL_UPL,TF_CS(%rsp)
+	jz	1f
+	swapgs
+1:
+	cld
+	SMAP_ENABLE
+	movw	%gs,TF_GS(%rsp)
+	movw	%fs,TF_FS(%rsp)
+	movw	%es,TF_ES(%rsp)
+	movw	%ds,TF_DS(%rsp)
+
+	movq	%rsp,%rdi
+	incq	CPUVAR(NTRAP)
+	call	_C_LABEL(doubletrap)
+
+	SVS_LEAVE_ALTSTACK
+	INTR_RESTORE_GPRS
+
+	testb	$SEL_UPL,TF_CS(%rsp)
+	jz	1f
+	swapgs
+1:
+	addq	$TF_REGSIZE+16,%rsp
+	iretq
+#endif
 IDTVEC_END(trap08)
 
 IDTVEC(trap09)

Index: src/sys/arch/amd64/amd64/trap.c
diff -u src/sys/arch/amd64/amd64/trap.c:1.110 src/sys/arch/amd64/amd64/trap.c:1.111
--- src/sys/arch/amd64/amd64/trap.c:1.110	Wed Jan 10 20:51:11 2018
+++ src/sys/arch/amd64/amd64/trap.c	Sat Jan 20 08:30:53 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: trap.c,v 1.110 2018/01/10 20:51:11 maxv Exp $	*/
+/*	$NetBSD: trap.c,v 1.111 2018/01/20 08:30:53 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2000, 2017 The NetBSD Foundation, Inc.
@@ -64,7 +64,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.110 2018/01/10 20:51:11 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.111 2018/01/20 08:30:53 maxv Exp $");
 
 #include "opt_ddb.h"
 #include "opt_kgdb.h"
@@ -121,6 +121,7 @@ dtrace_doubletrap_func_t	dtrace_doubletr
 #endif
 
 void nmitrap(struct trapframe *);
+void doubletrap(struct trapframe *);
 void trap(struct trapframe *);
 void trap_return_fault_return(struct trapframe *) __dead;
 
@@ -228,6 +229,22 @@ nmitrap(struct trapframe *frame)
 	x86_nmi();
 }
 
+void
+doubletrap(struct trapframe *frame)
+{
+	const int type = T_DOUBLEFLT;
+	struct lwp *l = curlwp;
+
+	trap_print(frame, l);
+
+	if (kdb_trap(type, 0, frame))
+		return;
+	if (kgdb_trap(type, frame))
+		return;
+
+	panic("double fault");
+}
+
 /*
  * Did we receive in kernel mode a trap that ought to be considered as a user
  * trap? If this function returns, the answer is no.



CVS commit: src/sys/arch/amd64/amd64

2018-01-19 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Jan 20 07:43:28 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: machdep.c

Log Message:
Improve two comments and a KASSERT.


To generate a diff of this commit:
cvs rdiff -u -r1.291 -r1.292 src/sys/arch/amd64/amd64/machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/machdep.c
diff -u src/sys/arch/amd64/amd64/machdep.c:1.291 src/sys/arch/amd64/amd64/machdep.c:1.292
--- src/sys/arch/amd64/amd64/machdep.c:1.291	Thu Jan 18 07:25:34 2018
+++ src/sys/arch/amd64/amd64/machdep.c	Sat Jan 20 07:43:28 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: machdep.c,v 1.291 2018/01/18 07:25:34 maxv Exp $	*/
+/*	$NetBSD: machdep.c,v 1.292 2018/01/20 07:43:28 maxv Exp $	*/
 
 /*
  * Copyright (c) 1996, 1997, 1998, 2000, 2006, 2007, 2008, 2011
@@ -110,7 +110,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.291 2018/01/18 07:25:34 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.292 2018/01/20 07:43:28 maxv Exp $");
 
 /* #define XENDEBUG_LOW  */
 
@@ -2478,7 +2478,7 @@ svs_pmap_sync(struct pmap *pmap, int ind
 	KASSERT(pmap != pmap_kernel());
 	KASSERT(mutex_owned(pmap->pm_lock));
 	KASSERT(kpreempt_disabled());
-	KASSERT(index <= 255);
+	KASSERT(index < 255);
 
 	for (CPU_INFO_FOREACH(cii, ci)) {
 		cid = cpu_index(ci);
@@ -2530,9 +2530,8 @@ svs_lwp_switch(struct lwp *oldlwp, struc
 	(ci->ci_svs_ursp0 % PAGE_SIZE));
 
 	/*
-	 * Enter the user rsp0. We don't need to flush the TLB here, it will
-	 * be implicitly flushed when we reload CR3 next time we return to
-	 * userland.
+	 * Enter the user rsp0. We don't need to flush the TLB here, since
+	 * the user page tables are not loaded.
 	 */
 	pte = ci->ci_svs_rsp0_pte;
 	*pte = L1_BASE[pl1_i(va)];
@@ -2549,7 +2548,7 @@ svs_pte_atomic_read(struct pmap *pmap, s
 
 /*
  * We may come here with the pmap unlocked. So read its PTEs atomically. If
- * a remote CPU is updating them at the same time, it's not that bad: the
+ * a remote CPU is updating them at the same time, it's not a problem: the
  * remote CPU will call svs_pmap_sync afterwards, and our updirpa will be
  * synchronized properly.
  */



CVS commit: src/sys/arch/amd64/amd64

2018-01-12 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Fri Jan 12 09:12:02 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: machdep.c

Log Message:
Split svs_page_add in two, one half will be used for other purposes, and
update a comment.


To generate a diff of this commit:
cvs rdiff -u -r1.289 -r1.290 src/sys/arch/amd64/amd64/machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/machdep.c
diff -u src/sys/arch/amd64/amd64/machdep.c:1.289 src/sys/arch/amd64/amd64/machdep.c:1.290
--- src/sys/arch/amd64/amd64/machdep.c:1.289	Thu Jan 11 13:35:15 2018
+++ src/sys/arch/amd64/amd64/machdep.c	Fri Jan 12 09:12:01 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: machdep.c,v 1.289 2018/01/11 13:35:15 maxv Exp $	*/
+/*	$NetBSD: machdep.c,v 1.290 2018/01/12 09:12:01 maxv Exp $	*/
 
 /*
  * Copyright (c) 1996, 1997, 1998, 2000, 2006, 2007, 2008, 2011
@@ -110,7 +110,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.289 2018/01/11 13:35:15 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.290 2018/01/12 09:12:01 maxv Exp $");
 
 /* #define XENDEBUG_LOW  */
 
@@ -2261,11 +2261,16 @@ mm_md_direct_mapped_phys(paddr_t paddr, 
  * remote CPUs that execute other threads of the user process we just
  * left will keep synchronizing us against their changes.
  *
- * TODO: for now, only PMAP_SLOT_PTE is unmapped.
+ * List of areas that are removed from userland:
+ * PTE Space [OK]
+ * Direct Map[OK]
+ * Remote PCPU Areas [OK]
+ * Kernel Heap   [TODO]
+ * Kernel Image  [TODO]
  */
 
-static void
-svs_page_add(struct cpu_info *ci, vaddr_t va)
+static pd_entry_t *
+svs_tree_add(struct cpu_info *ci, vaddr_t va)
 {
 	extern pd_entry_t * const normal_pdes[];
 	extern const vaddr_t ptp_masks[];
@@ -2276,8 +2281,6 @@ svs_page_add(struct cpu_info *ci, vaddr_
 	struct vm_page *pg;
 	paddr_t pa;
 
-	KASSERT(va % PAGE_SIZE == 0);
-
 	dstpde = ci->ci_svs_updir;
 	mod = (size_t)-1;
 
@@ -2305,13 +2308,25 @@ svs_page_add(struct cpu_info *ci, vaddr_
 		mod = nbpd[i-1];
 	}
 
-	/* Do the last level manually */
-	idx = pl_i(va, 1);
+	return dstpde;
+}
+
+static void
+svs_page_add(struct cpu_info *ci, vaddr_t va)
+{
+	pd_entry_t *srcpde, *dstpde;
+	size_t idx, pidx;
+
+	/* Create levels L4, L3 and L2. */
+	dstpde = svs_tree_add(ci, va);
+
+	/* Enter L1. */
+	idx = pl1_i(va);
 	srcpde = L1_BASE;
 	if (!pmap_valid_entry(srcpde[idx])) {
 		panic("%s: L1 page not mapped", __func__);
 	}
-	pidx = pl_i(va % mod, 1);
+	pidx = pl1_i(va % NBPD_L2);
 	if (pmap_valid_entry(dstpde[pidx])) {
 		panic("%s: L1 page already mapped", __func__);
 	}



CVS commit: src/sys/arch/amd64/amd64

2018-01-10 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Wed Jan 10 20:51:11 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: trap.c

Log Message:
Restrict the check: SMAP faults are always protection violations, as the
SDM points out, so make sure we have PGEX_P. This way NULL dereferences -
which are caused by an unmapped VA, and therefore are not protection
violations - don't take this branch, and don't display a misleading
"SMAP" in ddb.

Adding a PGEX_P check, or not, does not essentially change anything from
a security point of view, it's just a matter of what gets displayed when
a fatal fault comes in.

I didn't put PGEX_P until now, because initially when I wrote the SMAP
implementation Qemu did not always receive the fault if the PGEX_P check
was there, while a native i5 would. I'm unable to reproduce this issue
with a recent Qemu, so I assume I did something wrong when testing in the
first place.


To generate a diff of this commit:
cvs rdiff -u -r1.109 -r1.110 src/sys/arch/amd64/amd64/trap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/trap.c
diff -u src/sys/arch/amd64/amd64/trap.c:1.109 src/sys/arch/amd64/amd64/trap.c:1.110
--- src/sys/arch/amd64/amd64/trap.c:1.109	Sat Dec  9 00:52:41 2017
+++ src/sys/arch/amd64/amd64/trap.c	Wed Jan 10 20:51:11 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: trap.c,v 1.109 2017/12/09 00:52:41 christos Exp $	*/
+/*	$NetBSD: trap.c,v 1.110 2018/01/10 20:51:11 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2000, 2017 The NetBSD Foundation, Inc.
@@ -64,7 +64,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.109 2017/12/09 00:52:41 christos Exp $");
+__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.110 2018/01/10 20:51:11 maxv Exp $");
 
 #include "opt_ddb.h"
 #include "opt_kgdb.h"
@@ -562,13 +562,11 @@ trap(struct trapframe *frame)
 			}
 		}
 
-		if (cr2 < VM_MAXUSER_ADDRESS) {
+		if ((frame->tf_err & PGEX_P) &&
+		cr2 < VM_MAXUSER_ADDRESS) {
 			/* SMAP might have brought us here */
 			if (onfault_handler(pcb, frame) == NULL) {
-panic("prevented %s %p (SMAP)",
-(cr2 < PAGE_SIZE
-	? "null pointer dereference at"
-	: "access to"),
+panic("prevented access to %p (SMAP)",
 (void *)cr2);
 			}
 		}



CVS commit: src/sys/arch/amd64/amd64

2018-01-07 Thread Christos Zoulas
Module Name:src
Committed By:   christos
Date:   Sun Jan  7 16:47:22 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: genassym.cf

Log Message:
make this compile again


To generate a diff of this commit:
cvs rdiff -u -r1.65 -r1.66 src/sys/arch/amd64/amd64/genassym.cf

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/genassym.cf
diff -u src/sys/arch/amd64/amd64/genassym.cf:1.65 src/sys/arch/amd64/amd64/genassym.cf:1.66
--- src/sys/arch/amd64/amd64/genassym.cf:1.65	Sun Jan  7 11:10:16 2018
+++ src/sys/arch/amd64/amd64/genassym.cf	Sun Jan  7 11:47:22 2018
@@ -1,4 +1,4 @@
-#	$NetBSD: genassym.cf,v 1.65 2018/01/07 16:10:16 maxv Exp $
+#	$NetBSD: genassym.cf,v 1.66 2018/01/07 16:47:22 christos Exp $
 
 #
 # Copyright (c) 1998, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -236,8 +236,10 @@ define	CPU_INFO_CURLDT		offsetof(struct 
 define	CPU_INFO_IDLELWP	offsetof(struct cpu_info, ci_data.cpu_idlelwp)
 define	CPU_INFO_PMAP		offsetof(struct cpu_info, ci_pmap)
 define	CPU_INFO_TSS		offsetof(struct cpu_info, ci_tss)
+ifdef SVS
 define	CPU_INFO_UPDIRPA	offsetof(struct cpu_info, ci_svs_updirpa)
 define	CPU_INFO_KPDIRPA	offsetof(struct cpu_info, ci_svs_kpdirpa)
+endif
 define	CPU_INFO_NSYSCALL	offsetof(struct cpu_info, ci_data.cpu_nsyscall)
 define	CPU_INFO_NTRAP		offsetof(struct cpu_info, ci_data.cpu_ntrap)
 define	CPU_INFO_NINTR		offsetof(struct cpu_info, ci_data.cpu_nintr)



CVS commit: src/sys/arch/amd64/amd64

2018-01-06 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Jan  6 08:44:01 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: amd64_trap.S

Log Message:
Mmh, I made a mistake in r1.10 - I forgot to update this function call.


To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/amd64/amd64/amd64_trap.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/amd64_trap.S
diff -u src/sys/arch/amd64/amd64/amd64_trap.S:1.14 src/sys/arch/amd64/amd64/amd64_trap.S:1.15
--- src/sys/arch/amd64/amd64/amd64_trap.S:1.14	Tue Jan  2 18:41:14 2018
+++ src/sys/arch/amd64/amd64/amd64_trap.S	Sat Jan  6 08:44:01 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: amd64_trap.S,v 1.14 2018/01/02 18:41:14 maxv Exp $	*/
+/*	$NetBSD: amd64_trap.S,v 1.15 2018/01/06 08:44:01 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008, 2017 The NetBSD Foundation, Inc.
@@ -66,7 +66,7 @@
 
 #if 0
 #include 
-__KERNEL_RCSID(0, "$NetBSD: amd64_trap.S,v 1.14 2018/01/02 18:41:14 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: amd64_trap.S,v 1.15 2018/01/06 08:44:01 maxv Exp $");
 #endif
 
 /*
@@ -143,7 +143,7 @@ IDTVEC(trap02)
 .Lnoswapgs:
 	movq	%rsp,%rdi
 	incq	CPUVAR(NTRAP)
-	call	_C_LABEL(trap)
+	call	_C_LABEL(nmitrap)
 
 .Lnmileave:
 	movw	TF_ES(%rsp),%es



CVS commit: src/sys/arch/amd64/amd64

2018-01-02 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Tue Jan  2 18:54:26 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: machdep.c

Log Message:
Stop sharing the double-fault stack. It is embedded in .data, and we won't
want that in the future. This has always been wrong anyway, even if it is
unlikely that two CPUs will double fault at the same time.


To generate a diff of this commit:
cvs rdiff -u -r1.280 -r1.281 src/sys/arch/amd64/amd64/machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/machdep.c
diff -u src/sys/arch/amd64/amd64/machdep.c:1.280 src/sys/arch/amd64/amd64/machdep.c:1.281
--- src/sys/arch/amd64/amd64/machdep.c:1.280	Sun Dec 31 08:29:38 2017
+++ src/sys/arch/amd64/amd64/machdep.c	Tue Jan  2 18:54:26 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: machdep.c,v 1.280 2017/12/31 08:29:38 maxv Exp $	*/
+/*	$NetBSD: machdep.c,v 1.281 2018/01/02 18:54:26 maxv Exp $	*/
 
 /*
  * Copyright (c) 1996, 1997, 1998, 2000, 2006, 2007, 2008, 2011
@@ -110,7 +110,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.280 2017/12/31 08:29:38 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.281 2018/01/02 18:54:26 maxv Exp $");
 
 /* #define XENDEBUG_LOW  */
 
@@ -290,8 +290,6 @@ struct pool x86_dbregspl;
 phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
 int mem_cluster_cnt;
 
-char x86_64_doubleflt_stack[4096];
-
 int cpu_dump(void);
 int cpu_dumpsize(void);
 u_long cpu_dump_mempagecnt(void);
@@ -511,11 +509,13 @@ cpu_init_tss(struct cpu_info *ci)
 	/* tss->tss_ist[0] is filled by cpu_intr_init */
 
 	/* double fault */
-	tss->tss_ist[1] = (uint64_t)x86_64_doubleflt_stack + PAGE_SIZE - 16;
+	p = uvm_km_alloc(kernel_map, PAGE_SIZE, 0, UVM_KMF_WIRED);
+	tss->tss_ist[1] = p + PAGE_SIZE - 16;
 
 	/* NMI */
 	p = uvm_km_alloc(kernel_map, PAGE_SIZE, 0, UVM_KMF_WIRED);
 	tss->tss_ist[2] = p + PAGE_SIZE - 16;
+
 	ci->ci_tss_sel = tss_alloc(tss);
 }
 



CVS commit: src/sys/arch/amd64/amd64

2018-01-02 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Tue Jan  2 18:41:14 UTC 2018

Modified Files:
src/sys/arch/amd64/amd64: amd64_trap.S

Log Message:
Use decimal numbering - hex is just misleading -, use ZTRAP_NJ for NMIs,
and declare intrspurious independently.


To generate a diff of this commit:
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/amd64/amd64/amd64_trap.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/amd64_trap.S
diff -u src/sys/arch/amd64/amd64/amd64_trap.S:1.13 src/sys/arch/amd64/amd64/amd64_trap.S:1.14
--- src/sys/arch/amd64/amd64/amd64_trap.S:1.13	Sun Nov 26 14:54:43 2017
+++ src/sys/arch/amd64/amd64/amd64_trap.S	Tue Jan  2 18:41:14 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: amd64_trap.S,v 1.13 2017/11/26 14:54:43 maxv Exp $	*/
+/*	$NetBSD: amd64_trap.S,v 1.14 2018/01/02 18:41:14 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2007, 2008, 2017 The NetBSD Foundation, Inc.
@@ -66,7 +66,7 @@
 
 #if 0
 #include 
-__KERNEL_RCSID(0, "$NetBSD: amd64_trap.S,v 1.13 2017/11/26 14:54:43 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: amd64_trap.S,v 1.14 2018/01/02 18:41:14 maxv Exp $");
 #endif
 
 /*
@@ -118,8 +118,7 @@ IDTVEC(trap02)
 #if defined(XEN)
 	ZTRAP(T_NMI)
 #else
-	pushq	$0
-	pushq	$T_NMI
+	ZTRAP_NJ(T_NMI)
 	subq	$TF_REGSIZE,%rsp
 	INTR_SAVE_GPRS
 	cld
@@ -230,9 +229,9 @@ IDTVEC(trap09)
 	ZTRAP(T_FPOPFLT)
 IDTVEC_END(trap09)
 
-IDTVEC(trap0a)
+IDTVEC(trap10)
 	TRAP(T_TSSFLT)
-IDTVEC_END(trap0a)
+IDTVEC_END(trap10)
 
 #ifdef XEN
 /*
@@ -243,37 +242,35 @@ IDTVEC_END(trap0a)
 #define check_swapgs alltraps
 #endif
 
-IDTVEC(trap0b)		/* #NP() Segment not present */
+IDTVEC(trap11)		/* #NP() Segment not present */
 	TRAP_NJ(T_SEGNPFLT)
 	jmp	check_swapgs
-IDTVEC_END(trap0b)
+IDTVEC_END(trap11)
 
-IDTVEC(trap0c)		/* #SS() Stack exception */
+IDTVEC(trap12)		/* #SS() Stack exception */
 	TRAP_NJ(T_STKFLT)
 	jmp	check_swapgs
-IDTVEC_END(trap0c)
+IDTVEC_END(trap12)
 
-IDTVEC(trap0d)		/* #GP() General protection */
+IDTVEC(trap13)		/* #GP() General protection */
 	TRAP_NJ(T_PROTFLT)
 	jmp	check_swapgs
-IDTVEC_END(trap0d)
+IDTVEC_END(trap13)
 
-IDTVEC(trap0e)
+IDTVEC(trap14)
 	TRAP(T_PAGEFLT)
-IDTVEC_END(trap0e)
+IDTVEC_END(trap14)
 
-IDTVEC(intrspurious)
-IDTVEC(trap0f)
+IDTVEC(trap15)
 	ZTRAP_NJ(T_ASTFLT)
 	INTRENTRY
 #ifdef DIAGNOSTIC
 	movl	CPUVAR(ILEVEL),%ebx
 #endif
 	jmp	.Lalltraps_checkusr
-IDTVEC_END(trap0f)
-IDTVEC_END(intrspurious)
+IDTVEC_END(trap15)
 
-IDTVEC(trap10)
+IDTVEC(trap16)
 	ZTRAP_NJ(T_ARITHTRAP)
 .Ldo_fputrap:
 	INTRENTRY
@@ -283,47 +280,47 @@ IDTVEC(trap10)
 	movq	%rsp,%rdi
 	call	_C_LABEL(fputrap)
 	jmp	.Lalltraps_checkusr
-IDTVEC_END(trap10)
+IDTVEC_END(trap16)
 
-IDTVEC(trap11)
+IDTVEC(trap17)
 	TRAP(T_ALIGNFLT)
-IDTVEC_END(trap11)
+IDTVEC_END(trap17)
 
-IDTVEC(trap12)
+IDTVEC(trap18)
 	ZTRAP(T_MCA)
-IDTVEC_END(trap12)
+IDTVEC_END(trap18)
 
-IDTVEC(trap13)
+IDTVEC(trap19)
 	ZTRAP_NJ(T_XMM)
 	jmp	.Ldo_fputrap
-IDTVEC_END(trap13)
+IDTVEC_END(trap19)
 
-IDTVEC(trap14)
-IDTVEC(trap15)
-IDTVEC(trap16)
-IDTVEC(trap17)
-IDTVEC(trap18)
-IDTVEC(trap19)
-IDTVEC(trap1a)
-IDTVEC(trap1b)
-IDTVEC(trap1c)
-IDTVEC(trap1d)
-IDTVEC(trap1e)
-IDTVEC(trap1f)
+IDTVEC(trap20)
+IDTVEC(trap21)
+IDTVEC(trap22)
+IDTVEC(trap23)
+IDTVEC(trap24)
+IDTVEC(trap25)
+IDTVEC(trap26)
+IDTVEC(trap27)
+IDTVEC(trap28)
+IDTVEC(trap29)
+IDTVEC(trap30)
+IDTVEC(trap31)
 	/* 20 - 31 reserved for future exp */
 	ZTRAP(T_RESERVED)
-IDTVEC_END(trap1f)
-IDTVEC_END(trap1e)
-IDTVEC_END(trap1d)
-IDTVEC_END(trap1c)
-IDTVEC_END(trap1b)
-IDTVEC_END(trap1a)
-IDTVEC_END(trap19)
-IDTVEC_END(trap18)
-IDTVEC_END(trap17)
-IDTVEC_END(trap16)
-IDTVEC_END(trap15)
-IDTVEC_END(trap14)
+IDTVEC_END(trap20)
+IDTVEC_END(trap21)
+IDTVEC_END(trap22)
+IDTVEC_END(trap23)
+IDTVEC_END(trap24)
+IDTVEC_END(trap25)
+IDTVEC_END(trap26)
+IDTVEC_END(trap27)
+IDTVEC_END(trap28)
+IDTVEC_END(trap29)
+IDTVEC_END(trap30)
+IDTVEC_END(trap31)
 
 IDTVEC(exceptions)
 	.quad	_C_LABEL(Xtrap00), _C_LABEL(Xtrap01)
@@ -331,19 +328,28 @@ IDTVEC(exceptions)
 	.quad	_C_LABEL(Xtrap04), _C_LABEL(Xtrap05)
 	.quad	_C_LABEL(Xtrap06), _C_LABEL(Xtrap07)
 	.quad	_C_LABEL(Xtrap08), _C_LABEL(Xtrap09)
-	.quad	_C_LABEL(Xtrap0a), _C_LABEL(Xtrap0b)
-	.quad	_C_LABEL(Xtrap0c), _C_LABEL(Xtrap0d)
-	.quad	_C_LABEL(Xtrap0e), _C_LABEL(Xtrap0f)
 	.quad	_C_LABEL(Xtrap10), _C_LABEL(Xtrap11)
 	.quad	_C_LABEL(Xtrap12), _C_LABEL(Xtrap13)
 	.quad	_C_LABEL(Xtrap14), _C_LABEL(Xtrap15)
 	.quad	_C_LABEL(Xtrap16), _C_LABEL(Xtrap17)
 	.quad	_C_LABEL(Xtrap18), _C_LABEL(Xtrap19)
-	.quad	_C_LABEL(Xtrap1a), _C_LABEL(Xtrap1b)
-	.quad	_C_LABEL(Xtrap1c), _C_LABEL(Xtrap1d)
-	.quad	_C_LABEL(Xtrap1e), _C_LABEL(Xtrap1f)
+	.quad	_C_LABEL(Xtrap20), _C_LABEL(Xtrap21)
+	.quad	_C_LABEL(Xtrap22), _C_LABEL(Xtrap23)
+	.quad	_C_LABEL(Xtrap24), _C_LABEL(Xtrap25)
+	.quad	_C_LABEL(Xtrap26), _C_LABEL(Xtrap27)
+	.quad	_C_LABEL(Xtrap28), _C_LABEL(Xtrap29)
+	.quad	_C_LABEL(Xtrap30), _C_LABEL(Xtrap31)
 IDTVEC_END(exceptions)
 

CVS commit: src/sys/arch/amd64/amd64

2017-12-08 Thread Christos Zoulas
Module Name:src
Committed By:   christos
Date:   Sat Dec  9 00:52:41 UTC 2017

Modified Files:
src/sys/arch/amd64/amd64: trap.c

Log Message:
adjust for new hexdump signature


To generate a diff of this commit:
cvs rdiff -u -r1.108 -r1.109 src/sys/arch/amd64/amd64/trap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/trap.c
diff -u src/sys/arch/amd64/amd64/trap.c:1.108 src/sys/arch/amd64/amd64/trap.c:1.109
--- src/sys/arch/amd64/amd64/trap.c:1.108	Fri Dec  8 16:52:21 2017
+++ src/sys/arch/amd64/amd64/trap.c	Fri Dec  8 19:52:41 2017
@@ -1,4 +1,4 @@
-/*	$NetBSD: trap.c,v 1.108 2017/12/08 21:52:21 christos Exp $	*/
+/*	$NetBSD: trap.c,v 1.109 2017/12/09 00:52:41 christos Exp $	*/
 
 /*
  * Copyright (c) 1998, 2000, 2017 The NetBSD Foundation, Inc.
@@ -64,7 +64,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.108 2017/12/08 21:52:21 christos Exp $");
+__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.109 2017/12/09 00:52:41 christos Exp $");
 
 #include "opt_ddb.h"
 #include "opt_kgdb.h"
@@ -815,7 +815,7 @@ frame_dump(const struct trapframe *tf, s
 	tf->tf_fs & 0x, tf->tf_gs & 0x, tf->tf_ss & 0x);
 	printf("fsbase %#018lx gsbase %#018lx\n", pcb->pcb_fs, pcb->pcb_gs);
 	printf("\n");
-	hexdump("Stack dump", tf, 256);
+	hexdump(printf, "Stack dump", tf, 256);
 }
 
 static void



CVS commit: src/sys/arch/amd64/amd64

2017-12-08 Thread Christos Zoulas
Module Name:src
Committed By:   christos
Date:   Fri Dec  8 21:52:21 UTC 2017

Modified Files:
src/sys/arch/amd64/amd64: trap.c

Log Message:
make the TRAP_SIGDEBUG code less intrusive.


To generate a diff of this commit:
cvs rdiff -u -r1.107 -r1.108 src/sys/arch/amd64/amd64/trap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/trap.c
diff -u src/sys/arch/amd64/amd64/trap.c:1.107 src/sys/arch/amd64/amd64/trap.c:1.108
--- src/sys/arch/amd64/amd64/trap.c:1.107	Thu Dec  7 18:13:17 2017
+++ src/sys/arch/amd64/amd64/trap.c	Fri Dec  8 16:52:21 2017
@@ -1,4 +1,4 @@
-/*	$NetBSD: trap.c,v 1.107 2017/12/07 23:13:17 christos Exp $	*/
+/*	$NetBSD: trap.c,v 1.108 2017/12/08 21:52:21 christos Exp $	*/
 
 /*
  * Copyright (c) 1998, 2000, 2017 The NetBSD Foundation, Inc.
@@ -64,7 +64,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.107 2017/12/07 23:13:17 christos Exp $");
+__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.108 2017/12/08 21:52:21 christos Exp $");
 
 #include "opt_ddb.h"
 #include "opt_kgdb.h"
@@ -152,7 +152,10 @@ int	trap_types = __arraycount(trap_type)
 #define	IDTVEC(name)	__CONCAT(X, name)
 
 #ifdef TRAP_SIGDEBUG
-static void frame_dump(struct trapframe *, struct pcb *);
+static void sigdebug(const struct trapframe *, const ksiginfo_t *, int);
+#define SIGDEBUG(a, b, c) sigdebug(a, b, c)
+#else
+#define SIGDEBUG(a, b, c)
 #endif
 
 static void
@@ -442,11 +445,6 @@ trap(struct trapframe *frame)
 	case T_SEGNPFLT|T_USER:
 	case T_STKFLT|T_USER:
 	case T_ALIGNFLT|T_USER:
-#ifdef TRAP_SIGDEBUG
-		printf("pid %d.%d (%s): BUS/SEGV (%#x) at rip %#lx addr %#lx\n",
-		p->p_pid, l->l_lid, p->p_comm, type, frame->tf_rip, rcr2());
-		frame_dump(frame, pcb);
-#endif
 		KSI_INIT_TRAP();
 		ksi.ksi_trap = type & ~T_USER;
 		ksi.ksi_addr = (void *)rcr2();
@@ -476,11 +474,6 @@ trap(struct trapframe *frame)
 
 	case T_PRIVINFLT|T_USER:	/* privileged instruction fault */
 	case T_FPOPFLT|T_USER:		/* coprocessor operand fault */
-#ifdef TRAP_SIGDEBUG
-		printf("pid %d.%d (%s): ILL at rip %#lx addr %#lx\n",
-		p->p_pid, l->l_lid, p->p_comm, frame->tf_rip, rcr2());
-		frame_dump(frame, pcb);
-#endif
 		KSI_INIT_TRAP();
 		ksi.ksi_signo = SIGILL;
 		ksi.ksi_trap = type & ~T_USER;
@@ -721,13 +714,7 @@ faultcommon:
 			break;
 		}
 
-#ifdef TRAP_SIGDEBUG
-		printf("pid %d.%d (%s): signal %d at rip %#lx addr %#lx "
-		"error %d trap %d cr2 %p\n", p->p_pid, l->l_lid, p->p_comm,
-		ksi.ksi_signo, frame->tf_rip, va, error, ksi.ksi_trap,
-		ksi.ksi_addr);
-		frame_dump(frame, pcb);
-#endif
+		SIGDEBUG(frame, , error);
  		(*p->p_emul->e_trapsignal)(l, );
 		break;
 	}
@@ -782,6 +769,7 @@ out:
 	userret(l);
 	return;
 trapsignal:
+	SIGDEBUG(frame, , 0);
 	(*p->p_emul->e_trapsignal)(l, );
 	userret(l);
 }
@@ -804,36 +792,42 @@ startlwp(void *arg)
 }
 
 #ifdef TRAP_SIGDEBUG
-void
-frame_dump(struct trapframe *tf, struct pcb *pcb)
+static void
+frame_dump(const struct trapframe *tf, struct pcb *pcb)
 {
-	int i;
-	unsigned long *p;
 
 	printf("trapframe %p\n", tf);
-	printf("rip 0x%016lx  rsp 0x%016lx  rfl 0x%016lx\n",
+	printf("rip %#018lx  rsp %#018lx  rfl %#018lx\n",
 	tf->tf_rip, tf->tf_rsp, tf->tf_rflags);
-	printf("rdi 0x%016lx  rsi 0x%016lx  rdx 0x%016lx\n",
+	printf("rdi %#018lx  rsi %#018lx  rdx %#018lx\n",
 	tf->tf_rdi, tf->tf_rsi, tf->tf_rdx);
-	printf("rcx 0x%016lx  r8  0x%016lx  r9  0x%016lx\n",
+	printf("rcx %#018lx  r8  %#018lx  r9  %#018lx\n",
 	tf->tf_rcx, tf->tf_r8, tf->tf_r9);
-	printf("r10 0x%016lx  r11 0x%016lx  r12 0x%016lx\n",
+	printf("r10 %#018lx  r11 %#018lx  r12 %#018lx\n",
 	tf->tf_r10, tf->tf_r11, tf->tf_r12);
-	printf("r13 0x%016lx  r14 0x%016lx  r15 0x%016lx\n",
+	printf("r13 %#018lx  r14 %#018lx  r15 %#018lx\n",
 	tf->tf_r13, tf->tf_r14, tf->tf_r15);
-	printf("rbp 0x%016lx  rbx 0x%016lx  rax 0x%016lx\n",
+	printf("rbp %#018lx  rbx %#018lx  rax %#018lx\n",
 	tf->tf_rbp, tf->tf_rbx, tf->tf_rax);
-	printf("cs 0x%04lx  ds 0x%04lx  es 0x%04lx  "
-	   "fs 0x%04lx  gs 0x%04lx  ss 0x%04lx\n",
-		tf->tf_cs & 0x, tf->tf_ds & 0x, tf->tf_es & 0x,
-		tf->tf_fs & 0x, tf->tf_gs & 0x, tf->tf_ss & 0x);
-	printf("fsbase 0x%016lx gsbase 0x%016lx\n",
-	   pcb->pcb_fs, pcb->pcb_gs);
-	printf("\n");
-	printf("Stack dump:\n");
-	for (i = 0, p = (unsigned long *) tf; i < 20; i ++, p += 4)
-		printf(" 0x%.16lx  0x%.16lx  0x%.16lx  0x%.16lx\n",
-		   p[0], p[1], p[2], p[3]);
+	printf("cs %#04lx  ds %#04lx  es %#04lx  "
+	"fs %#04lx  gs %#04lx  ss %#04lx\n",
+	tf->tf_cs & 0x, tf->tf_ds & 0x, tf->tf_es & 0x,
+	tf->tf_fs & 0x, tf->tf_gs & 0x, tf->tf_ss & 0x);
+	printf("fsbase %#018lx gsbase %#018lx\n", pcb->pcb_fs, pcb->pcb_gs);
 	printf("\n");
+	hexdump("Stack dump", tf, 256);
+}
+
+static void
+sigdebug(const struct trapframe *tf, const ksiginfo_t *ksi, int e)
+{
+	struct lwp *l 

CVS commit: src/sys/arch/amd64/amd64

2017-12-07 Thread Christos Zoulas
Module Name:src
Committed By:   christos
Date:   Thu Dec  7 23:13:17 UTC 2017

Modified Files:
src/sys/arch/amd64/amd64: trap.c

Log Message:
Put back the old syscall glue for netbsd32 binaries, and also TRAP_SIGDEBUG
while I am at it.


To generate a diff of this commit:
cvs rdiff -u -r1.106 -r1.107 src/sys/arch/amd64/amd64/trap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/trap.c
diff -u src/sys/arch/amd64/amd64/trap.c:1.106 src/sys/arch/amd64/amd64/trap.c:1.107
--- src/sys/arch/amd64/amd64/trap.c:1.106	Wed Dec  6 22:25:51 2017
+++ src/sys/arch/amd64/amd64/trap.c	Thu Dec  7 18:13:17 2017
@@ -1,4 +1,4 @@
-/*	$NetBSD: trap.c,v 1.106 2017/12/07 03:25:51 riastradh Exp $	*/
+/*	$NetBSD: trap.c,v 1.107 2017/12/07 23:13:17 christos Exp $	*/
 
 /*
  * Copyright (c) 1998, 2000, 2017 The NetBSD Foundation, Inc.
@@ -64,7 +64,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.106 2017/12/07 03:25:51 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.107 2017/12/07 23:13:17 christos Exp $");
 
 #include "opt_ddb.h"
 #include "opt_kgdb.h"
@@ -86,6 +86,11 @@ __KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.1
 
 #include 
 
+#ifdef COMPAT_NETBSD32
+#include 
+#include 
+#endif
+
 #include 
 #include 
 #include 
@@ -146,6 +151,10 @@ int	trap_types = __arraycount(trap_type)
 
 #define	IDTVEC(name)	__CONCAT(X, name)
 
+#ifdef TRAP_SIGDEBUG
+static void frame_dump(struct trapframe *, struct pcb *);
+#endif
+
 static void
 onfault_restore(struct trapframe *frame, void *onfault, int error)
 {
@@ -407,11 +416,37 @@ trap(struct trapframe *frame)
 		trap_user_kernelmode(frame, type, l, p);
 		goto we_re_toast;
 
-	case T_PROTFLT|T_USER:
+	case T_PROTFLT|T_USER:		/* protection fault */
+#if defined(COMPAT_NETBSD32) && defined(COMPAT_10)
+	{
+		static const char lcall[7] = { 0x9a, 0, 0, 0, 0, 7, 0 };
+		const size_t sz = sizeof(lcall);
+		char tmp[sz];
+
+		/* Check for the oosyscall lcall instruction. */
+		if (p->p_emul == _netbsd32 &&
+		frame->tf_rip < VM_MAXUSER_ADDRESS32 - sz &&
+		copyin((void *)frame->tf_rip, tmp, sz) == 0 &&
+		memcmp(tmp, lcall, sz) == 0) {
+
+			/* Advance past the lcall. */
+			frame->tf_rip += sz;
+
+			/* Do the syscall. */
+			p->p_md.md_syscall(frame);
+			goto out;
+		}
+	}
+#endif
 	case T_TSSFLT|T_USER:
 	case T_SEGNPFLT|T_USER:
 	case T_STKFLT|T_USER:
 	case T_ALIGNFLT|T_USER:
+#ifdef TRAP_SIGDEBUG
+		printf("pid %d.%d (%s): BUS/SEGV (%#x) at rip %#lx addr %#lx\n",
+		p->p_pid, l->l_lid, p->p_comm, type, frame->tf_rip, rcr2());
+		frame_dump(frame, pcb);
+#endif
 		KSI_INIT_TRAP();
 		ksi.ksi_trap = type & ~T_USER;
 		ksi.ksi_addr = (void *)rcr2();
@@ -439,8 +474,13 @@ trap(struct trapframe *frame)
 		}
 		goto trapsignal;
 
-	case T_PRIVINFLT|T_USER:
-	case T_FPOPFLT|T_USER:
+	case T_PRIVINFLT|T_USER:	/* privileged instruction fault */
+	case T_FPOPFLT|T_USER:		/* coprocessor operand fault */
+#ifdef TRAP_SIGDEBUG
+		printf("pid %d.%d (%s): ILL at rip %#lx addr %#lx\n",
+		p->p_pid, l->l_lid, p->p_comm, frame->tf_rip, rcr2());
+		frame_dump(frame, pcb);
+#endif
 		KSI_INIT_TRAP();
 		ksi.ksi_signo = SIGILL;
 		ksi.ksi_trap = type & ~T_USER;
@@ -681,7 +721,14 @@ faultcommon:
 			break;
 		}
 
-		(*p->p_emul->e_trapsignal)(l, );
+#ifdef TRAP_SIGDEBUG
+		printf("pid %d.%d (%s): signal %d at rip %#lx addr %#lx "
+		"error %d trap %d cr2 %p\n", p->p_pid, l->l_lid, p->p_comm,
+		ksi.ksi_signo, frame->tf_rip, va, error, ksi.ksi_trap,
+		ksi.ksi_addr);
+		frame_dump(frame, pcb);
+#endif
+ 		(*p->p_emul->e_trapsignal)(l, );
 		break;
 	}
 
@@ -707,8 +754,8 @@ faultcommon:
 		}
 		goto we_re_toast;
 
-	case T_BPTFLT|T_USER:
-	case T_TRCTRAP|T_USER:
+	case T_BPTFLT|T_USER:		/* bpt instruction fault */
+	case T_TRCTRAP|T_USER:		/* trace trap */
 		/*
 		 * Don't go single-stepping into a RAS.
 		 */
@@ -756,3 +803,37 @@ startlwp(void *arg)
 	userret(l);
 }
 
+#ifdef TRAP_SIGDEBUG
+void
+frame_dump(struct trapframe *tf, struct pcb *pcb)
+{
+	int i;
+	unsigned long *p;
+
+	printf("trapframe %p\n", tf);
+	printf("rip 0x%016lx  rsp 0x%016lx  rfl 0x%016lx\n",
+	tf->tf_rip, tf->tf_rsp, tf->tf_rflags);
+	printf("rdi 0x%016lx  rsi 0x%016lx  rdx 0x%016lx\n",
+	tf->tf_rdi, tf->tf_rsi, tf->tf_rdx);
+	printf("rcx 0x%016lx  r8  0x%016lx  r9  0x%016lx\n",
+	tf->tf_rcx, tf->tf_r8, tf->tf_r9);
+	printf("r10 0x%016lx  r11 0x%016lx  r12 0x%016lx\n",
+	tf->tf_r10, tf->tf_r11, tf->tf_r12);
+	printf("r13 0x%016lx  r14 0x%016lx  r15 0x%016lx\n",
+	tf->tf_r13, tf->tf_r14, tf->tf_r15);
+	printf("rbp 0x%016lx  rbx 0x%016lx  rax 0x%016lx\n",
+	tf->tf_rbp, tf->tf_rbx, tf->tf_rax);
+	printf("cs 0x%04lx  ds 0x%04lx  es 0x%04lx  "
+	   "fs 0x%04lx  gs 0x%04lx  ss 0x%04lx\n",
+		tf->tf_cs & 0x, tf->tf_ds & 0x, tf->tf_es & 0x,
+		tf->tf_fs & 0x, tf->tf_gs & 0x, tf->tf_ss & 0x);
+	printf("fsbase 0x%016lx 

CVS commit: src/sys/arch/amd64/amd64

2017-12-07 Thread Christos Zoulas
Module Name:src
Committed By:   christos
Date:   Thu Dec  7 16:22:22 UTC 2017

Modified Files:
src/sys/arch/amd64/amd64: netbsd32_machdep.c

Log Message:
Keep fs/gs the same for the signal context; otherwise calling things
like __lwp_getprivate_fast() from a signal handler (that uses %gs) die.

Merge context building code.


To generate a diff of this commit:
cvs rdiff -u -r1.113 -r1.114 src/sys/arch/amd64/amd64/netbsd32_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/netbsd32_machdep.c
diff -u src/sys/arch/amd64/amd64/netbsd32_machdep.c:1.113 src/sys/arch/amd64/amd64/netbsd32_machdep.c:1.114
--- src/sys/arch/amd64/amd64/netbsd32_machdep.c:1.113	Sat Dec  2 10:36:24 2017
+++ src/sys/arch/amd64/amd64/netbsd32_machdep.c	Thu Dec  7 11:22:22 2017
@@ -1,4 +1,4 @@
-/*	$NetBSD: netbsd32_machdep.c,v 1.113 2017/12/02 15:36:24 maxv Exp $	*/
+/*	$NetBSD: netbsd32_machdep.c,v 1.114 2017/12/07 16:22:22 christos Exp $	*/
 
 /*
  * Copyright (c) 2001 Wasabi Systems, Inc.
@@ -36,7 +36,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: netbsd32_machdep.c,v 1.113 2017/12/02 15:36:24 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: netbsd32_machdep.c,v 1.114 2017/12/07 16:22:22 christos Exp $");
 
 #ifdef _KERNEL_OPT
 #include "opt_compat_netbsd.h"
@@ -164,6 +164,43 @@ netbsd32_setregs(struct lwp *l, struct e
 	tf->tf_ss = LSEL(LUDATA32_SEL, SEL_UPL);
 }
 
+static void
+netbsd32_buildcontext(struct lwp *l, struct trapframe *tf, void *fp,
+sig_t catcher, int onstack)
+{
+	/*
+	 * Build context to run handler in.
+	 */
+	tf->tf_ds = GSEL(GUDATA32_SEL, SEL_UPL);
+	tf->tf_es = GSEL(GUDATA32_SEL, SEL_UPL);
+#if 0
+	tf->tf_fs = GSEL(GUDATA32_SEL, SEL_UPL);
+	tf->tf_gs = GSEL(GUDATA32_SEL, SEL_UPL);
+#endif
+
+	/* Ensure FP state is sane. */
+	fpu_save_area_reset(l);
+
+	tf->tf_rip = (uint64_t)catcher;
+	tf->tf_cs = GSEL(GUCODE32_SEL, SEL_UPL);
+	tf->tf_rflags &= ~PSL_CLEARSIG;
+	tf->tf_rsp = (uint64_t)fp;
+	tf->tf_ss = GSEL(GUDATA32_SEL, SEL_UPL);
+
+	/* Remember that we're now on the signal stack. */
+	if (onstack)
+		l->l_sigstk.ss_flags |= SS_ONSTACK;
+	if ((vaddr_t)catcher >= VM_MAXUSER_ADDRESS32) {
+		/*
+		 * process has given an invalid address for the
+		 * handler. Stop it, but do not do it before so
+		 * we can return the right info to userland (or in core dump)
+		 */
+		sigexit(l, SIGILL);
+		/* NOTREACHED */
+	}
+}
+
 #ifdef COMPAT_16
 static void
 netbsd32_sendsig_sigcontext(const ksiginfo_t *ksi, const sigset_t *mask)
@@ -249,35 +286,7 @@ netbsd32_sendsig_sigcontext(const ksigin
 		/* NOTREACHED */
 	}
 
-	/*
-	 * Build context to run handler in.
-	 */
-	tf->tf_ds = GSEL(GUDATA32_SEL, SEL_UPL);
-	tf->tf_es = GSEL(GUDATA32_SEL, SEL_UPL);
-	tf->tf_fs = GSEL(GUDATA32_SEL, SEL_UPL);
-	tf->tf_gs = GSEL(GUDATA32_SEL, SEL_UPL);
-
-	/* Ensure FP state is sane. */
-	fpu_save_area_reset(l);
-
-	tf->tf_rip = (uint64_t)catcher;
-	tf->tf_cs = GSEL(GUCODE32_SEL, SEL_UPL);
-	tf->tf_rflags &= ~PSL_CLEARSIG;
-	tf->tf_rsp = (uint64_t)fp;
-	tf->tf_ss = GSEL(GUDATA32_SEL, SEL_UPL);
-
-	/* Remember that we're now on the signal stack. */
-	if (onstack)
-		l->l_sigstk.ss_flags |= SS_ONSTACK;
-	if ((vaddr_t)catcher >= VM_MAXUSER_ADDRESS32) {
-		/*
-		 * process has given an invalid address for the
-		 * handler. Stop it, but do not do it before so
-		 * we can return the right info to userland (or in core dump)
-		 */
-		sigexit(l, SIGILL);
-		/* NOTREACHED */
-	}
+	netbsd32_buildcontext(l, tf, fp, catcher, onstack);
 }
 #endif
 
@@ -346,35 +355,7 @@ netbsd32_sendsig_siginfo(const ksiginfo_
 		/* NOTREACHED */
 	}
 
-	/*
-	 * Build context to run handler in.
-	 */
-	tf->tf_ds = GSEL(GUDATA32_SEL, SEL_UPL);
-	tf->tf_es = GSEL(GUDATA32_SEL, SEL_UPL);
-	tf->tf_fs = GSEL(GUDATA32_SEL, SEL_UPL);
-	tf->tf_gs = GSEL(GUDATA32_SEL, SEL_UPL);
-
-	tf->tf_rip = (uint64_t)catcher;
-	tf->tf_cs = GSEL(GUCODE32_SEL, SEL_UPL);
-	tf->tf_rflags &= ~PSL_CLEARSIG;
-	tf->tf_rsp = (uint64_t)fp;
-	tf->tf_ss = GSEL(GUDATA32_SEL, SEL_UPL);
-
-	/* Ensure FP state is sane. */
-	fpu_save_area_reset(l);
-
-	/* Remember that we're now on the signal stack. */
-	if (onstack)
-		l->l_sigstk.ss_flags |= SS_ONSTACK;
-	if ((vaddr_t)catcher >= VM_MAXUSER_ADDRESS32) {
-		/*
-		 * process has given an invalid address for the
-		 * handler. Stop it, but do not do it before so
-		 * we can return the right info to userland (or in core dump)
-		 */
-		sigexit(l, SIGILL);
-		/* NOTREACHED */
-	}
+	netbsd32_buildcontext(l, tf, fp, catcher, onstack);
 }
 
 void



CVS commit: src/sys/arch/amd64/amd64

2017-12-06 Thread Taylor R Campbell
Module Name:src
Committed By:   riastradh
Date:   Thu Dec  7 03:25:51 UTC 2017

Modified Files:
src/sys/arch/amd64/amd64: trap.c

Log Message:
Attempt to clarify panic messages for null pointer access/execute.


To generate a diff of this commit:
cvs rdiff -u -r1.105 -r1.106 src/sys/arch/amd64/amd64/trap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/trap.c
diff -u src/sys/arch/amd64/amd64/trap.c:1.105 src/sys/arch/amd64/amd64/trap.c:1.106
--- src/sys/arch/amd64/amd64/trap.c:1.105	Sat Dec  2 12:40:03 2017
+++ src/sys/arch/amd64/amd64/trap.c	Thu Dec  7 03:25:51 2017
@@ -1,4 +1,4 @@
-/*	$NetBSD: trap.c,v 1.105 2017/12/02 12:40:03 maxv Exp $	*/
+/*	$NetBSD: trap.c,v 1.106 2017/12/07 03:25:51 riastradh Exp $	*/
 
 /*
  * Copyright (c) 1998, 2000, 2017 The NetBSD Foundation, Inc.
@@ -64,7 +64,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.105 2017/12/02 12:40:03 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.106 2017/12/07 03:25:51 riastradh Exp $");
 
 #include "opt_ddb.h"
 #include "opt_kgdb.h"
@@ -518,16 +518,26 @@ trap(struct trapframe *frame)
 
 		if (frame->tf_err & PGEX_X) {
 			/* SMEP might have brought us here */
-			if (cr2 < VM_MAXUSER_ADDRESS)
-panic("prevented execution of %p (SMEP)",
-(void *)cr2);
+			if (cr2 < VM_MAXUSER_ADDRESS) {
+if (cr2 == 0)
+	panic("prevented jump to null"
+	" instruction pointer (SMEP)");
+else
+	panic("prevented execution of"
+	" user address %p (SMEP)",
+	(void *)cr2);
+			}
 		}
 
 		if (cr2 < VM_MAXUSER_ADDRESS) {
 			/* SMAP might have brought us here */
-			if (onfault_handler(pcb, frame) == NULL)
-panic("prevented access to %p (SMAP)",
+			if (onfault_handler(pcb, frame) == NULL) {
+panic("prevented %s %p (SMAP)",
+(cr2 < PAGE_SIZE
+	? "null pointer dereference at"
+	: "access to"),
 (void *)cr2);
+			}
 		}
 
 		goto faultcommon;



CVS commit: src/sys/arch/amd64/amd64

2017-12-02 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sat Dec  2 15:36:24 UTC 2017

Modified Files:
src/sys/arch/amd64/amd64: netbsd32_machdep.c

Log Message:
Remove a piece of COMPAT_13, that I mistakenly didn't commit three
hours ago (in my change to drop COMPAT_13 on amd64).


To generate a diff of this commit:
cvs rdiff -u -r1.112 -r1.113 src/sys/arch/amd64/amd64/netbsd32_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/netbsd32_machdep.c
diff -u src/sys/arch/amd64/amd64/netbsd32_machdep.c:1.112 src/sys/arch/amd64/amd64/netbsd32_machdep.c:1.113
--- src/sys/arch/amd64/amd64/netbsd32_machdep.c:1.112	Thu Oct 19 10:01:09 2017
+++ src/sys/arch/amd64/amd64/netbsd32_machdep.c	Sat Dec  2 15:36:24 2017
@@ -1,4 +1,4 @@
-/*	$NetBSD: netbsd32_machdep.c,v 1.112 2017/10/19 10:01:09 maxv Exp $	*/
+/*	$NetBSD: netbsd32_machdep.c,v 1.113 2017/12/02 15:36:24 maxv Exp $	*/
 
 /*
  * Copyright (c) 2001 Wasabi Systems, Inc.
@@ -36,7 +36,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: netbsd32_machdep.c,v 1.112 2017/10/19 10:01:09 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: netbsd32_machdep.c,v 1.113 2017/12/02 15:36:24 maxv Exp $");
 
 #ifdef _KERNEL_OPT
 #include "opt_compat_netbsd.h"
@@ -1133,67 +1133,3 @@ netbsd32_vm_default_addr(struct proc *p,
 	else
 		return VM_DEFAULT_ADDRESS32_BOTTOMUP(base, sz);
 }
-
-#ifdef COMPAT_13
-int
-compat_13_netbsd32_sigreturn(struct lwp *l, const struct compat_13_netbsd32_sigreturn_args *uap, register_t *retval)
-{
-	/* {
-		syscallarg(struct netbsd32_sigcontext13 *) sigcntxp;
-	} */
-	struct proc *p = l->l_proc;
-	struct netbsd32_sigcontext13 *scp, context;
-	struct trapframe *tf;
-	sigset_t mask;
-	int error;
-
-	/*
-	 * The trampoline code hands us the context.
-	 * It is unsafe to keep track of it ourselves, in the event that a
-	 * program jumps out of a signal handler.
-	 */
-	scp = (struct netbsd32_sigcontext13 *)NETBSD32PTR64(SCARG(uap, sigcntxp));
-	if (copyin((void *)scp, , sizeof(*scp)) != 0)
-		return (EFAULT);
-
-	/* Restore register context. */
-	tf = l->l_md.md_regs;
-
-	/*
-	 * Check for security violations.
-	 */
-	error = check_sigcontext32(l, (const struct netbsd32_sigcontext *));
-	if (error != 0)
-		return error;
-
-	tf->tf_gs = context.sc_gs & 0x;
-	tf->tf_fs = context.sc_fs & 0x;		
-	tf->tf_es = context.sc_es & 0x;
-	tf->tf_ds = context.sc_ds & 0x;
-	tf->tf_rflags = context.sc_eflags;
-	tf->tf_rdi = context.sc_edi;
-	tf->tf_rsi = context.sc_esi;
-	tf->tf_rbp = context.sc_ebp;
-	tf->tf_rbx = context.sc_ebx;
-	tf->tf_rdx = context.sc_edx;
-	tf->tf_rcx = context.sc_ecx;
-	tf->tf_rax = context.sc_eax;
-	tf->tf_rip = context.sc_eip;
-	tf->tf_cs = context.sc_cs & 0x;
-	tf->tf_rsp = context.sc_esp;
-	tf->tf_ss = context.sc_ss & 0x;
-
-	mutex_enter(p->p_lock);
-	/* Restore signal stack. */
-	if (context.sc_onstack & SS_ONSTACK)
-		l->l_sigstk.ss_flags |= SS_ONSTACK;
-	else
-		l->l_sigstk.ss_flags &= ~SS_ONSTACK;
-	/* Restore signal mask. */
-	native_sigset13_to_sigset((sigset13_t *)_mask, );
-	(void) sigprocmask1(l, SIG_SETMASK, , 0);
-	mutex_exit(p->p_lock);
-
-	return (EJUSTRETURN);
-}
-#endif



CVS commit: src/sys/arch/amd64/amd64

2017-12-01 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Fri Dec  1 21:22:45 UTC 2017

Modified Files:
src/sys/arch/amd64/amd64: machdep.c process_machdep.c

Log Message:
Don't even bother with the trap frame, and force the default values.


To generate a diff of this commit:
cvs rdiff -u -r1.278 -r1.279 src/sys/arch/amd64/amd64/machdep.c
cvs rdiff -u -r1.37 -r1.38 src/sys/arch/amd64/amd64/process_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/machdep.c
diff -u src/sys/arch/amd64/amd64/machdep.c:1.278 src/sys/arch/amd64/amd64/machdep.c:1.279
--- src/sys/arch/amd64/amd64/machdep.c:1.278	Mon Nov 27 09:18:01 2017
+++ src/sys/arch/amd64/amd64/machdep.c	Fri Dec  1 21:22:45 2017
@@ -1,4 +1,4 @@
-/*	$NetBSD: machdep.c,v 1.278 2017/11/27 09:18:01 maxv Exp $	*/
+/*	$NetBSD: machdep.c,v 1.279 2017/12/01 21:22:45 maxv Exp $	*/
 
 /*
  * Copyright (c) 1996, 1997, 1998, 2000, 2006, 2007, 2008, 2011
@@ -110,7 +110,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.278 2017/11/27 09:18:01 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.279 2017/12/01 21:22:45 maxv Exp $");
 
 /* #define XENDEBUG_LOW  */
 
@@ -1892,17 +1892,17 @@ cpu_getmcontext(struct lwp *l, mcontext_
 	mcp->__gregs[_REG_RBP] = tf->tf_rbp;
 	mcp->__gregs[_REG_RBX] = tf->tf_rbx;
 	mcp->__gregs[_REG_RAX] = tf->tf_rax;
-	mcp->__gregs[_REG_GS]  = tf->tf_gs & 0x;
-	mcp->__gregs[_REG_FS]  = tf->tf_fs & 0x;
-	mcp->__gregs[_REG_ES]  = tf->tf_es & 0x;
-	mcp->__gregs[_REG_DS]  = tf->tf_ds & 0x;
+	mcp->__gregs[_REG_GS]  = 0;
+	mcp->__gregs[_REG_FS]  = 0;
+	mcp->__gregs[_REG_ES]  = GSEL(GUDATA_SEL, SEL_UPL);
+	mcp->__gregs[_REG_DS]  = GSEL(GUDATA_SEL, SEL_UPL);
 	mcp->__gregs[_REG_TRAPNO] = tf->tf_trapno;
 	mcp->__gregs[_REG_ERR] = tf->tf_err;
 	mcp->__gregs[_REG_RIP] = tf->tf_rip;
-	mcp->__gregs[_REG_CS]  = tf->tf_cs & 0x;
+	mcp->__gregs[_REG_CS]  = LSEL(LUCODE_SEL, SEL_UPL);
 	mcp->__gregs[_REG_RFLAGS] = tf->tf_rflags;
 	mcp->__gregs[_REG_RSP] = tf->tf_rsp;
-	mcp->__gregs[_REG_SS]  = tf->tf_ss & 0x;
+	mcp->__gregs[_REG_SS]  = LSEL(LUDATA_SEL, SEL_UPL);
 
 	if ((ras_rip = (__greg_t)ras_lookup(l->l_proc,
 	(void *) mcp->__gregs[_REG_RIP])) != -1)
@@ -1949,18 +1949,18 @@ cpu_setmcontext(struct lwp *l, const mco
 		tf->tf_rbp  = gr[_REG_RBP];
 		tf->tf_rbx  = gr[_REG_RBX];
 		tf->tf_rax  = gr[_REG_RAX];
-		tf->tf_gs   = gr[_REG_GS] & 0x;
-		tf->tf_fs   = gr[_REG_FS] & 0x;
-		tf->tf_es   = gr[_REG_ES] & 0x;
-		tf->tf_ds   = gr[_REG_DS] & 0x;
+		tf->tf_gs   = 0;
+		tf->tf_fs   = 0;
+		tf->tf_es   = GSEL(GUDATA_SEL, SEL_UPL);
+		tf->tf_ds   = GSEL(GUDATA_SEL, SEL_UPL);
 		/* trapno, err not touched */
 		tf->tf_rip  = gr[_REG_RIP];
-		tf->tf_cs   = gr[_REG_CS] & 0x;
+		tf->tf_cs   = LSEL(LUCODE_SEL, SEL_UPL);
 		rflags = tf->tf_rflags;
 		rflags &= ~PSL_USER;
 		tf->tf_rflags = rflags | (gr[_REG_RFLAGS] & PSL_USER);
 		tf->tf_rsp  = gr[_REG_RSP];
-		tf->tf_ss   = gr[_REG_SS] & 0x;
+		tf->tf_ss   = LSEL(LUDATA_SEL, SEL_UPL);
 
 #ifdef XEN
 		/*

Index: src/sys/arch/amd64/amd64/process_machdep.c
diff -u src/sys/arch/amd64/amd64/process_machdep.c:1.37 src/sys/arch/amd64/amd64/process_machdep.c:1.38
--- src/sys/arch/amd64/amd64/process_machdep.c:1.37	Mon Nov 27 09:18:01 2017
+++ src/sys/arch/amd64/amd64/process_machdep.c	Fri Dec  1 21:22:45 2017
@@ -1,4 +1,4 @@
-/*	$NetBSD: process_machdep.c,v 1.37 2017/11/27 09:18:01 maxv Exp $	*/
+/*	$NetBSD: process_machdep.c,v 1.38 2017/12/01 21:22:45 maxv Exp $	*/
 
 /*
  * Copyright (c) 1998, 2000 The NetBSD Foundation, Inc.
@@ -74,7 +74,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: process_machdep.c,v 1.37 2017/11/27 09:18:01 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: process_machdep.c,v 1.38 2017/12/01 21:22:45 maxv Exp $");
 
 #include "opt_xen.h"
 #include 
@@ -125,17 +125,17 @@ process_read_regs(struct lwp *l, struct 
 	regs->regs[_REG_RBP] = tf->tf_rbp;
 	regs->regs[_REG_RBX] = tf->tf_rbx;
 	regs->regs[_REG_RAX] = tf->tf_rax;
-	regs->regs[_REG_GS]  = tf->tf_gs & 0x;
-	regs->regs[_REG_FS]  = tf->tf_fs & 0x;
-	regs->regs[_REG_ES]  = tf->tf_es & 0x;
-	regs->regs[_REG_DS]  = tf->tf_ds & 0x;
+	regs->regs[_REG_GS]  = 0;
+	regs->regs[_REG_FS]  = 0;
+	regs->regs[_REG_ES]  = GSEL(GUDATA_SEL, SEL_UPL);
+	regs->regs[_REG_DS]  = GSEL(GUDATA_SEL, SEL_UPL);
 	regs->regs[_REG_TRAPNO] = tf->tf_trapno;
 	regs->regs[_REG_ERR] = tf->tf_err;
 	regs->regs[_REG_RIP] = tf->tf_rip;
-	regs->regs[_REG_CS]  = tf->tf_cs & 0x;
+	regs->regs[_REG_CS]  = LSEL(LUCODE_SEL, SEL_UPL);
 	regs->regs[_REG_RFLAGS] = tf->tf_rflags;
 	regs->regs[_REG_RSP] = tf->tf_rsp;
-	regs->regs[_REG_SS]  = tf->tf_ss & 0x;
+	regs->regs[_REG_SS]  = LSEL(LUDATA_SEL, SEL_UPL);
 
 	return 0;
 }
@@ -204,16 +204,16 @@ process_write_regs(struct lwp *l, const 
 	tf->tf_rbp  = regs[_REG_RBP];
 	tf->tf_rbx  = regs[_REG_RBX];
 	tf->tf_rax  = regs[_REG_RAX];
-	

CVS commit: src/sys/arch/amd64/amd64

2017-11-28 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Tue Nov 28 08:43:49 UTC 2017

Modified Files:
src/sys/arch/amd64/amd64: spl.S

Log Message:
style


To generate a diff of this commit:
cvs rdiff -u -r1.30 -r1.31 src/sys/arch/amd64/amd64/spl.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/amd64/amd64/spl.S
diff -u src/sys/arch/amd64/amd64/spl.S:1.30 src/sys/arch/amd64/amd64/spl.S:1.31
--- src/sys/arch/amd64/amd64/spl.S:1.30	Sun Nov 22 13:41:24 2015
+++ src/sys/arch/amd64/amd64/spl.S	Tue Nov 28 08:43:49 2017
@@ -1,4 +1,4 @@
-/*	$NetBSD: spl.S,v 1.30 2015/11/22 13:41:24 maxv Exp $	*/
+/*	$NetBSD: spl.S,v 1.31 2017/11/28 08:43:49 maxv Exp $	*/
 
 /*
  * Copyright (c) 2003 Wasabi Systems, Inc.
@@ -90,28 +90,39 @@
  *	%r13		address to return to
  */
 IDTVEC(softintr)
-	pushq	$_C_LABEL(softintr_ret)	/* set up struct switchframe */
+	/* set up struct switchframe */
+	pushq	$_C_LABEL(softintr_ret)
 	pushq	%rbx
 	pushq	%r12
 	pushq	%r13
 	pushq	%r14
 	pushq	%r15
+
 	movl	$IPL_HIGH,CPUVAR(ILEVEL)
 	movq	CPUVAR(CURLWP),%r15
 	movq	IS_LWP(%rax),%rdi	/* switch to handler LWP */
 	movq	L_PCB(%rdi),%rdx
 	movq	L_PCB(%r15),%rcx
 	movq	%rdi,CPUVAR(CURLWP)
+
+	/* save old context */
 	movq	%rsp,PCB_RSP(%rcx)
 	movq	%rbp,PCB_RBP(%rcx)
-	movq	PCB_RSP0(%rdx),%rsp	/* onto new stack */
+
+	/* switch to the new stack */
+	movq	PCB_RSP0(%rdx),%rsp
+
+	/* dispatch */
 	sti
 	movq	%r15,%rdi		/* interrupted LWP */
 	movl	IS_MAXLEVEL(%rax),%esi	/* ipl to run at */
 	call	_C_LABEL(softint_dispatch)/* run handlers */
 	cli
+
+	/* restore old context */
 	movq	L_PCB(%r15),%rcx
 	movq	PCB_RSP(%rcx),%rsp
+
 	xchgq	%r15,CPUVAR(CURLWP)	/* must be globally visible */
 	popq	%r15			/* unwind switchframe */
 	addq	$(5 * 8),%rsp
@@ -128,7 +139,7 @@ END(Xsoftintr)
  */
 NENTRY(softintr_ret)
 	incl	CPUVAR(MTX_COUNT)	/* re-adjust after mi_switch */
-	movl	$0, L_CTXSWTCH(%rax)	/* %rax from cpu_switchto */
+	movl	$0,L_CTXSWTCH(%rax)	/* %rax from cpu_switchto */
 	cli
 	jmp	*%r13			/* back to Xspllower/Xdoreti */
 END(softintr_ret)
@@ -150,9 +161,9 @@ END(softint_trigger)
  * Handles preemption interrupts via Xspllower().
  */
 IDTVEC(preemptrecurse)
-	movl	$IPL_PREEMPT, CPUVAR(ILEVEL)
+	movl	$IPL_PREEMPT,CPUVAR(ILEVEL)
 	sti
-	xorq	%rdi, %rdi
+	xorq	%rdi,%rdi
 	call	_C_LABEL(kpreempt)
 	cli
 	jmp	*%r13			/* back to Xspllower */
@@ -164,16 +175,16 @@ END(Xpreemptrecurse)
  * Handles preemption interrupts via Xdoreti().
  */
 IDTVEC(preemptresume)
-	movl	$IPL_PREEMPT, CPUVAR(ILEVEL)
+	movl	$IPL_PREEMPT,CPUVAR(ILEVEL)
 	sti
-	testq	$SEL_RPL, TF_CS(%rsp)
+	testq	$SEL_RPL,TF_CS(%rsp)
 	jnz	1f
-	movq	TF_RIP(%rsp), %rdi
-	call	_C_LABEL(kpreempt)		# from kernel
+	movq	TF_RIP(%rsp),%rdi
+	call	_C_LABEL(kpreempt)	/* from kernel */
 	cli
 	jmp	*%r13			/* back to Xdoreti */
 1:
-	call	_C_LABEL(preempt)		# from user
+	call	_C_LABEL(preempt)	/* from user */
 	cli
 	jmp	*%r13			/* back to Xdoreti */
 END(Xpreemptresume)
@@ -197,14 +208,14 @@ END(splraise)
  * are disabled via eflags/IE.
  */
 ENTRY(spllower)
-	cmpl	CPUVAR(ILEVEL), %edi
+	cmpl	CPUVAR(ILEVEL),%edi
 	jae	1f
-	movl	CPUVAR(IUNMASK)(,%rdi,4), %edx
+	movl	CPUVAR(IUNMASK)(,%rdi,4),%edx
 	pushf
 	cli
-	testl	CPUVAR(IPENDING), %edx
+	testl	CPUVAR(IPENDING),%edx
 	jnz	2f
-	movl	%edi, CPUVAR(ILEVEL)
+	movl	%edi,CPUVAR(ILEVEL)
 	popf
 1:
 	ret
@@ -224,7 +235,7 @@ LABEL(spllower_end)
  *
  * For cmpxchg8b, edx/ecx are the high words and eax/ebx the low.
  *
- * edx : eax = old level / old ipending 
+ * edx : eax = old level / old ipending
  * ecx : ebx = new level / old ipending
  */
 ENTRY(cx8_spllower)
@@ -260,7 +271,7 @@ LABEL(cx8_spllower_end)
 
 /*
  * void Xspllower(int s);
- * 
+ *
  * Process pending interrupts.
  *
  * Important registers:
@@ -283,11 +294,11 @@ IDTVEC(spllower)
 	pushq	%r13
 	pushq	%r12
 	movl	%edi,%ebx
-	leaq	1f(%rip),%r13		# address to resume loop at
-1:	movl	%ebx,%eax		# get cpl
+	leaq	1f(%rip),%r13		/* address to resume loop at */
+1:	movl	%ebx,%eax		/* get cpl */
 	movl	CPUVAR(IUNMASK)(,%rax,4),%eax
 	CLI(si)
-	andl	CPUVAR(IPENDING),%eax		# any non-masked bits left?
+	andl	CPUVAR(IPENDING),%eax	/* any non-masked bits left? */
 	jz	2f
 	bsrl	%eax,%eax
 	btrl	%eax,CPUVAR(IPENDING)
@@ -304,7 +315,7 @@ END(Xspllower)
 
 /*
  * void Xdoreti(void);
- * 
+ *
  * Handle return from interrupt after device handler finishes.
  *
  * Important registers:
@@ -312,7 +323,7 @@ END(Xspllower)
  *   r13 - address to resume loop at
  */
 IDTVEC(doreti)
-	popq	%rbx			# get previous priority
+	popq	%rbx			/* get previous priority */
 	decl	CPUVAR(IDEPTH)
 	leaq	1f(%rip),%r13
 1:	movl	%ebx,%eax
@@ -320,9 +331,9 @@ IDTVEC(doreti)
 	CLI(si)
 	andl	CPUVAR(IPENDING),%eax
 	jz	2f
-	bsrl	%eax,%eax		# slow, but not worth optimizing
+	bsrl	%eax,%eax		/* slow, but not worth optimizing */
 	btrl	%eax,CPUVAR(IPENDING)
-	movq	CPUVAR(ISOURCES)(,%rax, 8),%rax
+	movq	CPUVAR(ISOURCES)(,%rax,8),%rax
 	

  1   2   3   4   >