CVS commit: src/sys/arch/riscv/include
Module Name:src
Committed By: skrll
Date: Tue May 18 06:42:12 UTC 2021
Modified Files:
src/sys/arch/riscv/include: db_machdep.h
Log Message:
Use #define in this file
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/riscv/include/db_machdep.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/riscv/include/db_machdep.h
diff -u src/sys/arch/riscv/include/db_machdep.h:1.4 src/sys/arch/riscv/include/db_machdep.h:1.5
--- src/sys/arch/riscv/include/db_machdep.h:1.4 Tue May 18 06:40:16 2021
+++ src/sys/arch/riscv/include/db_machdep.h Tue May 18 06:42:11 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: db_machdep.h,v 1.4 2021/05/18 06:40:16 skrll Exp $ */
+/* $NetBSD: db_machdep.h,v 1.5 2021/05/18 06:42:11 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -47,19 +47,19 @@ extern const uint32_t __cpu_Debugger_ins
#define PC_REGS(tf) ((tf)->tf_pc)
-#define PC_ADVANCE(tf) do { \
+#define PC_ADVANCE(tf) do { \
if (db_get_value((tf)->tf_pc, sizeof(uint32_t), false) == BKPT_INST) \
(tf)->tf_pc += BKPT_SIZE; \
} while(0)
/* Similar to PC_ADVANCE(), except only advance on cpu_Debugger()'s bpt */
-#define PC_BREAK_ADVANCE(tf) do {\
+#define PC_BREAK_ADVANCE(tf) do {\
if ((tf)->tf_pc == (register_t) __cpu_Debugger_insn) \
(tf)->tf_pc += BKPT_SIZE; \
} while(0)
#define BKPT_ADDR(addr) (addr) /* breakpoint address */
-#define BKPT_INST 0x00100073
+#define BKPT_INST 0x00100073
#define BKPT_SIZE (sizeof(uint32_t)) /* size of bkpt inst */
#define BKPT_SET(inst, addr) (BKPT_INST)
@@ -70,12 +70,12 @@ extern const uint32_t __cpu_Debugger_ins
* MI ddb can't cope with having two sizes :-(
*/
#if 0
-#define BKPT_INST_2 0x9002
-#define BKPT_SIZE_2 (sizeof(uint16_t))
+#define BKPT_INST_2 0x9002
+#define BKPT_SIZE_2 (sizeof(uint16_t))
#endif
#define IS_BREAKPOINT_TRAP(type, code) ((type) == CAUSE_BREAKPOINT)
-#define IS_WATCHPOINT_TRAP(type, code) (0)
+#define IS_WATCHPOINT_TRAP(type, code) (0)
/*
* Interface to disassembly
@@ -106,9 +106,9 @@ typedef register_t kgdb_reg_t;
/*
* RISCV cpus have no hardware single-step.
*/
-#define SOFTWARE_SSTEP
+#define SOFTWARE_SSTEP
-#define inst_trap_return(ins) ((ins)&0)
+#define inst_trap_return(ins) ((ins)&0)
bool inst_branch(uint32_t inst);
bool inst_call(uint32_t inst);
@@ -127,7 +127,7 @@ void db_resume_others(void);
/*
* We have machine-dependent commands.
*/
-#define DB_MACHINE_COMMANDS
+#define DB_MACHINE_COMMANDS
#endif
#endif /* _RISCV_DB_MACHDEP_H_ */
CVS commit: src/sys/arch/riscv/include
Module Name:src Committed By: skrll Date: Tue May 18 06:40:16 UTC 2021 Modified Files: src/sys/arch/riscv/include: db_machdep.h Log Message: Remove argument names from function declaration prototypes. Misc tidyup. To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/riscv/include/db_machdep.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/riscv/include/db_machdep.h diff -u src/sys/arch/riscv/include/db_machdep.h:1.3 src/sys/arch/riscv/include/db_machdep.h:1.4 --- src/sys/arch/riscv/include/db_machdep.h:1.3 Wed Apr 14 06:32:20 2021 +++ src/sys/arch/riscv/include/db_machdep.h Tue May 18 06:40:16 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: db_machdep.h,v 1.3 2021/04/14 06:32:20 dholland Exp $ */ +/* $NetBSD: db_machdep.h,v 1.4 2021/05/18 06:40:16 skrll Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -28,6 +28,7 @@ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ + #ifndef _RISCV_DB_MACHDEP_H_ #define _RISCV_DB_MACHDEP_H_ @@ -57,9 +58,9 @@ extern const uint32_t __cpu_Debugger_ins (tf)->tf_pc += BKPT_SIZE; \ } while(0) -#define BKPT_ADDR(addr) (addr) /* breakpoint address */ -#define BKPT_INST 0x00100073 -#define BKPT_SIZE (sizeof(uint32_t)) /* size of breakpoint inst */ +#define BKPT_ADDR(addr) (addr) /* breakpoint address */ +#define BKPT_INST 0x00100073 +#define BKPT_SIZE (sizeof(uint32_t)) /* size of bkpt inst */ #define BKPT_SET(inst, addr) (BKPT_INST) /* @@ -79,14 +80,14 @@ extern const uint32_t __cpu_Debugger_ins /* * Interface to disassembly */ -db_addr_t db_disasm_insn(uint32_t insn, db_addr_t loc, bool altfmt); +db_addr_t db_disasm_insn(uint32_t, db_addr_t, bool); /* * Entrypoints to DDB for kernel, keyboard drivers, init hook */ void kdb_kbd_trap(db_regs_t *); -int kdb_trap(int type, struct trapframe *); +int kdb_trap(int, struct trapframe *); static inline void db_set_ddb_regs(int type, struct trapframe *tf)
CVS commit: src/sys/arch/riscv/include
Module Name:src
Committed By: jmcneill
Date: Wed May 5 12:47:02 UTC 2021
Added Files:
src/sys/arch/riscv/include: loadfile_machdep.h
Log Message:
Add loadfile_machdep.h for riscv
To generate a diff of this commit:
cvs rdiff -u -r0 -r1.1 src/sys/arch/riscv/include/loadfile_machdep.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Added files:
Index: src/sys/arch/riscv/include/loadfile_machdep.h
diff -u /dev/null src/sys/arch/riscv/include/loadfile_machdep.h:1.1
--- /dev/null Wed May 5 12:47:02 2021
+++ src/sys/arch/riscv/include/loadfile_machdep.h Wed May 5 12:47:02 2021
@@ -0,0 +1,33 @@
+/* $NetBSD: loadfile_machdep.h,v 1.1 2021/05/05 12:47:02 jmcneill Exp $ */
+
+#ifdef _LP64
+#define BOOT_ELF64
+#else
+#define BOOT_ELF32
+#endif
+
+#define LOAD_KERNEL (LOAD_ALL & ~LOAD_TEXTA)
+#define COUNT_KERNEL (COUNT_ALL & ~COUNT_TEXTA)
+
+#define LOADADDR(a) (((u_long)(a)))
+#define ALIGNENTRY(a) ((u_long)(a))
+#define READ(f, b, c) read((f), (void*)LOADADDR(b), (c))
+#define BCOPY(s, d, c) memmove((void*)LOADADDR(d), (void*)(s), (c))
+#define BZERO(d, c) memset((void*)LOADADDR(d), 0, (c))
+#define WARN(a) do { \
+ (void)printf a; \
+ if (errno) \
+ (void)printf(": %s\n", \
+ strerror(errno)); \
+ else \
+ (void)printf("\n"); \
+} while(/* CONSTCOND */0)
+#ifdef PROGRESS_FN
+void PROGRESS_FN(const char *, ...) __printflike(1, 2);
+#define PROGRESS(a) PROGRESS_FN a
+#else
+#define PROGRESS(a) (void)printf a
+#endif
+#define ALLOC(a) alloc(a)
+#define DEALLOC(a, b) dealloc(a, b)
+#define OKMAGIC(a) ((a) == ZMAGIC)
CVS commit: src/sys/arch/riscv/include
Module Name:src Committed By: skrll Date: Mon May 3 20:07:57 UTC 2021 Modified Files: src/sys/arch/riscv/include: types.h Log Message: Sort __HAVE_ #defines. NFCI. To generate a diff of this commit: cvs rdiff -u -r1.11 -r1.12 src/sys/arch/riscv/include/types.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/riscv/include/types.h diff -u src/sys/arch/riscv/include/types.h:1.11 src/sys/arch/riscv/include/types.h:1.12 --- src/sys/arch/riscv/include/types.h:1.11 Sat May 1 06:45:23 2021 +++ src/sys/arch/riscv/include/types.h Mon May 3 20:07:57 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: types.h,v 1.11 2021/05/01 06:45:23 skrll Exp $ */ +/* $NetBSD: types.h,v 1.12 2021/05/03 20:07:57 skrll Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -83,23 +83,25 @@ typedef __int32_t __register_t; #define __SIMPLELOCK_LOCKED 1 #define __SIMPLELOCK_UNLOCKED 0 +#define __HAVE_COMMON___TLS_GET_ADDR +#define __HAVE_COMPAT_NETBSD32 +#define __HAVE_CPU_COUNTER +#define __HAVE_CPU_DATA_FIRST #define __HAVE_FAST_SOFTINTS #define __HAVE_MM_MD_DIRECT_MAPPED_PHYS -#define __HAVE_CPU_COUNTER +//#define __HAVE_NEW_STYLE_BUS_H +#define __HAVE_NO_BUS_DMA #define __HAVE_SYSCALL_INTERN -#define __HAVE_CPU_DATA_FIRST -#define __HAVE___LWP_GETPRIVATE_FAST -#define __HAVE_COMMON___TLS_GET_ADDR #define __HAVE_TLS_VARIANT_I +/* XXX temporary */ +#define __HAVE_UNLOCKED_PMAP +#define __HAVE___LWP_GETPRIVATE_FAST + #ifdef __LP64 #define __HAVE_ATOMIC64_OPS #define __HAVE_CPU_UAREA_ROUTINES #endif -//#define __HAVE_NEW_STYLE_BUS_H -#define __HAVE_NO_BUS_DMA -#define __HAVE_COMPAT_NETBSD32 - //#if defined(_KERNEL) //#define __HAVE_RAS //#endif @@ -109,7 +111,4 @@ typedef __int32_t __register_t; #define PCU_UNIT_COUNT 1 #endif -/* XXX temporary */ -#define __HAVE_UNLOCKED_PMAP - #endif /* _RISCV_TYPES_H_ */
CVS commit: src/sys/arch/riscv/include
Module Name:src
Committed By: skrll
Date: Sat May 1 07:09:55 UTC 2021
Modified Files:
src/sys/arch/riscv/include: sysreg.h
Log Message:
Provide riscvreg_satp_{read,write}
To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/riscv/include/sysreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/riscv/include/sysreg.h
diff -u src/sys/arch/riscv/include/sysreg.h:1.12 src/sys/arch/riscv/include/sysreg.h:1.13
--- src/sys/arch/riscv/include/sysreg.h:1.12 Sat May 1 07:09:04 2021
+++ src/sys/arch/riscv/include/sysreg.h Sat May 1 07:09:55 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: sysreg.h,v 1.12 2021/05/01 07:09:04 skrll Exp $ */
+/* $NetBSD: sysreg.h,v 1.13 2021/05/01 07:09:55 skrll Exp $ */
/*
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -36,6 +36,8 @@
#include
#endif
+#include
+
#define FCSR_FMASK 0 // no exception bits
#define FCSR_FRM __BITS(7,5)
#define FCSR_FRM_RNE 0b000 // Round Nearest, ties to Even
@@ -262,6 +264,20 @@ riscvreg_cycle_read(void)
#define SATP_PPN __BITS(21,0)
#endif
+static inline uintptr_t
+riscvreg_satp_read(void)
+{
+ uintptr_t satp;
+ __asm __volatile("csrr %0, satp" : "=r" (satp));
+ return satp;
+}
+
+static inline void
+riscvreg_satp_write(uintptr_t satp)
+{
+ __asm __volatile("csrw satp, %0" :: "r" (satp));
+}
+
static inline uint32_t
riscvreg_asid_read(void)
{
CVS commit: src/sys/arch/riscv/include
Module Name:src Committed By: skrll Date: Sat May 1 07:09:04 UTC 2021 Modified Files: src/sys/arch/riscv/include: sysreg.h Log Message: Indent the FCSR_FRM value #defines To generate a diff of this commit: cvs rdiff -u -r1.11 -r1.12 src/sys/arch/riscv/include/sysreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/riscv/include/sysreg.h diff -u src/sys/arch/riscv/include/sysreg.h:1.11 src/sys/arch/riscv/include/sysreg.h:1.12 --- src/sys/arch/riscv/include/sysreg.h:1.11 Wed Dec 16 19:49:04 2020 +++ src/sys/arch/riscv/include/sysreg.h Sat May 1 07:09:04 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: sysreg.h,v 1.11 2020/12/16 19:49:04 christos Exp $ */ +/* $NetBSD: sysreg.h,v 1.12 2021/05/01 07:09:04 skrll Exp $ */ /* * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -38,12 +38,12 @@ #define FCSR_FMASK 0 // no exception bits #define FCSR_FRM __BITS(7,5) -#define FCSR_FRM_RNE 0b000 // Round Nearest, ties to Even -#define FCSR_FRM_RTZ 0b001 // Round Towards Zero -#define FCSR_FRM_RDN 0b010 // Round DowN (-infinity) -#define FCSR_FRM_RUP 0b011 // Round UP (+infinity) -#define FCSR_FRM_RMM 0b100 // Round to nearest, ties to Max Magnitude -#define FCSR_FRM_DYN 0b111 // Dynamic rounding +#define FCSR_FRM_RNE 0b000 // Round Nearest, ties to Even +#define FCSR_FRM_RTZ 0b001 // Round Towards Zero +#define FCSR_FRM_RDN 0b010 // Round DowN (-infinity) +#define FCSR_FRM_RUP 0b011 // Round UP (+infinity) +#define FCSR_FRM_RMM 0b100 // Round to nearest, ties to Max Magnitude +#define FCSR_FRM_DYN 0b111 // Dynamic rounding #define FCSR_FFLAGS __BITS(4,0) // Sticky bits #define FCSR_NV __BIT(4) // iNValid operation #define FCSR_DZ __BIT(3) // Divide by Zero
CVS commit: src/sys/arch/riscv/include
Module Name:src Committed By: skrll Date: Sat May 1 07:06:54 UTC 2021 Modified Files: src/sys/arch/riscv/include: param.h Log Message: Bump MSGBUFSIZE (if not defined) Provide COHERENCY_UNIT and CACHE_LINE_SIZE Also provide MAXCPUS To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/riscv/include/param.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/riscv/include/param.h diff -u src/sys/arch/riscv/include/param.h:1.3 src/sys/arch/riscv/include/param.h:1.4 --- src/sys/arch/riscv/include/param.h:1.3 Sat Jun 1 12:42:28 2019 +++ src/sys/arch/riscv/include/param.h Sat May 1 07:06:54 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: param.h,v 1.3 2019/06/01 12:42:28 maxv Exp $ */ +/* $NetBSD: param.h,v 1.4 2021/05/01 07:06:54 skrll Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -88,6 +88,15 @@ #define MCLBYTES (1 << MCLSHIFT) /* size of a m_buf cluster */ +#ifndef MSGBUFSIZE +#define MSGBUFSIZE 65536 /* default message buffer size */ +#endif + +#define COHERENCY_UNIT 64 +#define CACHE_LINE_SIZE 64 + +#define MAXCPUS 32 + #ifdef _KERNEL void delay(unsigned long); #define DELAY(x) delay(x)
CVS commit: src/sys/arch/riscv/include
Module Name:src Committed By: skrll Date: Sat May 1 07:05:07 UTC 2021 Modified Files: src/sys/arch/riscv/include: asm.h Log Message: Provide __CONCAT, __STRING and ___CONCAT To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/riscv/include/asm.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/riscv/include/asm.h diff -u src/sys/arch/riscv/include/asm.h:1.5 src/sys/arch/riscv/include/asm.h:1.6 --- src/sys/arch/riscv/include/asm.h:1.5 Fri Apr 17 14:19:44 2020 +++ src/sys/arch/riscv/include/asm.h Sat May 1 07:05:07 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: asm.h,v 1.5 2020/04/17 14:19:44 joerg Exp $ */ +/* $NetBSD: asm.h,v 1.6 2021/05/01 07:05:07 skrll Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -34,6 +34,11 @@ #define _C_LABEL(x) x +#define __CONCAT(x,y) x ## y +#define __STRING(x) #x + +#define ___CONCAT(x,y) __CONCAT(x,y) + /* * Define -pg profile entry code. * Must always be noreorder, must never use a macro instruction
CVS commit: src/sys/arch/riscv/include
Module Name:src Committed By: skrll Date: Sat May 1 06:45:23 UTC 2021 Modified Files: src/sys/arch/riscv/include: types.h Log Message: Make paddr_t/psize_t __uint64_t for both 32 and 64 bit ports To generate a diff of this commit: cvs rdiff -u -r1.10 -r1.11 src/sys/arch/riscv/include/types.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/riscv/include/types.h diff -u src/sys/arch/riscv/include/types.h:1.10 src/sys/arch/riscv/include/types.h:1.11 --- src/sys/arch/riscv/include/types.h:1.10 Thu Apr 1 04:35:47 2021 +++ src/sys/arch/riscv/include/types.h Sat May 1 06:45:23 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: types.h,v 1.10 2021/04/01 04:35:47 simonb Exp $ */ +/* $NetBSD: types.h,v 1.11 2021/05/01 06:45:23 skrll Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -37,13 +37,15 @@ #include #if defined(_KERNEL) || defined(_KMEMUSER) || defined(_KERNTYPES) || defined(_STANDALONE) -typedef __UINTPTR_TYPE__ paddr_t; -typedef __UINTPTR_TYPE__ psize_t; + +typedef __uint64_t paddr_t; +typedef __uint64_t psize_t; +#define PRIxPADDR PRIx64 +#define PRIxPSIZE PRIx64 +#define PRIuPSIZE PRIu64 + typedef __UINTPTR_TYPE__ vaddr_t; typedef __UINTPTR_TYPE__ vsize_t; -#define PRIxPADDR PRIxPTR -#define PRIxPSIZE PRIxPTR -#define PRIuPSIZE PRIuPTR #define PRIxVADDR PRIxPTR #define PRIxVSIZE PRIxPTR #define PRIuVSIZE PRIuPTR
CVS commit: src/sys/arch/riscv/include
Module Name:src Committed By: skrll Date: Sun Nov 15 08:09:56 UTC 2020 Modified Files: src/sys/arch/riscv/include: pmap.h Log Message: This file is #define To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/riscv/include/pmap.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/riscv/include/pmap.h diff -u src/sys/arch/riscv/include/pmap.h:1.6 src/sys/arch/riscv/include/pmap.h:1.7 --- src/sys/arch/riscv/include/pmap.h:1.6 Mon Aug 10 06:53:11 2020 +++ src/sys/arch/riscv/include/pmap.h Sun Nov 15 08:09:56 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.h,v 1.6 2020/08/10 06:53:11 skrll Exp $ */ +/* $NetBSD: pmap.h,v 1.7 2020/11/15 08:09:56 skrll Exp $ */ /* * Copyright (c) 2014, 2019 The NetBSD Foundation, Inc. @@ -47,7 +47,7 @@ #include -#define PMAP_SEGTABSIZE NPTEPG +#define PMAP_SEGTABSIZE NPTEPG #define NBSEG (PAGE_SIZE * NPTEPG)
CVS commit: src/sys/arch/riscv/include
Module Name:src Committed By: skrll Date: Sat Nov 7 14:48:46 UTC 2020 Modified Files: src/sys/arch/riscv/include: vmparam.h Log Message: Use lower case for hex constants To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/riscv/include/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/riscv/include/vmparam.h diff -u src/sys/arch/riscv/include/vmparam.h:1.6 src/sys/arch/riscv/include/vmparam.h:1.7 --- src/sys/arch/riscv/include/vmparam.h:1.6 Tue Oct 6 13:42:03 2020 +++ src/sys/arch/riscv/include/vmparam.h Sat Nov 7 14:48:45 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.6 2020/10/06 13:42:03 christos Exp $ */ +/* $NetBSD: vmparam.h,v 1.7 2020/11/07 14:48:45 skrll Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -106,12 +106,12 @@ #define VM_MIN_ADDRESS ((vaddr_t)0x) #ifdef _LP64 /* Sv39 */ #define VM_MAXUSER_ADDRESS ((vaddr_t)0x0040 - 16 * PAGE_SIZE) -#define VM_MIN_KERNEL_ADDRESS ((vaddr_t)0xFFC0) -#define VM_MAX_KERNEL_ADDRESS ((vaddr_t)0xFFD0) /* MIN + 64GB */ +#define VM_MIN_KERNEL_ADDRESS ((vaddr_t)0xffc0) +#define VM_MAX_KERNEL_ADDRESS ((vaddr_t)0xffd0) /* MIN + 64GB */ #else /* Sv32 */ -#define VM_MAXUSER_ADDRESS ((vaddr_t)-0x7fff-1)/* 0x8000 */ -#define VM_MIN_KERNEL_ADDRESS ((vaddr_t)-0x7fff-1)/* 0x8000 */ -#define VM_MAX_KERNEL_ADDRESS ((vaddr_t)-0x4000) /* 0xC000 */ +#define VM_MAXUSER_ADDRESS ((vaddr_t)-0x7fff-1)/* 0x8000 */ +#define VM_MIN_KERNEL_ADDRESS ((vaddr_t)-0x7fff-1)/* 0x8000 */ +#define VM_MAX_KERNEL_ADDRESS ((vaddr_t)-0x4000) /* 0xc000 */ #endif #define VM_MAX_ADDRESS VM_MAXUSER_ADDRESS #define VM_MAXUSER_ADDRESS32 ((vaddr_t)(1UL << 31))/* 0x8000 */
CVS commit: src/sys/arch/riscv/include
Module Name:src
Committed By: skrll
Date: Sat Nov 7 10:48:17 UTC 2020
Modified Files:
src/sys/arch/riscv/include: reg.h
Log Message:
Whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/riscv/include/reg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/riscv/include/reg.h
diff -u src/sys/arch/riscv/include/reg.h:1.7 src/sys/arch/riscv/include/reg.h:1.8
--- src/sys/arch/riscv/include/reg.h:1.7 Sat Nov 7 10:47:35 2020
+++ src/sys/arch/riscv/include/reg.h Sat Nov 7 10:48:17 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: reg.h,v 1.7 2020/11/07 10:47:35 skrll Exp $ */
+/* $NetBSD: reg.h,v 1.8 2020/11/07 10:48:17 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -108,8 +108,8 @@ struct reg32 { // synced with register_t
*/
#ifndef _BSD_FPREG_T_
union __fpreg {
- __uint64_t u_u64;
- double u_d;
+ __uint64_t u_u64;
+ double u_d;
};
#define _BSD_FPREG_T_ union __fpreg
#endif
CVS commit: src/sys/arch/riscv/include
Module Name:src
Committed By: skrll
Date: Sat Nov 7 10:47:35 UTC 2020
Modified Files:
src/sys/arch/riscv/include: reg.h
Log Message:
Indent and annotate FP registers much like the general registers
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/riscv/include/reg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/riscv/include/reg.h
diff -u src/sys/arch/riscv/include/reg.h:1.6 src/sys/arch/riscv/include/reg.h:1.7
--- src/sys/arch/riscv/include/reg.h:1.6 Sat Nov 7 10:43:47 2020
+++ src/sys/arch/riscv/include/reg.h Sat Nov 7 10:47:35 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: reg.h,v 1.6 2020/11/07 10:43:47 skrll Exp $ */
+/* $NetBSD: reg.h,v 1.7 2020/11/07 10:47:35 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -95,13 +95,13 @@ struct reg32 { // synced with register_t
#define _X_T5 _XREG(30)
#define _X_T6 _XREG(31)
-// f0-f7 = ft0-ft7 (FP temporaries)
+// f0 - f7 = ft0 - ft7 (FP temporaries) Caller
// following layout is similar to integer registers above
-// f8-f9 = fs0-fs1 (FP saved registers)
-// f10-f11 = fa0-fa1 (FP arguments/return values)
-// f12-f17 = fa2-fa7 (FP arguments)
-// f18-f27 = fs2-fa11 (FP saved registers)
-// f28-f31 = ft8-ft11 (FP temporaries)
+// f8 - f9 = fs0 - fs1 (FP saved registers) Callee
+// f10 - f11 = fa0 - fa1 (FP arguments/return values) Caller
+// f12 - f17 = fa2 - fa7 (FP arguments) Caller
+// f18 - f27 = fs2 - fa11 (FP saved registers) Callee
+// f28 - f31 = ft8 - ft11 (FP temporaries) Caller
/*
* This fragment is common to and
CVS commit: src/sys/arch/riscv/include
Module Name:src
Committed By: skrll
Date: Sat Nov 7 10:43:47 UTC 2020
Modified Files:
src/sys/arch/riscv/include: reg.h
Log Message:
Note if a register is Caller / Callee saved
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/riscv/include/reg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/riscv/include/reg.h
diff -u src/sys/arch/riscv/include/reg.h:1.5 src/sys/arch/riscv/include/reg.h:1.6
--- src/sys/arch/riscv/include/reg.h:1.5 Wed Nov 4 07:41:34 2020
+++ src/sys/arch/riscv/include/reg.h Sat Nov 7 10:43:47 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: reg.h,v 1.5 2020/11/04 07:41:34 skrll Exp $ */
+/* $NetBSD: reg.h,v 1.6 2020/11/07 10:43:47 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -33,17 +33,17 @@
#define _RISCV_REG_H_
// x0 = 0
-// x1 = ra (return address)
-// x2 = sp (stack pointer)
+// x1 = ra (return address) Caller
+// x2 = sp (stack pointer) Callee
// x3 = gp (global pointer)
// x4 = tp (thread pointer)
-// x5 - x7 = t0 - t2 (temporary)
-// x8 = s0/fp (saved register / frame pointer)
-// x9 = s1 (saved register)
-// x10 - x11 = a0 - a1 (arguments/return values)
-// x12 - x17 = a2 - a7 (arguments)
-// x18 - x27 = s2 - s11 (saved registers)
-// x28 - x31 = t3 - r6 (temporaries)
+// x5 - x7 = t0 - t2 (temporary) Caller
+// x8 = s0/fp (saved register / frame pointer) Callee
+// x9 = s1 (saved register) Callee
+// x10 - x11 = a0 - a1 (arguments/return values) Caller
+// x12 - x17 = a2 - a7 (arguments) Caller
+// x18 - x27 = s2 - s11 (saved registers) Callee
+// x28 - x31 = t3 - r6 (temporaries) Caller
struct reg { // synced with register_t in
#ifdef _LP64
CVS commit: src/sys/arch/riscv/include
Module Name:src
Committed By: skrll
Date: Wed Nov 4 07:41:34 UTC 2020
Modified Files:
src/sys/arch/riscv/include: reg.h
Log Message:
whitespace in comments
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/riscv/include/reg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/riscv/include/reg.h
diff -u src/sys/arch/riscv/include/reg.h:1.4 src/sys/arch/riscv/include/reg.h:1.5
--- src/sys/arch/riscv/include/reg.h:1.4 Wed Nov 4 07:40:15 2020
+++ src/sys/arch/riscv/include/reg.h Wed Nov 4 07:41:34 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: reg.h,v 1.4 2020/11/04 07:40:15 skrll Exp $ */
+/* $NetBSD: reg.h,v 1.5 2020/11/04 07:41:34 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -32,18 +32,18 @@
#ifndef _RISCV_REG_H_
#define _RISCV_REG_H_
-// x0 = 0
-// x1 = ra (return address)
-// x2 = sp (stack pointer)
-// x3 = gp (global pointer)
-// x4 = tp (thread pointer)
-// x5-x7 = t0-t2 (temporary)
-// x8 = s0/fp (saved register / frame pointer)
-// x9 = s1 (saved register)
-// x10-x11 = a0-a1 (arguments/return values)
-// x12-x17 = a2-a7 (arguments)
-// x18-x27 = s2-s11 (saved registers)
-// x28-x31 = t3-r6 (temporaries)
+// x0 = 0
+// x1 = ra (return address)
+// x2 = sp (stack pointer)
+// x3 = gp (global pointer)
+// x4 = tp (thread pointer)
+// x5 - x7 = t0 - t2 (temporary)
+// x8 = s0/fp (saved register / frame pointer)
+// x9 = s1 (saved register)
+// x10 - x11 = a0 - a1 (arguments/return values)
+// x12 - x17 = a2 - a7 (arguments)
+// x18 - x27 = s2 - s11 (saved registers)
+// x28 - x31 = t3 - r6 (temporaries)
struct reg { // synced with register_t in
#ifdef _LP64
CVS commit: src/sys/arch/riscv/include
Module Name:src
Committed By: skrll
Date: Wed Nov 4 07:40:15 UTC 2020
Modified Files:
src/sys/arch/riscv/include: reg.h
Log Message:
typo in comment
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/riscv/include/reg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/riscv/include/reg.h
diff -u src/sys/arch/riscv/include/reg.h:1.3 src/sys/arch/riscv/include/reg.h:1.4
--- src/sys/arch/riscv/include/reg.h:1.3 Wed Nov 4 06:24:44 2020
+++ src/sys/arch/riscv/include/reg.h Wed Nov 4 07:40:15 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: reg.h,v 1.3 2020/11/04 06:24:44 skrll Exp $ */
+/* $NetBSD: reg.h,v 1.4 2020/11/04 07:40:15 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -42,7 +42,7 @@
// x9 = s1 (saved register)
// x10-x11 = a0-a1 (arguments/return values)
// x12-x17 = a2-a7 (arguments)
-// x18-r27 = s2-s11 (saved registers)
+// x18-x27 = s2-s11 (saved registers)
// x28-x31 = t3-r6 (temporaries)
struct reg { // synced with register_t in
CVS commit: src/sys/arch/riscv/include
Module Name:src
Committed By: skrll
Date: Wed Nov 4 06:24:44 UTC 2020
Modified Files:
src/sys/arch/riscv/include: reg.h
Log Message:
Remove incorrect comment
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/riscv/include/reg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/riscv/include/reg.h
diff -u src/sys/arch/riscv/include/reg.h:1.2 src/sys/arch/riscv/include/reg.h:1.3
--- src/sys/arch/riscv/include/reg.h:1.2 Fri Mar 27 06:57:21 2015
+++ src/sys/arch/riscv/include/reg.h Wed Nov 4 06:24:44 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: reg.h,v 1.2 2015/03/27 06:57:21 matt Exp $ */
+/* $NetBSD: reg.h,v 1.3 2020/11/04 06:24:44 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -44,7 +44,6 @@
// x12-x17 = a2-a7 (arguments)
// x18-r27 = s2-s11 (saved registers)
// x28-x31 = t3-r6 (temporaries)
-// x26-x30 = t0-t4 (temporary)
struct reg { // synced with register_t in
#ifdef _LP64
CVS commit: src/sys/arch/riscv/include
Module Name:src Committed By: skrll Date: Mon Nov 2 08:37:59 UTC 2020 Modified Files: src/sys/arch/riscv/include: sysreg.h Log Message: Add SATP_MODE values To generate a diff of this commit: cvs rdiff -u -r1.7 -r1.8 src/sys/arch/riscv/include/sysreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/riscv/include/sysreg.h diff -u src/sys/arch/riscv/include/sysreg.h:1.7 src/sys/arch/riscv/include/sysreg.h:1.8 --- src/sys/arch/riscv/include/sysreg.h:1.7 Mon Nov 2 08:36:54 2020 +++ src/sys/arch/riscv/include/sysreg.h Mon Nov 2 08:37:59 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: sysreg.h,v 1.7 2020/11/02 08:36:54 skrll Exp $ */ +/* $NetBSD: sysreg.h,v 1.8 2020/11/02 08:37:59 skrll Exp $ */ /* * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -198,10 +198,13 @@ riscvreg_cycle_read(void) #ifdef _LP64 #define SATP_MODE __BITS(63,60) +#define SATP_MODE_SV39 8 +#define SATP_MODE_SV48 9 #define SATP_ASID __BITS(59,44) #define SATP_PPN __BITS(43,0) #else #define SATP_MODE __BIT(31) +#define SATP_MODE_SV32 1 #define SATP_ASID __BITS(30,22) #define SATP_PPN __BITS(21,0) #endif
CVS commit: src/sys/arch/riscv/include
Module Name:src Committed By: skrll Date: Mon Nov 2 08:36:54 UTC 2020 Modified Files: src/sys/arch/riscv/include: sysreg.h Log Message: Whitespace To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/riscv/include/sysreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/riscv/include/sysreg.h diff -u src/sys/arch/riscv/include/sysreg.h:1.6 src/sys/arch/riscv/include/sysreg.h:1.7 --- src/sys/arch/riscv/include/sysreg.h:1.6 Sun Nov 1 21:09:48 2020 +++ src/sys/arch/riscv/include/sysreg.h Mon Nov 2 08:36:54 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: sysreg.h,v 1.6 2020/11/01 21:09:48 skrll Exp $ */ +/* $NetBSD: sysreg.h,v 1.7 2020/11/02 08:36:54 skrll Exp $ */ /* * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -197,13 +197,13 @@ riscvreg_cycle_read(void) } #ifdef _LP64 -#define SATP_MODE __BITS(63,60) -#define SATP_ASID __BITS(59,44) -#define SATP_PPN __BITS(43,0) +#define SATP_MODE __BITS(63,60) +#define SATP_ASID __BITS(59,44) +#define SATP_PPN __BITS(43,0) #else -#define SATP_MODE __BIT(31) -#define SATP_ASID __BITS(30,22) -#define SATP_PPN __BITS(21,0) +#define SATP_MODE __BIT(31) +#define SATP_ASID __BITS(30,22) +#define SATP_PPN __BITS(21,0) #endif static inline uint32_t
CVS commit: src/sys/arch/riscv/include
Module Name:src Committed By: skrll Date: Sun Nov 1 19:47:46 UTC 2020 Modified Files: src/sys/arch/riscv/include: pte.h Log Message: Comments from zmcgrew@ To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/arch/riscv/include/pte.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/riscv/include/pte.h diff -u src/sys/arch/riscv/include/pte.h:1.4 src/sys/arch/riscv/include/pte.h:1.5 --- src/sys/arch/riscv/include/pte.h:1.4 Sat Mar 14 16:12:16 2020 +++ src/sys/arch/riscv/include/pte.h Sun Nov 1 19:47:46 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: pte.h,v 1.4 2020/03/14 16:12:16 skrll Exp $ */ +/* $NetBSD: pte.h,v 1.5 2020/11/01 19:47:46 skrll Exp $ */ /* * Copyright (c) 2014, 2019 The NetBSD Foundation, Inc. @@ -59,14 +59,15 @@ typedef __uint32_t pd_entry_t; #define PTE_WIRED __BIT(8) /* Hardware PTE bits. */ -#define PTE_D __BIT(7) -#define PTE_A __BIT(6) -#define PTE_G __BIT(5) -#define PTE_U __BIT(4) -#define PTE_X __BIT(3) -#define PTE_W __BIT(2) -#define PTE_R __BIT(1) -#define PTE_V __BIT(0) +// These are hardware defined bits +#define PTE_D __BIT(7) // Dirty +#define PTE_A __BIT(6) // Accessed +#define PTE_G __BIT(5) // Global +#define PTE_U __BIT(4) // User +#define PTE_X __BIT(3) // eXecute +#define PTE_W __BIT(2) // Write +#define PTE_R __BIT(1) // Read +#define PTE_V __BIT(0) // Valid #define PA_TO_PTE(pa) (((pa) >> PAGE_SHIFT) << PTE_PPN_SHIFT) #define PTE_TO_PA(pte) (((pte) >> PTE_PPN_SHIFT) << PAGE_SHIFT)
CVS commit: src/sys/arch/riscv/include
Module Name:src
Committed By: skrll
Date: Mon Aug 10 06:53:11 UTC 2020
Modified Files:
src/sys/arch/riscv/include: pmap.h
Log Message:
Whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/riscv/include/pmap.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/riscv/include/pmap.h
diff -u src/sys/arch/riscv/include/pmap.h:1.5 src/sys/arch/riscv/include/pmap.h:1.6
--- src/sys/arch/riscv/include/pmap.h:1.5 Fri Aug 7 07:19:45 2020
+++ src/sys/arch/riscv/include/pmap.h Mon Aug 10 06:53:11 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.5 2020/08/07 07:19:45 skrll Exp $ */
+/* $NetBSD: pmap.h,v 1.6 2020/08/10 06:53:11 skrll Exp $ */
/*
* Copyright (c) 2014, 2019 The NetBSD Foundation, Inc.
@@ -111,15 +111,15 @@ struct pmap_md {
void pmap_bootstrap(void);
struct vm_page *
-pmap_md_alloc_poolpage(int flags);
-vaddr_t pmap_md_map_poolpage(paddr_t, vsize_t);
-voidpmap_md_unmap_poolpage(vaddr_t, vsize_t);
-boolpmap_md_direct_mapped_vaddr_p(vaddr_t);
-boolpmap_md_io_vaddr_p(vaddr_t);
-paddr_t pmap_md_direct_mapped_vaddr_to_paddr(vaddr_t);
-vaddr_t pmap_md_direct_map_paddr(paddr_t);
-voidpmap_md_init(void);
-boolpmap_md_tlb_check_entry(void *, vaddr_t, tlb_asid_t, pt_entry_t);
+ pmap_md_alloc_poolpage(int flags);
+vaddr_t pmap_md_map_poolpage(paddr_t, vsize_t);
+void pmap_md_unmap_poolpage(vaddr_t, vsize_t);
+bool pmap_md_direct_mapped_vaddr_p(vaddr_t);
+bool pmap_md_io_vaddr_p(vaddr_t);
+paddr_t pmap_md_direct_mapped_vaddr_to_paddr(vaddr_t);
+vaddr_t pmap_md_direct_map_paddr(paddr_t);
+void pmap_md_init(void);
+bool pmap_md_tlb_check_entry(void *, vaddr_t, tlb_asid_t, pt_entry_t);
//voidpmap_md_page_syncicache(struct vm_page *, const kcpuset_t *);
void pmap_md_pdetab_activate(struct pmap *);
CVS commit: src/sys/arch/riscv/include
Module Name:src
Committed By: christos
Date: Sat Apr 4 21:13:20 UTC 2020
Modified Files:
src/sys/arch/riscv/include: byte_swap.h
Log Message:
silence lint.
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/riscv/include/byte_swap.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/riscv/include/byte_swap.h
diff -u src/sys/arch/riscv/include/byte_swap.h:1.4 src/sys/arch/riscv/include/byte_swap.h:1.5
--- src/sys/arch/riscv/include/byte_swap.h:1.4 Mon Apr 15 10:03:32 2019
+++ src/sys/arch/riscv/include/byte_swap.h Sat Apr 4 17:13:20 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: byte_swap.h,v 1.4 2019/04/15 14:03:32 maya Exp $ */
+/* $NetBSD: byte_swap.h,v 1.5 2020/04/04 21:13:20 christos Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -88,7 +88,7 @@ __byte_swap_u32_variable(uint32_t v)
static __inline uint16_t
__byte_swap_u16_variable(uint16_t v)
{
-
+ /*LINTED*/
return (uint16_t)((v >> 8) | (v << 8));
}
CVS commit: src/sys/arch/riscv/include
Module Name:src Committed By: mrg Date: Wed Apr 17 11:01:19 UTC 2019 Modified Files: src/sys/arch/riscv/include: int_fmtio.h Log Message: fix for riscv32. To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/riscv/include/int_fmtio.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/riscv/include/int_fmtio.h diff -u src/sys/arch/riscv/include/int_fmtio.h:1.3 src/sys/arch/riscv/include/int_fmtio.h:1.4 --- src/sys/arch/riscv/include/int_fmtio.h:1.3 Tue Apr 16 07:08:52 2019 +++ src/sys/arch/riscv/include/int_fmtio.h Wed Apr 17 11:01:19 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: int_fmtio.h,v 1.3 2019/04/16 07:08:52 maya Exp $ */ +/* $NetBSD: int_fmtio.h,v 1.4 2019/04/17 11:01:19 mrg Exp $ */ /*- * Copyright (c) 2001 The NetBSD Foundation, Inc. @@ -53,11 +53,13 @@ #define PRIdLEAST32 "d" /* int_least32_t */ #ifdef _LP64 #define PRIdLEAST64 "ld" /* int_least64_t */ +#define PRIdFAST8 "d" /* int_fast8_t */ +#define PRIdFAST16 "d" /* int_fast16_t */ #else #define PRIdLEAST64 "lld" /* int_least64_t */ -#endif #define PRIdFAST8 "hhd" /* int_fast8_t */ #define PRIdFAST16 "hd" /* int_fast16_t */ +#endif #define PRIdFAST32 "d" /* int_fast32_t */ #ifdef _LP64 #define PRIdFAST64 "ld" /* int_fast64_t */ @@ -81,11 +83,13 @@ #define PRIiLEAST32 "i" /* int_least32_t */ #ifdef _LP64 #define PRIiLEAST64 "li" /* int_least64_t */ +#define PRIiFAST8 "i" /* int_fast8_t */ +#define PRIiFAST16 "i" /* int_fast16_t */ #else #define PRIiLEAST64 "lli" /* int_least64_t */ -#endif #define PRIiFAST8 "hhi" /* int_fast8_t */ #define PRIiFAST16 "hi" /* int_fast16_t */ +#endif #define PRIiFAST32 "i" /* int_fast32_t */ #ifdef _LP64 #define PRIiFAST64 "li" /* int_fast64_t */ @@ -111,11 +115,13 @@ #define PRIoLEAST32 "ho" /* uint_least32_t */ #ifdef _LP64 #define PRIoLEAST64 "lo" /* uint_least64_t */ +#define PRIoFAST8 "o" /* uint_fast8_t */ +#define PRIoFAST16 "o" /* uint_fast16_t */ #else #define PRIoLEAST64 "llo" /* uint_least64_t */ -#endif #define PRIoFAST8 "hho" /* uint_fast8_t */ #define PRIoFAST16 "ho" /* uint_fast16_t */ +#endif #define PRIoFAST32 "o" /* uint_fast32_t */ #ifdef _LP64 #define PRIoFAST64 "lo" /* uint_fast64_t */ @@ -139,11 +145,13 @@ #define PRIuLEAST32 "u" /* uint_least32_t */ #ifdef _LP64 #define PRIuLEAST64 "lu" /* uint_least64_t */ +#define PRIuFAST8 "u" /* uint_fast8_t */ +#define PRIuFAST16 "u" /* uint_fast16_t */ #else #define PRIuLEAST64 "llu" /* uint_least64_t */ -#endif #define PRIuFAST8 "hhu" /* uint_fast8_t */ #define PRIuFAST16 "hu" /* uint_fast16_t */ +#endif #define PRIuFAST32 "u" /* uint_fast32_t */ #ifdef _LP64 #define PRIuFAST64 "lu" /* uint_fast64_t */ @@ -167,11 +175,13 @@ #define PRIxLEAST32 "x" /* uint_least32_t */ #ifdef _LP64 #define PRIxLEAST64 "lx" /* uint_least64_t */ +#define PRIxFAST8 "x" /* uint_fast8_t */ +#define PRIxFAST16 "x" /* uint_fast16_t */ #else #define PRIxLEAST64 "llx" /* uint_least64_t */ +#define PRIxFAST8 "hhx" /* uint_fast8_t */ +#define PRIxFAST16 "hx" /* uint_fast16_t */ #endif -#define PRIxFAST8 "x" /* uint_fast8_t */ -#define PRIxFAST16 "x" /* uint_fast16_t */ #define PRIxFAST32 "x" /* uint_fast32_t */ #ifdef _LP64 #define PRIxFAST64 "lx" /* uint_fast64_t */ @@ -195,11 +205,13 @@ #define PRIXLEAST32 "X" /* uint_least32_t */ #ifdef _LP64 #define PRIXLEAST64 "lX" /* uint_least64_t */ +#define PRIXFAST8 "X" /* uint_fast8_t */ +#define PRIXFAST16 "X" /* uint_fast16_t */ #else #define PRIXLEAST64 "llX" /* uint_least64_t */ +#define PRIXFAST8 "hhX" /* uint_fast8_t */ +#define PRIXFAST16 "hX" /* uint_fast16_t */ #endif -#define PRIXFAST8 "X" /* uint_fast8_t */ -#define PRIXFAST16 "X" /* uint_fast16_t */ #define PRIXFAST32 "X" /* uint_fast32_t */ #ifdef _LP64 #define PRIXFAST64 "lX" /* uint_fast64_t */ @@ -225,11 +237,13 @@ #define SCNdLEAST32 "d" /* int_least32_t */ #ifdef _LP64 #define SCNdLEAST64 "ld" /* int_least64_t */ +#define SCNdFAST8 "d" /* int_fast8_t */ +#define SCNdFAST16 "d" /* int_fast16_t */ #else #define SCNdLEAST64 "lld" /* int_least64_t */ +#define SCNdFAST8 "hhd" /* int_fast8_t */ +#define SCNdFAST16 "hd" /* int_fast16_t */ #endif -#define SCNdFAST8 "d" /* int_fast8_t */ -#define SCNdFAST16 "d" /* int_fast16_t */ #define SCNdFAST32 "d" /* int_fast32_t */ #ifdef _LP64 #define SCNdFAST64 "ld" /* int_fast64_t */ @@ -253,11 +267,13 @@ #define SCNiLEAST32 "i" /* int_least32_t */ #ifdef _LP64 #define SCNiLEAST64 "li" /* int_least64_t */ +#define SCNiFAST8 "i" /* int_fast8_t */ +#define SCNiFAST16 "i" /* int_fast16_t */ #else #define SCNiLEAST64 "lli" /* int_least64_t */ +#define SCNiFAST8 "hhi" /* int_fast8_t */ +#define SCNiFAST16 "hi" /* int_fast16_t */ #endif -#define SCNiFAST8 "i" /* int_fast8_t */ -#define SCNiFAST16 "i" /* int_fast16_t */ #define SCNiFAST32 "i" /* int_fast32_t */ #ifdef _LP64 #define
CVS commit: src/sys/arch/riscv/include
Module Name:src Committed By: maya Date: Tue Apr 16 07:40:03 UTC 2019 Modified Files: src/sys/arch/riscv/include: math.h Log Message: RISC-V ELF psABI says ILP32 also defaults to 128bit long double. To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3 src/sys/arch/riscv/include/math.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/riscv/include/math.h diff -u src/sys/arch/riscv/include/math.h:1.2 src/sys/arch/riscv/include/math.h:1.3 --- src/sys/arch/riscv/include/math.h:1.2 Sat Apr 13 15:57:31 2019 +++ src/sys/arch/riscv/include/math.h Tue Apr 16 07:40:02 2019 @@ -1,7 +1,4 @@ -/* $NetBSD: math.h,v 1.2 2019/04/13 15:57:31 maya Exp $ */ +/* $NetBSD: math.h,v 1.3 2019/04/16 07:40:02 maya Exp $ */ #define __HAVE_NANF - -#if defined(_LP64) || defined(_KERNEL) #define __HAVE_LONG_DOUBLE 128 -#endif
CVS commit: src/sys/arch/riscv/include
Module Name:src Committed By: maya Date: Tue Apr 16 07:08:52 UTC 2019 Modified Files: src/sys/arch/riscv/include: int_fmtio.h Log Message: We're now using gcc netbsd-stdint.h instead of our own definitions, so match those with the format types XXX wrong for 32bit. XXX unclear if changing the fast types was the right call To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3 src/sys/arch/riscv/include/int_fmtio.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/riscv/include/int_fmtio.h diff -u src/sys/arch/riscv/include/int_fmtio.h:1.2 src/sys/arch/riscv/include/int_fmtio.h:1.3 --- src/sys/arch/riscv/include/int_fmtio.h:1.2 Sat Apr 13 15:56:18 2019 +++ src/sys/arch/riscv/include/int_fmtio.h Tue Apr 16 07:08:52 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: int_fmtio.h,v 1.2 2019/04/13 15:56:18 maya Exp $ */ +/* $NetBSD: int_fmtio.h,v 1.3 2019/04/16 07:08:52 maya Exp $ */ /*- * Copyright (c) 2001 The NetBSD Foundation, Inc. @@ -101,7 +101,11 @@ #define PRIo8 "hho" /* uint8_t */ #define PRIo16 "ho" /* uint16_t */ #define PRIo32 "o" /* uint32_t */ +#ifdef _LP64 +#define PRIo64 "lo" /* uint64_t */ +#else #define PRIo64 "llo" /* uint64_t */ +#endif #define PRIoLEAST8 "o" /* uint_least8_t */ #define PRIoLEAST16 "hho" /* uint_least16_t */ #define PRIoLEAST32 "ho" /* uint_least32_t */ @@ -224,8 +228,8 @@ #else #define SCNdLEAST64 "lld" /* int_least64_t */ #endif -#define SCNdFAST8 "hhd" /* int_fast8_t */ -#define SCNdFAST16 "hd" /* int_fast16_t */ +#define SCNdFAST8 "d" /* int_fast8_t */ +#define SCNdFAST16 "d" /* int_fast16_t */ #define SCNdFAST32 "d" /* int_fast32_t */ #ifdef _LP64 #define SCNdFAST64 "ld" /* int_fast64_t */ @@ -252,8 +256,8 @@ #else #define SCNiLEAST64 "lli" /* int_least64_t */ #endif -#define SCNiFAST8 "hhi" /* int_fast8_t */ -#define SCNiFAST16 "hi" /* int_fast16_t */ +#define SCNiFAST8 "i" /* int_fast8_t */ +#define SCNiFAST16 "i" /* int_fast16_t */ #define SCNiFAST32 "i" /* int_fast32_t */ #ifdef _LP64 #define SCNiFAST64 "li" /* int_fast64_t */ @@ -282,8 +286,8 @@ #else #define SCNoLEAST64 "llo" /* uint_least64_t */ #endif -#define SCNoFAST8 "hho" /* uint_fast8_t */ -#define SCNoFAST16 "ho" /* uint_fast16_t */ +#define SCNoFAST8 "o" /* uint_fast8_t */ +#define SCNoFAST16 "o" /* uint_fast16_t */ #define SCNoFAST32 "o" /* uint_fast32_t */ #ifdef _LP64 #define SCNoFAST64 "lo" /* uint_fast64_t */ @@ -310,8 +314,8 @@ #else #define SCNuLEAST64 "llu" /* uint_least64_t */ #endif -#define SCNuFAST8 "hhu" /* uint_fast8_t */ -#define SCNuFAST16 "hu" /* uint_fast16_t */ +#define SCNuFAST8 "u" /* uint_fast8_t */ +#define SCNuFAST16 "u" /* uint_fast16_t */ #define SCNuFAST32 "u" /* uint_fast32_t */ #ifdef _LP64 #define SCNuFAST64 "lu" /* uint_fast64_t */ @@ -338,8 +342,8 @@ #else #define SCNxLEAST64 "llx" /* uint_least64_t */ #endif -#define SCNxFAST8 "hhx" /* uint_fast8_t */ -#define SCNxFAST16 "hx" /* uint_fast16_t */ +#define SCNxFAST8 "x" /* uint_fast8_t */ +#define SCNxFAST16 "x" /* uint_fast16_t */ #define SCNxFAST32 "x" /* uint_fast32_t */ #ifdef _LP64 #define SCNxFAST64 "lx" /* uint_fast64_t */
CVS commit: src/sys/arch/riscv/include
Module Name:src
Committed By: maya
Date: Mon Apr 15 14:03:32 UTC 2019
Modified Files:
src/sys/arch/riscv/include: byte_swap.h
Log Message:
Avoid -Wconversion warnings
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/riscv/include/byte_swap.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/riscv/include/byte_swap.h
diff -u src/sys/arch/riscv/include/byte_swap.h:1.3 src/sys/arch/riscv/include/byte_swap.h:1.4
--- src/sys/arch/riscv/include/byte_swap.h:1.3 Tue Oct 28 20:25:36 2014
+++ src/sys/arch/riscv/include/byte_swap.h Mon Apr 15 14:03:32 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: byte_swap.h,v 1.3 2014/10/28 20:25:36 dennis Exp $ */
+/* $NetBSD: byte_swap.h,v 1.4 2019/04/15 14:03:32 maya Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -88,10 +88,8 @@ __byte_swap_u32_variable(uint32_t v)
static __inline uint16_t
__byte_swap_u16_variable(uint16_t v)
{
- v &= 0x;
- v = (v >> 8) | (v << 8);
- return v;
+ return (uint16_t)((v >> 8) | (v << 8));
}
__END_DECLS
CVS commit: src/sys/arch/riscv/include
Module Name:src Committed By: maya Date: Sat Apr 13 15:57:31 UTC 2019 Modified Files: src/sys/arch/riscv/include: ieee.h math.h Log Message: Our current configuration is that long double is 128bit, so reflect that in the relevant headers. Taken from sparc64. To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/include/ieee.h \ src/sys/arch/riscv/include/math.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/riscv/include/ieee.h diff -u src/sys/arch/riscv/include/ieee.h:1.1 src/sys/arch/riscv/include/ieee.h:1.2 --- src/sys/arch/riscv/include/ieee.h:1.1 Fri Sep 19 17:36:26 2014 +++ src/sys/arch/riscv/include/ieee.h Sat Apr 13 15:57:31 2019 @@ -1,3 +1,4 @@ -/* $NetBSD: ieee.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */ +/* $NetBSD: ieee.h,v 1.2 2019/04/13 15:57:31 maya Exp $ */ +#include /* for #define __HAVE_LONG_DOUBLE 128 */ #include Index: src/sys/arch/riscv/include/math.h diff -u src/sys/arch/riscv/include/math.h:1.1 src/sys/arch/riscv/include/math.h:1.2 --- src/sys/arch/riscv/include/math.h:1.1 Fri Sep 19 17:36:26 2014 +++ src/sys/arch/riscv/include/math.h Sat Apr 13 15:57:31 2019 @@ -1,3 +1,7 @@ -/* $NetBSD: math.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */ +/* $NetBSD: math.h,v 1.2 2019/04/13 15:57:31 maya Exp $ */ #define __HAVE_NANF + +#if defined(_LP64) || defined(_KERNEL) +#define __HAVE_LONG_DOUBLE 128 +#endif
CVS commit: src/sys/arch/riscv/include
Module Name:src Committed By: maya Date: Sat Apr 13 15:56:18 UTC 2019 Modified Files: src/sys/arch/riscv/include: int_fmtio.h Log Message: Provide defines for the 64bit case. To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/include/int_fmtio.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/riscv/include/int_fmtio.h diff -u src/sys/arch/riscv/include/int_fmtio.h:1.1 src/sys/arch/riscv/include/int_fmtio.h:1.2 --- src/sys/arch/riscv/include/int_fmtio.h:1.1 Fri Sep 19 17:36:26 2014 +++ src/sys/arch/riscv/include/int_fmtio.h Sat Apr 13 15:56:18 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: int_fmtio.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */ +/* $NetBSD: int_fmtio.h,v 1.2 2019/04/13 15:56:18 maya Exp $ */ /*- * Copyright (c) 2001 The NetBSD Foundation, Inc. @@ -43,31 +43,57 @@ #define PRId8 "hhd" /* int8_t */ #define PRId16 "hd" /* int16_t */ #define PRId32 "d" /* int32_t */ +#ifdef _LP64 +#define PRId64 "ld" /* int64_t */ +#else #define PRId64 "lld" /* int64_t */ +#endif #define PRIdLEAST8 "hhd" /* int_least8_t */ #define PRIdLEAST16 "hd" /* int_least16_t */ #define PRIdLEAST32 "d" /* int_least32_t */ +#ifdef _LP64 +#define PRIdLEAST64 "ld" /* int_least64_t */ +#else #define PRIdLEAST64 "lld" /* int_least64_t */ +#endif #define PRIdFAST8 "hhd" /* int_fast8_t */ #define PRIdFAST16 "hd" /* int_fast16_t */ #define PRIdFAST32 "d" /* int_fast32_t */ +#ifdef _LP64 +#define PRIdFAST64 "ld" /* int_fast64_t */ +#define PRIdMAX "ld" /* intmax_t */ +#else #define PRIdFAST64 "lld" /* int_fast64_t */ #define PRIdMAX "lld" /* intmax_t */ +#endif #define PRIdPTR "ld" /* intptr_t */ #define PRIi8 "hhi" /* int8_t */ #define PRIi16 "hi" /* int16_t */ #define PRIi32 "i" /* int32_t */ +#ifdef _LP64 +#define PRIi64 "li" /* int64_t */ +#else #define PRIi64 "lli" /* int64_t */ +#endif #define PRIiLEAST8 "hhi" /* int_least8_t */ #define PRIiLEAST16 "hi" /* int_least16_t */ #define PRIiLEAST32 "i" /* int_least32_t */ +#ifdef _LP64 +#define PRIiLEAST64 "li" /* int_least64_t */ +#else #define PRIiLEAST64 "lli" /* int_least64_t */ +#endif #define PRIiFAST8 "hhi" /* int_fast8_t */ #define PRIiFAST16 "hi" /* int_fast16_t */ #define PRIiFAST32 "i" /* int_fast32_t */ +#ifdef _LP64 +#define PRIiFAST64 "li" /* int_fast64_t */ +#define PRIiMAX "li" /* intmax_t */ +#else #define PRIiFAST64 "lli" /* int_fast64_t */ #define PRIiMAX "lli" /* intmax_t */ +#endif #define PRIiPTR "li" /* intptr_t */ /* fprintf macros for unsigned integers */ @@ -79,57 +105,105 @@ #define PRIoLEAST8 "o" /* uint_least8_t */ #define PRIoLEAST16 "hho" /* uint_least16_t */ #define PRIoLEAST32 "ho" /* uint_least32_t */ +#ifdef _LP64 +#define PRIoLEAST64 "lo" /* uint_least64_t */ +#else #define PRIoLEAST64 "llo" /* uint_least64_t */ +#endif #define PRIoFAST8 "hho" /* uint_fast8_t */ #define PRIoFAST16 "ho" /* uint_fast16_t */ #define PRIoFAST32 "o" /* uint_fast32_t */ +#ifdef _LP64 +#define PRIoFAST64 "lo" /* uint_fast64_t */ +#define PRIoMAX "lo" /* uintmax_t */ +#else #define PRIoFAST64 "llo" /* uint_fast64_t */ #define PRIoMAX "llo" /* uintmax_t */ +#endif #define PRIoPTR "lo" /* uintptr_t */ #define PRIu8 "hhu" /* uint8_t */ #define PRIu16 "hu" /* uint16_t */ #define PRIu32 "u" /* uint32_t */ +#ifdef _LP64 +#define PRIu64 "lu" /* uint64_t */ +#else #define PRIu64 "llu" /* uint64_t */ +#endif #define PRIuLEAST8 "hhu" /* uint_least8_t */ #define PRIuLEAST16 "hu" /* uint_least16_t */ #define PRIuLEAST32 "u" /* uint_least32_t */ +#ifdef _LP64 +#define PRIuLEAST64 "lu" /* uint_least64_t */ +#else #define PRIuLEAST64 "llu" /* uint_least64_t */ +#endif #define PRIuFAST8 "hhu" /* uint_fast8_t */ #define PRIuFAST16 "hu" /* uint_fast16_t */ #define PRIuFAST32 "u" /* uint_fast32_t */ +#ifdef _LP64 +#define PRIuFAST64 "lu" /* uint_fast64_t */ +#define PRIuMAX "lu" /* uintmax_t */ +#else #define PRIuFAST64 "llu" /* uint_fast64_t */ #define PRIuMAX "llu" /* uintmax_t */ +#endif #define PRIuPTR "lu" /* uintptr_t */ #define PRIx8 "hhx" /* uint8_t */ #define PRIx16 "hx" /* uint16_t */ #define PRIx32 "x" /* uint32_t */ +#ifdef _LP64 +#define PRIx64 "lx" /* uint64_t */ +#else #define PRIx64 "llx" /* uint64_t */ +#endif #define PRIxLEAST8 "x" /* uint_least8_t */ #define PRIxLEAST16 "x" /* uint_least16_t */ #define PRIxLEAST32 "x" /* uint_least32_t */ +#ifdef _LP64 +#define PRIxLEAST64 "lx" /* uint_least64_t */ +#else #define PRIxLEAST64 "llx" /* uint_least64_t */ +#endif #define PRIxFAST8 "x" /* uint_fast8_t */ #define PRIxFAST16 "x" /* uint_fast16_t */ #define PRIxFAST32 "x" /* uint_fast32_t */ +#ifdef _LP64 +#define PRIxFAST64 "lx" /* uint_fast64_t */ +#define PRIxMAX "lx" /* uintmax_t */ +#else #define PRIxFAST64 "llx" /* uint_fast64_t */ #define PRIxMAX "llx" /* uintmax_t */
CVS commit: src/sys/arch/riscv/include
Module Name:src Committed By: maya Date: Sat Apr 13 12:41:37 UTC 2019 Modified Files: src/sys/arch/riscv/include: asm.h Log Message: Handle changes since the gcc riscv toolchain was upstreamed To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3 src/sys/arch/riscv/include/asm.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/riscv/include/asm.h diff -u src/sys/arch/riscv/include/asm.h:1.2 src/sys/arch/riscv/include/asm.h:1.3 --- src/sys/arch/riscv/include/asm.h:1.2 Fri Mar 27 06:57:21 2015 +++ src/sys/arch/riscv/include/asm.h Sat Apr 13 12:41:36 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: asm.h,v 1.2 2015/03/27 06:57:21 matt Exp $ */ +/* $NetBSD: asm.h,v 1.3 2019/04/13 12:41:36 maya Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -58,7 +58,7 @@ #endif #ifdef __PIC__ -#define PLT(x) x##@ +#define PLT(x) x##@plt #else #define PLT(x) x #endif
CVS commit: src/sys/arch/riscv/include
Module Name:src
Committed By: kamil
Date: Thu Apr 11 11:23:52 UTC 2019
Modified Files:
src/sys/arch/riscv/include: locore.h
Log Message:
Fix a typo in a comment
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/riscv/include/locore.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/riscv/include/locore.h
diff -u src/sys/arch/riscv/include/locore.h:1.3 src/sys/arch/riscv/include/locore.h:1.4
--- src/sys/arch/riscv/include/locore.h:1.3 Thu Mar 16 16:13:21 2017
+++ src/sys/arch/riscv/include/locore.h Thu Apr 11 11:23:51 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.h,v 1.3 2017/03/16 16:13:21 chs Exp $ */
+/* $NetBSD: locore.h,v 1.4 2019/04/11 11:23:51 kamil Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -77,7 +77,7 @@ struct trapframe {
#define tf_t6 tf_reg[_X_T6]
};
-// For COMPAT_NETBDS32 coredumps
+// For COMPAT_NETBSD32 coredumps
struct trapframe32 {
struct reg32 tf_regs;
register32_t tf_badaddr;
CVS commit: src/sys/arch/riscv/include
Module Name:src
Committed By: matt
Date: Fri Jun 26 14:20:11 UTC 2015
Modified Files:
src/sys/arch/riscv/include: lock.h
Log Message:
Fix cp error.
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/riscv/include/lock.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/riscv/include/lock.h
diff -u src/sys/arch/riscv/include/lock.h:1.2 src/sys/arch/riscv/include/lock.h:1.3
--- src/sys/arch/riscv/include/lock.h:1.2 Sun Mar 29 09:43:26 2015
+++ src/sys/arch/riscv/include/lock.h Fri Jun 26 14:20:11 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: lock.h,v 1.2 2015/03/29 09:43:26 matt Exp $ */
+/* $NetBSD: lock.h,v 1.3 2015/06/26 14:20:11 matt Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -88,7 +88,7 @@ __cpu_simple_lock(__cpu_simple_lock_t *_
static __inline int __unused
__cpu_simple_lock_try(__cpu_simple_lock_t *__ptr)
{
- return __atomic_exchange_n(__ptr, __SIMPLELOCK_LOCKED, __ATOMIC_ACQUIRE) == __SIMPLELOCK_LOCKED;
+ return __atomic_exchange_n(__ptr, __SIMPLELOCK_LOCKED, __ATOMIC_ACQUIRE) == __SIMPLELOCK_UNLOCKED;
}
static __inline void __unused
CVS commit: src/sys/arch/riscv/include
Module Name:src Committed By: matt Date: Thu May 28 02:19:05 UTC 2015 Modified Files: src/sys/arch/riscv/include: elf_machdep.h Log Message: add ELF64_MACHDEP_ID To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/arch/riscv/include/elf_machdep.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/riscv/include/elf_machdep.h diff -u src/sys/arch/riscv/include/elf_machdep.h:1.4 src/sys/arch/riscv/include/elf_machdep.h:1.5 --- src/sys/arch/riscv/include/elf_machdep.h:1.4 Wed Apr 1 21:59:01 2015 +++ src/sys/arch/riscv/include/elf_machdep.h Thu May 28 02:19:05 2015 @@ -1,4 +1,4 @@ -/* $NetBSD: elf_machdep.h,v 1.4 2015/04/01 21:59:01 matt Exp $ */ +/* $NetBSD: elf_machdep.h,v 1.5 2015/05/28 02:19:05 matt Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -33,6 +33,7 @@ #define _RISCV_ELF_MACHDEP_H_ #define ELF32_MACHDEP_ID EM_RISCV +#define ELF64_MACHDEP_ID EM_RISCV #define ELF32_MACHDEP_ENDIANNESS ELFDATA2LSB #define ELF64_MACHDEP_ENDIANNESS ELFDATA2LSB
CVS commit: src/sys/arch/riscv/include
Module Name:src
Committed By: matt
Date: Wed Apr 1 21:55:03 UTC 2015
Modified Files:
src/sys/arch/riscv/include: cpu.h
Log Message:
_KMEMUSER only needs struct cpu_info
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/riscv/include/cpu.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/riscv/include/cpu.h
diff -u src/sys/arch/riscv/include/cpu.h:1.3 src/sys/arch/riscv/include/cpu.h:1.4
--- src/sys/arch/riscv/include/cpu.h:1.3 Tue Mar 31 01:11:41 2015
+++ src/sys/arch/riscv/include/cpu.h Wed Apr 1 21:55:03 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.3 2015/03/31 01:11:41 matt Exp $ */
+/* $NetBSD: cpu.h,v 1.4 2015/04/01 21:55:03 matt Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -33,6 +33,7 @@
#define _RISCV_CPU_H_
#if defined(_KERNEL) || defined(_KMEMUSER)
+
struct clockframe {
uintptr_t cf_pc;
uint32_t cf_sr;
@@ -79,6 +80,10 @@ struct cpu_info {
struct evcnt ci_ev_fpu_reenables;
};
+#endif /* _KERNEL || _KMEMUSER */
+
+#ifdef _KERNEL
+
extern struct cpu_info cpu_info_store;
// This is also in sys/lwp.h
@@ -141,6 +146,6 @@ cpu_idle(void)
{
}
-#endif /* _KERNEL || _KMEMUSER */
+#endif /* _KERNEL */
#endif /* _RISCV_CPU_H_ */
CVS commit: src/sys/arch/riscv/include
Module Name:src Committed By: matt Date: Wed Apr 1 21:55:33 UTC 2015 Modified Files: src/sys/arch/riscv/include: mcontext.h Log Message: Add _REG_S0 To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/riscv/include/mcontext.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/riscv/include/mcontext.h diff -u src/sys/arch/riscv/include/mcontext.h:1.3 src/sys/arch/riscv/include/mcontext.h:1.4 --- src/sys/arch/riscv/include/mcontext.h:1.3 Fri Mar 27 06:57:21 2015 +++ src/sys/arch/riscv/include/mcontext.h Wed Apr 1 21:55:33 2015 @@ -1,4 +1,4 @@ -/* $NetBSD: mcontext.h,v 1.3 2015/03/27 06:57:21 matt Exp $ */ +/* $NetBSD: mcontext.h,v 1.4 2015/04/01 21:55:33 matt Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -91,6 +91,7 @@ typedef _BSD_FPREG_T_ __fregset_t[_NFREG #define _REG_SP _REG_X2 #define _REG_GP _REG_X3 #define _REG_TP _REG_X4 +#define _REG_S0 _REG_X8 #define _REG_RV _REG_X10 #define _REG_A0 _REG_X10
CVS commit: src/sys/arch/riscv/include
Module Name:src Committed By: matt Date: Wed Apr 1 21:59:01 UTC 2015 Modified Files: src/sys/arch/riscv/include: elf_machdep.h Log Message: Add two new relocs for compressed branches. To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/riscv/include/elf_machdep.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/riscv/include/elf_machdep.h diff -u src/sys/arch/riscv/include/elf_machdep.h:1.3 src/sys/arch/riscv/include/elf_machdep.h:1.4 --- src/sys/arch/riscv/include/elf_machdep.h:1.3 Fri Mar 27 23:26:14 2015 +++ src/sys/arch/riscv/include/elf_machdep.h Wed Apr 1 21:59:01 2015 @@ -1,4 +1,4 @@ -/* $NetBSD: elf_machdep.h,v 1.3 2015/03/27 23:26:14 matt Exp $ */ +/* $NetBSD: elf_machdep.h,v 1.4 2015/04/01 21:59:01 matt Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -97,6 +97,8 @@ #define R_RISCV_GNU_VTINHERIT 41 // A 0x #define R_RISCV_GNU_VTENTRY 42 #define R_RISCV_ALIGN 43 +#define R_RISCV_RVC_BRANCH 44 +#define R_RISCV_RVC_JUMP 45 /* These are aliases we can use R_TYPESZ */ #define R_RISCV_ADDR32 R_RISCV_32
CVS commit: src/sys/arch/riscv/include
Module Name:src
Committed By: matt
Date: Tue Mar 31 01:14:02 UTC 2015
Modified Files:
src/sys/arch/riscv/include: sysreg.h
Log Message:
No more fatc (replaced by sfence.vm instruction).
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/riscv/include/sysreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/riscv/include/sysreg.h
diff -u src/sys/arch/riscv/include/sysreg.h:1.2 src/sys/arch/riscv/include/sysreg.h:1.3
--- src/sys/arch/riscv/include/sysreg.h:1.2 Sat Mar 28 16:13:56 2015
+++ src/sys/arch/riscv/include/sysreg.h Tue Mar 31 01:14:02 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: sysreg.h,v 1.2 2015/03/28 16:13:56 matt Exp $ */
+/* $NetBSD: sysreg.h,v 1.3 2015/03/31 01:14:02 matt Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -217,14 +217,4 @@ riscvreg_asid_write(uint32_t __asid)
__asm __volatile(csrw\tsasid, %0 :: r(__asid));
}
-#if 0
-static inline uintptr_t
-riscvreg_fatc_read(void)
-{
- uint32_t __fatc;
- __asm __volatile(csrr\t%0, fatc : =r(__fatc));
- return __fatc;
-}
-#endif
-
#endif /* _RISCV_SYSREG_H_ */
CVS commit: src/sys/arch/riscv/include
Module Name:src
Committed By: matt
Date: Tue Mar 31 01:12:30 UTC 2015
Modified Files:
src/sys/arch/riscv/include: proc.h
Log Message:
Add a md_tp member to mdlwp so that the exception handler can temporarily
store the user's thread pointer before saving it in the trapframe.
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/include/proc.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/riscv/include/proc.h
diff -u src/sys/arch/riscv/include/proc.h:1.1 src/sys/arch/riscv/include/proc.h:1.2
--- src/sys/arch/riscv/include/proc.h:1.1 Fri Sep 19 17:36:26 2014
+++ src/sys/arch/riscv/include/proc.h Tue Mar 31 01:12:29 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: proc.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */
+/* $NetBSD: proc.h,v 1.2 2015/03/31 01:12:29 matt Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -46,6 +46,7 @@ struct mdlwp {
struct trapframe *md_utf; /* trapframe from userspace */
struct trapframe *md_ktf; /* trapframe from userspace */
struct faultbuf *md_onfault; /* registers to store on fault */
+ register_t md_tp; /* for locore.S */
vaddr_t md_ss_addr; /* single step address for ptrace */
int md_ss_instr; /* single step instruction for ptrace */
volatile int md_astpending; /* AST pending on return to userland */
CVS commit: src/sys/arch/riscv/include
Module Name:src
Committed By: matt
Date: Tue Mar 31 01:11:42 UTC 2015
Modified Files:
src/sys/arch/riscv/include: cpu.h
Log Message:
Define curcpu() as lwp_getcpu(curlwp) since curlwp is always in the tp
(thread pointer) register.
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/riscv/include/cpu.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/riscv/include/cpu.h
diff -u src/sys/arch/riscv/include/cpu.h:1.2 src/sys/arch/riscv/include/cpu.h:1.3
--- src/sys/arch/riscv/include/cpu.h:1.2 Sat Mar 28 16:13:56 2015
+++ src/sys/arch/riscv/include/cpu.h Tue Mar 31 01:11:41 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.2 2015/03/28 16:13:56 matt Exp $ */
+/* $NetBSD: cpu.h,v 1.3 2015/03/31 01:11:41 matt Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -81,16 +81,13 @@ struct cpu_info {
extern struct cpu_info cpu_info_store;
+// This is also in sys/lwp.h
+struct lwp;
+static inline struct cpu_info *lwp_getcpu(struct lwp *);
+
register struct lwp *riscv_curlwp __asm(tp);
#define curlwp riscv_curlwp
-
-static inline struct cpu_info *
-curcpu(void)
-{
- struct cpu_info *ci;
- __asm(csrr\t%0, sscratch : =r(ci));
- return ci;
-}
+#define curcpu() lwp_getcpu(curlwp)
static inline cpuid_t
cpu_number(void)
CVS commit: src/sys/arch/riscv/include
Module Name:src
Committed By: matt
Date: Sun Mar 29 09:43:26 UTC 2015
Modified Files:
src/sys/arch/riscv/include: lock.h
Log Message:
Use C11 atomic builtins instead of __asm.
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/include/lock.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/riscv/include/lock.h
diff -u src/sys/arch/riscv/include/lock.h:1.1 src/sys/arch/riscv/include/lock.h:1.2
--- src/sys/arch/riscv/include/lock.h:1.1 Fri Sep 19 17:36:26 2014
+++ src/sys/arch/riscv/include/lock.h Sun Mar 29 09:43:26 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: lock.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */
+/* $NetBSD: lock.h,v 1.2 2015/03/29 09:43:26 matt Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -50,75 +50,51 @@ __SIMPLELOCK_UNLOCKED_P(__cpu_simple_loc
static __inline void
__cpu_simple_lock_clear(__cpu_simple_lock_t *__ptr)
{
-#if 0
- __atomic_clear(__ptr, __ATOMIC_RELAXED);
-#else
+#if 1
*__ptr = __SIMPLELOCK_UNLOCKED;
+#else
+ __atomic_store_n(__ptr, __SIMPLELOCK_UNLOCKED, __ATOMIC_RELAXED);
#endif
}
static __inline void
__cpu_simple_lock_set(__cpu_simple_lock_t *__ptr)
{
-#if 0
- (void)__atomic_test_and_set(__ptr, __ATOMIC_RELAXED);
-#else
+#if 1
*__ptr = __SIMPLELOCK_LOCKED;
+#else
+ __atomic_store_n(__ptr, __SIMPLELOCK_LOCKED, __ATOMIC_RELAXED);
#endif
}
static __inline void __unused
__cpu_simple_lock_init(__cpu_simple_lock_t *__ptr)
{
-#if 0
- __atomic_clear(__ptr, __ATOMIC_RELAXED);
-#else
+#if 1
*__ptr = __SIMPLELOCK_UNLOCKED;
+#else
+ __atomic_store_n(__ptr, __SIMPLELOCK_UNLOCKED, __ATOMIC_RELAXED);
#endif
}
static __inline void __unused
__cpu_simple_lock(__cpu_simple_lock_t *__ptr)
{
-#if 0
- while (__atomic_test_and_set(__ptr, __ATOMIC_ACQUIRE)) {
+ while (__atomic_exchange_n(__ptr, __SIMPLELOCK_LOCKED, __ATOMIC_ACQUIRE) == __SIMPLELOCK_LOCKED) {
/* do nothing */
}
-#else
- int __tmp;
- __asm(
- \n 1:
- \n\t amoswap.w.aq %[__tmp], %[__newval], 0(%[__ptr])
- \n\t bnez %[__tmp], 1b
- : [__tmp] =r (__tmp)
- : [__newval] r (__SIMPLELOCK_LOCKED),
- [__ptr] r (__ptr));
-#endif
}
static __inline int __unused
__cpu_simple_lock_try(__cpu_simple_lock_t *__ptr)
{
-#if 0
- return !__atomic_test_and_set(__ptr, __ATOMIC_ACQUIRE);
-#else
- int __oldval;
- __asm( amoswap.w.aq\t%[__oldval], %[__newval], 0(%[__ptr])
- : [__oldval] =r (__oldval)
- : [__newval] r (__SIMPLELOCK_LOCKED),
- [__ptr] r (__ptr));
- return __oldval == __SIMPLELOCK_UNLOCKED;
-#endif
+ return __atomic_exchange_n(__ptr, __SIMPLELOCK_LOCKED, __ATOMIC_ACQUIRE) == __SIMPLELOCK_LOCKED;
}
static __inline void __unused
__cpu_simple_unlock(__cpu_simple_lock_t *__ptr)
{
-#if 0
- __atomic_clear(__ptr, __ATOMIC_RELEASE);
-#else
- __asm(amoswap.w.rl\tx0, x0, 0(%[__ptr]) :: [__ptr] r (__ptr));
-#endif
+ __atomic_store_n(__ptr, __SIMPLELOCK_UNLOCKED, __ATOMIC_RELEASE);
}
#endif /* _RISCV_LOCK_H_ */
CVS commit: src/sys/arch/riscv/include
Module Name:src Committed By: matt Date: Fri Mar 27 06:57:21 UTC 2015 Modified Files: src/sys/arch/riscv/include: asm.h elf_machdep.h mcontext.h reg.h setjmp.h Log Message: Switch to new ABI (return values now in a0/a1; v0/v1 are no more) To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/include/asm.h \ src/sys/arch/riscv/include/elf_machdep.h src/sys/arch/riscv/include/reg.h \ src/sys/arch/riscv/include/setjmp.h cvs rdiff -u -r1.2 -r1.3 src/sys/arch/riscv/include/mcontext.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/riscv/include/asm.h diff -u src/sys/arch/riscv/include/asm.h:1.1 src/sys/arch/riscv/include/asm.h:1.2 --- src/sys/arch/riscv/include/asm.h:1.1 Fri Sep 19 17:36:26 2014 +++ src/sys/arch/riscv/include/asm.h Fri Mar 27 06:57:21 2015 @@ -1,4 +1,4 @@ -/* $NetBSD: asm.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */ +/* $NetBSD: asm.h,v 1.2 2015/03/27 06:57:21 matt Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -119,9 +119,9 @@ #define RCSID(name) __RCSID(name) #if defined(_LP64) -#define SZREG 4 -#else #define SZREG 8 +#else +#define SZREG 4 #endif #define ALSK 15 /* stack alignment */ Index: src/sys/arch/riscv/include/elf_machdep.h diff -u src/sys/arch/riscv/include/elf_machdep.h:1.1 src/sys/arch/riscv/include/elf_machdep.h:1.2 --- src/sys/arch/riscv/include/elf_machdep.h:1.1 Fri Sep 19 17:36:26 2014 +++ src/sys/arch/riscv/include/elf_machdep.h Fri Mar 27 06:57:21 2015 @@ -1,4 +1,4 @@ -/* $NetBSD: elf_machdep.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */ +/* $NetBSD: elf_machdep.h,v 1.2 2015/03/27 06:57:21 matt Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -56,59 +56,55 @@ /* Processor specific relocation types */ #define R_RISCV_NONE 0 -#define R_RISCV_32 2 // A -#define R_RISCV_REL32 3 // A 0x -#define R_RISCV_JAL 4 // A 0xff -#define R_RISCV_HI20 5 // A 0x -#define R_RISCV_LO12_I 6 // (A 16) 0x -#define R_RISCV_LO12_S 7 // (S + A - P) 2 -#define R_RISCV_PCREL_LO12_I 8 -#define R_RISCV_PCREL_LO12_S 9 -#define R_RISCV_BRANCH 10 // (A - P) 0x -#define R_RISCV_CALL 11 // (A - P) 0xff -#define R_RISCV_PCREL_HI20 12 -#define R_RISCV_CALL_PLT 13 -#define R_RISCV_64 18 -#define R_RISCV_GOT_HI20 22 -#define R_RISCV_GOT_LO12 23 -#define R_RISCV_COPY 24 -#define R_RISCV_JMP_SLOT 25 -/* TLS relocations. */ -#define R_RISCV_TLS_IE_HI20 29 -#define R_RISCV_TLS_IE_LO12 30 -#define R_RISCV_TLS_IE_ADD 31 -#define R_RISCV_TLS_IE_LO12_I 32 -#define R_RISCV_TLS_IE_LO12_S 33 -#define R_RISCV_TPREL_HI20 34 -#define R_RISCV_TLREL_LO12_I 35 -#define R_RISCV_TLREL_LO12_S 36 -#define R_RISCV_TLREL_ADD 37 - -#define R_RISCV_TLS_DTPMOD32 38 -#define R_RISCV_TLS_DTPREL32 39 -#define R_RISCV_TLS_DTPMOD64 40 -#define R_RISCV_TLS_DTPREL64 41 -#define R_RISCV_TLS_DTPREL_HI16 44 -#define R_RISCV_TLS_DTPREL_LO16 45 -#define R_RISCV_TLS_PCREL_LO12 50 -#define R_RISCV_TLS_GOT_HI20 51 -#define R_RISCV_TLS_GOT_LO20 52 -#define R_RISCV_TLS_GD_HI20 53 -#define R_RISCV_TLS_GD_LO20 54 - -#define R_RISCV_GLOB_DAT 57 -#define R_RISCV_ADD32 58 -#define R_RISCV_SUB32 59 -#define R_RISCV_ADD64 60 -#define R_RISCV_SUB64 61 +#define R_RISCV_32 1 // A +#define R_RISCV_64 2 +#define R_RISCV_RELATIVE 3 +#define R_RISCV_COPY 4 +#define R_RISCV_JMP_SLOT 5 +#define R_RISCV_TLS_DTPMOD32 6 +#define R_RISCV_TLS_DTPREL32 7 +#define R_RISCV_TLS_DTPMOD64 8 +#define R_RISCV_TLS_DTPREL64 9 +#define R_RISCV_TLS_TPREL32 10 +#define R_RISCV_TLS_DTPREL64 11 + +/* The rest are not used by the dynamic linker */ +#define R_RISCV_BRANCH 16 // (A - P) 0x +#define R_RISCV_JAL 17 // A 0xff +#define R_RISCV_CALL 18 // (A - P) 0xff +#define R_RISCV_CALL_PLT 19 +#define R_RISCV_GOT_HI20 20 +#define R_RISCV_TLS_GOT_HI20 21 +#define R_RISCV_TLS_GD_HI20 22 +#define R_RISCV_PCREL_HI20 23 +#define R_RISCV_PCREL_LO12_I 24 +#define R_RISCV_PCREL_LO12_S 25 +#define R_RISCV_HI20 26 // A 0x +#define R_RISCV_LO12_I 27 // (A 16) 0x +#define R_RISCV_LO12_S 28 // (S + A - P) 2 +#define R_RISCV_TPREL_HI20 29 +#define R_RISCV_TLREL_LO12_I 30 +#define R_RISCV_TLREL_LO12_S 31 +#define R_RISCV_TLREL_ADD 32 +#define R_RISCV_ADD8 33 +#define R_RISCV_ADD16 34 +#define R_RISCV_ADD32 35 +#define R_RISCV_ADD64 36 +#define R_RISCV_SUB8 37 +#define R_RISCV_SUB16 38 +#define R_RISCV_SUB32 39 +#define R_RISCV_SUB64 40 +#define R_RISCV_GNU_VTINHERIT 41 // A 0x +#define R_RISCV_GNU_VTENTRY 42 +#define R_RISCV_ALIGN 43 + #define R_TYPE(name) R_RISCV_ ## name +#if ELFSIZE == 32 +#define R_TLS_TYPE(name) R_RISCV_ ## name ## 32 +#else #define R_TLS_TYPE(name) R_RISCV_ ## name ## 64 - -#define DT_RISCV_LOCAL_GOTNO (DT_LOPROC + 0) -#define DT_RISCV_SYMTABNO (DT_LOPROC + 1) -#define DT_RISCV_GOTSYM (DT_LOPROC + 2) -#define DT_RISCV_PLTGOT (DT_LOPROC + 3) +#endif #ifdef _KERNEL #ifdef
CVS commit: src/sys/arch/riscv/include
Module Name:src Committed By: matt Date: Fri Mar 27 23:26:14 UTC 2015 Modified Files: src/sys/arch/riscv/include: elf_machdep.h Log Message: Fix one error and make life for ld.elf_so a little easier. To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3 src/sys/arch/riscv/include/elf_machdep.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/riscv/include/elf_machdep.h diff -u src/sys/arch/riscv/include/elf_machdep.h:1.2 src/sys/arch/riscv/include/elf_machdep.h:1.3 --- src/sys/arch/riscv/include/elf_machdep.h:1.2 Fri Mar 27 06:57:21 2015 +++ src/sys/arch/riscv/include/elf_machdep.h Fri Mar 27 23:26:14 2015 @@ -1,4 +1,4 @@ -/* $NetBSD: elf_machdep.h,v 1.2 2015/03/27 06:57:21 matt Exp $ */ +/* $NetBSD: elf_machdep.h,v 1.3 2015/03/27 23:26:14 matt Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -66,7 +66,7 @@ #define R_RISCV_TLS_DTPMOD64 8 #define R_RISCV_TLS_DTPREL64 9 #define R_RISCV_TLS_TPREL32 10 -#define R_RISCV_TLS_DTPREL64 11 +#define R_RISCV_TLS_TPREL64 11 /* The rest are not used by the dynamic linker */ #define R_RISCV_BRANCH 16 // (A - P) 0x @@ -98,12 +98,15 @@ #define R_RISCV_GNU_VTENTRY 42 #define R_RISCV_ALIGN 43 +/* These are aliases we can use R_TYPESZ */ +#define R_RISCV_ADDR32 R_RISCV_32 +#define R_RISCV_ADDR64 R_RISCV_64 #define R_TYPE(name) R_RISCV_ ## name #if ELFSIZE == 32 -#define R_TLS_TYPE(name) R_RISCV_ ## name ## 32 +#define R_TYPESZ(name) R_RISCV_ ## name ## 32 #else -#define R_TLS_TYPE(name) R_RISCV_ ## name ## 64 +#define R_TYPESZ(name) R_RISCV_ ## name ## 64 #endif #ifdef _KERNEL
CVS commit: src/sys/arch/riscv/include
Module Name:src
Committed By: dennis
Date: Tue Oct 28 19:46:18 UTC 2014
Modified Files:
src/sys/arch/riscv/include: byte_swap.h
Log Message:
Correct 32 and 64 bit byte swap inlines.
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/include/byte_swap.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/riscv/include/byte_swap.h
diff -u src/sys/arch/riscv/include/byte_swap.h:1.1 src/sys/arch/riscv/include/byte_swap.h:1.2
--- src/sys/arch/riscv/include/byte_swap.h:1.1 Fri Sep 19 17:36:26 2014
+++ src/sys/arch/riscv/include/byte_swap.h Tue Oct 28 19:46:18 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: byte_swap.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */
+/* $NetBSD: byte_swap.h,v 1.2 2014/10/28 19:46:18 dennis Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -63,9 +63,9 @@ static __inline uint64_t
__byte_swap_u64_variable(uint64_t v)
{
v = ((v 0x00ff) (56 - 0)) | ((v (56 - 0)) 0x00ff)
- | ((v 0xff00) (48 - 8)) | ((v (48 - 8)) 0xff00)
- | ((v 0x00ff) (40 - 16)) | ((v (40 - 16)) 0x00ff)
- | ((v 0xff00) (32 - 24)) | ((v (32 - 24)) 0xff00);
+ | ((v 0xff00) (48 - 8)) | ((v (48 - 8)) 0xff00)
+ | ((v 0x00ff) (40 - 16)) | ((v (40 - 16)) 0x00ff)
+ | ((v 0xff00) (32 - 24)) | ((v (32 - 24)) 0xff00);
return v;
}
@@ -75,7 +75,7 @@ static __inline uint32_t
__byte_swap_u32_variable(uint32_t v)
{
v = ((v 0x00ff) (24 - 0)) | ((v (24 - 0)) 0x00ff)
- | ((v 0xff00) (16 - 8)) | ((v (16 - 8)) 0xff00);
+ | ((v 0xff00) (16 - 8)) | ((v (16 - 8)) 0xff00);
return v;
}
CVS commit: src/sys/arch/riscv/include
Module Name:src
Committed By: dennis
Date: Tue Oct 28 20:25:36 UTC 2014
Modified Files:
src/sys/arch/riscv/include: byte_swap.h
Log Message:
Shave an instruction from the generated code for the 32 bit byte
swap inline. Prune 5 or 9 instructions (depending on what you count)
from the 64 bit byte swap inline.
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/riscv/include/byte_swap.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/riscv/include/byte_swap.h
diff -u src/sys/arch/riscv/include/byte_swap.h:1.2 src/sys/arch/riscv/include/byte_swap.h:1.3
--- src/sys/arch/riscv/include/byte_swap.h:1.2 Tue Oct 28 19:46:18 2014
+++ src/sys/arch/riscv/include/byte_swap.h Tue Oct 28 20:25:36 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: byte_swap.h,v 1.2 2014/10/28 19:46:18 dennis Exp $ */
+/* $NetBSD: byte_swap.h,v 1.3 2014/10/28 20:25:36 dennis Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -62,10 +62,12 @@ __BEGIN_DECLS
static __inline uint64_t
__byte_swap_u64_variable(uint64_t v)
{
- v = ((v 0x00ff) (56 - 0)) | ((v (56 - 0)) 0x00ff)
- | ((v 0xff00) (48 - 8)) | ((v (48 - 8)) 0xff00)
- | ((v 0x00ff) (40 - 16)) | ((v (40 - 16)) 0x00ff)
- | ((v 0xff00) (32 - 24)) | ((v (32 - 24)) 0xff00);
+ const uint64_t m1 = 0xull;
+ const uint64_t m0 = 0x00ff00ff00ff00ffull;
+
+ v = (v 32) | (v 32);
+ v = ((v 16) m1) | ((v m1) 16);
+ v = ((v 8) m0) | ((v m0) 8);
return v;
}
@@ -74,8 +76,10 @@ __byte_swap_u64_variable(uint64_t v)
static __inline uint32_t
__byte_swap_u32_variable(uint32_t v)
{
- v = ((v 0x00ff) (24 - 0)) | ((v (24 - 0)) 0x00ff)
- | ((v 0xff00) (16 - 8)) | ((v (16 - 8)) 0xff00);
+ const uint32_t m = 0xff00ff;
+
+ v = (v 16) | (v 16);
+ v = ((v 8) m) | ((v m) 8);
return v;
}
CVS commit: src/sys/arch/riscv/include
Module Name:src
Committed By: dennis
Date: Fri Oct 24 01:08:07 UTC 2014
Modified Files:
src/sys/arch/riscv/include: mcontext.h
Log Message:
Fix a typo: the PC is likely in _REG_PC
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/include/mcontext.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/riscv/include/mcontext.h
diff -u src/sys/arch/riscv/include/mcontext.h:1.1 src/sys/arch/riscv/include/mcontext.h:1.2
--- src/sys/arch/riscv/include/mcontext.h:1.1 Fri Sep 19 17:36:26 2014
+++ src/sys/arch/riscv/include/mcontext.h Fri Oct 24 01:08:07 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: mcontext.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */
+/* $NetBSD: mcontext.h,v 1.2 2014/10/24 01:08:07 dennis Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -117,7 +117,7 @@ typedef struct {
#define _UC_TLSBASE 0x0008 /* see sys/ucontext.h */
#define _UC_MACHINE_SP(uc) ((uc)-uc_mcontext.__gregs[_REG_SP])
-#define _UC_MACHINE_PC(uc) ((uc)-uc_mcontext.__gregs[_REG_LR])
+#define _UC_MACHINE_PC(uc) ((uc)-uc_mcontext.__gregs[_REG_PC])
#define _UC_MACHINE_INTRV(uc) ((uc)-uc_mcontext.__gregs[_REG_RV])
#define _UC_MACHINE_SET_PC(uc, pc) _UC_MACHINE_PC(uc) = (pc)
