svn commit: r349958 - in stable: 11/sys/amd64/vmm 11/sys/amd64/vmm/amd 11/sys/x86/x86 11/usr.sbin/bhyve 12/sys/amd64/vmm 12/sys/amd64/vmm/amd 12/sys/x86/x86 12/usr.sbin/bhyve

2019-07-12 Thread John Baldwin
Author: jhb
Date: Fri Jul 12 22:31:12 2019
New Revision: 349958
URL: https://svnweb.freebsd.org/changeset/base/349958

Log:
  MFC 339911,339936,343075,343166,348592: Various AMD CPU-specific fixes.
  
  339911:
  Emulate machine check related MSR_EXTFEATURES to allow guest OSes to
  boot on AMD FX Series.
  
  339936:
  Merge cases with upper block.
  This is a cosmetic change only to simplify code.
  
  343075:
  vmm(4): Take steps towards multicore bhyve AMD support
  
  vmm's CPUID emulation presented Intel topology information to the guest, but
  disabled AMD topology information and in some cases passed through garbage.
  I.e., CPUID leaves 0x8000_001[de] were passed through to the guest, but
  guest CPUs can migrate between host threads, so the information presented
  was not consistent.  This could easily be observed with 'cpucontrol -i 0xfoo
  /dev/cpuctl0'.
  
  Slightly improve this situation by enabling the AMD topology feature flag
  and presenting at least the CPUID fields used by FreeBSD itself to probe
  topology on more modern AMD64 hardware (Family 15h+).  Older stuff is
  probably less interesting.  I have not been able to empirically confirm it
  is sufficient, but it should not regress anything either.
  
  343166:
  vmm(4): Mask Spectre feature bits on AMD hosts
  
  For parity with Intel hosts, which already mask out the CPUID feature
  bits that indicate the presence of the SPEC_CTRL MSR, do the same on
  AMD.
  
  Eventually we may want to have a better support story for guests, but
  for now, limit the damage of incorrectly indicating an MSR we do not yet
  support.
  
  Eventually, we may want a generic CPUID override system for
  administrators, or for minimum supported feature set in heterogenous
  environments with failover.  That is a much larger scope effort than
  this bug fix.
  
  348592:
  Emulate the AMD MSR_LS_CFG MSR used for various Ryzen errata.
  
  Writes are ignored and reads always return zero.
  
  PR:   224476, 235010

Modified:
  stable/11/sys/amd64/vmm/amd/svm_msr.c
  stable/11/sys/amd64/vmm/x86.c
  stable/11/sys/amd64/vmm/x86.h
  stable/11/sys/x86/x86/mp_x86.c
  stable/11/usr.sbin/bhyve/xmsr.c
Directory Properties:
  stable/11/   (props changed)

Changes in other areas also in this revision:
Modified:
  stable/12/sys/amd64/vmm/amd/svm_msr.c
  stable/12/sys/amd64/vmm/x86.c
  stable/12/sys/amd64/vmm/x86.h
  stable/12/sys/x86/x86/mp_x86.c
  stable/12/usr.sbin/bhyve/xmsr.c
Directory Properties:
  stable/12/   (props changed)

Modified: stable/11/sys/amd64/vmm/amd/svm_msr.c
==
--- stable/11/sys/amd64/vmm/amd/svm_msr.c   Fri Jul 12 21:19:47 2019
(r349957)
+++ stable/11/sys/amd64/vmm/amd/svm_msr.c   Fri Jul 12 22:31:12 2019
(r349958)
@@ -122,9 +122,8 @@ svm_rdmsr(struct svm_softc *sc, int vcpu, u_int num, u
case MSR_MTRR16kBase ... MSR_MTRR16kBase + 1:
case MSR_MTRR64kBase:
case MSR_SYSCFG:
-   *result = 0;
-   break;
case MSR_AMDK8_IPM:
+   case MSR_EXTFEATURES:
*result = 0;
break;
default:
@@ -162,6 +161,8 @@ svm_wrmsr(struct svm_softc *sc, int vcpu, u_int num, u
/*
 * Ignore writes to microcode update register.
 */
+   break;
+   case MSR_EXTFEATURES:
break;
default:
error = EINVAL;

Modified: stable/11/sys/amd64/vmm/x86.c
==
--- stable/11/sys/amd64/vmm/x86.c   Fri Jul 12 21:19:47 2019
(r349957)
+++ stable/11/sys/amd64/vmm/x86.c   Fri Jul 12 22:31:12 2019
(r349958)
@@ -135,17 +135,30 @@ x86_emulate_cpuid(struct vm *vm, int vcpu_id,
cpuid_count(*eax, *ecx, regs);
if (vmm_is_amd()) {
/*
-* XXX this might appear silly because AMD
-* cpus don't have threads.
-*
-* However this matches the logical cpus as
-* advertised by leaf 0x1 and will work even
-* if threads is set incorrectly on an AMD host.
+* As on Intel (_0007:0, EDX), mask out
+* unsupported or unsafe AMD extended features
+* (8000_0008 EBX).
 */
+   regs[1] &= (AMDFEID_CLZERO | AMDFEID_IRPERF |
+   AMDFEID_XSAVEERPTR);
+
vm_get_topology(vm, , , ,
);
-   logical_cpus = threads * cores;
-   regs[2] = logical_cpus - 1;
+

svn commit: r349958 - in stable: 11/sys/amd64/vmm 11/sys/amd64/vmm/amd 11/sys/x86/x86 11/usr.sbin/bhyve 12/sys/amd64/vmm 12/sys/amd64/vmm/amd 12/sys/x86/x86 12/usr.sbin/bhyve

2019-07-12 Thread John Baldwin
Author: jhb
Date: Fri Jul 12 22:31:12 2019
New Revision: 349958
URL: https://svnweb.freebsd.org/changeset/base/349958

Log:
  MFC 339911,339936,343075,343166,348592: Various AMD CPU-specific fixes.
  
  339911:
  Emulate machine check related MSR_EXTFEATURES to allow guest OSes to
  boot on AMD FX Series.
  
  339936:
  Merge cases with upper block.
  This is a cosmetic change only to simplify code.
  
  343075:
  vmm(4): Take steps towards multicore bhyve AMD support
  
  vmm's CPUID emulation presented Intel topology information to the guest, but
  disabled AMD topology information and in some cases passed through garbage.
  I.e., CPUID leaves 0x8000_001[de] were passed through to the guest, but
  guest CPUs can migrate between host threads, so the information presented
  was not consistent.  This could easily be observed with 'cpucontrol -i 0xfoo
  /dev/cpuctl0'.
  
  Slightly improve this situation by enabling the AMD topology feature flag
  and presenting at least the CPUID fields used by FreeBSD itself to probe
  topology on more modern AMD64 hardware (Family 15h+).  Older stuff is
  probably less interesting.  I have not been able to empirically confirm it
  is sufficient, but it should not regress anything either.
  
  343166:
  vmm(4): Mask Spectre feature bits on AMD hosts
  
  For parity with Intel hosts, which already mask out the CPUID feature
  bits that indicate the presence of the SPEC_CTRL MSR, do the same on
  AMD.
  
  Eventually we may want to have a better support story for guests, but
  for now, limit the damage of incorrectly indicating an MSR we do not yet
  support.
  
  Eventually, we may want a generic CPUID override system for
  administrators, or for minimum supported feature set in heterogenous
  environments with failover.  That is a much larger scope effort than
  this bug fix.
  
  348592:
  Emulate the AMD MSR_LS_CFG MSR used for various Ryzen errata.
  
  Writes are ignored and reads always return zero.
  
  PR:   224476, 235010

Modified:
  stable/12/sys/amd64/vmm/amd/svm_msr.c
  stable/12/sys/amd64/vmm/x86.c
  stable/12/sys/amd64/vmm/x86.h
  stable/12/sys/x86/x86/mp_x86.c
  stable/12/usr.sbin/bhyve/xmsr.c
Directory Properties:
  stable/12/   (props changed)

Changes in other areas also in this revision:
Modified:
  stable/11/sys/amd64/vmm/amd/svm_msr.c
  stable/11/sys/amd64/vmm/x86.c
  stable/11/sys/amd64/vmm/x86.h
  stable/11/sys/x86/x86/mp_x86.c
  stable/11/usr.sbin/bhyve/xmsr.c
Directory Properties:
  stable/11/   (props changed)

Modified: stable/12/sys/amd64/vmm/amd/svm_msr.c
==
--- stable/12/sys/amd64/vmm/amd/svm_msr.c   Fri Jul 12 21:19:47 2019
(r349957)
+++ stable/12/sys/amd64/vmm/amd/svm_msr.c   Fri Jul 12 22:31:12 2019
(r349958)
@@ -122,9 +122,8 @@ svm_rdmsr(struct svm_softc *sc, int vcpu, u_int num, u
case MSR_MTRR16kBase ... MSR_MTRR16kBase + 1:
case MSR_MTRR64kBase:
case MSR_SYSCFG:
-   *result = 0;
-   break;
case MSR_AMDK8_IPM:
+   case MSR_EXTFEATURES:
*result = 0;
break;
default:
@@ -162,6 +161,8 @@ svm_wrmsr(struct svm_softc *sc, int vcpu, u_int num, u
/*
 * Ignore writes to microcode update register.
 */
+   break;
+   case MSR_EXTFEATURES:
break;
default:
error = EINVAL;

Modified: stable/12/sys/amd64/vmm/x86.c
==
--- stable/12/sys/amd64/vmm/x86.c   Fri Jul 12 21:19:47 2019
(r349957)
+++ stable/12/sys/amd64/vmm/x86.c   Fri Jul 12 22:31:12 2019
(r349958)
@@ -137,17 +137,30 @@ x86_emulate_cpuid(struct vm *vm, int vcpu_id,
cpuid_count(*eax, *ecx, regs);
if (vmm_is_amd()) {
/*
-* XXX this might appear silly because AMD
-* cpus don't have threads.
-*
-* However this matches the logical cpus as
-* advertised by leaf 0x1 and will work even
-* if threads is set incorrectly on an AMD host.
+* As on Intel (_0007:0, EDX), mask out
+* unsupported or unsafe AMD extended features
+* (8000_0008 EBX).
 */
+   regs[1] &= (AMDFEID_CLZERO | AMDFEID_IRPERF |
+   AMDFEID_XSAVEERPTR);
+
vm_get_topology(vm, , , ,
);
-   logical_cpus = threads * cores;
-   regs[2] = logical_cpus - 1;
+