Re: svn commit: r233773 - head/usr.sbin/arp

2012-04-09 Thread Gleb Smirnoff
  Qing,

On Sun, Apr 08, 2012 at 10:41:11AM -0700, Qing Li wrote:
Q This is not the right way to support RFC3021.
Q 
Q The code you removed is used for checking against attempt at adding
Q duplicate entry.
Q Both the message and the code apply in that context. I tried to state
Q clearly and concisely
Q what r201282 was intended in solving and was verified by actual users
Q who ran into the
Q described problems.

How does the message apply?

On a 10.0/9.0 prior to my commit:

#ifconfig em0
em0: flags=8843UP,BROADCAST,RUNNING,SIMPLEX,MULTICAST metric 0 mtu 1500

options=4219bRXCSUM,TXCSUM,VLAN_MTU,VLAN_HWTAGGING,VLAN_HWCSUM,TSO4,WOL_MAGIC,VLAN_HWTSO
ether f0:de:f1:6c:5b:fa
inet x.x.x.111 netmask 0xffe0 broadcast x.x.x.127 
nd6 options=29PERFORMNUD,IFDISABLED,AUTO_LINKLOCAL
media: Ethernet autoselect (100baseTX full-duplex)
status: active
# arp -an
? (x.x.x.97) at 00:00:5e:00:01:61 on em0 expires in 1198 seconds [ethernet]
? (x.x.x.101) at 00:e0:81:5a:22:49 on em0 expires in 618 seconds [ethernet]
? (x.x.x.111) at f0:de:f1:6c:5b:fa on em0 permanent [ethernet]
? (x.x.x.116) at 00:26:18:6a:ea:02 on em0 expires in 1128 seconds [ethernet]
# # arp -s 81.19.64.96 0:0:0:0:0:0
set: proxy entry exists for non 802 device

And how does this apply? Where is the proxy entry mentioned? Where is the
non 802 device?

Look at the code before r201282 and see that the message was for absolutely
unrelated case.

And here is behavior of 6.1-RELEASE, that is prior to your new ARP work:

# ifconfig fxp0
fxp0: flags=8843UP,BROADCAST,RUNNING,SIMPLEX,MULTICAST mtu 1500
options=8VLAN_MTU
inet x.x.x.134 netmask 0xfffc broadcast x.x.x.135
ether 00:20:ed:6e:9c:f9
media: Ethernet autoselect (10baseT/UTP)
status: active
# arp -s x.x.x.132 0:0:0:0:0:0
set: can only proxy for x.x.x.132

As you see, the error message was an other one.

Q If we actually need to support RFC 3021, then better do it properly.

What do you mean here under properly? RFC3021 says that network address
in a /31 network is a common address. Thus it should be possible to have
an ARP entry for it.

Anyway this change isn't about RFC3021. A /31 network is just a case when we
need to set ARP entry for network address.

-- 
Totus tuus, Glebius.
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Re: svn commit: r234014 - head/lib/libc/arm/gen

2012-04-09 Thread Juli Mallett
On Sun, Apr 8, 2012 at 21:14, Andrew Turner and...@fubar.geek.nz wrote:
 We can implement it as a naked function but we will need to store all
 registers other than r0 and pc which seems a waste.

 The problem implementing it in an assembly file is we are unable to use
 ARM_TP_ADDRESS is defined as:
 #define ARM_TP_ADDRESS (ARM_VECTORS_HIGH + 0x1000)

 Where ARM_VECTORS_HIGH is defined as:
 #define ARM_VECTORS_HIGH 0xU

 I could remove the U from ARM_VECTORS_HIGH however I'm not sure on the
 implications of that change.

Oh, is that all?  :)  It's easy to have an ifdef that adds the u
suffix in C and not in assembly.  That's perfectly appropriate in this
case.  If you want to be fancy you can use a macro which adds the U to
the constant in C and not in assembly, and use it in other places, but
that's usually unnecessary.  In the kernel we sometimes use assym to
get around this sort of thing, but that's fully unnecessary.

Look at powerpc/include/vmparam.h for an example of a header where we
do this currently (VM_MAXUSER_ADDRESS specifically.)  This is the
right thing to do by far over using C as a wrapper for assembly in
this way.

 How do you know GCC won't allocate r2 to be used as a temporary in
 between the assembly and the return?

 The compiler is free to use r2 with the current code. I have attached a
 patch that fools the compiler into thinking we are using r1-r3 by
 placing them in the clobber list.

If this file is ever compiled with the correct ABI, then, it will do
excessive saves and restores of r1-r3, I think.
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Re: svn commit: r234014 - head/lib/libc/arm/gen

2012-04-09 Thread Andrew Turner
On Mon, 9 Apr 2012 01:03:15 -0700
Juli Mallett jmall...@freebsd.org wrote:

 On Sun, Apr 8, 2012 at 21:14, Andrew Turner and...@fubar.geek.nz
 wrote:
  We can implement it as a naked function but we will need to store
  all registers other than r0 and pc which seems a waste.
 
  The problem implementing it in an assembly file is we are unable to
  use ARM_TP_ADDRESS is defined as:
  #define ARM_TP_ADDRESS (ARM_VECTORS_HIGH + 0x1000)
 
  Where ARM_VECTORS_HIGH is defined as:
  #define ARM_VECTORS_HIGH 0xU
 
  I could remove the U from ARM_VECTORS_HIGH however I'm not sure on
  the implications of that change.
 
 Oh, is that all?  :)  It's easy to have an ifdef that adds the u
 suffix in C and not in assembly.  That's perfectly appropriate in this
 case.  If you want to be fancy you can use a macro which adds the U to
 the constant in C and not in assembly, and use it in other places, but
 that's usually unnecessary.  In the kernel we sometimes use assym to
 get around this sort of thing, but that's fully unnecessary.
 
 Look at powerpc/include/vmparam.h for an example of a header where we
 do this currently (VM_MAXUSER_ADDRESS specifically.)  This is the
 right thing to do by far over using C as a wrapper for assembly in
 this way.

How does the attached (untested) patch look. It explicitly loads
ARM_TP_ADDRESS into a r0 to ensure r1-3 are not touched.

Andrew
Index: lib/libc/arm/gen/Makefile.inc
===
--- lib/libc/arm/gen/Makefile.inc	(revision 234031)
+++ lib/libc/arm/gen/Makefile.inc	(working copy)
@@ -3,4 +3,4 @@
 
 SRCS+=	_ctx_start.S _setjmp.S _set_tp.c alloca.S fabs.c \
 	getcontextx.c infinity.c ldexp.c makecontext.c \
-	__aeabi_read_tp.c setjmp.S signalcontext.c sigsetjmp.S divsi3.S flt_rounds.c
+	__aeabi_read_tp.S setjmp.S signalcontext.c sigsetjmp.S divsi3.S flt_rounds.c
Index: lib/libc/arm/gen/__aeabi_read_tp.S
===
--- lib/libc/arm/gen/__aeabi_read_tp.S	(revision 0)
+++ lib/libc/arm/gen/__aeabi_read_tp.S	(working copy)
@@ -0,0 +1,41 @@
+/*-
+ * Copyright (c) 2012 Oleksandr Tymoshenko
+ * Copyright (c) 2012 Andrew Turner
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include machine/asm.h
+__FBSDID($FreeBSD$);
+
+#define LOCORE
+#include machine/sysarch.h
+
+ENTRY(__aeabi_read_tp)
+	ldr	r0, .Larm_tp_address
+	ldr	r0, [r0]
+	RET
+
+.Larm_tp_address:
+	.word ARM_TP_ADDRESS
+
Index: lib/libc/arm/gen/__aeabi_read_tp.c
===
--- lib/libc/arm/gen/__aeabi_read_tp.c	(revision 234031)
+++ lib/libc/arm/gen/__aeabi_read_tp.c	(working copy)
@@ -1,45 +0,0 @@
-/*-
- * Copyright (c) 2012 Oleksandr Tymoshenko
- * Copyright (c) 2012 Andrew Turner
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *notice, this list of conditions and the following disclaimer in the
- *documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 

svn commit: r233961 - head/sys/x86/x86

2012-04-09 Thread Idwer Vollering
This commit broke HT/SMP bootup.
http://lists.freebsd.org/pipermail/freebsd-current/2012-April/033038.html
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svn commit: r234057 - head/lib/libc/gen

2012-04-09 Thread Jilles Tjoelker
Author: jilles
Date: Mon Apr  9 14:17:22 2012
New Revision: 234057
URL: http://svn.freebsd.org/changeset/base/234057

Log:
  sem_open: Make sure to fail an O_CREAT|O_EXCL open, even if that semaphore
  is already open in this process.
  
  If the named semaphore is already open, sem_open() only increments a
  reference count and did not take the flags into account (which otherwise
  happens by passing them to open()). Add an extra check for O_CREAT|O_EXCL.
  
  PR:   kern/166706
  Reviewed by:  davidxu
  MFC after:10 days

Modified:
  head/lib/libc/gen/sem_new.c

Modified: head/lib/libc/gen/sem_new.c
==
--- head/lib/libc/gen/sem_new.c Mon Apr  9 14:16:24 2012(r234056)
+++ head/lib/libc/gen/sem_new.c Mon Apr  9 14:17:22 2012(r234057)
@@ -162,10 +162,16 @@ _sem_open(const char *name, int flags, .
_pthread_mutex_lock(sem_llock);
LIST_FOREACH(ni, sem_list, next) {
if (strcmp(name, ni-name) == 0) {
-   ni-open_count++;
-   sem = ni-sem;
-   _pthread_mutex_unlock(sem_llock);
-   return (sem);
+   if ((flags  (O_CREAT|O_EXCL)) == (O_CREAT|O_EXCL)) {
+   _pthread_mutex_unlock(sem_llock);
+   errno = EEXIST;
+   return (SEM_FAILED);
+   } else {
+   ni-open_count++;
+   sem = ni-sem;
+   _pthread_mutex_unlock(sem_llock);
+   return (sem);
+   }
}
}
 
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svn commit: r234058 - head/usr.bin/kdump

2012-04-09 Thread Dimitry Andric
Author: dim
Date: Mon Apr  9 14:47:18 2012
New Revision: 234058
URL: http://svn.freebsd.org/changeset/base/234058

Log:
  In kdump's mkioctls script, use '${CPP}' instead of hardcodedly using
  'gcc -E'.  This fixes building when WITH_CLANG_IS_CC is in effect.
  
  Report by:Niclas Zeising zeis...@daemonic.se
  MFC after:1 week

Modified:
  head/usr.bin/kdump/Makefile
  head/usr.bin/kdump/mkioctls

Modified: head/usr.bin/kdump/Makefile
==
--- head/usr.bin/kdump/Makefile Mon Apr  9 14:17:22 2012(r234057)
+++ head/usr.bin/kdump/Makefile Mon Apr  9 14:47:18 2012(r234058)
@@ -21,7 +21,7 @@ NO_WERROR?=   YES
 CLEANFILES=ioctl.c kdump_subr.c kdump_subr.h linux_syscalls.c
 
 ioctl.c: mkioctls
-   env MACHINE=${MACHINE} \
+   env MACHINE=${MACHINE} CPP=${CPP} \
sh ${.CURDIR}/mkioctls print ${DESTDIR}/usr/include  ${.TARGET}
 
 kdump_subr.h: mksubr

Modified: head/usr.bin/kdump/mkioctls
==
--- head/usr.bin/kdump/mkioctls Mon Apr  9 14:17:22 2012(r234057)
+++ head/usr.bin/kdump/mkioctls Mon Apr  9 14:47:18 2012(r234058)
@@ -38,7 +38,7 @@ case ${MACHINE} in
 esac
 
 awk -v x=$ioctl_includes 'BEGIN {print x}' |
-   gcc -E -I$1 -dM -DCOMPAT_43TTY - |
+   $CPP -I$1 -dM -DCOMPAT_43TTY - |
awk -v ioctl_includes=$ioctl_includes -v style=$style '
 BEGIN {
print /* XXX obnoxious prerequisites. */
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Re: svn commit: r233961 - head/sys/x86/x86

2012-04-09 Thread John Baldwin
On Friday, April 06, 2012 5:19:29 pm Justin T. Gibbs wrote:
 Author: gibbs
 Date: Fri Apr  6 21:19:28 2012
 New Revision: 233961
 URL: http://svn.freebsd.org/changeset/base/233961
 
 Log:
   Fix interrupt load balancing regression, introduced in revision
   222813, that left all un-pinned interrupts assigned to CPU 0.
   
   sys/x86/x86/intr_machdep.c:
   In intr_shuffle_irqs(), remove CPU_SETOF() call that initialized
   the intr_cpus cpuset to only contain CPU0.
   
   This initialization is too late and nullifies the results of calls
   the intr_add_cpu() that occur much earlier in the boot process.
   Since intr_cpus is statically initialized to the empty set, and
   all processors, including the BSP, already add themselves to
   intr_cpus no special initialization for the BSP is necessary.
   
   MFC after:  3 days

Ah, nice catch!

-- 
John Baldwin
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svn commit: r234059 - in head/sys: amd64/amd64 i386/i386 x86/include

2012-04-09 Thread John Baldwin
Author: jhb
Date: Mon Apr  9 15:20:16 2012
New Revision: 234059
URL: http://svn.freebsd.org/changeset/base/234059

Log:
  Recognize the RDRAND instruction feature.
  
  Submitted by: Michael Fuckner  michael fuckner net
  MFC after:3 days

Modified:
  head/sys/amd64/amd64/identcpu.c
  head/sys/i386/i386/identcpu.c
  head/sys/x86/include/specialreg.h

Modified: head/sys/amd64/amd64/identcpu.c
==
--- head/sys/amd64/amd64/identcpu.c Mon Apr  9 14:47:18 2012
(r234058)
+++ head/sys/amd64/amd64/identcpu.c Mon Apr  9 15:20:16 2012
(r234059)
@@ -303,7 +303,7 @@ printcpuinfo(void)
\034OSXSAVE   /* OS-Enabled State Management*/
\035AVX   /* Advanced Vector Extensions */
\036F16C  /* Half-precision conversions */
-   \037b30
+   \037RDRAND/* RDRAND Instruction */
\040HV/* Hypervisor */
);
}

Modified: head/sys/i386/i386/identcpu.c
==
--- head/sys/i386/i386/identcpu.c   Mon Apr  9 14:47:18 2012
(r234058)
+++ head/sys/i386/i386/identcpu.c   Mon Apr  9 15:20:16 2012
(r234059)
@@ -779,7 +779,7 @@ printcpuinfo(void)
\034OSXSAVE   /* OS-Enabled State Management*/
\035AVX   /* Advanced Vector Extensions */
\036F16C  /* Half-precision conversions */
-   \037b30
+   \037RDRAND/* RDRAND Instruction */
\040HV/* Hypervisor */
);
}

Modified: head/sys/x86/include/specialreg.h
==
--- head/sys/x86/include/specialreg.h   Mon Apr  9 14:47:18 2012
(r234058)
+++ head/sys/x86/include/specialreg.h   Mon Apr  9 15:20:16 2012
(r234059)
@@ -153,6 +153,7 @@
 #defineCPUID2_OSXSAVE  0x0800
 #defineCPUID2_AVX  0x1000
 #defineCPUID2_F16C 0x2000
+#defineCPUID2_RDRAND   0x4000
 #defineCPUID2_HV   0x8000
 
 /*
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svn commit: r234060 - head/usr.bin/truss

2012-04-09 Thread Dimitry Andric
Author: dim
Date: Mon Apr  9 15:34:22 2012
New Revision: 234060
URL: http://svn.freebsd.org/changeset/base/234060

Log:
  Since truss also uses kdump's mkioctls script, pass the value of ${CPP}
  there too, similar to r234058.
  
  MFC after:1 week

Modified:
  head/usr.bin/truss/Makefile

Modified: head/usr.bin/truss/Makefile
==
--- head/usr.bin/truss/Makefile Mon Apr  9 15:20:16 2012(r234059)
+++ head/usr.bin/truss/Makefile Mon Apr  9 15:34:22 2012(r234060)
@@ -23,7 +23,7 @@ syscalls.h:   syscalls.master
${.CURDIR}/i386.conf
 
 ioctl.c: ${.CURDIR}/../kdump/mkioctls
-   env MACHINE=${MACHINE} \
+   env MACHINE=${MACHINE} CPP=${CPP} \
/bin/sh ${.CURDIR}/../kdump/mkioctls return 
${DESTDIR}/usr/include  ${.TARGET}
 
 .if ${MACHINE_CPUARCH} == i386
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Re: svn commit: r233961 - head/sys/x86/x86

2012-04-09 Thread Jaakko Heinonen

Hi,

On 2012-04-06, Justin T. Gibbs wrote:
   Fix interrupt load balancing regression, introduced in revision
   222813, that left all un-pinned interrupts assigned to CPU 0.
   
   sys/x86/x86/intr_machdep.c:
   In intr_shuffle_irqs(), remove CPU_SETOF() call that initialized
   the intr_cpus cpuset to only contain CPU0.
   
   This initialization is too late and nullifies the results of calls
   the intr_add_cpu() that occur much earlier in the boot process.
   Since intr_cpus is statically initialized to the empty set, and
   all processors, including the BSP, already add themselves to
   intr_cpus no special initialization for the BSP is necessary.

My Pentium 4 system hangs on boot after this commit. These are the last
lines from a verbose boot:

SMP: AP CPU #1 Launched!
cpu1 AP:
 ID: 0x0100   VER: 0x00050014 LDR: 0x DFR: 0x
  lint0: 0x00010700 lint1: 0x0400 TPR: 0x SVR: 0x01ff
  timer: 0x000100ef therm: 0x0001 err: 0x00f0 pmc: 0x00010400

The system boots with r233960.

Some information:

CPU: Intel(R) Pentium(R) 4 CPU 2.60GHz (2605.96-MHz 686-class CPU)
  Origin = GenuineIntel  Id = 0xf29  Family = f  Model = 2  Stepping =
9
  
Features=0xbfebfbffFPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE
  Features2=0x4400CNXT-ID,xTPR
real memory  = 2147483648 (2048 MB)
avail memory = 2085228544 (1988 MB)
Event timer LAPIC quality 400
ACPI APIC Table: A M I  OEMAPIC 
FreeBSD/SMP: Multiprocessor System Detected: 2 CPUs
FreeBSD/SMP: 1 package(s) x 1 core(s) x 2 HTT threads
 cpu0 (BSP): APIC ID:  0
 cpu1 (AP/HT): APIC ID:  1

-- 
Jaakko
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Re: svn commit: r233961 - head/sys/x86/x86

2012-04-09 Thread Nathan Whitehorn

On 04/09/12 10:45, Jaakko Heinonen wrote:

Hi,

On 2012-04-06, Justin T. Gibbs wrote:

   Fix interrupt load balancing regression, introduced in revision
   222813, that left all un-pinned interrupts assigned to CPU 0.

   sys/x86/x86/intr_machdep.c:
In intr_shuffle_irqs(), remove CPU_SETOF() call that initialized
the intr_cpus cpuset to only contain CPU0.

This initialization is too late and nullifies the results of calls
the intr_add_cpu() that occur much earlier in the boot process.
Since intr_cpus is statically initialized to the empty set, and
all processors, including the BSP, already add themselves to
intr_cpus no special initialization for the BSP is necessary.

My Pentium 4 system hangs on boot after this commit. These are the last
lines from a verbose boot:

SMP: AP CPU #1 Launched!
cpu1 AP:
  ID: 0x0100   VER: 0x00050014 LDR: 0x DFR: 0x
   lint0: 0x00010700 lint1: 0x0400 TPR: 0x SVR: 0x01ff
   timer: 0x000100ef therm: 0x0001 err: 0x00f0 pmc: 0x00010400


For whatever it's worth, I had a similar problem on PPC with interrupt 
distribution where interrupts were going very early in boot to non-BSP 
CPUs before they were launched, and so getting lost.

-Nathan
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Re: svn commit: r233961 - head/sys/x86/x86

2012-04-09 Thread John Baldwin
On Monday, April 09, 2012 11:45:11 am Jaakko Heinonen wrote:
 
 Hi,
 
 On 2012-04-06, Justin T. Gibbs wrote:
Fix interrupt load balancing regression, introduced in revision
222813, that left all un-pinned interrupts assigned to CPU 0.

sys/x86/x86/intr_machdep.c:
  In intr_shuffle_irqs(), remove CPU_SETOF() call that initialized
  the intr_cpus cpuset to only contain CPU0.

  This initialization is too late and nullifies the results of calls
  the intr_add_cpu() that occur much earlier in the boot process.
  Since intr_cpus is statically initialized to the empty set, and
  all processors, including the BSP, already add themselves to
  intr_cpus no special initialization for the BSP is necessary.
 
 My Pentium 4 system hangs on boot after this commit. These are the last
 lines from a verbose boot:
 
 SMP: AP CPU #1 Launched!
 cpu1 AP:
  ID: 0x0100   VER: 0x00050014 LDR: 0x DFR: 0x
   lint0: 0x00010700 lint1: 0x0400 TPR: 0x SVR: 0x01ff
   timer: 0x000100ef therm: 0x0001 err: 0x00f0 pmc: 0x00010400
 
 The system boots with r233960.
 
 Some information:
 
 CPU: Intel(R) Pentium(R) 4 CPU 2.60GHz (2605.96-MHz 686-class CPU)
   Origin = GenuineIntel  Id = 0xf29  Family = f  Model = 2  Stepping =
 9
   
Features=0xbfebfbffFPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE
   Features2=0x4400CNXT-ID,xTPR
 real memory  = 2147483648 (2048 MB)
 avail memory = 2085228544 (1988 MB)
 Event timer LAPIC quality 400
 ACPI APIC Table: A M I  OEMAPIC 
 FreeBSD/SMP: Multiprocessor System Detected: 2 CPUs
 FreeBSD/SMP: 1 package(s) x 1 core(s) x 2 HTT threads
  cpu0 (BSP): APIC ID:  0
  cpu1 (AP/HT): APIC ID:  1

I suspect in your case intr_add_cpu() is never called.  I think Attilio is not 
correct in that it is not called for the BSP.

Yes, it is not called for the BSP in set_interrupt_apic_ids().  This used to 
work because bit 0 was assigned statically.  Also, in a UP machine
set_interrupt_apic_ids() is not called at all.

Try this (untested):

Index: sys/x86/x86/intr_machdep.c
===
--- intr_machdep.c  (revision 234057)
+++ intr_machdep.c  (working copy)
@@ -491,6 +491,15 @@ intr_bind(u_int vector, u_char cpu)
return (intr_event_bind(isrc-is_event, cpu));
 }
 
+static void
+intr_add_bsp(void *arg __unused)
+{
+
+   /* The BSP is always a valid target. */
+   CPU_SETOF(0, intr_cpus);
+}
+SYSINIT(intr_add_bsp, SI_SUB_CPU, SI_ORDER_FIRST, intr_add_bsp, NULL);
+
 /*
  * Add a CPU to our mask of valid CPUs that can be destinations of
  * interrupts.


-- 
John Baldwin
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Re: svn commit: r234014 - head/lib/libc/arm/gen

2012-04-09 Thread Juli Mallett
On Mon, Apr 9, 2012 at 01:44, Andrew Turner and...@fubar.geek.nz wrote:
 How does the attached (untested) patch look. It explicitly loads
 ARM_TP_ADDRESS into a r0 to ensure r1-3 are not touched.

The example file I pointed at was for the kernel, where the
LOCORE-related ifdefs (almost) make sense, but for userland you
probably want to conditionalize on __ASSEMBLER__.
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Re: svn commit: r232491 - in head/sys: amd64/include i386/include pc98/include x86/include

2012-04-09 Thread David Schultz
On Sun, Mar 04, 2012, Tijl Coosemans wrote:
 Log:
   Copy amd64 float.h to x86 and merge with i386 float.h. Replace
   amd64/i386/pc98 float.h with stubs.
[...]
 --- head/sys/amd64/include/float.hSun Mar  4 12:52:48 2012
 (r232490, copy source)
 +++ head/sys/x86/include/float.h  Sun Mar  4 14:00:32 2012
 (r232491)
 @@ -42,7 +42,11 @@ __END_DECLS
  #define FLT_RADIX2   /* b */
  #define FLT_ROUNDS   __flt_rounds()
  #if __ISO_C_VISIBLE = 1999
 +#ifdef _LP64
  #define  FLT_EVAL_METHOD 0   /* no promotions */
 +#else
 +#define  FLT_EVAL_METHOD (-1)/* i387 semantics 
 are...interesting */
 +#endif
  #define  DECIMAL_DIG 21  /* max precision in decimal 
 digits */
  #endif

The implication of this code is that FLT_EVAL_METHOD depends on
the size of a long, which it does not.  Instead, it depends on
whether SSE2 support is guaranteed to be present.  If anything,
the test should be something like #ifndef __i386__.

By the way, the #defines for single- and double-precision are
effectively MI and should be in, e.g., ieee754_float.h.  I can
send some old patches to that effect if someone wants to clean
them up and commit them.
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Re: svn commit: r233961 - head/sys/x86/x86

2012-04-09 Thread Attilio Rao
Il 09 aprile 2012 17:34, John Baldwin j...@freebsd.org ha scritto:
 On Monday, April 09, 2012 11:45:11 am Jaakko Heinonen wrote:

 Hi,

 On 2012-04-06, Justin T. Gibbs wrote:
    Fix interrupt load balancing regression, introduced in revision
    222813, that left all un-pinned interrupts assigned to CPU 0.
 
    sys/x86/x86/intr_machdep.c:
      In intr_shuffle_irqs(), remove CPU_SETOF() call that initialized
      the intr_cpus cpuset to only contain CPU0.
 
      This initialization is too late and nullifies the results of calls
      the intr_add_cpu() that occur much earlier in the boot process.
      Since intr_cpus is statically initialized to the empty set, and
      all processors, including the BSP, already add themselves to
      intr_cpus no special initialization for the BSP is necessary.

 My Pentium 4 system hangs on boot after this commit. These are the last
 lines from a verbose boot:

 SMP: AP CPU #1 Launched!
 cpu1 AP:
      ID: 0x0100   VER: 0x00050014 LDR: 0x DFR: 0x
   lint0: 0x00010700 lint1: 0x0400 TPR: 0x SVR: 0x01ff
   timer: 0x000100ef therm: 0x0001 err: 0x00f0 pmc: 0x00010400

 The system boots with r233960.

 Some information:

 CPU: Intel(R) Pentium(R) 4 CPU 2.60GHz (2605.96-MHz 686-class CPU)
   Origin = GenuineIntel  Id = 0xf29  Family = f  Model = 2  Stepping =
 9

 Features=0xbfebfbffFPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE
   Features2=0x4400CNXT-ID,xTPR
 real memory  = 2147483648 (2048 MB)
 avail memory = 2085228544 (1988 MB)
 Event timer LAPIC quality 400
 ACPI APIC Table: A M I  OEMAPIC 
 FreeBSD/SMP: Multiprocessor System Detected: 2 CPUs
 FreeBSD/SMP: 1 package(s) x 1 core(s) x 2 HTT threads
  cpu0 (BSP): APIC ID:  0
  cpu1 (AP/HT): APIC ID:  1

 I suspect in your case intr_add_cpu() is never called.  I think Attilio is not
 correct in that it is not called for the BSP.

 Yes, it is not called for the BSP in set_interrupt_apic_ids().  This used to
 work because bit 0 was assigned statically.  Also, in a UP machine
 set_interrupt_apic_ids() is not called at all.

But why there is a front-end check for the BSP in set_interrupt_apic_ids()?

Anyway, I think a better fix would be like the attached patch.

Thanks,
Attilio

Index: sys/i386/i386/mp_machdep.c
===
--- sys/i386/i386/mp_machdep.c  (revisione 234046)
+++ sys/i386/i386/mp_machdep.c  (copia locale)
@@ -831,6 +831,8 @@ set_interrupt_apic_ids(void)
apic_id = cpu_apic_ids[i];
if (apic_id == -1)
continue;
+
+   /* BSP should be already added by cpu_startup(). */
if (cpu_info[apic_id].cpu_bsp)
continue;
if (cpu_info[apic_id].cpu_disabled)
Index: sys/i386/i386/machdep.c
===
--- sys/i386/i386/machdep.c (revisione 234046)
+++ sys/i386/i386/machdep.c (copia locale)
@@ -336,6 +336,11 @@ cpu_startup(dummy)
 #ifndef XEN
cpu_setregs();
 #endif
+
+   /*
+* Add BSP interrupt bitmask.
+*/
+   intr_add_cpu(0);
 }

 /*
Index: sys/amd64/amd64/mp_machdep.c
===
--- sys/amd64/amd64/mp_machdep.c(revisione 234046)
+++ sys/amd64/amd64/mp_machdep.c(copia locale)
@@ -797,6 +797,8 @@ set_interrupt_apic_ids(void)
apic_id = cpu_apic_ids[i];
if (apic_id == -1)
continue;
+
+   /* BSP should be already added by cpu_startup(). */
if (cpu_info[apic_id].cpu_bsp)
continue;
if (cpu_info[apic_id].cpu_disabled)
Index: sys/amd64/amd64/machdep.c
===
--- sys/amd64/amd64/machdep.c   (revisione 234046)
+++ sys/amd64/amd64/machdep.c   (copia locale)
@@ -295,6 +295,11 @@ cpu_startup(dummy)
vm_pager_bufferinit();

cpu_setregs();
+
+   /*
+* Add BSP interrupt bitmask.
+*/
+   intr_add_cpu(0);
 }

 /*
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svn commit: r234064 - in head/sys: cddl/contrib/opensolaris/uts/common/fs/zfs fs/tmpfs vm

2012-04-09 Thread Attilio Rao
Author: attilio
Date: Mon Apr  9 17:05:18 2012
New Revision: 234064
URL: http://svn.freebsd.org/changeset/base/234064

Log:
  - Introduce a cache-miss optimization for consistency with other
accesses of the cache member of vm_object objects.
  - Use novel vm_page_is_cached() for checks outside of the vm subsystem.
  
  Reviewed by:  alc
  MFC after:2 weeks
  X-MFC:r234039

Modified:
  head/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_vnops.c
  head/sys/fs/tmpfs/tmpfs_vnops.c
  head/sys/vm/vm_page.c

Modified: head/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_vnops.c
==
--- head/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_vnops.c Mon Apr 
 9 16:18:55 2012(r234063)
+++ head/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_vnops.c Mon Apr 
 9 17:05:18 2012(r234064)
@@ -345,10 +345,9 @@ page_lookup(vnode_t *vp, int64_t start, 
vm_page_busy(pp);
vm_page_undirty(pp);
} else {
-   if (__predict_false(obj-cache != NULL)) {
+   if (vm_page_is_cached(obj, OFF_TO_IDX(start)))
vm_page_cache_free(obj, OFF_TO_IDX(start),
OFF_TO_IDX(start) + 1);
-   }
pp = NULL;
}
break;

Modified: head/sys/fs/tmpfs/tmpfs_vnops.c
==
--- head/sys/fs/tmpfs/tmpfs_vnops.c Mon Apr  9 16:18:55 2012
(r234063)
+++ head/sys/fs/tmpfs/tmpfs_vnops.c Mon Apr  9 17:05:18 2012
(r234064)
@@ -662,7 +662,7 @@ lookupvpg:
VM_OBJECT_UNLOCK(vobj);
error = uiomove_fromphys(vpg, offset, tlen, uio);
} else {
-   if (__predict_false(vobj-cache != NULL))
+   if (vm_page_is_cached(vobj, idx))
vm_page_cache_free(vobj, idx, idx + 1);
VM_OBJECT_UNLOCK(vobj);
vpg = NULL;

Modified: head/sys/vm/vm_page.c
==
--- head/sys/vm/vm_page.c   Mon Apr  9 16:18:55 2012(r234063)
+++ head/sys/vm/vm_page.c   Mon Apr  9 17:05:18 2012(r234064)
@@ -1303,7 +1303,7 @@ vm_page_is_cached(vm_object_t object, vm
 * exist.
 */
VM_OBJECT_LOCK_ASSERT(object, MA_OWNED);
-   if (object-cache == NULL)
+   if (__predict_true(object-cache == NULL))
return (FALSE);
mtx_lock(vm_page_queue_free_mtx);
m = vm_page_cache_lookup(object, pindex);
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Re: svn commit: r233961 - head/sys/x86/x86

2012-04-09 Thread Jaakko Heinonen
On 2012-04-09, John Baldwin wrote:
 I suspect in your case intr_add_cpu() is never called.  I think Attilio is 
 not 
 correct in that it is not called for the BSP.
 
 Yes, it is not called for the BSP in set_interrupt_apic_ids().  This used to 
 work because bit 0 was assigned statically.  Also, in a UP machine
 set_interrupt_apic_ids() is not called at all.
 
 Try this (untested):

I can boot with the patch applied. Thanks!

-- 
Jaakko
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Re: svn commit: r233961 - head/sys/x86/x86

2012-04-09 Thread John Baldwin
On Monday, April 09, 2012 12:58:07 pm Attilio Rao wrote:
 Il 09 aprile 2012 17:34, John Baldwin j...@freebsd.org ha scritto:
  On Monday, April 09, 2012 11:45:11 am Jaakko Heinonen wrote:
 
  Hi,
 
  On 2012-04-06, Justin T. Gibbs wrote:
 Fix interrupt load balancing regression, introduced in revision
 222813, that left all un-pinned interrupts assigned to CPU 0.
  
 sys/x86/x86/intr_machdep.c:
   In intr_shuffle_irqs(), remove CPU_SETOF() call that initialized
   the intr_cpus cpuset to only contain CPU0.
  
   This initialization is too late and nullifies the results of calls
   the intr_add_cpu() that occur much earlier in the boot process.
   Since intr_cpus is statically initialized to the empty set, and
   all processors, including the BSP, already add themselves to
   intr_cpus no special initialization for the BSP is necessary.
 
  My Pentium 4 system hangs on boot after this commit. These are the last
  lines from a verbose boot:
 
  SMP: AP CPU #1 Launched!
  cpu1 AP:
   ID: 0x0100   VER: 0x00050014 LDR: 0x DFR: 0x
lint0: 0x00010700 lint1: 0x0400 TPR: 0x SVR: 0x01ff
timer: 0x000100ef therm: 0x0001 err: 0x00f0 pmc: 0x00010400
 
  The system boots with r233960.
 
  Some information:
 
  CPU: Intel(R) Pentium(R) 4 CPU 2.60GHz (2605.96-MHz 686-class CPU)
Origin = GenuineIntel  Id = 0xf29  Family = f  Model = 2  Stepping =
  9
 
  Features=0xbfebfbffFPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE
Features2=0x4400CNXT-ID,xTPR
  real memory  = 2147483648 (2048 MB)
  avail memory = 2085228544 (1988 MB)
  Event timer LAPIC quality 400
  ACPI APIC Table: A M I  OEMAPIC 
  FreeBSD/SMP: Multiprocessor System Detected: 2 CPUs
  FreeBSD/SMP: 1 package(s) x 1 core(s) x 2 HTT threads
   cpu0 (BSP): APIC ID:  0
   cpu1 (AP/HT): APIC ID:  1
 
  I suspect in your case intr_add_cpu() is never called.  I think Attilio is 
  not
  correct in that it is not called for the BSP.
 
  Yes, it is not called for the BSP in set_interrupt_apic_ids().  This used to
  work because bit 0 was assigned statically.  Also, in a UP machine
  set_interrupt_apic_ids() is not called at all.
 
 But why there is a front-end check for the BSP in set_interrupt_apic_ids()?
 
 Anyway, I think a better fix would be like the attached patch.

This would be fine.  What I would really prefer is to not need the sysinit at
all and be able to do something like the original pre-cpuset code:

static cpuset_t intr_cpus = CPU_INITIAILIZER(0);

Also, with the cpuset variant, I think we could remove the special case check
for the BSP from set_apic_interrupt_ids() as it doesn't hurt to set it
multiple times.   IIRC, the pre-cpuset code kept a separate count which is
why that would have been harmful.

-- 
John Baldwin
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Re: svn commit: r233961 - head/sys/x86/x86

2012-04-09 Thread Attilio Rao
Il 09 aprile 2012 18:14, John Baldwin j...@freebsd.org ha scritto:
 On Monday, April 09, 2012 12:58:07 pm Attilio Rao wrote:
 Il 09 aprile 2012 17:34, John Baldwin j...@freebsd.org ha scritto:
  On Monday, April 09, 2012 11:45:11 am Jaakko Heinonen wrote:
 
  Hi,
 
  On 2012-04-06, Justin T. Gibbs wrote:
     Fix interrupt load balancing regression, introduced in revision
     222813, that left all un-pinned interrupts assigned to CPU 0.
  
     sys/x86/x86/intr_machdep.c:
       In intr_shuffle_irqs(), remove CPU_SETOF() call that initialized
       the intr_cpus cpuset to only contain CPU0.
  
       This initialization is too late and nullifies the results of calls
       the intr_add_cpu() that occur much earlier in the boot process.
       Since intr_cpus is statically initialized to the empty set, and
       all processors, including the BSP, already add themselves to
       intr_cpus no special initialization for the BSP is necessary.
 
  My Pentium 4 system hangs on boot after this commit. These are the last
  lines from a verbose boot:
 
  SMP: AP CPU #1 Launched!
  cpu1 AP:
       ID: 0x0100   VER: 0x00050014 LDR: 0x DFR: 0x
    lint0: 0x00010700 lint1: 0x0400 TPR: 0x SVR: 0x01ff
    timer: 0x000100ef therm: 0x0001 err: 0x00f0 pmc: 0x00010400
 
  The system boots with r233960.
 
  Some information:
 
  CPU: Intel(R) Pentium(R) 4 CPU 2.60GHz (2605.96-MHz 686-class CPU)
    Origin = GenuineIntel  Id = 0xf29  Family = f  Model = 2  Stepping =
  9
 
  Features=0xbfebfbffFPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE
    Features2=0x4400CNXT-ID,xTPR
  real memory  = 2147483648 (2048 MB)
  avail memory = 2085228544 (1988 MB)
  Event timer LAPIC quality 400
  ACPI APIC Table: A M I  OEMAPIC 
  FreeBSD/SMP: Multiprocessor System Detected: 2 CPUs
  FreeBSD/SMP: 1 package(s) x 1 core(s) x 2 HTT threads
   cpu0 (BSP): APIC ID:  0
   cpu1 (AP/HT): APIC ID:  1
 
  I suspect in your case intr_add_cpu() is never called.  I think Attilio is 
  not
  correct in that it is not called for the BSP.
 
  Yes, it is not called for the BSP in set_interrupt_apic_ids().  This used 
  to
  work because bit 0 was assigned statically.  Also, in a UP machine
  set_interrupt_apic_ids() is not called at all.

 But why there is a front-end check for the BSP in set_interrupt_apic_ids()?

 Anyway, I think a better fix would be like the attached patch.

 This would be fine.  What I would really prefer is to not need the sysinit at
 all and be able to do something like the original pre-cpuset code:

 static cpuset_t intr_cpus = CPU_INITIAILIZER(0);

This is more difficult to do because it would require static array
initializations and it would pollute too much the code with compile
time, MAXCPU-dependant details.

 Also, with the cpuset variant, I think we could remove the special case check
 for the BSP from set_apic_interrupt_ids() as it doesn't hurt to set it
 multiple times.   IIRC, the pre-cpuset code kept a separate count which is
 why that would have been harmful.

I'm not sure I follow, a separate count for what?
So do you consider the following patch as a real commit candidate?

Thanks,
Attilio

Index: sys/i386/i386/mp_machdep.c
===
--- sys/i386/i386/mp_machdep.c  (revisione 234064)
+++ sys/i386/i386/mp_machdep.c  (copia locale)
@@ -819,8 +819,6 @@ init_secondary(void)
  * We tell the I/O APIC code about all the CPUs we want to receive
  * interrupts.  If we don't want certain CPUs to receive IRQs we
  * can simply not tell the I/O APIC code about them in this function.
- * We also do not tell it about the BSP since it tells itself about
- * the BSP internally to work with UP kernels and on UP machines.
  */
 static void
 set_interrupt_apic_ids(void)
@@ -831,8 +829,6 @@ set_interrupt_apic_ids(void)
apic_id = cpu_apic_ids[i];
if (apic_id == -1)
continue;
-   if (cpu_info[apic_id].cpu_bsp)
-   continue;
if (cpu_info[apic_id].cpu_disabled)
continue;

Index: sys/i386/i386/machdep.c
===
--- sys/i386/i386/machdep.c (revisione 234064)
+++ sys/i386/i386/machdep.c (copia locale)
@@ -336,6 +336,11 @@ cpu_startup(dummy)
 #ifndef XEN
cpu_setregs();
 #endif
+
+   /*
+* Add BSP interrupt bitmask.
+*/
+   intr_add_cpu(0);
 }

 /*
Index: sys/amd64/amd64/mp_machdep.c
===
--- sys/amd64/amd64/mp_machdep.c(revisione 234064)
+++ sys/amd64/amd64/mp_machdep.c(copia locale)
@@ -785,8 +785,6 @@ init_secondary(void)
  * We tell the I/O APIC code about all the CPUs we want to receive
  * interrupts.  If we don't want certain CPUs to receive IRQs we
  * can simply 

svn commit: r234066 - head/sys/kern

2012-04-09 Thread Alexander Motin
Author: mav
Date: Mon Apr  9 18:24:58 2012
New Revision: 234066
URL: http://svn.freebsd.org/changeset/base/234066

Log:
  Microoptimize cpu_search().
  
  According to profiling, it makes one take 6% of CPU time on hackbench
  with its million of context switches per second, instead of 8% before.

Modified:
  head/sys/kern/sched_ule.c

Modified: head/sys/kern/sched_ule.c
==
--- head/sys/kern/sched_ule.c   Mon Apr  9 17:33:35 2012(r234065)
+++ head/sys/kern/sched_ule.c   Mon Apr  9 18:24:58 2012(r234066)
@@ -594,32 +594,34 @@ cpu_search(const struct cpu_group *cg, s
cpuset_t cpumask;
struct cpu_group *child;
struct tdq *tdq;
-   int cpu, i, hload, lload, load, total, rnd;
+   int cpu, i, hload, lload, load, total, rnd, *rndptr;
 
total = 0;
cpumask = cg-cg_mask;
if (match  CPU_SEARCH_LOWEST) {
lload = INT_MAX;
-   low-cs_load = INT_MAX;
lgroup = *low;
}
if (match  CPU_SEARCH_HIGHEST) {
-   hload = -1;
-   high-cs_load = -1;
+   hload = INT_MIN;
hgroup = *high;
}
 
/* Iterate through the child CPU groups and then remaining CPUs. */
-   for (i = 0, cpu = 0; i = cg-cg_children; ) {
-   if (i = cg-cg_children) {
-   while (cpu = mp_maxid  !CPU_ISSET(cpu, cpumask))
-   cpu++;
-   if (cpu  mp_maxid)
+   for (i = cg-cg_children, cpu = mp_maxid; i = 0; ) {
+   if (i == 0) {
+   while (cpu = 0  !CPU_ISSET(cpu, cpumask))
+   cpu--;
+   if (cpu  0)
break;
child = NULL;
} else
-   child = cg-cg_child[i];
+   child = cg-cg_child[i - 1];
 
+   if (match  CPU_SEARCH_LOWEST)
+   lgroup.cs_cpu = -1;
+   if (match  CPU_SEARCH_HIGHEST)
+   hgroup.cs_cpu = -1;
if (child) {/* Handle child CPU group. */
CPU_NAND(cpumask, child-cg_mask);
switch (match) {
@@ -636,23 +638,23 @@ cpu_search(const struct cpu_group *cg, s
} else {/* Handle child CPU. */
tdq = TDQ_CPU(cpu);
load = tdq-tdq_load * 256;
-   rnd = DPCPU_SET(randomval,
-   DPCPU_GET(randomval) * 69069 + 5)  26;
+   rndptr = DPCPU_PTR(randomval);
+   rnd = (*rndptr = *rndptr * 69069 + 5)  26;
if (match  CPU_SEARCH_LOWEST) {
if (cpu == low-cs_prefer)
load -= 64;
/* If that CPU is allowed and get data. */
-   if (CPU_ISSET(cpu, lgroup.cs_mask) 
-   tdq-tdq_lowpri  lgroup.cs_pri 
-   tdq-tdq_load = lgroup.cs_limit) {
+   if (tdq-tdq_lowpri  lgroup.cs_pri 
+   tdq-tdq_load = lgroup.cs_limit 
+   CPU_ISSET(cpu, lgroup.cs_mask)) {
lgroup.cs_cpu = cpu;
lgroup.cs_load = load - rnd;
}
}
if (match  CPU_SEARCH_HIGHEST)
-   if (CPU_ISSET(cpu, hgroup.cs_mask) 
-   tdq-tdq_load = hgroup.cs_limit 
-   tdq-tdq_transferable) {
+   if (tdq-tdq_load = hgroup.cs_limit 
+   tdq-tdq_transferable 
+   CPU_ISSET(cpu, hgroup.cs_mask)) {
hgroup.cs_cpu = cpu;
hgroup.cs_load = load - rnd;
}
@@ -661,7 +663,7 @@ cpu_search(const struct cpu_group *cg, s
 
/* We have info about child item. Compare it. */
if (match  CPU_SEARCH_LOWEST) {
-   if (lgroup.cs_load != INT_MAX 
+   if (lgroup.cs_cpu = 0 
(load  lload ||
 (load == lload  lgroup.cs_load  low-cs_load))) 
{
lload = load;
@@ -670,17 +672,19 @@ cpu_search(const struct cpu_group *cg, s
}
}
if (match  CPU_SEARCH_HIGHEST)
-   if (hgroup.cs_load = 0 
+   if (hgroup.cs_cpu = 0 
  

Re: svn commit: r233961 - head/sys/x86/x86

2012-04-09 Thread John Baldwin
On Monday, April 09, 2012 1:59:13 pm Attilio Rao wrote:
 Il 09 aprile 2012 18:14, John Baldwin j...@freebsd.org ha scritto:
  On Monday, April 09, 2012 12:58:07 pm Attilio Rao wrote:
  Il 09 aprile 2012 17:34, John Baldwin j...@freebsd.org ha scritto:
   On Monday, April 09, 2012 11:45:11 am Jaakko Heinonen wrote:
  
   Hi,
  
   On 2012-04-06, Justin T. Gibbs wrote:
  Fix interrupt load balancing regression, introduced in revision
  222813, that left all un-pinned interrupts assigned to CPU 0.
   
  sys/x86/x86/intr_machdep.c:
In intr_shuffle_irqs(), remove CPU_SETOF() call that initialized
the intr_cpus cpuset to only contain CPU0.
   
This initialization is too late and nullifies the results of calls
the intr_add_cpu() that occur much earlier in the boot process.
Since intr_cpus is statically initialized to the empty set, and
all processors, including the BSP, already add themselves to
intr_cpus no special initialization for the BSP is necessary.
  
   My Pentium 4 system hangs on boot after this commit. These are the last
   lines from a verbose boot:
  
   SMP: AP CPU #1 Launched!
   cpu1 AP:
ID: 0x0100   VER: 0x00050014 LDR: 0x DFR: 0x
 lint0: 0x00010700 lint1: 0x0400 TPR: 0x SVR: 0x01ff
 timer: 0x000100ef therm: 0x0001 err: 0x00f0 pmc: 0x00010400
  
   The system boots with r233960.
  
   Some information:
  
   CPU: Intel(R) Pentium(R) 4 CPU 2.60GHz (2605.96-MHz 686-class CPU)
 Origin = GenuineIntel  Id = 0xf29  Family = f  Model = 2  Stepping =
   9
  
   
Features=0xbfebfbffFPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE
 Features2=0x4400CNXT-ID,xTPR
   real memory  = 2147483648 (2048 MB)
   avail memory = 2085228544 (1988 MB)
   Event timer LAPIC quality 400
   ACPI APIC Table: A M I  OEMAPIC 
   FreeBSD/SMP: Multiprocessor System Detected: 2 CPUs
   FreeBSD/SMP: 1 package(s) x 1 core(s) x 2 HTT threads
cpu0 (BSP): APIC ID:  0
cpu1 (AP/HT): APIC ID:  1
  
   I suspect in your case intr_add_cpu() is never called.  I think Attilio 
   is not
   correct in that it is not called for the BSP.
  
   Yes, it is not called for the BSP in set_interrupt_apic_ids().  This 
   used to
   work because bit 0 was assigned statically.  Also, in a UP machine
   set_interrupt_apic_ids() is not called at all.
 
  But why there is a front-end check for the BSP in set_interrupt_apic_ids()?
 
  Anyway, I think a better fix would be like the attached patch.
 
  This would be fine.  What I would really prefer is to not need the sysinit 
  at
  all and be able to do something like the original pre-cpuset code:
 
  static cpuset_t intr_cpus = CPU_INITIAILIZER(0);
 
 This is more difficult to do because it would require static array
 initializations and it would pollute too much the code with compile
 time, MAXCPU-dependant details.
 
  Also, with the cpuset variant, I think we could remove the special case 
  check
  for the BSP from set_apic_interrupt_ids() as it doesn't hurt to set it
  multiple times.   IIRC, the pre-cpuset code kept a separate count which is
  why that would have been harmful.
 
 I'm not sure I follow, a separate count for what?

The pre-cpuset code used a separate count IIRC.  That is why duplicate calls
to intr_add_cpu() used to be bad.  However, they are no longer bad.

 So do you consider the following patch as a real commit candidate?

Yes, modulo a nit:

 Index: sys/i386/i386/machdep.c
 ===
 --- sys/i386/i386/machdep.c (revisione 234064)
 +++ sys/i386/i386/machdep.c (copia locale)
 @@ -336,6 +336,11 @@ cpu_startup(dummy)
  #ifndef XEN
 cpu_setregs();
  #endif
 +
 +   /*
 +* Add BSP interrupt bitmask.
 +*/
 +   intr_add_cpu(0);
  }

I would make this a single line comment and say:
Add BSP as an interrupt target.

(More closely matches the original comment from intr_machdep.c).

-- 
John Baldwin
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svn commit: r234069 - head/sbin/savecore

2012-04-09 Thread Robert Millan
Author: rmh
Date: Mon Apr  9 20:55:23 2012
New Revision: 234069
URL: http://svn.freebsd.org/changeset/base/234069

Log:
  Include signal.h (for SIGINFO).

Modified:
  head/sbin/savecore/savecore.c

Modified: head/sbin/savecore/savecore.c
==
--- head/sbin/savecore/savecore.c   Mon Apr  9 19:40:52 2012
(r234068)
+++ head/sbin/savecore/savecore.c   Mon Apr  9 20:55:23 2012
(r234069)
@@ -72,6 +72,7 @@ __FBSDID($FreeBSD$);
 #include fcntl.h
 #include fstab.h
 #include paths.h
+#include signal.h
 #include stdarg.h
 #include stdio.h
 #include stdlib.h
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svn commit: r234070 - head/usr.sbin/powerd

2012-04-09 Thread Robert Millan
Author: rmh
Date: Mon Apr  9 20:59:14 2012
New Revision: 234070
URL: http://svn.freebsd.org/changeset/base/234070

Log:
  Improve error reporting when no cpufreq(4) support is available.
  
  Reviewed by:  njl, acpi

Modified:
  head/usr.sbin/powerd/powerd.c

Modified: head/usr.sbin/powerd/powerd.c
==
--- head/usr.sbin/powerd/powerd.c   Mon Apr  9 20:55:23 2012
(r234069)
+++ head/usr.sbin/powerd/powerd.c   Mon Apr  9 20:59:14 2012
(r234070)
@@ -44,6 +44,7 @@ __FBSDID($FreeBSD$);
 #include stdio.h
 #include stdlib.h
 #include string.h
+#include sysexits.h
 #include unistd.h
 
 #ifdef __i386__
@@ -536,7 +537,7 @@ main(int argc, char * argv[])
err(1, lookup kern.cp_times);
len = 4;
if (sysctlnametomib(dev.cpu.0.freq, freq_mib, len))
-   err(1, lookup freq);
+   err(EX_UNAVAILABLE, no cpufreq(4) support -- aborting);
len = 4;
if (sysctlnametomib(dev.cpu.0.freq_levels, levels_mib, len))
err(1, lookup freq_levels);
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Re: svn commit: r233773 - head/usr.sbin/arp

2012-04-09 Thread Qing Li
You missed my points.

That if check as part of r201282 was meant to resolve a couple of
issues related
to PPP links, as noted in my commit message. In this PPP/proxy
resolution context
the error message applies, which is why I actually used the word context in my
previous reply.

Your removing of that code will break the fixes committed in r201282.

You don't need to try so hard to be pedantic ...

When I say let's put in the code to support RFC 3012 properly, I
mean exactly that,
i.e., put code in which makes RFC3012 work without breaking the previous fixes.
And if there are other cases we need to cover, well, let's make sure we do.
Do you have another definition of a proper fix ?

I can't quite decipher the example you described in this email.

Could you please give me a bit more information in a private email so I can have
a better look at the issue, and possibly make a suggestion for an alternative
patch ?

--Qing


2012/4/8 Gleb Smirnoff gleb...@freebsd.org:
  Qing,

 On Sun, Apr 08, 2012 at 10:41:11AM -0700, Qing Li wrote:
 Q This is not the right way to support RFC3021.
 Q
 Q The code you removed is used for checking against attempt at adding
 Q duplicate entry.
 Q Both the message and the code apply in that context. I tried to state
 Q clearly and concisely
 Q what r201282 was intended in solving and was verified by actual users
 Q who ran into the
 Q described problems.

 How does the message apply?

 On a 10.0/9.0 prior to my commit:

 #ifconfig em0
 em0: flags=8843UP,BROADCAST,RUNNING,SIMPLEX,MULTICAST metric 0 mtu 1500
        
 options=4219bRXCSUM,TXCSUM,VLAN_MTU,VLAN_HWTAGGING,VLAN_HWCSUM,TSO4,WOL_MAGIC,VLAN_HWTSO
        ether f0:de:f1:6c:5b:fa
        inet x.x.x.111 netmask 0xffe0 broadcast x.x.x.127
        nd6 options=29PERFORMNUD,IFDISABLED,AUTO_LINKLOCAL
        media: Ethernet autoselect (100baseTX full-duplex)
        status: active
 # arp -an
 ? (x.x.x.97) at 00:00:5e:00:01:61 on em0 expires in 1198 seconds [ethernet]
 ? (x.x.x.101) at 00:e0:81:5a:22:49 on em0 expires in 618 seconds [ethernet]
 ? (x.x.x.111) at f0:de:f1:6c:5b:fa on em0 permanent [ethernet]
 ? (x.x.x.116) at 00:26:18:6a:ea:02 on em0 expires in 1128 seconds [ethernet]
 # # arp -s 81.19.64.96 0:0:0:0:0:0
 set: proxy entry exists for non 802 device

 And how does this apply? Where is the proxy entry mentioned? Where is the
 non 802 device?

 Look at the code before r201282 and see that the message was for absolutely
 unrelated case.

 And here is behavior of 6.1-RELEASE, that is prior to your new ARP work:

 # ifconfig fxp0
 fxp0: flags=8843UP,BROADCAST,RUNNING,SIMPLEX,MULTICAST mtu 1500
        options=8VLAN_MTU
        inet x.x.x.134 netmask 0xfffc broadcast x.x.x.135
        ether 00:20:ed:6e:9c:f9
        media: Ethernet autoselect (10baseT/UTP)
        status: active
 # arp -s x.x.x.132 0:0:0:0:0:0
 set: can only proxy for x.x.x.132

 As you see, the error message was an other one.

 Q If we actually need to support RFC 3021, then better do it properly.

 What do you mean here under properly? RFC3021 says that network address
 in a /31 network is a common address. Thus it should be possible to have
 an ARP entry for it.

 Anyway this change isn't about RFC3021. A /31 network is just a case when we
 need to set ARP entry for network address.

 --
 Totus tuus, Glebius.
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svn commit: r234072 - head/sys/kern

2012-04-09 Thread Jilles Tjoelker
Author: jilles
Date: Mon Apr  9 21:58:58 2012
New Revision: 234072
URL: http://svn.freebsd.org/changeset/base/234072

Log:
  Remove unused and wrong SA_PROC internal signal property.
  
  The SA_PROC signal property indicated whether each signal number is directed
  at a specific thread or at the process in general. However, that depends on
  how the signal was generated and not on the signal number. SA_PROC was not
  used.

Modified:
  head/sys/kern/kern_sig.c

Modified: head/sys/kern/kern_sig.c
==
--- head/sys/kern/kern_sig.cMon Apr  9 21:29:58 2012(r234071)
+++ head/sys/kern/kern_sig.cMon Apr  9 21:58:58 2012(r234072)
@@ -194,40 +194,39 @@ SYSCTL_INT(_kern, OID_AUTO, nodump_cored
 #defineSA_IGNORE   0x10/* ignore by default */
 #defineSA_CONT 0x20/* continue if suspended */
 #defineSA_CANTMASK 0x40/* non-maskable, catchable */
-#defineSA_PROC 0x80/* deliverable to any thread */
 
 static int sigproptbl[NSIG] = {
-SA_KILL|SA_PROC,   /* SIGHUP */
-SA_KILL|SA_PROC,   /* SIGINT */
-SA_KILL|SA_CORE|SA_PROC,   /* SIGQUIT */
+SA_KILL,   /* SIGHUP */
+SA_KILL,   /* SIGINT */
+SA_KILL|SA_CORE,   /* SIGQUIT */
 SA_KILL|SA_CORE,   /* SIGILL */
 SA_KILL|SA_CORE,   /* SIGTRAP */
 SA_KILL|SA_CORE,   /* SIGABRT */
-SA_KILL|SA_CORE|SA_PROC,   /* SIGEMT */
+SA_KILL|SA_CORE,   /* SIGEMT */
 SA_KILL|SA_CORE,   /* SIGFPE */
-SA_KILL|SA_PROC,   /* SIGKILL */
+SA_KILL,   /* SIGKILL */
 SA_KILL|SA_CORE,   /* SIGBUS */
 SA_KILL|SA_CORE,   /* SIGSEGV */
 SA_KILL|SA_CORE,   /* SIGSYS */
-SA_KILL|SA_PROC,   /* SIGPIPE */
-SA_KILL|SA_PROC,   /* SIGALRM */
-SA_KILL|SA_PROC,   /* SIGTERM */
-SA_IGNORE|SA_PROC, /* SIGURG */
-SA_STOP|SA_PROC,   /* SIGSTOP */
-SA_STOP|SA_TTYSTOP|SA_PROC,/* SIGTSTP */
-SA_IGNORE|SA_CONT|SA_PROC, /* SIGCONT */
-SA_IGNORE|SA_PROC, /* SIGCHLD */
-SA_STOP|SA_TTYSTOP|SA_PROC,/* SIGTTIN */
-SA_STOP|SA_TTYSTOP|SA_PROC,/* SIGTTOU */
-SA_IGNORE|SA_PROC, /* SIGIO */
+SA_KILL,   /* SIGPIPE */
+SA_KILL,   /* SIGALRM */
+SA_KILL,   /* SIGTERM */
+SA_IGNORE, /* SIGURG */
+SA_STOP,   /* SIGSTOP */
+SA_STOP|SA_TTYSTOP,/* SIGTSTP */
+SA_IGNORE|SA_CONT, /* SIGCONT */
+SA_IGNORE, /* SIGCHLD */
+SA_STOP|SA_TTYSTOP,/* SIGTTIN */
+SA_STOP|SA_TTYSTOP,/* SIGTTOU */
+SA_IGNORE, /* SIGIO */
 SA_KILL,   /* SIGXCPU */
 SA_KILL,   /* SIGXFSZ */
-SA_KILL|SA_PROC,   /* SIGVTALRM */
-SA_KILL|SA_PROC,   /* SIGPROF */
-SA_IGNORE|SA_PROC, /* SIGWINCH  */
-SA_IGNORE|SA_PROC, /* SIGINFO */
-SA_KILL|SA_PROC,   /* SIGUSR1 */
-SA_KILL|SA_PROC,   /* SIGUSR2 */
+SA_KILL,   /* SIGVTALRM */
+SA_KILL,   /* SIGPROF */
+SA_IGNORE, /* SIGWINCH  */
+SA_IGNORE, /* SIGINFO */
+SA_KILL,   /* SIGUSR1 */
+SA_KILL,   /* SIGUSR2 */
 };
 
 static void reschedule_signals(struct proc *p, sigset_t block, int flags);
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Re: svn commit: r233961 - head/sys/x86/x86

2012-04-09 Thread Attilio Rao
Il 09 aprile 2012 19:35, John Baldwin j...@freebsd.org ha scritto:
 On Monday, April 09, 2012 1:59:13 pm Attilio Rao wrote:
 Il 09 aprile 2012 18:14, John Baldwin j...@freebsd.org ha scritto:
  On Monday, April 09, 2012 12:58:07 pm Attilio Rao wrote:
  Il 09 aprile 2012 17:34, John Baldwin j...@freebsd.org ha scritto:
   On Monday, April 09, 2012 11:45:11 am Jaakko Heinonen wrote:
  
   Hi,
  
   On 2012-04-06, Justin T. Gibbs wrote:
  Fix interrupt load balancing regression, introduced in revision
  222813, that left all un-pinned interrupts assigned to CPU 0.
   
  sys/x86/x86/intr_machdep.c:
    In intr_shuffle_irqs(), remove CPU_SETOF() call that initialized
    the intr_cpus cpuset to only contain CPU0.
   
    This initialization is too late and nullifies the results of 
calls
    the intr_add_cpu() that occur much earlier in the boot process.
    Since intr_cpus is statically initialized to the empty set, and
    all processors, including the BSP, already add themselves to
    intr_cpus no special initialization for the BSP is necessary.
  
   My Pentium 4 system hangs on boot after this commit. These are the last
   lines from a verbose boot:
  
   SMP: AP CPU #1 Launched!
   cpu1 AP:
        ID: 0x0100   VER: 0x00050014 LDR: 0x DFR: 0x
     lint0: 0x00010700 lint1: 0x0400 TPR: 0x SVR: 0x01ff
     timer: 0x000100ef therm: 0x0001 err: 0x00f0 pmc: 0x00010400
  
   The system boots with r233960.
  
   Some information:
  
   CPU: Intel(R) Pentium(R) 4 CPU 2.60GHz (2605.96-MHz 686-class CPU)
     Origin = GenuineIntel  Id = 0xf29  Family = f  Model = 2  Stepping 
   =
   9
  
  
 Features=0xbfebfbffFPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE
     Features2=0x4400CNXT-ID,xTPR
   real memory  = 2147483648 (2048 MB)
   avail memory = 2085228544 (1988 MB)
   Event timer LAPIC quality 400
   ACPI APIC Table: A M I  OEMAPIC 
   FreeBSD/SMP: Multiprocessor System Detected: 2 CPUs
   FreeBSD/SMP: 1 package(s) x 1 core(s) x 2 HTT threads
    cpu0 (BSP): APIC ID:  0
    cpu1 (AP/HT): APIC ID:  1
  
   I suspect in your case intr_add_cpu() is never called.  I think Attilio 
   is not
   correct in that it is not called for the BSP.
  
   Yes, it is not called for the BSP in set_interrupt_apic_ids().  This 
   used to
   work because bit 0 was assigned statically.  Also, in a UP machine
   set_interrupt_apic_ids() is not called at all.
 
  But why there is a front-end check for the BSP in 
  set_interrupt_apic_ids()?
 
  Anyway, I think a better fix would be like the attached patch.
 
  This would be fine.  What I would really prefer is to not need the sysinit 
  at
  all and be able to do something like the original pre-cpuset code:
 
  static cpuset_t intr_cpus = CPU_INITIAILIZER(0);

 This is more difficult to do because it would require static array
 initializations and it would pollute too much the code with compile
 time, MAXCPU-dependant details.

  Also, with the cpuset variant, I think we could remove the special case 
  check
  for the BSP from set_apic_interrupt_ids() as it doesn't hurt to set it
  multiple times.   IIRC, the pre-cpuset code kept a separate count which is
  why that would have been harmful.

 I'm not sure I follow, a separate count for what?

 The pre-cpuset code used a separate count IIRC.  That is why duplicate calls
 to intr_add_cpu() used to be bad.  However, they are no longer bad.

 So do you consider the following patch as a real commit candidate?

 Yes, modulo a nit:

 Index: sys/i386/i386/machdep.c
 ===
 --- sys/i386/i386/machdep.c     (revisione 234064)
 +++ sys/i386/i386/machdep.c     (copia locale)
 @@ -336,6 +336,11 @@ cpu_startup(dummy)
  #ifndef XEN
         cpu_setregs();
  #endif
 +
 +       /*
 +        * Add BSP interrupt bitmask.
 +        */
 +       intr_add_cpu(0);
  }

 I would make this a single line comment and say:
 Add BSP as an interrupt target.

Please note that all the other comments in cpu_startup() is 3 lines
even when single so I'd stick with that.
I will change the wording as you wish though.

Attilio


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svn commit: r234074 - in head/sys: amd64/amd64 i386/i386

2012-04-09 Thread Attilio Rao
Author: attilio
Date: Mon Apr  9 22:41:19 2012
New Revision: 234074
URL: http://svn.freebsd.org/changeset/base/234074

Log:
  BSP is not added to the mask of valid target CPUs for interrupts
  in set_apic_interrupt_ids(). Besides, set_apic_interrupts_ids() is not
  called in the !SMP case too.
  Fix this by:
  - Adding the BSP as an interrupt target directly in cpu_startup().
  - Remove an obsolete optimization where the BSP are skipped in
set_apic_interrupt_ids().
  
  Reported by:  jh
  Reviewed by:  jhb
  MFC after:3 days
  X-MFC:r233961
  Pointy hat to:me

Modified:
  head/sys/amd64/amd64/machdep.c
  head/sys/amd64/amd64/mp_machdep.c
  head/sys/i386/i386/machdep.c
  head/sys/i386/i386/mp_machdep.c

Modified: head/sys/amd64/amd64/machdep.c
==
--- head/sys/amd64/amd64/machdep.c  Mon Apr  9 22:01:43 2012
(r234073)
+++ head/sys/amd64/amd64/machdep.c  Mon Apr  9 22:41:19 2012
(r234074)
@@ -295,6 +295,11 @@ cpu_startup(dummy)
vm_pager_bufferinit();
 
cpu_setregs();
+
+   /*
+* Add BSP as an interrupt target.
+*/
+   intr_add_cpu(0);
 }
 
 /*

Modified: head/sys/amd64/amd64/mp_machdep.c
==
--- head/sys/amd64/amd64/mp_machdep.c   Mon Apr  9 22:01:43 2012
(r234073)
+++ head/sys/amd64/amd64/mp_machdep.c   Mon Apr  9 22:41:19 2012
(r234074)
@@ -785,8 +785,6 @@ init_secondary(void)
  * We tell the I/O APIC code about all the CPUs we want to receive
  * interrupts.  If we don't want certain CPUs to receive IRQs we
  * can simply not tell the I/O APIC code about them in this function.
- * We also do not tell it about the BSP since it tells itself about
- * the BSP internally to work with UP kernels and on UP machines.
  */
 static void
 set_interrupt_apic_ids(void)
@@ -797,8 +795,6 @@ set_interrupt_apic_ids(void)
apic_id = cpu_apic_ids[i];
if (apic_id == -1)
continue;
-   if (cpu_info[apic_id].cpu_bsp)
-   continue;
if (cpu_info[apic_id].cpu_disabled)
continue;
 

Modified: head/sys/i386/i386/machdep.c
==
--- head/sys/i386/i386/machdep.cMon Apr  9 22:01:43 2012
(r234073)
+++ head/sys/i386/i386/machdep.cMon Apr  9 22:41:19 2012
(r234074)
@@ -336,6 +336,11 @@ cpu_startup(dummy)
 #ifndef XEN
cpu_setregs();
 #endif
+
+   /*
+* Add BSP as an interrupt target.
+*/
+   intr_add_cpu(0);
 }
 
 /*

Modified: head/sys/i386/i386/mp_machdep.c
==
--- head/sys/i386/i386/mp_machdep.c Mon Apr  9 22:01:43 2012
(r234073)
+++ head/sys/i386/i386/mp_machdep.c Mon Apr  9 22:41:19 2012
(r234074)
@@ -819,8 +819,6 @@ init_secondary(void)
  * We tell the I/O APIC code about all the CPUs we want to receive
  * interrupts.  If we don't want certain CPUs to receive IRQs we
  * can simply not tell the I/O APIC code about them in this function.
- * We also do not tell it about the BSP since it tells itself about
- * the BSP internally to work with UP kernels and on UP machines.
  */
 static void
 set_interrupt_apic_ids(void)
@@ -831,8 +829,6 @@ set_interrupt_apic_ids(void)
apic_id = cpu_apic_ids[i];
if (apic_id == -1)
continue;
-   if (cpu_info[apic_id].cpu_bsp)
-   continue;
if (cpu_info[apic_id].cpu_disabled)
continue;
 
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Re: svn commit: r234074 - in head/sys: amd64/amd64 i386/i386

2012-04-09 Thread Marius Strobl
On Mon, Apr 09, 2012 at 10:41:19PM +, Attilio Rao wrote:
 Author: attilio
 Date: Mon Apr  9 22:41:19 2012
 New Revision: 234074
 URL: http://svn.freebsd.org/changeset/base/234074
 
 Log:
   BSP is not added to the mask of valid target CPUs for interrupts
   in set_apic_interrupt_ids(). Besides, set_apic_interrupts_ids() is not
   called in the !SMP case too.
   Fix this by:
   - Adding the BSP as an interrupt target directly in cpu_startup().
   - Remove an obsolete optimization where the BSP are skipped in
 set_apic_interrupt_ids().
   
   Reported by:jh
   Reviewed by:jhb
   MFC after:  3 days
   X-MFC:  r233961
   Pointy hat to:  me
 
 Modified:
   head/sys/amd64/amd64/machdep.c
   head/sys/amd64/amd64/mp_machdep.c
   head/sys/i386/i386/machdep.c
   head/sys/i386/i386/mp_machdep.c
 
 Modified: head/sys/amd64/amd64/machdep.c
 ==
 --- head/sys/amd64/amd64/machdep.cMon Apr  9 22:01:43 2012
 (r234073)
 +++ head/sys/amd64/amd64/machdep.cMon Apr  9 22:41:19 2012
 (r234074)
 @@ -295,6 +295,11 @@ cpu_startup(dummy)
   vm_pager_bufferinit();
  
   cpu_setregs();
 +
 + /*
 +  * Add BSP as an interrupt target.
 +  */
 + intr_add_cpu(0);
  }

If I'm not mistaken, intr_add_cpu() is under #ifdef SMP, so it should be
here as well.

Marius

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Re: svn commit: r234074 - in head/sys: amd64/amd64 i386/i386

2012-04-09 Thread Attilio Rao
Il 10 aprile 2012 00:09, Marius Strobl mar...@alchemy.franken.de ha scritto:
 On Mon, Apr 09, 2012 at 10:41:19PM +, Attilio Rao wrote:
 Author: attilio
 Date: Mon Apr  9 22:41:19 2012
 New Revision: 234074
 URL: http://svn.freebsd.org/changeset/base/234074

 Log:
   BSP is not added to the mask of valid target CPUs for interrupts
   in set_apic_interrupt_ids(). Besides, set_apic_interrupts_ids() is not
   called in the !SMP case too.
   Fix this by:
   - Adding the BSP as an interrupt target directly in cpu_startup().
   - Remove an obsolete optimization where the BSP are skipped in
     set_apic_interrupt_ids().

   Reported by:        jh
   Reviewed by:        jhb
   MFC after:  3 days
   X-MFC:              r233961
   Pointy hat to:      me

 Modified:
   head/sys/amd64/amd64/machdep.c
   head/sys/amd64/amd64/mp_machdep.c
   head/sys/i386/i386/machdep.c
   head/sys/i386/i386/mp_machdep.c

 Modified: head/sys/amd64/amd64/machdep.c
 ==
 --- head/sys/amd64/amd64/machdep.c    Mon Apr  9 22:01:43 2012        
 (r234073)
 +++ head/sys/amd64/amd64/machdep.c    Mon Apr  9 22:41:19 2012        
 (r234074)
 @@ -295,6 +295,11 @@ cpu_startup(dummy)
       vm_pager_bufferinit();

       cpu_setregs();
 +
 +     /*
 +      * Add BSP as an interrupt target.
 +      */
 +     intr_add_cpu(0);
  }

 If I'm not mistaken, intr_add_cpu() is under #ifdef SMP, so it should be
 here as well.

You are right, sorry, I did forgot to test without SMP.
I think we still need intr_add_cpu() on cpu_startup() because of the
case smp_disabled = 1.
I think the attached patch should make its dirty job, opinion?

Thanks,
Attilio

Index: sys/i386/include/intr_machdep.h
===
--- sys/i386/include/intr_machdep.h (revisione 234073)
+++ sys/i386/include/intr_machdep.h (copia locale)
@@ -131,9 +131,7 @@ int elcr_probe(void);
 enum intr_trigger elcr_read_trigger(u_int irq);
 void   elcr_resume(void);
 void   elcr_write_trigger(u_int irq, enum intr_trigger trigger);
-#ifdef SMP
 void   intr_add_cpu(u_int cpu);
-#endif
 intintr_add_handler(const char *name, int vector, driver_filter_t filter,
 driver_intr_t handler, void *arg, enum intr_type flags, void **cookiep);
 #ifdef SMP
Index: sys/amd64/include/intr_machdep.h
===
--- sys/amd64/include/intr_machdep.h(revisione 234073)
+++ sys/amd64/include/intr_machdep.h(copia locale)
@@ -140,9 +140,7 @@ int elcr_probe(void);
 enum intr_trigger elcr_read_trigger(u_int irq);
 void   elcr_resume(void);
 void   elcr_write_trigger(u_int irq, enum intr_trigger trigger);
-#ifdef SMP
 void   intr_add_cpu(u_int cpu);
-#endif
 intintr_add_handler(const char *name, int vector, driver_filter_t filter,
 driver_intr_t handler, void *arg, enum
intr_type flags,
 void **cookiep);
Index: sys/x86/x86/intr_machdep.c
===
--- sys/x86/x86/intr_machdep.c  (revisione 234073)
+++ sys/x86/x86/intr_machdep.c  (copia locale)
@@ -446,16 +446,34 @@ DB_SHOW_COMMAND(irqs, db_show_irqs)
 }
 #endif

-#ifdef SMP
 /*
  * Support for balancing interrupt sources across CPUs.  For now we just
  * allocate CPUs round-robin.
  */

 static cpuset_t intr_cpus;
+#ifdef SMP
 static int current_cpu;
+#endif

 /*
+ * Add a CPU to our mask of valid CPUs that can be destinations of
+ * interrupts.
+ */
+void
+intr_add_cpu(u_int cpu)
+{
+
+   if (cpu = MAXCPU)
+   panic(%s: Invalid CPU ID, __func__);
+   if (bootverbose)
+   printf(INTR: Adding CPU %u as a target\n, cpu);
+
+   CPU_SET(cpu, intr_cpus);
+}
+
+#ifdef SMP
+/*
  * Return the CPU that the next interrupt source should use.  For now
  * this just returns the next local APIC according to round-robin.
  */
@@ -492,23 +510,6 @@ intr_bind(u_int vector, u_char cpu)
 }

 /*
- * Add a CPU to our mask of valid CPUs that can be destinations of
- * interrupts.
- */
-void
-intr_add_cpu(u_int cpu)
-{
-
-   if (cpu = MAXCPU)
-   panic(%s: Invalid CPU ID, __func__);
-   if (bootverbose)
-   printf(INTR: Adding local APIC %d as a target\n,
-   cpu_apic_ids[cpu]);
-
-   CPU_SET(cpu, intr_cpus);
-}
-
-/*
  * Distribute all the interrupt sources among the available CPUs once the
  * AP's have been launched.
  */
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Re: svn commit: r232491 - in head/sys: amd64/include i386/include pc98/include x86/include

2012-04-09 Thread Bruce Evans

On Mon, 9 Apr 2012, David Schultz wrote:


On Sun, Mar 04, 2012, Tijl Coosemans wrote:

Log:
  Copy amd64 float.h to x86 and merge with i386 float.h. Replace
  amd64/i386/pc98 float.h with stubs.

[...]

--- head/sys/amd64/include/float.h  Sun Mar  4 12:52:48 2012
(r232490, copy source)
+++ head/sys/x86/include/float.hSun Mar  4 14:00:32 2012
(r232491)
@@ -42,7 +42,11 @@ __END_DECLS
 #define FLT_RADIX  2   /* b */
 #define FLT_ROUNDS __flt_rounds()
 #if __ISO_C_VISIBLE = 1999
+#ifdef _LP64
 #defineFLT_EVAL_METHOD 0   /* no promotions */
+#else
+#defineFLT_EVAL_METHOD (-1)/* i387 semantics 
are...interesting */
+#endif
 #defineDECIMAL_DIG 21  /* max precision in decimal 
digits */
 #endif


The implication of this code is that FLT_EVAL_METHOD depends on
the size of a long, which it does not.  Instead, it depends on
whether SSE2 support is guaranteed to be present.  If anything,
the test should be something like #ifndef __i386__.


Actually, it depends on whether both SSE1 and SSE2 support are
guaranteed to be used.  The i386 ifdef is wrong too (as is the old
fixed value for i386), since clang with SSE support breaks the abstract
i386 machine by actually using SSE; with gcc, this breakage is under
control of the option -mfpmath=unit which defaults to unit=i387.
Also, float_t and double_t must match FLT_EVAL_METHOD.

I use the following hack to work around the clang breakage in libm:

% Index: math.h
% ===
% RCS file: /home/ncvs/src/lib/msun/src/math.h,v
% retrieving revision 1.82
% diff -u -2 -r1.82 math.h
% --- math.h12 Nov 2011 19:55:48 -  1.82
% +++ math.h4 Jan 2012 05:09:51 -
% @@ -125,4 +130,10 @@
%  : __signbitl(x))
% 
% +#ifdef __SSE_MATH__

% +#define  __float_t   float
% +#endif
% +#ifdef __SSE2_MATH__
% +#define  __double_t  double
% +#endif
%  typedef  __double_t  double_t;
%  typedef  __float_t   float_t;

I forgot to hack on FLT_EVAL_METHOD similarly.  The fixed value of (-1)
for i386 is sort of fail-safe, since it says that the evaluation method
is indeterminate, so the code must assume the worst.  The normal i386
types for float_t and double_t are also sort of fail-safe, since they
are larger than necessary.  They just cause pessimal code.  So would
FLT_EVAL_METHOD = -1, and I only hacked on the types since my tests
only cover the pessimizations for the types.

Note that the compiler builtin __FLT_EVAL_METHOD is unusable, since its
value is almost always wrong.  With gcc, it is wrong by default (2) but
is changed correctly to 0 by -mfpmath=sse.  With clang, it is wrong
by default (0), but becomes correct with SSE1 and SSE2.  With only SSE1,
there are even more possibilities for the float evaluation method, but
doubles must be evaluated using the i387 so FLT_EVAL_METHOD must remain
as -1.

Examples:
- clang -march=athlon-xp.  Athlon-XP only has SSE1, and clang evaluates
  float expressions using SSE1 but double expressions using i387.  This
  matches float_t = float and double_t = long double given by the above.
  FLT_EVAL_METHOD = -1 remains correct.
- similarly for gcc -march=athlon-xp -mfpmath=sse.
- clang -march=athlon64.  Athlon64 has both SSE1 and SSE2, and clang
  evaluates both float and double expressions using SSE*.  This matches
  float_t = float and double_t = double given by the above.
  FLT_EVAL_METHOD = -1 is now wrong.
- similarly for gcc -march=athlon64 -mfpmath=sse.  SSE* use can also be
  controlled by -msse[12] (instead of march), but -mfpmath doesn't
  distinguish between SSE1 and SSE2, so there seems to be no way to
  use SSE2 generally and SSE1 for FP without also using SSE2 for FP.

Bruce
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svn commit: r234077 - head/share/examples/csh

2012-04-09 Thread Eitan Adler
Author: eadler
Date: Tue Apr 10 01:49:31 2012
New Revision: 234077
URL: http://svn.freebsd.org/changeset/base/234077

Log:
  Update examples with corrections from the author
  
  PR:   ports/160689
  Submitted by: mickael.mail...@gmail.com
  Approved by:  cperciva (implicit)
  MFC after:1 days (with r233429)

Modified:
  head/share/examples/csh/dot.cshrc

Modified: head/share/examples/csh/dot.cshrc
==
--- head/share/examples/csh/dot.cshrc   Tue Apr 10 01:26:58 2012
(r234076)
+++ head/share/examples/csh/dot.cshrc   Tue Apr 10 01:49:31 2012
(r234077)
@@ -29,11 +29,11 @@ complete service'c/-/(e l r v)/' 'p/1
 complete kldunload 'n@*@`kldstat | awk \{sub\(\/\.ko\/,\\,\$NF\)\;print\ 
\$NF\} | grep -v Name` @'
 complete make   'n@*@`make -pn | sed -n -E /^[#_.\/[:blank:]]+/d; 
/=/d; s/[[:blank:]]*:.*//gp;`@'
 complete pkg_delete 'c/-/(i v D n p d f G x X r)/' 'n@*@`ls /var/db/pkg`@'
-complete pkg_info   'c/-/(a b v p q Q c d D f g i I j k K r R m L s o G O 
x X e E l t V P)/' 'n@*@`\ls -1 /var/db/pkg | sed svar/db/pkg/%%`@
+complete pkg_info   'c/-/(a b v p q Q c d D f g i I j k K r R m L s o G O 
x X e E l t V P)/' 'n@*@`\ls -1 /var/db/pkg | sed svar/db/pkg/%%`@'
 complete kill  'c/-/S/' 'c/%/j/' 'n/*/`ps -ax | awk '''{print 
$1}'''`/'
 complete killall   'c/-/S/' 'c/%/j/' 'n/*/`ps -ax | awk '''{print 
$5}'''`/'
 complete dd'c/[io]f=/f/ n/*/(if of ibs obs bs skip seek count)/='
-alias _PKGS_PkGs_PoRtS_ 'awk -F\| 
\{sub\(\\/usr\/ports\/\\,\\\,\$2\)\;print\ \$2\} /usr/ports/INDEX-name -r | 
cut -d . -f 1A
+alias _PKGS_PkGs_PoRtS_ 'awk -F\| 
\{sub\(\\/usr\/ports\/\\,\\\,\$2\)\;print\ \$2\} /usr/ports/INDEX-name -r | 
cut -d . -f 1'
 alias _PKGS_PkGs_PoRtS_ 'awk -F\| 
\{sub\(\\/usr\/ports\/\\,\\\,\$2\)\;print\ \$2\} /usr/ports/INDEX-`uname -r 
| cut -d . -f 1` pkg_info -E \*'
 complete portmaster   'c/--/(always-fetch check-depends check-port-dbdir 
clean-distfiles \
 clean-packages delete-build-only delete-packages force-config help \
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svn commit: r234084 - head/sys/netinet

2012-04-09 Thread Gleb Smirnoff
Author: glebius
Date: Tue Apr 10 05:42:48 2012
New Revision: 234084
URL: http://svn.freebsd.org/changeset/base/234084

Log:
  CARP should be capable to run on if_bridge(4). Unfortunately,
  this commit is not enough to enable CARP operation on
  if_bridge(4), because the latter doesn't handle or even
  initialize its ifp-if_link_state.
  
  Reported by:  Alexander Lunev sol289 gmail.com

Modified:
  head/sys/netinet/ip_carp.c

Modified: head/sys/netinet/ip_carp.c
==
--- head/sys/netinet/ip_carp.c  Tue Apr 10 02:29:11 2012(r234083)
+++ head/sys/netinet/ip_carp.c  Tue Apr 10 05:42:48 2012(r234084)
@@ -1384,6 +1384,7 @@ carp_output(struct ifnet *ifp, struct mb
/* Set the source MAC address to the Virtual Router MAC Address. */
switch (ifp-if_type) {
case IFT_ETHER:
+   case IFT_BRIDGE:
case IFT_L2VLAN: {
struct ether_header *eh;
 
@@ -1604,6 +1605,7 @@ carp_ioctl(struct ifreq *ifr, u_long cmd
switch (ifp-if_type) {
case IFT_ETHER:
case IFT_L2VLAN:
+   case IFT_BRIDGE:
case IFT_FDDI:
case IFT_ISO88025:
break;
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