svn commit: r368767 - in head/sys/riscv: include riscv
Author: mhorne
Date: Fri Dec 18 20:10:30 2020
New Revision: 368767
URL: https://svnweb.freebsd.org/changeset/base/368767
Log:
riscv: report additional known SBI implementations
These implementation IDs are defined in the SBI spec, so we should print
their name if detected.
Submitted by: Danjel Qyteza
Reviewed by: jhb, kp
Differential Revision:https://reviews.freebsd.org/D27660
Modified:
head/sys/riscv/include/sbi.h
head/sys/riscv/riscv/sbi.c
Modified: head/sys/riscv/include/sbi.h
==
--- head/sys/riscv/include/sbi.hFri Dec 18 16:55:54 2020
(r368766)
+++ head/sys/riscv/include/sbi.hFri Dec 18 20:10:30 2020
(r368767)
@@ -47,6 +47,10 @@
/* SBI Implementation IDs */
#defineSBI_IMPL_ID_BBL 0
#defineSBI_IMPL_ID_OPENSBI 1
+#defineSBI_IMPL_ID_XVISOR 2
+#defineSBI_IMPL_ID_KVM 3
+#defineSBI_IMPL_ID_RUSTSBI 4
+#defineSBI_IMPL_ID_DIOSIX 5
/* SBI Error Codes */
#defineSBI_SUCCESS 0
Modified: head/sys/riscv/riscv/sbi.c
==
--- head/sys/riscv/riscv/sbi.c Fri Dec 18 16:55:54 2020(r368766)
+++ head/sys/riscv/riscv/sbi.c Fri Dec 18 20:10:30 2020(r368767)
@@ -110,6 +110,18 @@ sbi_print_version(void)
case (SBI_IMPL_ID_BBL):
printf("SBI: Berkely Boot Loader %lu\n", sbi_impl_version);
break;
+ case (SBI_IMPL_ID_XVISOR):
+ printf("SBI: eXtensible Versatile hypervISOR %lu\n",
sbi_impl_version);
+ break;
+ case (SBI_IMPL_ID_KVM):
+ printf("SBI: Kernel-based Virtual Machine %lu\n",
sbi_impl_version);
+ break;
+ case (SBI_IMPL_ID_RUSTSBI):
+ printf("SBI: RustSBI %lu\n", sbi_impl_version);
+ break;
+ case (SBI_IMPL_ID_DIOSIX):
+ printf("SBI: Diosix %lu\n", sbi_impl_version);
+ break;
case (SBI_IMPL_ID_OPENSBI):
major = sbi_impl_version >> OPENSBI_VERSION_MAJOR_OFFSET;
minor = sbi_impl_version & OPENSBI_VERSION_MINOR_MASK;
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svn commit: r368765 - in head/sys/amd64: amd64 include
Author: mhorne
Date: Fri Dec 18 16:16:03 2020
New Revision: 368765
URL: https://svnweb.freebsd.org/changeset/base/368765
Log:
amd64: use register macros for gdb_cpu_getreg()
Prefer these newly-added definitions to bare values.
MFC after:2 weeks
Sponsored by: NetApp, Inc.
Sponsored by: Klara, Inc.
Modified:
head/sys/amd64/amd64/gdb_machdep.c
head/sys/amd64/include/gdb_machdep.h
Modified: head/sys/amd64/amd64/gdb_machdep.c
==
--- head/sys/amd64/amd64/gdb_machdep.c Fri Dec 18 16:09:24 2020
(r368764)
+++ head/sys/amd64/amd64/gdb_machdep.c Fri Dec 18 16:16:03 2020
(r368765)
@@ -60,31 +60,31 @@ gdb_cpu_getreg(int regnum, size_t *regsz)
if (kdb_thread == curthread) {
switch (regnum) {
- case 0: return (_frame->tf_rax);
- case 2: return (_frame->tf_rcx);
- case 3: return (_frame->tf_rdx);
- case 4: return (_frame->tf_rsi);
- case 5: return (_frame->tf_rdi);
- case 8: return (_frame->tf_r8);
- case 9: return (_frame->tf_r9);
- case 10: return (_frame->tf_r10);
- case 11: return (_frame->tf_r11);
- case 17: return (_frame->tf_rflags);
- case 18: return (_frame->tf_cs);
- case 19: return (_frame->tf_ss);
+ case GDB_REG_RAX: return (_frame->tf_rax);
+ case GDB_REG_RCX: return (_frame->tf_rcx);
+ case GDB_REG_RDX: return (_frame->tf_rdx);
+ case GDB_REG_RSI: return (_frame->tf_rsi);
+ case GDB_REG_RDI: return (_frame->tf_rdi);
+ case GDB_REG_R8: return (_frame->tf_r8);
+ case GDB_REG_R9: return (_frame->tf_r9);
+ case GDB_REG_R10: return (_frame->tf_r10);
+ case GDB_REG_R11: return (_frame->tf_r11);
+ case GDB_REG_RFLAGS: return (_frame->tf_rflags);
+ case GDB_REG_CS: return (_frame->tf_cs);
+ case GDB_REG_SS: return (_frame->tf_ss);
}
}
switch (regnum) {
- case 1: return (_thrctx->pcb_rbx);
- case 6: return (_thrctx->pcb_rbp);
- case 7: return (_thrctx->pcb_rsp);
- case 12: return (_thrctx->pcb_r12);
- case 13: return (_thrctx->pcb_r13);
- case 14: return (_thrctx->pcb_r14);
- case 15: return (_thrctx->pcb_r15);
- case 16: return (_thrctx->pcb_rip);
- case 18: return (&_kcodesel);
- case 19: return (&_kdatasel);
+ case GDB_REG_RBX: return (_thrctx->pcb_rbx);
+ case GDB_REG_RBP: return (_thrctx->pcb_rbp);
+ case GDB_REG_RSP: return (_thrctx->pcb_rsp);
+ case GDB_REG_R12: return (_thrctx->pcb_r12);
+ case GDB_REG_R13: return (_thrctx->pcb_r13);
+ case GDB_REG_R14: return (_thrctx->pcb_r14);
+ case GDB_REG_R15: return (_thrctx->pcb_r15);
+ case GDB_REG_PC: return (_thrctx->pcb_rip);
+ case GDB_REG_CS: return (&_kcodesel);
+ case GDB_REG_SS: return (&_kdatasel);
}
return (NULL);
}
Modified: head/sys/amd64/include/gdb_machdep.h
==
--- head/sys/amd64/include/gdb_machdep.hFri Dec 18 16:09:24 2020
(r368764)
+++ head/sys/amd64/include/gdb_machdep.hFri Dec 18 16:16:03 2020
(r368765)
@@ -50,6 +50,9 @@
#defineGDB_REG_R14 14
#defineGDB_REG_R15 15
#defineGDB_REG_PC 16
+#defineGDB_REG_RFLAGS 17
+#defineGDB_REG_CS 18
+#defineGDB_REG_SS 19
_Static_assert(GDB_BUFSZ >= (GDB_NREGS * 16), "buffer fits 'g' regs");
static __inline size_t
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svn commit: r368764 - in head/sys/amd64: amd64 include
Author: mhorne
Date: Fri Dec 18 16:09:24 2020
New Revision: 368764
URL: https://svnweb.freebsd.org/changeset/base/368764
Log:
amd64: allow gdb(4) to write to most registers
Similar to the recent patch to arm's gdb stub in r368414, allow GDB to
update the contents of most general purpose registers.
Reviewed by: cem, jhb, markj
MFC after:2 weeks
Sponsored by: NetApp, Inc.
Sponsored by: Klara, Inc.
NetApp PR:44
Differential Revision:https://reviews.freebsd.org/D27642
Modified:
head/sys/amd64/amd64/gdb_machdep.c
head/sys/amd64/include/gdb_machdep.h
Modified: head/sys/amd64/amd64/gdb_machdep.c
==
--- head/sys/amd64/amd64/gdb_machdep.c Fri Dec 18 16:04:48 2020
(r368763)
+++ head/sys/amd64/amd64/gdb_machdep.c Fri Dec 18 16:09:24 2020
(r368764)
@@ -92,12 +92,42 @@ gdb_cpu_getreg(int regnum, size_t *regsz)
void
gdb_cpu_setreg(int regnum, void *val)
{
+ register_t regval = *(register_t *)val;
+ /*
+* Write registers to the trapframe and pcb, if applicable.
+* Some scratch registers are not tracked by the pcb.
+*/
+ if (kdb_thread == curthread) {
+ switch (regnum) {
+ case GDB_REG_RAX: kdb_frame->tf_rax = regval; break;
+ case GDB_REG_RBX: kdb_frame->tf_rbx = regval; break;
+ case GDB_REG_RCX: kdb_frame->tf_rcx = regval; break;
+ case GDB_REG_RDX: kdb_frame->tf_rdx = regval; break;
+ case GDB_REG_RSI: kdb_frame->tf_rsi = regval; break;
+ case GDB_REG_RDI: kdb_frame->tf_rdi = regval; break;
+ case GDB_REG_RBP: kdb_frame->tf_rbp = regval; break;
+ case GDB_REG_RSP: kdb_frame->tf_rsp = regval; break;
+ case GDB_REG_R8: kdb_frame->tf_r8 = regval; break;
+ case GDB_REG_R9: kdb_frame->tf_r9 = regval; break;
+ case GDB_REG_R10: kdb_frame->tf_r10 = regval; break;
+ case GDB_REG_R11: kdb_frame->tf_r11 = regval; break;
+ case GDB_REG_R12: kdb_frame->tf_r12 = regval; break;
+ case GDB_REG_R13: kdb_frame->tf_r13 = regval; break;
+ case GDB_REG_R14: kdb_frame->tf_r14 = regval; break;
+ case GDB_REG_R15: kdb_frame->tf_r15 = regval; break;
+ case GDB_REG_PC: kdb_frame->tf_rip = regval; break;
+ }
+ }
switch (regnum) {
- case GDB_REG_PC:
- kdb_thrctx->pcb_rip = *(register_t *)val;
- if (kdb_thread == curthread)
- kdb_frame->tf_rip = *(register_t *)val;
+ case GDB_REG_RBX: kdb_thrctx->pcb_rbx = regval; break;
+ case GDB_REG_RBP: kdb_thrctx->pcb_rbp = regval; break;
+ case GDB_REG_RSP: kdb_thrctx->pcb_rsp = regval; break;
+ case GDB_REG_R12: kdb_thrctx->pcb_r12 = regval; break;
+ case GDB_REG_R13: kdb_thrctx->pcb_r13 = regval; break;
+ case GDB_REG_R14: kdb_thrctx->pcb_r14 = regval; break;
+ case GDB_REG_R15: kdb_thrctx->pcb_r15 = regval; break;
+ case GDB_REG_PC: kdb_thrctx->pcb_rip = regval; break;
}
}
Modified: head/sys/amd64/include/gdb_machdep.h
==
--- head/sys/amd64/include/gdb_machdep.hFri Dec 18 16:04:48 2020
(r368763)
+++ head/sys/amd64/include/gdb_machdep.hFri Dec 18 16:09:24 2020
(r368764)
@@ -33,6 +33,22 @@
#defineGDB_BUFSZ 4096
#defineGDB_NREGS 56
+#defineGDB_REG_RAX 0
+#defineGDB_REG_RBX 1
+#defineGDB_REG_RCX 2
+#defineGDB_REG_RDX 3
+#defineGDB_REG_RSI 4
+#defineGDB_REG_RDI 5
+#defineGDB_REG_RBP 6
+#defineGDB_REG_RSP 7
+#defineGDB_REG_R8 8
+#defineGDB_REG_R9 9
+#defineGDB_REG_R10 10
+#defineGDB_REG_R11 11
+#defineGDB_REG_R12 12
+#defineGDB_REG_R13 13
+#defineGDB_REG_R14 14
+#defineGDB_REG_R15 15
#defineGDB_REG_PC 16
_Static_assert(GDB_BUFSZ >= (GDB_NREGS * 16), "buffer fits 'g' regs");
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svn commit: r368719 - head/usr.sbin/bsdinstall/partedit
Author: mhorne
Date: Thu Dec 17 15:00:19 2020
New Revision: 368719
URL: https://svnweb.freebsd.org/changeset/base/368719
Log:
bsdinstall: remove VTOC8 partition scheme option
Now that sparc64 has been removed, there are no kernels built with
support for the VTOC8 partitioning scheme by default. Remove the option
from the installer, as it is unsupported on all installer images
produced by re@.
Reviewed by: imp
Differential Revision:https://reviews.freebsd.org/D27641
Modified:
head/usr.sbin/bsdinstall/partedit/gpart_ops.c
Modified: head/usr.sbin/bsdinstall/partedit/gpart_ops.c
==
--- head/usr.sbin/bsdinstall/partedit/gpart_ops.c Thu Dec 17 14:20:36
2020(r368718)
+++ head/usr.sbin/bsdinstall/partedit/gpart_ops.c Thu Dec 17 15:00:19
2020(r368719)
@@ -223,8 +223,6 @@ choose_part_type(const char *def_scheme)
"Bootable on most x86 systems and EFI aware ARM64", 0 },
{"MBR", "DOS Partitions",
"Bootable on most x86 systems", 0 },
- {"VTOC8", "Sun VTOC8 Partition Table",
- "Bootable on Sun SPARC systems", 0 },
};
parttypemenu:
@@ -724,11 +722,6 @@ set_default_part_metadata(const char *name, const char
else if (mountpoint == NULL || strlen(mountpoint) == 0)
mountpoint = default_bootmount;
}
-
- /* VTOC8 needs partcode at the start of partitions */
- if (strcmp(scheme, "VTOC8") == 0 && (strcmp(type, "freebsd-ufs") == 0
- || strcmp(type, "freebsd-zfs") == 0))
- md->bootcode = 1;
if (mountpoint == NULL || mountpoint[0] == '\0') {
if (md->fstab != NULL) {
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svn commit: r368705 - head/release/riscv
Author: mhorne Date: Wed Dec 16 20:21:56 2020 New Revision: 368705 URL: https://svnweb.freebsd.org/changeset/base/368705 Log: riscv: increase GENERICSD gap Leave more room for bootloaders at the beginning of the image. In particular, the u-boot files for the HiFive Unleashed are ~5MB in size. Modified: head/release/riscv/GENERICSD.conf Modified: head/release/riscv/GENERICSD.conf == --- head/release/riscv/GENERICSD.conf Wed Dec 16 18:40:49 2020 (r368704) +++ head/release/riscv/GENERICSD.conf Wed Dec 16 20:21:56 2020 (r368705) @@ -6,7 +6,7 @@ EMBEDDED_TARGET_ARCH="riscv64" EMBEDDED_TARGET="riscv" EMBEDDEDBUILD=1 -FAT_SIZE="54m -b 1m" +FAT_SIZE="54m -b 8m" FAT_TYPE="16" IMAGE_SIZE="3072M" KERNEL="GENERIC" ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r368558 - head/sys/riscv/include
Author: mhorne
Date: Fri Dec 11 20:01:45 2020
New Revision: 368558
URL: https://svnweb.freebsd.org/changeset/base/368558
Log:
riscv: small counter(9) improvements
Prefer atomics to critical section. This reduces the cost of the
increment operation and removes the possibility of it being interrupted
by counter_u64_zero().
Use CPU_FOREACH() macro to skip absent CPUs.
Replace hand-rolled address calculation with zpcpu_get().
Reviewed by: markj
Differential Revision:https://reviews.freebsd.org/D27536
Modified:
head/sys/riscv/include/counter.h
Modified: head/sys/riscv/include/counter.h
==
--- head/sys/riscv/include/counter.hFri Dec 11 19:45:40 2020
(r368557)
+++ head/sys/riscv/include/counter.hFri Dec 11 20:01:45 2020
(r368558)
@@ -30,14 +30,12 @@
#define_MACHINE_COUNTER_H_
#include
-#ifdef INVARIANTS
-#include
-#endif
+#include
#defineEARLY_COUNTER &__pcpu[0].pc_early_dummy_counter
-#definecounter_enter() critical_enter()
-#definecounter_exit() critical_exit()
+#definecounter_enter() do {} while (0)
+#definecounter_exit() do {} while (0)
#ifdef IN_SUBR_COUNTER_C
static inline uint64_t
@@ -54,19 +52,17 @@ counter_u64_fetch_inline(uint64_t *p)
int i;
r = 0;
- for (i = 0; i < mp_ncpus; i++)
- r += counter_u64_read_one((uint64_t *)p, i);
+ CPU_FOREACH(i)
+ r += counter_u64_read_one(p, i);
return (r);
}
-/* XXXKIB might interrupt increment */
static void
counter_u64_zero_one_cpu(void *arg)
{
- *((uint64_t *)((char *)arg + UMA_PCPU_ALLOC_SIZE *
- PCPU_GET(cpuid))) = 0;
+ *(zpcpu_get((counter_u64_t *)arg)) = 0;
}
static inline void
@@ -78,18 +74,13 @@ counter_u64_zero_inline(counter_u64_t c)
}
#endif
-#definecounter_u64_add_protected(c, inc) do {\
- CRITICAL_ASSERT(curthread); \
- *(uint64_t *)zpcpu_get(c) += (inc); \
-} while (0)
+#definecounter_u64_add_protected(c, inc) counter_u64_add(c, inc)
static inline void
counter_u64_add(counter_u64_t c, int64_t inc)
{
- counter_enter();
- counter_u64_add_protected(c, inc);
- counter_exit();
+ atomic_add_64((uint64_t *)zpcpu_get(c), inc);
}
#endif /* ! _MACHINE_COUNTER_H_ */
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svn commit: r368527 - head/sys/riscv/riscv
Author: mhorne
Date: Thu Dec 10 22:20:20 2020
New Revision: 368527
URL: https://svnweb.freebsd.org/changeset/base/368527
Log:
riscv: handle debug.debugger_on_trap for fatal page faults
Allows recovery or diagnosis of a fatal page fault before panicking the
system.
Reviewed by: jhb, kp
Differential Revision:https://reviews.freebsd.org/D27534
Modified:
head/sys/riscv/riscv/trap.c
Modified: head/sys/riscv/riscv/trap.c
==
--- head/sys/riscv/riscv/trap.c Thu Dec 10 21:12:25 2020(r368526)
+++ head/sys/riscv/riscv/trap.c Thu Dec 10 22:20:20 2020(r368527)
@@ -179,6 +179,9 @@ page_fault_handler(struct trapframe *frame, int usermo
vm_offset_t va;
struct proc *p;
int error, sig, ucode;
+#ifdef KDB
+ bool handled;
+#endif
#ifdef KDB
if (kdb_active) {
@@ -250,6 +253,15 @@ done:
fatal:
dump_regs(frame);
+#ifdef KDB
+ if (debugger_on_trap) {
+ kdb_why = KDB_WHY_TRAP;
+ handled = kdb_trap(frame->tf_scause & SCAUSE_CODE, 0, frame);
+ kdb_why = KDB_WHY_UNSET;
+ if (handled)
+ return;
+ }
+#endif
panic("Fatal page fault at %#lx: %#016lx", frame->tf_sepc, stval);
}
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svn commit: r368458 - head/sys/arm64/linux
Author: mhorne
Date: Tue Dec 8 18:24:33 2020
New Revision: 368458
URL: https://svnweb.freebsd.org/changeset/base/368458
Log:
arm64: fix struct l_sigaction_t layout
The definition was copied from amd64, but the layout of the struct
differs slightly between these platforms. This fixes spurious
`unsupported sigaction flag 0x` messages when executing some
Linux binaries on arm64.
Reviewed by: emaste
MFC after:1 week
Sponsored by: The FreeBSD Foundation
Differential Revision:https://reviews.freebsd.org/D27460
Modified:
head/sys/arm64/linux/linux.h
Modified: head/sys/arm64/linux/linux.h
==
--- head/sys/arm64/linux/linux.hTue Dec 8 18:11:28 2020
(r368457)
+++ head/sys/arm64/linux/linux.hTue Dec 8 18:24:33 2020
(r368458)
@@ -163,9 +163,9 @@ typedef void(*l_handler_t)(l_int);
typedef struct {
l_handler_t lsa_handler;
- l_sigset_t lsa_mask;
l_ulong lsa_flags;
l_uintptr_t lsa_restorer;
+ l_sigset_t lsa_mask;
} l_sigaction_t; /* XXX */
typedef struct {
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svn commit: r368424 - head/release
Author: mhorne
Date: Tue Dec 8 00:48:50 2020
New Revision: 368424
URL: https://svnweb.freebsd.org/changeset/base/368424
Log:
release: don't checksum images if there are none
For platforms that don't have any of the memstick, cdrom, or dvdrom
release images (i.e. riscv64), the release-install target will trip up
when invoking md5(1) on the non-existent image files. Skipping this
allows the install to complete successfully.
Modified:
head/release/Makefile
Modified: head/release/Makefile
==
--- head/release/Makefile Tue Dec 8 00:42:03 2020(r368423)
+++ head/release/Makefile Tue Dec 8 00:48:50 2020(r368424)
@@ -317,6 +317,7 @@ release-install:
mkdir -p ${DESTDIR}
.endif
cp -a ftp ${DESTDIR}/
+.if !empty(IMAGES)
.for I in ${IMAGES}
cp -p ${I} ${DESTDIR}/${OSRELEASE}-${I}
. if defined(WITH_COMPRESSED_IMAGES) && !empty(WITH_COMPRESSED_IMAGES)
@@ -325,6 +326,7 @@ release-install:
.endfor
cd ${DESTDIR} && sha512 ${OSRELEASE}* > ${DESTDIR}/CHECKSUM.SHA512
cd ${DESTDIR} && sha256 ${OSRELEASE}* > ${DESTDIR}/CHECKSUM.SHA256
+.endif
.include "${.CURDIR}/Makefile.inc1"
.include "${.CURDIR}/Makefile.vm"
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svn commit: r368423 - head/release/riscv
Author: mhorne Date: Tue Dec 8 00:42:03 2020 New Revision: 368423 URL: https://svnweb.freebsd.org/changeset/base/368423 Log: RISC-V release confs Add two release flavors for RISC-V. First, the traditional "big-iron" images, capable of generating distribution sets and VM images. Installer images won't be built yet, but can be trivially enabled in the future with the addition of riscv/make-memstick.sh. Second, a GENERICSD embedded image. I've opted for this instead of board-specific SD card images as it allows users to just dd the u-boot they want. The RISC-V hardware ecosystem is still young, so a configuration for e.g. the new PolarFire SoC Icicle Kit would likely see very few users. Reviewed by: gjb Relnotes: yes Differential Revision:https://reviews.freebsd.org/D27045 Added: head/release/riscv/ head/release/riscv/GENERICSD.conf (contents, props changed) head/release/riscv/riscv64.conf (contents, props changed) Added: head/release/riscv/GENERICSD.conf == --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/release/riscv/GENERICSD.conf Tue Dec 8 00:42:03 2020 (r368423) @@ -0,0 +1,16 @@ +#!/bin/sh +# +# $FreeBSD$ +# + +EMBEDDED_TARGET_ARCH="riscv64" +EMBEDDED_TARGET="riscv" +EMBEDDEDBUILD=1 +FAT_SIZE="54m -b 1m" +FAT_TYPE="16" +IMAGE_SIZE="3072M" +KERNEL="GENERIC" +MD_ARGS="-x 63 -y 255" +NODOC=1 +PART_SCHEME="GPT" +export BOARDNAME="GENERICSD" Added: head/release/riscv/riscv64.conf == --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/release/riscv/riscv64.conf Tue Dec 8 00:42:03 2020 (r368423) @@ -0,0 +1,8 @@ +#!/bin/sh +# +# $FreeBSD$ +# + +TARGET="riscv" +TARGET_ARCH="riscv64" +KERNEL="GENERIC" ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r368422 - in head: release/tools tools/boot
Author: mhorne
Date: Tue Dec 8 00:37:11 2020
New Revision: 368422
URL: https://svnweb.freebsd.org/changeset/base/368422
Log:
riscv: allow building virtual machine images
RISC-V has the same booting requirements as arm64 (loader.efi, no legacy
boot options), so generated images for both architectures have the same
partition layout.
Reviewed by: gjb
Differential Revision:https://reviews.freebsd.org/D27044
Modified:
head/release/tools/vmimage.subr
head/tools/boot/install-boot.sh
Modified: head/release/tools/vmimage.subr
==
--- head/release/tools/vmimage.subr Tue Dec 8 00:35:13 2020
(r368421)
+++ head/release/tools/vmimage.subr Tue Dec 8 00:37:11 2020
(r368422)
@@ -30,7 +30,7 @@ write_partition_layout() {
-p
freebsd-boot/bootfs:=${BOOTFILES}/i386/gptboot/gptboot"
ROOTFSPART="-p freebsd-ufs/rootfs:=${VMBASE}"
;;
- arm64:aarch64)
+ arm64:aarch64 | riscv:riscv64*)
ESP=yes
SCHEME=gpt
BOOTPARTS=
Modified: head/tools/boot/install-boot.sh
==
--- head/tools/boot/install-boot.sh Tue Dec 8 00:35:13 2020
(r368421)
+++ head/tools/boot/install-boot.sh Tue Dec 8 00:37:11 2020
(r368422)
@@ -38,6 +38,7 @@ get_uefi_bootname() {
arm64) echo bootaa64 ;;
i386) echo bootia32 ;;
arm) echo bootarm ;;
+riscv) echo bootriscv64 ;;
*) die "machine type $(uname -m) doesn't support UEFI" ;;
esac
}
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svn commit: r368421 - in head/release: . tools
Author: mhorne
Date: Tue Dec 8 00:35:13 2020
New Revision: 368421
URL: https://svnweb.freebsd.org/changeset/base/368421
Log:
release.sh: add support for RISC-V embedded builds
Since the few existing RISC-V hardware platforms are single board
computers, we can piggyback off of arm/arm64's embedded build support
for generating SD card images.
I don't see a pressing need to change the naming in this file at this
time.
Reviewed by: gjb, manu
Differential Revision:https://reviews.freebsd.org/D27043
Modified:
head/release/release.sh
head/release/tools/arm.subr
Modified: head/release/release.sh
==
--- head/release/release.sh Tue Dec 8 00:05:43 2020(r368420)
+++ head/release/release.sh Tue Dec 8 00:35:13 2020(r368421)
@@ -144,7 +144,7 @@ env_check() {
WITH_COMPRESSED_IMAGES=
NODOC=yes
case ${EMBEDDED_TARGET}:${EMBEDDED_TARGET_ARCH} in
- arm:arm*|arm64:aarch64)
+ arm:arm*|arm64:aarch64|riscv:riscv64*)
chroot_build_release_cmd="chroot_arm_build_release"
;;
*)
@@ -400,6 +400,9 @@ efi_boot_name()
amd64)
echo "bootx64.efi"
;;
+ riscv)
+ echo "bootriscv64.efi"
+ ;;
esac
}
@@ -407,7 +410,7 @@ efi_boot_name()
chroot_arm_build_release() {
load_target_env
case ${EMBEDDED_TARGET} in
- arm|arm64)
+ arm|arm64|riscv)
if [ -e "${RELENGDIR}/tools/arm.subr" ]; then
. "${RELENGDIR}/tools/arm.subr"
fi
Modified: head/release/tools/arm.subr
==
--- head/release/tools/arm.subr Tue Dec 8 00:05:43 2020(r368420)
+++ head/release/tools/arm.subr Tue Dec 8 00:35:13 2020(r368421)
@@ -27,7 +27,7 @@
# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
# SUCH DAMAGE.
#
-# Common subroutines used to build arm SD card images.
+# Common subroutines used to build arm, arm64, or RISC-V SD card images.
#
# $FreeBSD$
#
@@ -265,11 +265,11 @@ arm_install_boot() {
}
arm_install_uboot() {
- # Override in the arm/KERNEL.conf file.
+ # Override in the ${EMBEDDED_TARGET}/${BOARDNAME}.conf file.
return 0
}
arm_do_quirk() {
- # Override in the arm{,64}/BOARD.conf file.
+ # Override in the ${EMBEDDED_TARGET}/${BOARDNAME}.conf file.
}
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svn commit: r368350 - in head: share/man/man4 sys/conf sys/crypto/openssl sys/crypto/openssl/aarch64 sys/modules sys/modules/ossl tests/sys/opencrypto
M_ARCH_5TE__)|| \
+defined(__ARM_ARCH_5TEJ__)
+#define __ARM_ARCH__ 5
+# elif defined(__ARM_ARCH_4__) || defined(__ARM_ARCH_4T__)
+#define __ARM_ARCH__ 4
+# else
+#error "unsupported ARM architecture"
+# endif
+# endif
+# endif
+
+# if !defined(__ARM_MAX_ARCH__)
+# define __ARM_MAX_ARCH__ __ARM_ARCH__
+# endif
+
+# if __ARM_MAX_ARCH__<__ARM_ARCH__
+# error "__ARM_MAX_ARCH__ can't be less than __ARM_ARCH__"
+# elif __ARM_MAX_ARCH__!=__ARM_ARCH__
+# if __ARM_ARCH__<7 && __ARM_MAX_ARCH__>=7 && defined(__ARMEB__)
+# error "can't build universal big-endian binary"
+# endif
+# endif
+
+# ifndef __ASSEMBLER__
+extern unsigned int OPENSSL_armcap_P;
+# endif
+
+# define ARMV7_NEON (1<<0)
+# define ARMV7_TICK (1<<1)
+# define ARMV8_AES (1<<2)
+# define ARMV8_SHA1 (1<<3)
+# define ARMV8_SHA256(1<<4)
+# define ARMV8_PMULL (1<<5)
+# define ARMV8_SHA512(1<<6)
+
+#endif
Added: head/sys/crypto/openssl/ossl_aarch64.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/crypto/openssl/ossl_aarch64.c Fri Dec 4 21:12:17 2020
(r368350)
@@ -0,0 +1,62 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2020 The FreeBSD Foundation
+ *
+ * This software was developed by Mitchell Horne
+ * under sponsorship from the FreeBSD Foundation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#include
+
+#include
+#include
+
+#include
+#include
+
+/*
+ * Feature bits defined in arm_arch.h
+ */
+unsigned int OPENSSL_armcap_P;
+
+void
+ossl_cpuid(void)
+{
+ /* SHA features */
+ if ((elf_hwcap & HWCAP_SHA1) != 0)
+ OPENSSL_armcap_P |= ARMV8_SHA1;
+ if ((elf_hwcap & HWCAP_SHA2) != 0)
+ OPENSSL_armcap_P |= ARMV8_SHA256;
+ if ((elf_hwcap & HWCAP_SHA512) != 0)
+ OPENSSL_armcap_P |= ARMV8_SHA512;
+
+ /* AES features */
+ if ((elf_hwcap & HWCAP_AES) != 0)
+ OPENSSL_armcap_P |= ARMV8_AES;
+ if ((elf_hwcap & HWCAP_PMULL) != 0)
+ OPENSSL_armcap_P |= ARMV8_PMULL;
+}
Modified: head/sys/modules/Makefile
==
--- head/sys/modules/Makefile Fri Dec 4 20:54:20 2020(r368349)
+++ head/sys/modules/Makefile Fri Dec 4 21:12:17 2020(r368350)
@@ -518,6 +518,7 @@ _mthca= mthca
_mlx4ib= mlx4ib
_mlx5ib= mlx5ib
.endif
+_ossl= ossl
_vmware= vmware
.endif
@@ -634,7 +635,6 @@ _nctgpio= nctgpio
_ndis= ndis
_ntb= ntb
_ocs_fc= ocs_fc
-_ossl= ossl
_pccard= pccard
_qat= qat
_qatfw=qatfw
Modified: head/sys/modules/ossl/Makefile
==
--- head/sys/modules/ossl/Makefile Fri Dec 4 20:54:20 2020
(r368349)
+++ head/sys/modules/ossl/Makefile Fri Dec 4 21:12:17 2020
(r368350)
@@ -13,6 +13,12 @@ SRCS=bus_if.h \
ossl_sha512.c \
${SRCS.${MACHINE_CPUARCH}}
+SRCS.aarch64= \
+ sha1-armv8.S \
+ sha256-armv8.S \
+ sha512-armv8.S \
+ ossl_aarch64.c
+
SRCS.amd64= \
sha1-x86_64.S \
sha256-x86_64.S \
@@ -24,5 +30,11 @@ SRCS.i386= \
sha256-586.S \
sha512-586.S \
ossl_x86.c
+
+# For arm64, we are forced to rewrite the compiler invocation for the assembly
+# files, to remove -mgeneral-regs-only.
+${SRCS
svn commit: r368349 - in head/sys: conf crypto/openssl modules/ossl
Author: mhorne
Date: Fri Dec 4 20:54:20 2020
New Revision: 368349
URL: https://svnweb.freebsd.org/changeset/base/368349
Log:
ossl: split out x86 bits to x86/ossl_cpuid.c
Make room for adding arm64 support to this driver by moving the
x86-specific feature parsing to a separate file.
Reviewed by: jhb
Sponsored by: The FreeBSD Foundation
Differential Revision:https://reviews.freebsd.org/D27388
Added:
head/sys/crypto/openssl/ossl_x86.c (contents, props changed)
Modified:
head/sys/conf/files
head/sys/conf/files.x86
head/sys/crypto/openssl/ossl.c
head/sys/crypto/openssl/ossl.h
head/sys/modules/ossl/Makefile
Modified: head/sys/conf/files
==
--- head/sys/conf/files Fri Dec 4 20:47:56 2020(r368348)
+++ head/sys/conf/files Fri Dec 4 20:54:20 2020(r368349)
@@ -734,6 +734,10 @@ crypto/chacha20/chacha.c standard
crypto/chacha20/chacha-sw.coptional crypto | ipsec | ipsec_support
crypto/des/des_ecb.c optional netsmb
crypto/des/des_setkey.coptional netsmb
+crypto/openssl/ossl.c optional ossl
+crypto/openssl/ossl_sha1.c optional ossl
+crypto/openssl/ossl_sha256.c optional ossl
+crypto/openssl/ossl_sha512.c optional ossl
crypto/rc4/rc4.c optional netgraph_mppc_encryption
crypto/rijndael/rijndael-alg-fst.c optional crypto | ekcd | geom_bde | \
ipsec | ipsec_support | !random_loadable | wlan_ccmp
Modified: head/sys/conf/files.x86
==
--- head/sys/conf/files.x86 Fri Dec 4 20:47:56 2020(r368348)
+++ head/sys/conf/files.x86 Fri Dec 4 20:54:20 2020(r368349)
@@ -53,10 +53,7 @@ intel_sha256.o optionalaesni
\
compile-with"${CC} -c ${CFLAGS:C/^-O2$/-O3/:N-nostdinc} ${WERROR}
${PROF} -mmmx -msse -msse4 -msha ${.IMPSRC}" \
no-implicit-rule\
clean "intel_sha256.o"
-crypto/openssl/ossl.c optional ossl
-crypto/openssl/ossl_sha1.c optional ossl
-crypto/openssl/ossl_sha256.c optional ossl
-crypto/openssl/ossl_sha512.c optional ossl
+crypto/openssl/ossl_x86.c optional ossl
crypto/via/padlock.c optional padlock
crypto/via/padlock_cipher.coptional padlock
crypto/via/padlock_hash.c optional padlock
Modified: head/sys/crypto/openssl/ossl.c
==
--- head/sys/crypto/openssl/ossl.c Fri Dec 4 20:47:56 2020
(r368348)
+++ head/sys/crypto/openssl/ossl.c Fri Dec 4 20:54:20 2020
(r368349)
@@ -1,4 +1,6 @@
-/*
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
* Copyright (c) 2020 Netflix, Inc
*
* Redistribution and use in source and binary forms, with or without
@@ -39,10 +41,8 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
+
#include
-#include
-#include
-#include
#include
#include
@@ -66,81 +66,7 @@ struct ossl_session {
struct ossl_session_hash hash;
};
-/*
- * See OPENSSL_ia32cap(3).
- *
- * [0] = cpu_feature but with a few custom bits
- * [1] = cpu_feature2 but with AMD XOP in bit 11
- * [2] = cpu_stdext_feature
- * [3] = 0
- */
-unsigned int OPENSSL_ia32cap_P[4];
-
static MALLOC_DEFINE(M_OSSL, "ossl", "OpenSSL crypto");
-
-static void
-ossl_cpuid(void)
-{
- uint64_t xcr0;
- u_int regs[4];
- u_int max_cores;
-
- /* Derived from OpenSSL_ia32_cpuid. */
-
- OPENSSL_ia32cap_P[0] = cpu_feature & ~(CPUID_B20 | CPUID_IA64);
- if (cpu_vendor_id == CPU_VENDOR_INTEL) {
- OPENSSL_ia32cap_P[0] |= CPUID_IA64;
- if ((cpu_id & 0xf00) != 0xf00)
- OPENSSL_ia32cap_P[0] |= CPUID_B20;
- }
-
- /* Only leave CPUID_HTT on if HTT is present. */
- if (cpu_vendor_id == CPU_VENDOR_AMD && cpu_exthigh >= 0x8008) {
- max_cores = (cpu_procinfo2 & AMDID_CMP_CORES) + 1;
- if (cpu_feature & CPUID_HTT) {
- if ((cpu_procinfo & CPUID_HTT_CORES) >> 16 <= max_cores)
- OPENSSL_ia32cap_P[0] &= ~CPUID_HTT;
- }
- } else {
- if (cpu_high >= 4) {
- cpuid_count(4, 0, regs);
- max_cores = (regs[0] >> 26) & 0xfff;
- } else
- max_cores = -1;
- }
- if (max_cores == 0)
- OPENSSL_ia32cap_P[0] &= ~CPUID_HTT;
- else if ((cpu_procinfo & CPUID_HTT_CORES) >> 16 == 0)
- OPENSSL_ia32cap_P[0] &= ~CPUID_HTT;
-
- OPENSSL_ia32cap_P[1] = cpu_feature2 & ~AMDID2_XOP;
- if (cpu_vendor_id == CPU_VENDOR_AMD)
- OPENSSL_ia32cap_P[1] |= amd_feature2 & AMDID2_XOP;
-
- OPENSSL_ia32cap_P[2] = cpu_stdext_feature;
-
svn commit: r368284 - head/sys/dev/uart
Author: mhorne
Date: Wed Dec 2 21:01:52 2020
New Revision: 368284
URL: https://svnweb.freebsd.org/changeset/base/368284
Log:
uart: allow UART_DEV_DBGPORT for fdt consoles
Allow fdt devices to be used as debug ports for gdb(4).
A debug console can be specified with the "freebsd,debug-path" property
in the device tree's /chosen node, or using the environment variable
hw.fdt.dbgport.
The device should be specified by its name in the device tree, for
example hw.fdt.dbgport="serial2".
PR: 251053
Submitted by: Dmitry Salychev
Submitted by: stevek (original patch, D5986)
Reviewed by: andrew, mhorne
Differential Revision:https://reviews.freebsd.org/D27422
Modified:
head/sys/dev/uart/uart_bus_fdt.c
head/sys/dev/uart/uart_cpu_arm64.c
head/sys/dev/uart/uart_cpu_fdt.c
head/sys/dev/uart/uart_cpu_fdt.h
Modified: head/sys/dev/uart/uart_bus_fdt.c
==
--- head/sys/dev/uart/uart_bus_fdt.cWed Dec 2 20:54:03 2020
(r368283)
+++ head/sys/dev/uart/uart_bus_fdt.cWed Dec 2 21:01:52 2020
(r368284)
@@ -175,26 +175,39 @@ uart_fdt_find_by_node(phandle_t node, int class_list)
int
uart_cpu_fdt_probe(struct uart_class **classp, bus_space_tag_t *bst,
bus_space_handle_t *bsh, int *baud, u_int *rclk, u_int *shiftp,
-u_int *iowidthp)
+u_int *iowidthp, const int devtype)
{
const char *propnames[] = {"stdout-path", "linux,stdout-path", "stdout",
"stdin-path", "stdin", NULL};
+ const char *propnames_dbgport[] = {"freebsd,debug-path", NULL};
const char **name;
struct uart_class *class;
phandle_t node, chosen;
pcell_t br, clk, shift, iowidth;
- char *cp;
+ char *cp = NULL;
int err;
/* Has the user forced a specific device node? */
- cp = kern_getenv("hw.fdt.console");
+ switch (devtype) {
+ case UART_DEV_DBGPORT:
+ cp = kern_getenv("hw.fdt.dbgport");
+ name = propnames_dbgport;
+ break;
+ case UART_DEV_CONSOLE:
+ cp = kern_getenv("hw.fdt.console");
+ name = propnames;
+ break;
+ default:
+ return (ENXIO);
+ }
+
if (cp == NULL) {
/*
-* Retrieve /chosen/std{in,out}.
+* Retrieve a node from /chosen.
*/
node = -1;
if ((chosen = OF_finddevice("/chosen")) != -1) {
- for (name = propnames; *name != NULL; name++) {
+ for (; *name != NULL; name++) {
if (phandle_chosen_propdev(chosen, *name,
) == 0)
break;
Modified: head/sys/dev/uart/uart_cpu_arm64.c
==
--- head/sys/dev/uart/uart_cpu_arm64.c Wed Dec 2 20:54:03 2020
(r368283)
+++ head/sys/dev/uart/uart_cpu_arm64.c Wed Dec 2 21:01:52 2020
(r368284)
@@ -100,15 +100,11 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
if (uart_cpu_acpi_spcr(devtype, di) == 0)
return (0);
#endif
-
- if (devtype != UART_DEV_CONSOLE)
- return (ENXIO);
-
err = ENXIO;
#ifdef FDT
if (err != 0) {
err = uart_cpu_fdt_probe(, , , , ,
- , );
+ , , devtype);
}
#endif
if (err != 0)
Modified: head/sys/dev/uart/uart_cpu_fdt.c
==
--- head/sys/dev/uart/uart_cpu_fdt.cWed Dec 2 20:54:03 2020
(r368283)
+++ head/sys/dev/uart/uart_cpu_fdt.cWed Dec 2 21:01:52 2020
(r368284)
@@ -87,10 +87,8 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
if (!err)
return (0);
- if (devtype != UART_DEV_CONSOLE)
- return (ENXIO);
-
- err = uart_cpu_fdt_probe(, , , , , ,
);
+ err = uart_cpu_fdt_probe(, , , , ,
+ , , devtype);
if (err != 0)
return (err);
Modified: head/sys/dev/uart/uart_cpu_fdt.h
==
--- head/sys/dev/uart/uart_cpu_fdt.hWed Dec 2 20:54:03 2020
(r368283)
+++ head/sys/dev/uart/uart_cpu_fdt.hWed Dec 2 21:01:52 2020
(r368284)
@@ -51,7 +51,7 @@ SET_DECLARE(uart_fdt_class_set, struct ofw_compat_data
DATA_SET(uart_fdt_class_set, data)
int uart_cpu_fdt_probe(struct uart_class **, bus_space_tag_t *,
-bus_space_handle_t *, int *, u_int *, u_int *, u_int *);
+bus_space_handle_t *, int *, u_int *, u_int *, u_int *, const int);
int uart_fdt_get_clock(phandle_t node, pcell_t *cell);
int uart_fdt_get_shift(phandle_t node, pcell_t *cell);
int
svn commit: r368281 - head/sys/dev/e1000
Author: mhorne
Date: Wed Dec 2 17:37:32 2020
New Revision: 368281
URL: https://svnweb.freebsd.org/changeset/base/368281
Log:
em: fix a null de-reference in em_free_pci_resources
A failure in iflib_device_register() can result in
em_free_pci_resources() being called after receive queues have already
been freed. In particular, a failure to allocate IRQ resources will goto
fail_queues, where IFDI_QUEUES_FREE() will be called via
iflib_tx_structures_free(), preceding the call to IFDI_DETACH().
Cope with this by checking adapter->rx_queues before dereferencing it.
A similar check is present in ixgbe(4) and ixl(4).
MFC after:1 week
Sponsored by: NetApp, Inc.
Sponsored by: Klara, Inc.
Differential Revision:https://reviews.freebsd.org/D27260
Modified:
head/sys/dev/e1000/if_em.c
Modified: head/sys/dev/e1000/if_em.c
==
--- head/sys/dev/e1000/if_em.c Wed Dec 2 17:22:29 2020(r368280)
+++ head/sys/dev/e1000/if_em.c Wed Dec 2 17:37:32 2020(r368281)
@@ -2234,8 +2234,10 @@ em_free_pci_resources(if_ctx_t ctx)
if (adapter->intr_type == IFLIB_INTR_MSIX)
iflib_irq_free(ctx, >irq);
- for (int i = 0; i < adapter->rx_num_queues; i++, que++) {
- iflib_irq_free(ctx, >que_irq);
+ if (que != NULL) {
+ for (int i = 0; i < adapter->rx_num_queues; i++, que++) {
+ iflib_irq_free(ctx, >que_irq);
+ }
}
if (adapter->memory != NULL) {
___
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svn commit: r368200 - head/usr.sbin/efibootmgr
Author: mhorne
Date: Mon Nov 30 22:16:11 2020
New Revision: 368200
URL: https://svnweb.freebsd.org/changeset/base/368200
Log:
efibootmgr: fix an incorrect error handling check
efivar_device_path_to_unix_path() returns standard error codes on
failure and zero on success. Checking for a return value less than zero
means that the actual failure cases won't be handled. This could
manifest as a segfault during the subsequent call to printf().
Reviewed by: imp
MFC after:3 days
Differential Revision:https://reviews.freebsd.org/D27424
Modified:
head/usr.sbin/efibootmgr/efibootmgr.c
Modified: head/usr.sbin/efibootmgr/efibootmgr.c
==
--- head/usr.sbin/efibootmgr/efibootmgr.c Mon Nov 30 21:59:52 2020
(r368199)
+++ head/usr.sbin/efibootmgr/efibootmgr.c Mon Nov 30 22:16:11 2020
(r368200)
@@ -1034,7 +1034,7 @@ report_esp_device(bool do_dp, bool do_unix)
printf("%s\n", buf);
exit(0);
}
- if (efivar_device_path_to_unix_path(dp, , , ) < 0)
+ if (efivar_device_path_to_unix_path(dp, , , ) != 0)
errx(1, "Can't convert to unix path");
if (do_unix) {
if (abspath == NULL)
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svn commit: r367896 - head/sys/riscv/riscv
Author: mhorne
Date: Fri Nov 20 15:21:10 2020
New Revision: 367896
URL: https://svnweb.freebsd.org/changeset/base/367896
Log:
riscv: always initialize the static kernel environment
Ensure we initialize the static environment when not booting via
loader(8), and provide a static buffer if this is the case. This fixes
two issues.
First, performing the initialization ensures that kenv variables set in
the kernel's config file are honored. Previously, any new or overridden
values were ignored.
Second, providing the static buffer allows variables to be set in the
device tree's bootargs property of the chosen node. This can be set by
u-boot or by QEMU's '-append' flag. Attempting to this prior to this
change resulted in an early panic, since the static environment had no
buffer backing it.
Submitted by: syrinx (earlier version)
Reviewed by: kp
Differential Revision:https://reviews.freebsd.org/D25034
Modified:
head/sys/riscv/riscv/machdep.c
Modified: head/sys/riscv/riscv/machdep.c
==
--- head/sys/riscv/riscv/machdep.c Fri Nov 20 15:19:30 2020
(r367895)
+++ head/sys/riscv/riscv/machdep.c Fri Nov 20 15:21:10 2020
(r367896)
@@ -130,6 +130,8 @@ cpuset_t all_harts;
extern int *end;
+static char static_kenv[PAGE_SIZE];
+
static void
cpu_startup(void *dummy)
{
@@ -836,6 +838,8 @@ parse_metadata(void)
kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *);
if (kern_envp != NULL)
init_static_kenv(kern_envp, 0);
+ else
+ init_static_kenv(static_kenv, sizeof(static_kenv));
#ifdef DDB
ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
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svn commit: r367894 - head/sys/net
Author: mhorne
Date: Fri Nov 20 14:45:45 2020
New Revision: 367894
URL: https://svnweb.freebsd.org/changeset/base/367894
Log:
Make net/ifq.h C++ friendly
Don't use "new" as an identifier, and add explicit casts from void *.
As a general policy, FreeBSD doesn't make any C++ compatibility
guarantees for kernel headers like it does for userland, but it is a
small effort to do so in this case, to the benefit of a downstream
consumer (NetApp).
Reviewed by: rscheff
Sponsored by: NetApp, Inc.
Sponsored by: Klara, Inc.
Differential Revision:https://reviews.freebsd.org/D27286
Modified:
head/sys/net/ifq.h
Modified: head/sys/net/ifq.h
==
--- head/sys/net/ifq.h Fri Nov 20 14:37:07 2020(r367893)
+++ head/sys/net/ifq.h Fri Nov 20 14:45:45 2020(r367894)
@@ -336,7 +336,7 @@ drbr_enqueue(struct ifnet *ifp, struct buf_ring *br, s
}
static __inline void
-drbr_putback(struct ifnet *ifp, struct buf_ring *br, struct mbuf *new)
+drbr_putback(struct ifnet *ifp, struct buf_ring *br, struct mbuf *m_new)
{
/*
* The top of the list needs to be swapped
@@ -348,11 +348,11 @@ drbr_putback(struct ifnet *ifp, struct buf_ring *br, s
* Peek in altq case dequeued it
* so put it back.
*/
- IFQ_DRV_PREPEND(>if_snd, new);
+ IFQ_DRV_PREPEND(>if_snd, m_new);
return;
}
#endif
- buf_ring_putback_sc(br, new);
+ buf_ring_putback_sc(br, m_new);
}
static __inline struct mbuf *
@@ -371,7 +371,7 @@ drbr_peek(struct ifnet *ifp, struct buf_ring *br)
return (m);
}
#endif
- return(buf_ring_peek_clear_sc(br));
+ return ((struct mbuf *)buf_ring_peek_clear_sc(br));
}
static __inline void
@@ -383,7 +383,7 @@ drbr_flush(struct ifnet *ifp, struct buf_ring *br)
if (ifp != NULL && ALTQ_IS_ENABLED(>if_snd))
IFQ_PURGE(>if_snd);
#endif
- while ((m = buf_ring_dequeue_sc(br)) != NULL)
+ while ((m = (struct mbuf *)buf_ring_dequeue_sc(br)) != NULL)
m_freem(m);
}
@@ -406,7 +406,7 @@ drbr_dequeue(struct ifnet *ifp, struct buf_ring *br)
return (m);
}
#endif
- return (buf_ring_dequeue_sc(br));
+ return ((struct mbuf *)buf_ring_dequeue_sc(br));
}
static __inline void
@@ -438,11 +438,11 @@ drbr_dequeue_cond(struct ifnet *ifp, struct buf_ring *
return (m);
}
#endif
- m = buf_ring_peek(br);
+ m = (struct mbuf *)buf_ring_peek(br);
if (m == NULL || func(m, arg) == 0)
return (NULL);
- return (buf_ring_dequeue_sc(br));
+ return ((struct mbuf *)buf_ring_dequeue_sc(br));
}
static __inline int
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svn commit: r367848 - in head: share/man/man4 sys/kern
Author: mhorne Date: Thu Nov 19 18:03:40 2020 New Revision: 367848 URL: https://svnweb.freebsd.org/changeset/base/367848 Log: Add an option for entering KDB on recursive panics There are many cases where one would choose avoid entering the debugger on a normal panic, opting instead to reboot and possibly save a kernel dump. However, recursive kernel panics are an unusual case that might warrant attention from a human, so provide a secondary tunable, debug.debugger_on_recursive_panic, to allow entering the debugger only when this occurs. For for simplicity in maintaining existing behaviour, the tunable defaults to zero. Reviewed by: cem, markj Sponsored by: NetApp, Inc. Sponsored by: Klara, Inc. Differential Revision:https://reviews.freebsd.org/D27271 Modified: head/share/man/man4/ddb.4 head/sys/kern/kern_shutdown.c Modified: head/share/man/man4/ddb.4 == --- head/share/man/man4/ddb.4 Thu Nov 19 17:54:41 2020(r367847) +++ head/share/man/man4/ddb.4 Thu Nov 19 18:03:40 2020(r367848) @@ -26,7 +26,7 @@ .\" .\" $FreeBSD$ .\" -.Dd October 17, 2019 +.Dd November 19, 2020 .Dt DDB 4 .Os .Sh NAME @@ -87,6 +87,16 @@ which is the default unless the .Dv KDB_UNATTENDED option is specified. +Similarly, if the +.Va debug.debugger_on_recursive_panic +variable is set to +.Dv 1 , +then the debugger will be invoked on a recursive kernel panic. +This variable has a default value of +.Dv 0 , +and has no effect if +.Va debug.debugger_on_panic +is already set non-zero. .Pp The current location is called .Va dot . Modified: head/sys/kern/kern_shutdown.c == --- head/sys/kern/kern_shutdown.c Thu Nov 19 17:54:41 2020 (r367847) +++ head/sys/kern/kern_shutdown.c Thu Nov 19 18:03:40 2020 (r367848) @@ -127,6 +127,11 @@ SYSCTL_INT(_debug, OID_AUTO, debugger_on_panic, CTLFLAG_RWTUN | CTLFLAG_SECURE, _on_panic, 0, "Run debugger on kernel panic"); +static bool debugger_on_recursive_panic = false; +SYSCTL_BOOL(_debug, OID_AUTO, debugger_on_recursive_panic, +CTLFLAG_RWTUN | CTLFLAG_SECURE, +_on_recursive_panic, 0, "Run debugger on recursive kernel panic"); + int debugger_on_trap = 0; SYSCTL_INT(_debug, OID_AUTO, debugger_on_trap, CTLFLAG_RWTUN | CTLFLAG_SECURE, @@ -899,6 +904,8 @@ vpanic(const char *fmt, va_list ap) kdb_backtrace(); if (debugger_on_panic) kdb_enter(KDB_WHY_PANIC, "panic"); + else if (!newpanic && debugger_on_recursive_panic) + kdb_enter(KDB_WHY_PANIC, "re-panic"); #endif /*thread_lock(td); */ td->td_flags |= TDF_INPANIC; ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r367734 - head/usr.bin/bsdiff/bsdiff
Author: mhorne Date: Mon Nov 16 18:41:49 2020 New Revision: 367734 URL: https://svnweb.freebsd.org/changeset/base/367734 Log: bsdiff: fix off-by-one error The program reads oldsize bytes from oldfile, and proceeds to initialize a suffix array of oldsize elements using divsufsort(). As per the function's API [1], array indices 0 through n-1 are initialized. Later, search() is called, but with index bounds [0, n]. Depending on the contents of the malloc'd buffer, accessing this uninitialized index at the end of can result in a segmentation fault. Fix this by passing oldsize-1 to search(), limiting the search bounds to [0, n-1]. This bug is a result of r303285, which introduced divsufsort() as an alternate suffix sorting function to the existing qsufsort(). It seems that qsufsort() did initialize the final empty element, meaning it could be safely accessed. This difference in the implementations was missed at the time. [1] https://github.com/y-256/libdivsufsort Discussed with: cperciva MFC after:1 week Sponsored by: The FreeBSD Foundation Differential Revision:https://reviews.freebsd.org/D26911 Modified: head/usr.bin/bsdiff/bsdiff/bsdiff.c Modified: head/usr.bin/bsdiff/bsdiff/bsdiff.c == --- head/usr.bin/bsdiff/bsdiff/bsdiff.c Mon Nov 16 17:56:58 2020 (r367733) +++ head/usr.bin/bsdiff/bsdiff/bsdiff.c Mon Nov 16 18:41:49 2020 (r367734) @@ -212,7 +212,7 @@ int main(int argc,char *argv[]) for(scsc=scan+=len;scanhttps://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r367494 - head/sys/net
Author: mhorne
Date: Sun Nov 8 19:02:22 2020
New Revision: 367494
URL: https://svnweb.freebsd.org/changeset/base/367494
Log:
Fix definition of rn_addmask()
Add the missing static keyword present in the declaration.
Reviewed by: melifaro
Sponsored by: NetApp, Inc.
Sponsored by: Klara, Inc.
Differential Revision:https://reviews.freebsd.org/D27024
Modified:
head/sys/net/radix.c
Modified: head/sys/net/radix.c
==
--- head/sys/net/radix.cSun Nov 8 18:49:23 2020(r367493)
+++ head/sys/net/radix.cSun Nov 8 19:02:22 2020(r367494)
@@ -483,7 +483,7 @@ on1:
return (tt);
}
-struct radix_node *
+static struct radix_node *
rn_addmask(void *n_arg, struct radix_mask_head *maskhead, int search, int skip)
{
unsigned char *netmask = n_arg;
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svn commit: r367493 - head/sys/netinet
Author: mhorne
Date: Sun Nov 8 18:49:23 2020
New Revision: 367493
URL: https://svnweb.freebsd.org/changeset/base/367493
Log:
igmp: convert igmpstat to use PCPU counters
Currently there is no locking done to protect this structure. It is
likely okay due to the low-volume nature of IGMP, but allows for
the possibility of underflow. This appears to be one of the only
holdouts of the conversion to counter(9) which was done for most
protocol stat structures around 2013.
This also updates the visibility of this stats structure so that it can
be consumed from elsewhere in the kernel, consistent with the vast
majority of VNET_PCPUSTAT structures.
Reviewed by: kp
Sponsored by: NetApp, Inc.
Sponsored by: Klara, Inc.
Differential Revision:https://reviews.freebsd.org/D27023
Modified:
head/sys/netinet/igmp.c
head/sys/netinet/igmp_var.h
Modified: head/sys/netinet/igmp.c
==
--- head/sys/netinet/igmp.c Sun Nov 8 18:47:05 2020(r367492)
+++ head/sys/netinet/igmp.c Sun Nov 8 18:49:23 2020(r367493)
@@ -230,16 +230,15 @@ VNET_DEFINE_STATIC(int, current_state_timers_running);
#defineV_state_change_timers_running
VNET(state_change_timers_running)
#defineV_current_state_timers_running
VNET(current_state_timers_running)
+VNET_PCPUSTAT_DEFINE(struct igmpstat, igmpstat);
+VNET_PCPUSTAT_SYSINIT(igmpstat);
+VNET_PCPUSTAT_SYSUNINIT(igmpstat);
+
VNET_DEFINE_STATIC(LIST_HEAD(, igmp_ifsoftc), igi_head) =
LIST_HEAD_INITIALIZER(igi_head);
-VNET_DEFINE_STATIC(struct igmpstat, igmpstat) = {
- .igps_version = IGPS_VERSION_3,
- .igps_len = sizeof(struct igmpstat),
-};
VNET_DEFINE_STATIC(struct timeval, igmp_gsrdelay) = {10, 0};
#defineV_igi_head VNET(igi_head)
-#defineV_igmpstat VNET(igmpstat)
#defineV_igmp_gsrdelay VNET(igmp_gsrdelay)
VNET_DEFINE_STATIC(int, igmp_recvifkludge) = 1;
@@ -263,7 +262,8 @@ VNET_DEFINE_STATIC(int, igmp_default_version) = IGMP_V
*/
SYSCTL_PROC(_net_inet_igmp, IGMPCTL_STATS, stats,
CTLFLAG_VNET | CTLTYPE_STRUCT | CTLFLAG_RW | CTLFLAG_MPSAFE,
-_NAME(igmpstat), 0, sysctl_igmp_stat, "S,igmpstat", "");
+_NAME(igmpstat), 0, sysctl_igmp_stat, "S,igmpstat",
+"IGMP statistics (struct igmpstat, netinet/igmp_var.h)");
SYSCTL_INT(_net_inet_igmp, OID_AUTO, recvifkludge, CTLFLAG_VNET | CTLFLAG_RW,
_NAME(igmp_recvifkludge), 0,
"Rewrite IGMPv1/v2 reports from 0.0.0.0 to contain subnet address");
@@ -347,22 +347,31 @@ sysctl_igmp_stat(SYSCTL_HANDLER_ARGS)
int error;
char *p;
- error = sysctl_wire_old_buffer(req, sizeof(V_igmpstat));
+ error = sysctl_wire_old_buffer(req, sizeof(struct igmpstat));
if (error)
return (error);
if (req->oldptr != NULL) {
- if (req->oldlen < sizeof(V_igmpstat))
+ if (req->oldlen < sizeof(struct igmpstat))
error = ENOMEM;
- else
- error = SYSCTL_OUT(req, _igmpstat,
- sizeof(V_igmpstat));
+ else {
+ /*
+* Copy the counters, and explicitly set the struct's
+* version and length fields.
+*/
+ COUNTER_ARRAY_COPY(VNET(igmpstat), ,
+ sizeof(struct igmpstat) / sizeof(uint64_t));
+ igps0.igps_version = IGPS_VERSION_3;
+ igps0.igps_len = IGPS_VERSION3_LEN;
+ error = SYSCTL_OUT(req, ,
+ sizeof(struct igmpstat));
+ }
} else
- req->validlen = sizeof(V_igmpstat);
+ req->validlen = sizeof(struct igmpstat);
if (error)
goto out;
if (req->newptr != NULL) {
- if (req->newlen < sizeof(V_igmpstat))
+ if (req->newlen < sizeof(struct igmpstat))
error = ENOMEM;
else
error = SYSCTL_IN(req, ,
@@ -379,12 +388,8 @@ sysctl_igmp_stat(SYSCTL_HANDLER_ARGS)
error = EINVAL;
goto out;
}
- /*
-* Avoid overwrite of the version and length field.
-*/
- igps0.igps_version = V_igmpstat.igps_version;
- igps0.igps_len = V_igmpstat.igps_len;
- bcopy(, _igmpstat, sizeof(V_igmpstat));
+ COUNTER_ARRAY_ZERO(VNET(igmpstat),
+ sizeof(struct igmpstat) / sizeof(uint64_t));
}
out:
return (error);
Modified: head/sys/netinet/igmp_var.h
==
--- head/sys/netinet/igmp_var.h Sun Nov 8
svn commit: r367356 - head/sys/riscv/riscv
Author: mhorne
Date: Thu Nov 5 00:52:52 2020
New Revision: 367356
URL: https://svnweb.freebsd.org/changeset/base/367356
Log:
riscv: set kernel_pmap hart mask more precisely
In pmap_bootstrap(), we fill kernel_pmap->pm_active since it is
invariably active on all harts. However, this marks it as active even
for harts that don't exist in the system, which can cause issue when the
mask is passed to the SBI firmware via sbi_remote_sfence_vma().
Specifically, the SBI spec allows SBI_ERR_INVALID_PARAM to be returned
when an invalid hart is set in the mask.
The latest version of OpenSBI does not have this issue, but v0.6 does,
and this is triggering a recently added KASSERT in CI. Switch to only
setting bits in pm_active for harts that enter the system.
Reported by: Jenkins
Reviewed by: markj
Differential Revision:https://reviews.freebsd.org/D27080
Modified:
head/sys/riscv/riscv/mp_machdep.c
head/sys/riscv/riscv/pmap.c
Modified: head/sys/riscv/riscv/mp_machdep.c
==
--- head/sys/riscv/riscv/mp_machdep.c Wed Nov 4 23:29:27 2020
(r367355)
+++ head/sys/riscv/riscv/mp_machdep.c Thu Nov 5 00:52:52 2020
(r367356)
@@ -46,6 +46,7 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
+#include
#include
#include
#include
@@ -265,6 +266,9 @@ init_secondary(uint64_t hart)
/* Enable external (PLIC) interrupts */
csr_set(sie, SIE_SEIE);
+
+ /* Activate this hart in the kernel pmap. */
+ CPU_SET_ATOMIC(hart, _pmap->pm_active);
/* Activate process 0's pmap. */
pmap_activate_boot(vmspace_pmap(proc0.p_vmspace));
Modified: head/sys/riscv/riscv/pmap.c
==
--- head/sys/riscv/riscv/pmap.c Wed Nov 4 23:29:27 2020(r367355)
+++ head/sys/riscv/riscv/pmap.c Thu Nov 5 00:52:52 2020(r367356)
@@ -573,7 +573,12 @@ pmap_bootstrap(vm_offset_t l1pt, vm_paddr_t kernstart,
rw_init(_global_lock, "pmap pv global");
- CPU_FILL(_pmap->pm_active);
+ /*
+* Set the current CPU as active in the kernel pmap. Secondary cores
+* will add themselves later in init_secondary(). The SBI firmware
+* may rely on this mask being precise, so CPU_FILL() is not used.
+*/
+ CPU_SET(PCPU_GET(hart), _pmap->pm_active);
/* Assume the address we were loaded to is a valid physical address. */
min_pa = max_pa = kernstart;
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svn commit: r367178 - head/release/arm64
Author: mhorne
Date: Fri Oct 30 18:22:46 2020
New Revision: 367178
URL: https://svnweb.freebsd.org/changeset/base/367178
Log:
arm64: set the correct partition type in make-memstick.sh
We create a UFS root filesystem using makefs(8), and later pass it to
mkimg(1) when creating the final image. The correct partition type is
freebsd-ufs; the freebsd parition type is for partitions containing a
BSD disklabel.
Reviewed by: emaste
MFC after:2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision:https://reviews.freebsd.org/D26987
Modified:
head/release/arm64/make-memstick.sh
Modified: head/release/arm64/make-memstick.sh
==
--- head/release/arm64/make-memstick.sh Fri Oct 30 18:20:52 2020
(r367177)
+++ head/release/arm64/make-memstick.sh Fri Oct 30 18:22:46 2020
(r367178)
@@ -45,7 +45,7 @@ make_esp_file ${espfilename} ${fat32min} ${1}/boot/loa
mkimg -s gpt \
-p efi:=${espfilename} \
--p freebsd:=${2}.part \
+-p freebsd-ufs:=${2}.part \
-o ${2}
rm ${espfilename}
rm ${2}.part
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svn commit: r367177 - in head/release: scripts tools
Author: mhorne
Date: Fri Oct 30 18:20:52 2020
New Revision: 367177
URL: https://svnweb.freebsd.org/changeset/base/367177
Log:
arm64: convert virtual machine images to GPT
These images were switched to MBR in r281876 as a way to cope with a
hard-coded partition GUID in QEMU's default EFI firmware. Enough time
has passed that this is no longer a problem; QEMU versions >= 4.0
include a copy of edk2 EFI firmware that can detect the root filesystem
properly. Alternatively, sysutils/u-boot-qemu-arm64 can be used.
Switch back to building these images with a GPT partition table, and
re-enable the swap partition.
Reviewed by: gjb, emaste
MFC after:2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision:https://reviews.freebsd.org/D26986
Modified:
head/release/scripts/mk-vmimage.sh
head/release/tools/vmimage.subr
Modified: head/release/scripts/mk-vmimage.sh
==
--- head/release/scripts/mk-vmimage.sh Fri Oct 30 18:18:25 2020
(r367176)
+++ head/release/scripts/mk-vmimage.sh Fri Oct 30 18:20:52 2020
(r367177)
@@ -93,15 +93,7 @@ main() {
. "${VMCONFIG}"
fi
- case ${TARGET}:${TARGET_ARCH} in
- arm64:aarch64)
- ROOTLABEL="ufs"
- NOSWAP=1
- ;;
- *)
- ROOTLABEL="gpt"
- ;;
- esac
+ ROOTLABEL="gpt"
vm_create_base
vm_install_base
Modified: head/release/tools/vmimage.subr
==
--- head/release/tools/vmimage.subr Fri Oct 30 18:18:25 2020
(r367176)
+++ head/release/tools/vmimage.subr Fri Oct 30 18:20:52 2020
(r367177)
@@ -32,9 +32,9 @@ write_partition_layout() {
;;
arm64:aarch64)
ESP=yes
- SCHEME=mbr
+ SCHEME=gpt
BOOTPARTS=
- ROOTFSPART="-p freebsd:=${VMBASE}"
+ ROOTFSPART="-p freebsd-ufs/rootfs:=${VMBASE}"
;;
powerpc:powerpc*)
ESP=no
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svn commit: r367176 - head/release/tools
Author: mhorne
Date: Fri Oct 30 18:18:25 2020
New Revision: 367176
URL: https://svnweb.freebsd.org/changeset/base/367176
Log:
vmimage.subr: noisier failure for unsupported targets
The return code of write_partition_layout() doesn't bubble up, so an
invocation of make vm-release for an incorrect/unsupported target will
appear to succeed while make vm-install will fail due to missing
files. This isn't a common point of failure, but is worth handling
properly.
Upgrade this case to print a message to stderr, and exit in place. This
is okay to do since at this point in the execution of mk-vmimage.sh,
cleanup() has already been run.
Reviewed by: gjb
MFC after:2 weeks
Differential Revision:https://reviews.freebsd.org/D26985
Modified:
head/release/tools/vmimage.subr
Modified: head/release/tools/vmimage.subr
==
--- head/release/tools/vmimage.subr Fri Oct 30 18:16:10 2020
(r367175)
+++ head/release/tools/vmimage.subr Fri Oct 30 18:18:25 2020
(r367176)
@@ -43,8 +43,8 @@ write_partition_layout() {
ROOTFSPART="-p freebsd-ufs/rootfs:=${VMBASE}"
;;
*)
- # ENOTSUPP
- return 1
+ echo "vmimage.subr: unsupported target
'${TARGET}:${TARGET_ARCH}'" >&2
+ exit 1
;;
esac
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svn commit: r367175 - head/release/tools
Author: mhorne
Date: Fri Oct 30 18:16:10 2020
New Revision: 367175
URL: https://svnweb.freebsd.org/changeset/base/367175
Log:
Slight refactor in vmimage.subr
De-duplicate the invocation of mkimg(1). No functional change.
Reviewed by: gjb
MFC after:2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision:https://reviews.freebsd.org/D26984
Modified:
head/release/tools/vmimage.subr
Modified: head/release/tools/vmimage.subr
==
--- head/release/tools/vmimage.subr Fri Oct 30 17:05:36 2020
(r367174)
+++ head/release/tools/vmimage.subr Fri Oct 30 18:16:10 2020
(r367175)
@@ -24,40 +24,46 @@ write_partition_layout() {
case "${TARGET}:${TARGET_ARCH}" in
amd64:amd64 | i386:i386)
- # Create an ESP
- espfilename=$(mktemp /tmp/efiboot.XX)
- make_esp_file ${espfilename} ${fat32min}
${BOOTFILES}/efi/loader_lua/loader_lua.efi
- mkimg -s gpt -f ${VMFORMAT} \
- -b ${BOOTFILES}/i386/pmbr/pmbr \
- -p
freebsd-boot/bootfs:=${BOOTFILES}/i386/gptboot/gptboot \
- -p efi:=${espfilename} \
- ${SWAPOPT} \
- -p freebsd-ufs/rootfs:=${VMBASE} \
- -o ${VMIMAGE}
- rm ${espfilename}
+ ESP=yes
+ SCHEME=gpt
+ BOOTPARTS="-b ${BOOTFILES}/i386/pmbr/pmbr \
+ -p
freebsd-boot/bootfs:=${BOOTFILES}/i386/gptboot/gptboot"
+ ROOTFSPART="-p freebsd-ufs/rootfs:=${VMBASE}"
;;
arm64:aarch64)
- # Create an ESP
- espfilename=$(mktemp /tmp/efiboot.XX)
- make_esp_file ${espfilename} ${fat32min}
${BOOTFILES}/efi/loader_lua/loader_lua.efi
- mkimg -s mbr -f ${VMFORMAT} \
- -p efi:=${espfilename} \
- -p freebsd:=${VMBASE} \
- -o ${VMIMAGE}
- rm ${espfilename}
+ ESP=yes
+ SCHEME=mbr
+ BOOTPARTS=
+ ROOTFSPART="-p freebsd:=${VMBASE}"
;;
powerpc:powerpc*)
- mkimg -s apm -f ${VMFORMAT} \
- -p
apple-boot/bootfs:=${BOOTFILES}/powerpc/boot1.chrp/boot1.hfs \
- ${SWAPOPT} \
- -p freebsd-ufs/rootfs:=${VMBASE} \
- -o ${VMIMAGE}
+ ESP=no
+ SCHEME=apm
+ BOOTPARTS="-p
apple-boot/bootfs:=${BOOTFILES}/powerpc/boot1.chrp/boot1.hfs"
+ ROOTFSPART="-p freebsd-ufs/rootfs:=${VMBASE}"
;;
*)
# ENOTSUPP
return 1
;;
esac
+
+ if [ ${ESP} = "yes" ]; then
+ # Create an ESP
+ espfilename=$(mktemp /tmp/efiboot.XX)
+ make_esp_file ${espfilename} ${fat32min}
${BOOTFILES}/efi/loader_lua/loader_lua.efi
+ BOOTPARTS="${BOOTPARTS} -p efi:=${espfilename}"
+ fi
+
+ mkimg -s ${SCHEME} -f ${VMFORMAT} \
+ ${BOOTPARTS} \
+ ${SWAPOPT} \
+ ${ROOTFSPART} \
+ -o ${VMIMAGE}
+
+ if [ ${ESP} = "yes" ]; then
+ rm ${espfilename}
+ fi
return 0
}
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svn commit: r367163 - head/sys/net
Author: mhorne
Date: Fri Oct 30 13:32:58 2020
New Revision: 367163
URL: https://svnweb.freebsd.org/changeset/base/367163
Log:
net: add ETHER_IS_IPV6_MULTICAST
This can be used to detect if an ethernet address is specifically an
IPv6 multicast address, defined in accordance to RFC 2464.
ETHER_IS_MULTICAST is still preferred in the general case.
Reviewed by: ae
Sponsored by: NetApp, Inc.
Sponsored by: Klara, Inc.
Differential Revision:https://reviews.freebsd.org/D26611
Modified:
head/sys/net/ethernet.h
Modified: head/sys/net/ethernet.h
==
--- head/sys/net/ethernet.h Fri Oct 30 10:46:35 2020(r367162)
+++ head/sys/net/ethernet.h Fri Oct 30 13:32:58 2020(r367163)
@@ -71,6 +71,8 @@ struct ether_addr {
} __packed;
#defineETHER_IS_MULTICAST(addr) (*(addr) & 0x01) /* is address
mcast/bcast? */
+#defineETHER_IS_IPV6_MULTICAST(addr) \
+ (((addr)[0] == 0x33) && ((addr)[1] == 0x33))
#defineETHER_IS_BROADCAST(addr) \
(((addr)[0] & (addr)[1] & (addr)[2] & \
(addr)[3] & (addr)[4] & (addr)[5]) == 0xff)
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svn commit: r367068 - in head/sys/riscv: include riscv
Author: mhorne
Date: Mon Oct 26 19:13:22 2020
New Revision: 367068
URL: https://svnweb.freebsd.org/changeset/base/367068
Log:
riscv: make use of SBI legacy replacement extensions
Version 0.2 of the SBI specification [1] marked the existing SBI
functions as "legacy" in order to move to a newer calling convention. It
also introduced a set of replacement extensions for some of the legacy
functionality. In particular, the TIME, IPI, and RFENCE extensions
implement and extend the semantics of their legacy counterparts, while
conforming to the newer version of the spec.
Update our SBI code to use the new replacement extensions when
available, and fall back to the legacy ones. These will eventually be
dropped, when support for version 0.2 is ubiquitous.
[1] https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc
Submitted by: Danjel Q.
Reviewed by: kp
Differential Revision:https://reviews.freebsd.org/D26953
Modified:
head/sys/riscv/include/sbi.h
head/sys/riscv/riscv/sbi.c
Modified: head/sys/riscv/include/sbi.h
==
--- head/sys/riscv/include/sbi.hMon Oct 26 19:06:30 2020
(r367067)
+++ head/sys/riscv/include/sbi.hMon Oct 26 19:13:22 2020
(r367068)
@@ -67,6 +67,24 @@
#defineSBI_BASE_GET_MARCHID5
#defineSBI_BASE_GET_MIMPID 6
+/* Timer (TIME) Extension */
+#defineSBI_EXT_ID_TIME 0x54494D45
+#defineSBI_TIME_SET_TIMER 0
+
+/* IPI (IPI) Extension */
+#defineSBI_EXT_ID_IPI 0x735049
+#defineSBI_IPI_SEND_IPI0
+
+/* RFENCE (RFNC) Extension */
+#defineSBI_EXT_ID_RFNC 0x52464E43
+#defineSBI_RFNC_REMOTE_FENCE_I 0
+#defineSBI_RFNC_REMOTE_SFENCE_VMA 1
+#defineSBI_RFNC_REMOTE_SFENCE_VMA_ASID 2
+#defineSBI_RFNC_REMOTE_HFENCE_GVMA_VMID3
+#defineSBI_RFNC_REMOTE_HFENCE_GVMA 4
+#defineSBI_RFNC_REMOTE_HFENCE_VVMA_ASID5
+#defineSBI_RFNC_REMOTE_HFENCE_VVMA 6
+
/* Hart State Management (HSM) Extension */
#defineSBI_EXT_ID_HSM 0x48534D
#defineSBI_HSM_HART_START 0
@@ -88,11 +106,12 @@
#defineSBI_REMOTE_SFENCE_VMA_ASID 7
#defineSBI_SHUTDOWN8
-#defineSBI_CALL0(e, f) SBI_CALL4(e, f, 0, 0, 0, 0)
-#defineSBI_CALL1(e, f, p1) SBI_CALL4(e, f, p1, 0, 0, 0)
-#defineSBI_CALL2(e, f, p1, p2) SBI_CALL4(e, f, p1, p2, 0, 0)
-#defineSBI_CALL3(e, f, p1, p2, p3) SBI_CALL4(e, f, p1, p2, p3, 0)
-#defineSBI_CALL4(e, f, p1, p2, p3, p4) sbi_call(e, f, p1, p2, p3, p4)
+#defineSBI_CALL0(e, f) SBI_CALL5(e, f, 0, 0,
0, 0, 0)
+#defineSBI_CALL1(e, f, p1) SBI_CALL5(e, f, p1, 0,
0, 0, 0)
+#defineSBI_CALL2(e, f, p1, p2) SBI_CALL5(e, f, p1, p2,
0, 0, 0)
+#defineSBI_CALL3(e, f, p1, p2, p3) SBI_CALL5(e, f, p1, p2,
p3, 0, 0)
+#defineSBI_CALL4(e, f, p1, p2, p3, p4) SBI_CALL5(e, f, p1, p2,
p3, p4, 0)
+#defineSBI_CALL5(e, f, p1, p2, p3, p4, p5) sbi_call(e, f, p1, p2,
p3, p4, p5)
/*
* Documentation available at
@@ -106,7 +125,7 @@ struct sbi_ret {
static __inline struct sbi_ret
sbi_call(uint64_t arg7, uint64_t arg6, uint64_t arg0, uint64_t arg1,
-uint64_t arg2, uint64_t arg3)
+uint64_t arg2, uint64_t arg3, uint64_t arg4)
{
struct sbi_ret ret;
@@ -114,13 +133,14 @@ sbi_call(uint64_t arg7, uint64_t arg6, uint64_t arg0,
register uintptr_t a1 __asm ("a1") = (uintptr_t)(arg1);
register uintptr_t a2 __asm ("a2") = (uintptr_t)(arg2);
register uintptr_t a3 __asm ("a3") = (uintptr_t)(arg3);
+ register uintptr_t a4 __asm ("a4") = (uintptr_t)(arg4);
register uintptr_t a6 __asm ("a6") = (uintptr_t)(arg6);
register uintptr_t a7 __asm ("a7") = (uintptr_t)(arg7);
__asm __volatile( \
"ecall" \
:"+r"(a0), "+r"(a1) \
- :"r"(a2), "r"(a3), "r"(a6), "r"(a7) \
+ :"r"(a2), "r"(a3), "r"(a4), "r"(a6), "r"(a7)\
:"memory");
ret.error = a0;
@@ -139,6 +159,18 @@ sbi_probe_extension(long id)
return (SBI_CALL1(SBI_EXT_ID_BASE, SBI_BASE_PROBE_EXTENSION, id).value);
}
+/* TIME extension functions. */
+void sbi_set_timer(uint64_t val);
+
+/* IPI extension functions. */
+void sbi_send_ipi(const u_long *hart_mask);
+
+/* RFENCE extension functions. */
+void sbi_remote_fence_i(const u_long *hart_mask);
+void sbi_remote_sfence_vma(const u_long *hart_mask, u_long start, u_long size);
+void
svn commit: r367067 - in head/sys/riscv: include riscv
Author: mhorne
Date: Mon Oct 26 19:06:30 2020
New Revision: 367067
URL: https://svnweb.freebsd.org/changeset/base/367067
Log:
riscv: remove sbi_clear_ipi()
S-mode software has write access to the SIP.SSIP bit, so instead of
making a second round-trip through the SBI we can clear it ourselves.
The SBI spec has deprecated this function for this exactly this reason.
Submitted by: Danjel Q. https://reviews.freebsd.org/D26952
Modified:
head/sys/riscv/include/sbi.h
head/sys/riscv/riscv/mp_machdep.c
head/sys/riscv/riscv/sbi.c
Modified: head/sys/riscv/include/sbi.h
==
--- head/sys/riscv/include/sbi.hMon Oct 26 18:03:50 2020
(r367066)
+++ head/sys/riscv/include/sbi.hMon Oct 26 19:06:30 2020
(r367067)
@@ -197,13 +197,6 @@ sbi_shutdown(void)
}
static __inline void
-sbi_clear_ipi(void)
-{
-
- (void)SBI_CALL0(SBI_CLEAR_IPI, 0);
-}
-
-static __inline void
sbi_send_ipi(const unsigned long *hart_mask)
{
Modified: head/sys/riscv/riscv/mp_machdep.c
==
--- head/sys/riscv/riscv/mp_machdep.c Mon Oct 26 18:03:50 2020
(r367066)
+++ head/sys/riscv/riscv/mp_machdep.c Mon Oct 26 19:06:30 2020
(r367067)
@@ -317,7 +317,7 @@ ipi_handler(void *arg)
u_int cpu, ipi;
int bit;
- sbi_clear_ipi();
+ csr_clear(sip, SIP_SSIP);
cpu = PCPU_GET(cpuid);
Modified: head/sys/riscv/riscv/sbi.c
==
--- head/sys/riscv/riscv/sbi.c Mon Oct 26 18:03:50 2020(r367066)
+++ head/sys/riscv/riscv/sbi.c Mon Oct 26 19:06:30 2020(r367067)
@@ -183,8 +183,6 @@ sbi_init(void)
("SBI doesn't implement sbi_console_putchar()"));
KASSERT(sbi_probe_extension(SBI_CONSOLE_GETCHAR) != 0,
("SBI doesn't implement sbi_console_getchar()"));
- KASSERT(sbi_probe_extension(SBI_CLEAR_IPI) != 0,
- ("SBI doesn't implement sbi_clear_ipi()"));
KASSERT(sbi_probe_extension(SBI_SEND_IPI) != 0,
("SBI doesn't implement sbi_send_ipi()"));
KASSERT(sbi_probe_extension(SBI_REMOTE_FENCE_I) != 0,
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svn commit: r367033 - head/sys/cddl/dev/dtrace/riscv
Author: mhorne
Date: Sat Oct 24 23:21:51 2020
New Revision: 367033
URL: https://svnweb.freebsd.org/changeset/base/367033
Log:
Fix build after r367020
DTrace also relies on these definitions.
Reported by: jenkins
Modified:
head/sys/cddl/dev/dtrace/riscv/dtrace_subr.c
Modified: head/sys/cddl/dev/dtrace/riscv/dtrace_subr.c
==
--- head/sys/cddl/dev/dtrace/riscv/dtrace_subr.cSat Oct 24 23:21:31
2020(r367032)
+++ head/sys/cddl/dev/dtrace/riscv/dtrace_subr.cSat Oct 24 23:21:51
2020(r367033)
@@ -202,9 +202,9 @@ dtrace_trap(struct trapframe *frame, u_int type)
* All the rest will be handled in the usual way.
*/
switch (type) {
- case EXCP_FAULT_LOAD:
- case EXCP_FAULT_STORE:
- case EXCP_FAULT_FETCH:
+ case SCAUSE_LOAD_ACCESS_FAULT:
+ case SCAUSE_STORE_ACCESS_FAULT:
+ case SCAUSE_INST_ACCESS_FAULT:
/* Flag a bad address. */
cpu_core[curcpu].cpuc_dtrace_flags |=
CPU_DTRACE_BADADDR;
cpu_core[curcpu].cpuc_dtrace_illval = 0;
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svn commit: r367020 - in head/sys/riscv: include riscv
Author: mhorne
Date: Sat Oct 24 20:57:13 2020
New Revision: 367020
URL: https://svnweb.freebsd.org/changeset/base/367020
Log:
riscv: improve exception code naming
The existing names were inherited from arm64, but we should prefer
RISC-V terminology. Change the prefix to SCAUSE, and further change the
names to better match the RISC-V spec and be more consistent with one
another. Also, remove two codes that are not defined for S-mode (machine
and hypervisor ecall).
While here, apply style(9) to some condition checks.
Reviewed by: kp
Discussed with: jrtc27
Differential Revision:https://reviews.freebsd.org/D26918
Modified:
head/sys/riscv/include/db_machdep.h
head/sys/riscv/include/riscvreg.h
head/sys/riscv/riscv/db_trace.c
head/sys/riscv/riscv/intr_machdep.c
head/sys/riscv/riscv/trap.c
Modified: head/sys/riscv/include/db_machdep.h
==
--- head/sys/riscv/include/db_machdep.h Sat Oct 24 20:52:05 2020
(r367019)
+++ head/sys/riscv/include/db_machdep.h Sat Oct 24 20:57:13 2020
(r367020)
@@ -41,7 +41,7 @@
#include
#include
-#defineT_BREAKPOINT(EXCP_BREAKPOINT)
+#defineT_BREAKPOINT(SCAUSE_BREAKPOINT)
#defineT_WATCHPOINT(0)
typedef vm_offset_tdb_addr_t;
Modified: head/sys/riscv/include/riscvreg.h
==
--- head/sys/riscv/include/riscvreg.h Sat Oct 24 20:52:05 2020
(r367019)
+++ head/sys/riscv/include/riscvreg.h Sat Oct 24 20:57:13 2020
(r367020)
@@ -37,23 +37,21 @@
#ifndef _MACHINE_RISCVREG_H_
#define_MACHINE_RISCVREG_H_
-#defineEXCP_MASK (~EXCP_INTR)
-#defineEXCP_MISALIGNED_FETCH 0
-#defineEXCP_FAULT_FETCH1
-#defineEXCP_ILLEGAL_INSTRUCTION2
-#defineEXCP_BREAKPOINT 3
-#defineEXCP_MISALIGNED_LOAD4
-#defineEXCP_FAULT_LOAD 5
-#defineEXCP_MISALIGNED_STORE 6
-#defineEXCP_FAULT_STORE7
-#defineEXCP_USER_ECALL 8
-#defineEXCP_SUPERVISOR_ECALL 9
-#defineEXCP_HYPERVISOR_ECALL 10
-#defineEXCP_MACHINE_ECALL 11
-#defineEXCP_INST_PAGE_FAULT12
-#defineEXCP_LOAD_PAGE_FAULT13
-#defineEXCP_STORE_PAGE_FAULT 15
-#defineEXCP_INTR (1ul << 63)
+#defineSCAUSE_INTR (1ul << 63)
+#defineSCAUSE_CODE (~SCAUSE_INTR)
+#defineSCAUSE_INST_MISALIGNED 0
+#defineSCAUSE_INST_ACCESS_FAULT1
+#defineSCAUSE_ILLEGAL_INSTRUCTION 2
+#defineSCAUSE_BREAKPOINT 3
+#defineSCAUSE_LOAD_MISALIGNED 4
+#defineSCAUSE_LOAD_ACCESS_FAULT5
+#defineSCAUSE_STORE_MISALIGNED 6
+#defineSCAUSE_STORE_ACCESS_FAULT 7
+#defineSCAUSE_ECALL_USER 8
+#defineSCAUSE_ECALL_SUPERVISOR 9
+#defineSCAUSE_INST_PAGE_FAULT 12
+#defineSCAUSE_LOAD_PAGE_FAULT 13
+#defineSCAUSE_STORE_PAGE_FAULT 15
#defineSSTATUS_UIE (1 << 0)
#defineSSTATUS_SIE (1 << 1)
Modified: head/sys/riscv/riscv/db_trace.c
==
--- head/sys/riscv/riscv/db_trace.c Sat Oct 24 20:52:05 2020
(r367019)
+++ head/sys/riscv/riscv/db_trace.c Sat Oct 24 20:57:13 2020
(r367020)
@@ -101,12 +101,12 @@ db_stack_trace_cmd(struct unwind_state *frame)
tf = (struct trapframe *)(uintptr_t)frame->sp;
- if (tf->tf_scause & EXCP_INTR)
+ if ((tf->tf_scause & SCAUSE_INTR) != 0)
db_printf("--- interrupt %ld\n",
- tf->tf_scause & EXCP_MASK);
+ tf->tf_scause & SCAUSE_CODE);
else
db_printf("--- exception %ld, tval = %#lx\n",
- tf->tf_scause & EXCP_MASK,
+ tf->tf_scause & SCAUSE_CODE,
tf->tf_stval);
frame->sp = tf->tf_sp;
frame->fp = tf->tf_s[0];
Modified: head/sys/riscv/riscv/intr_machdep.c
==
--- head/sys/riscv/riscv/intr_machdep.c Sat Oct 24 20:52:05 2020
(r367019)
+++ head/sys/riscv/riscv/intr_machdep.c Sat Oct 24 20:57:13 2020
(r367020)
@@ -158,10 +158,10 @@ riscv_cpu_intr(struct trapframe *frame)
struct
svn commit: r366794 - head/sys/riscv/riscv
Author: mhorne
Date: Sat Oct 17 17:31:06 2020
New Revision: 366794
URL: https://svnweb.freebsd.org/changeset/base/366794
Log:
riscv: zero reserved PTE bits for L2 PTEs
As was done for L3 PTEs in r362853, mask out the reserved bits when
extracting the physical address from an L2 PTE. Future versions of the
spec or custom implementations may make use of these reserved bits, in
which case the resulting physical address could be incorrect.
Submitted by: Nathaniel Filardo
Reviewed by: kp, mhorne
Differential Revision:https://reviews.freebsd.org/D26607
Modified:
head/sys/riscv/riscv/pmap.c
Modified: head/sys/riscv/riscv/pmap.c
==
--- head/sys/riscv/riscv/pmap.c Sat Oct 17 13:06:29 2020(r366793)
+++ head/sys/riscv/riscv/pmap.c Sat Oct 17 17:31:06 2020(r366794)
@@ -342,6 +342,8 @@ pagezero(void *p)
#definePTE_TO_PHYS(pte) \
pte) & ~PTE_HI_MASK) >> PTE_PPN0_S) * PAGE_SIZE)
+#defineL2PTE_TO_PHYS(l2) \
+l2) & ~PTE_HI_MASK) >> PTE_PPN1_S) << L2_SHIFT)
static __inline pd_entry_t *
pmap_l1(pmap_t pmap, vm_offset_t va)
@@ -477,7 +479,7 @@ pmap_early_vtophys(vm_offset_t l1pt, vm_offset_t va)
("Invalid bootstrap L2 table"));
/* L2 is superpages */
- ret = (l2[l2_slot] >> PTE_PPN1_S) << L2_SHIFT;
+ ret = L2PTE_TO_PHYS(l2[l2_slot]);
ret += (va & L2_OFFSET);
return (ret);
@@ -825,7 +827,7 @@ pmap_extract(pmap_t pmap, vm_offset_t va)
}
} else {
/* L2 is superpages */
- pa = (l2 >> PTE_PPN1_S) << L2_SHIFT;
+ pa = L2PTE_TO_PHYS(l2);
pa |= (va & L2_OFFSET);
}
}
@@ -877,7 +879,7 @@ pmap_kextract(vm_offset_t va)
panic("pmap_kextract: No l2");
if ((pmap_load(l2) & PTE_RX) != 0) {
/* superpages */
- pa = (pmap_load(l2) >> PTE_PPN1_S) << L2_SHIFT;
+ pa = L2PTE_TO_PHYS(pmap_load(l2));
pa |= (va & L2_OFFSET);
return (pa);
}
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svn commit: r366764 - head/sys/arm64/arm64
Author: mhorne
Date: Fri Oct 16 13:37:58 2020
New Revision: 366764
URL: https://svnweb.freebsd.org/changeset/base/366764
Log:
arm64: export a few more HWCAPs
These were missed in the previous pass. The extensions (partially)
supported by this change are:
- ARMv8.2-FHM, Floating-point multiplication variant
- ARMv8.4-LSE, Large System Extensions
- ARMv8.4-DIT, Data Independent Timing instructions
Reviewed by: andrew, markj
Sponsored by: The FreeBSD Foundation
Differential Revision:https://reviews.freebsd.org/D26707
Modified:
head/sys/arm64/arm64/identcpu.c
Modified: head/sys/arm64/arm64/identcpu.c
==
--- head/sys/arm64/arm64/identcpu.c Fri Oct 16 13:35:29 2020
(r366763)
+++ head/sys/arm64/arm64/identcpu.c Fri Oct 16 13:37:58 2020
(r366764)
@@ -883,7 +883,7 @@ static struct mrs_field_value id_aa64pfr0_el0[] = {
static struct mrs_field id_aa64pfr0_fields[] = {
MRS_FIELD(ID_AA64PFR0, CSV3, false, MRS_EXACT, id_aa64pfr0_csv3),
MRS_FIELD(ID_AA64PFR0, CSV2, false, MRS_EXACT, id_aa64pfr0_csv2),
- MRS_FIELD(ID_AA64PFR0, DIT, false, MRS_EXACT, id_aa64pfr0_dit),
+ MRS_FIELD(ID_AA64PFR0, DIT, false, MRS_LOWER, id_aa64pfr0_dit),
MRS_FIELD(ID_AA64PFR0, AMU, false, MRS_EXACT, id_aa64pfr0_amu),
MRS_FIELD(ID_AA64PFR0, MPAM, false, MRS_EXACT, id_aa64pfr0_mpam),
MRS_FIELD(ID_AA64PFR0, SEL2, false, MRS_EXACT, id_aa64pfr0_sel2),
@@ -1257,6 +1257,10 @@ parse_cpu_features_hwcap(void)
break;
}
+ if (ID_AA64ISAR0_FHM_VAL(user_cpu_desc.id_aa64isar0) ==
+ ID_AA64ISAR0_FHM_IMPL)
+ hwcap |= HWCAP_ASIMDFHM;
+
if (ID_AA64ISAR0_DP_VAL(user_cpu_desc.id_aa64isar0) ==
ID_AA64ISAR0_DP_IMPL)
hwcap |= HWCAP_ASIMDDP;
@@ -1337,6 +1341,14 @@ parse_cpu_features_hwcap(void)
if (ID_AA64ISAR1_DPB_VAL(user_cpu_desc.id_aa64isar1) ==
ID_AA64ISAR1_DPB_DCCVAP)
hwcap |= HWCAP_DCPOP;
+
+ if (ID_AA64MMFR2_AT_VAL(user_cpu_desc.id_aa64mmfr2) ==
+ ID_AA64MMFR2_AT_IMPL)
+ hwcap |= HWCAP_USCAT;
+
+ if (ID_AA64PFR0_DIT_VAL(user_cpu_desc.id_aa64pfr0) ==
+ ID_AA64PFR0_DIT_PSTATE)
+ hwcap |= HWCAP_DIT;
if (ID_AA64PFR0_SVE_VAL(user_cpu_desc.id_aa64pfr0) ==
ID_AA64PFR0_SVE_IMPL)
___
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svn commit: r366763 - in head/sys/arm64: arm64 include
Author: mhorne
Date: Fri Oct 16 13:35:29 2020
New Revision: 366763
URL: https://svnweb.freebsd.org/changeset/base/366763
Log:
Update the ID_AA64MMFR2_EL1 register definitions
This brings these definitions in sync with the ARMv8.6 version of the
architecture reference manual.
Sponsored by: The FreeBSD Foundation
Differential Revision:https://reviews.freebsd.org/D26706
Modified:
head/sys/arm64/arm64/identcpu.c
head/sys/arm64/include/armreg.h
Modified: head/sys/arm64/arm64/identcpu.c
==
--- head/sys/arm64/arm64/identcpu.c Fri Oct 16 13:34:56 2020
(r366762)
+++ head/sys/arm64/arm64/identcpu.c Fri Oct 16 13:35:29 2020
(r366763)
@@ -690,6 +690,50 @@ static struct mrs_field id_aa64mmfr1_fields[] = {
/* ID_AA64MMFR2_EL1 */
+static struct mrs_field_value id_aa64mmfr2_e0pd[] = {
+ MRS_FIELD_VALUE_NONE_IMPL(ID_AA64MMFR2, E0PD, NONE, IMPL),
+ MRS_FIELD_VALUE_END,
+};
+
+static struct mrs_field_value id_aa64mmfr2_evt[] = {
+ MRS_FIELD_VALUE(ID_AA64MMFR2_EVT_NONE, ""),
+ MRS_FIELD_VALUE(ID_AA64MMFR2_EVT_8_2, "EVT-8.2"),
+ MRS_FIELD_VALUE(ID_AA64MMFR2_EVT_8_5, "EVT-8.5"),
+ MRS_FIELD_VALUE_END,
+};
+
+static struct mrs_field_value id_aa64mmfr2_bbm[] = {
+ MRS_FIELD_VALUE(ID_AA64MMFR2_BBM_LEVEL0, ""),
+ MRS_FIELD_VALUE(ID_AA64MMFR2_BBM_LEVEL1, "BBM level 1"),
+ MRS_FIELD_VALUE(ID_AA64MMFR2_BBM_LEVEL2, "BBM level 2"),
+ MRS_FIELD_VALUE_END,
+};
+
+static struct mrs_field_value id_aa64mmfr2_ttl[] = {
+ MRS_FIELD_VALUE_NONE_IMPL(ID_AA64MMFR2, TTL, NONE, IMPL),
+ MRS_FIELD_VALUE_END,
+};
+
+static struct mrs_field_value id_aa64mmfr2_fwb[] = {
+ MRS_FIELD_VALUE_NONE_IMPL(ID_AA64MMFR2, FWB, NONE, IMPL),
+ MRS_FIELD_VALUE_END,
+};
+
+static struct mrs_field_value id_aa64mmfr2_ids[] = {
+ MRS_FIELD_VALUE_NONE_IMPL(ID_AA64MMFR2, IDS, NONE, IMPL),
+ MRS_FIELD_VALUE_END,
+};
+
+static struct mrs_field_value id_aa64mmfr2_at[] = {
+ MRS_FIELD_VALUE_NONE_IMPL(ID_AA64MMFR2, AT, NONE, IMPL),
+ MRS_FIELD_VALUE_END,
+};
+
+static struct mrs_field_value id_aa64mmfr2_st[] = {
+ MRS_FIELD_VALUE_NONE_IMPL(ID_AA64MMFR2, ST, NONE, IMPL),
+ MRS_FIELD_VALUE_END,
+};
+
static struct mrs_field_value id_aa64mmfr2_nv[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64MMFR2, NV, NONE, IMPL),
MRS_FIELD_VALUE_END,
@@ -728,6 +772,14 @@ static struct mrs_field_value id_aa64mmfr2_cnp[] = {
};
static struct mrs_field id_aa64mmfr2_fields[] = {
+ MRS_FIELD(ID_AA64MMFR2, E0PD, false, MRS_EXACT, id_aa64mmfr2_e0pd),
+ MRS_FIELD(ID_AA64MMFR2, EVT, false, MRS_EXACT, id_aa64mmfr2_evt),
+ MRS_FIELD(ID_AA64MMFR2, BBM, false, MRS_EXACT, id_aa64mmfr2_bbm),
+ MRS_FIELD(ID_AA64MMFR2, TTL, false, MRS_EXACT, id_aa64mmfr2_ttl),
+ MRS_FIELD(ID_AA64MMFR2, FWB, false, MRS_EXACT, id_aa64mmfr2_fwb),
+ MRS_FIELD(ID_AA64MMFR2, IDS, false, MRS_EXACT, id_aa64mmfr2_ids),
+ MRS_FIELD(ID_AA64MMFR2, AT, false, MRS_LOWER, id_aa64mmfr2_at),
+ MRS_FIELD(ID_AA64MMFR2, ST, false, MRS_EXACT, id_aa64mmfr2_st),
MRS_FIELD(ID_AA64MMFR2, NV, false, MRS_EXACT, id_aa64mmfr2_nv),
MRS_FIELD(ID_AA64MMFR2, CCIDX, false, MRS_EXACT, id_aa64mmfr2_ccidx),
MRS_FIELD(ID_AA64MMFR2, VARange, false, MRS_EXACT,
Modified: head/sys/arm64/include/armreg.h
==
--- head/sys/arm64/include/armreg.h Fri Oct 16 13:34:56 2020
(r366762)
+++ head/sys/arm64/include/armreg.h Fri Oct 16 13:35:29 2020
(r366763)
@@ -578,6 +578,48 @@
#defineID_AA64MMFR2_NV_VAL(x) ((x) & ID_AA64MMFR2_NV_MASK)
#define ID_AA64MMFR2_NV_NONE (UL(0x0) <<
ID_AA64MMFR2_NV_SHIFT)
#define ID_AA64MMFR2_NV_IMPL (UL(0x1) <<
ID_AA64MMFR2_NV_SHIFT)
+#defineID_AA64MMFR2_ST_SHIFT 28
+#defineID_AA64MMFR2_ST_MASK(UL(0xf) <<
ID_AA64MMFR2_ST_SHIFT)
+#defineID_AA64MMFR2_ST_VAL(x) ((x) & ID_AA64MMFR2_ST_MASK)
+#define ID_AA64MMFR2_ST_NONE (UL(0x0) <<
ID_AA64MMFR2_ST_SHIFT)
+#define ID_AA64MMFR2_ST_IMPL (UL(0x1) <<
ID_AA64MMFR2_ST_SHIFT)
+#defineID_AA64MMFR2_AT_SHIFT 32
+#defineID_AA64MMFR2_AT_MASK(UL(0xf) <<
ID_AA64MMFR2_AT_SHIFT)
+#defineID_AA64MMFR2_AT_VAL(x) ((x) & ID_AA64MMFR2_AT_MASK)
+#define ID_AA64MMFR2_AT_NONE (UL(0x0) <<
ID_AA64MMFR2_AT_SHIFT)
+#define ID_AA64MMFR2_AT_IMPL (UL(0x1) <<
ID_AA64MMFR2_AT_SHIFT)
+#defineID_AA64MMFR2_IDS_SHIFT 36
+#defineID_AA64MMFR2_IDS_MASK (UL(0xf) <<
ID_AA64MMFR2_IDS_SHIFT)
+#defineID_AA64MMFR2_IDS_VAL(x) ((x) & ID_AA64MMFR2_IDS_MASK)
+#define ID_AA64MMFR2_IDS_NONE (UL(0x0) <<
svn commit: r366737 - in head/sys: amd64/amd64 arm/arm arm64/arm64 riscv/riscv
Author: mhorne
Date: Thu Oct 15 20:21:15 2020
New Revision: 366737
URL: https://svnweb.freebsd.org/changeset/base/366737
Log:
Simplify preload_dump() condition
Hiding this feature behind RB_VERBOSE is gratuitous. The tunable is enough
to limit its use to only those who explicitly request it.
Suggested by: kevans
Modified:
head/sys/amd64/amd64/machdep.c
head/sys/arm/arm/machdep.c
head/sys/arm64/arm64/machdep.c
head/sys/riscv/riscv/machdep.c
Modified: head/sys/amd64/amd64/machdep.c
==
--- head/sys/amd64/amd64/machdep.c Thu Oct 15 18:03:14 2020
(r366736)
+++ head/sys/amd64/amd64/machdep.c Thu Oct 15 20:21:15 2020
(r366737)
@@ -1859,8 +1859,7 @@ hammer_time(u_int64_t modulep, u_int64_t physfree)
* output is required. If it's grossly incorrect the kernel will never
* make it this far.
*/
- if ((boothowto & RB_VERBOSE) &&
- getenv_is_true("debug.dump_modinfo_at_boot"))
+ if (getenv_is_true("debug.dump_modinfo_at_boot"))
preload_dump();
#ifdef DEV_ISA
Modified: head/sys/arm/arm/machdep.c
==
--- head/sys/arm/arm/machdep.c Thu Oct 15 18:03:14 2020(r366736)
+++ head/sys/arm/arm/machdep.c Thu Oct 15 20:21:15 2020(r366737)
@@ -1032,8 +1032,7 @@ initarm(struct arm_boot_params *abp)
* output is required. If it's grossly incorrect the kernel will never
* make it this far.
*/
- if ((boothowto & RB_VERBOSE) &&
- getenv_is_true("debug.dump_modinfo_at_boot"))
+ if (getenv_is_true("debug.dump_modinfo_at_boot"))
preload_dump();
env = kern_getenv("kernelname");
Modified: head/sys/arm64/arm64/machdep.c
==
--- head/sys/arm64/arm64/machdep.c Thu Oct 15 18:03:14 2020
(r366736)
+++ head/sys/arm64/arm64/machdep.c Thu Oct 15 20:21:15 2020
(r366737)
@@ -1247,8 +1247,7 @@ initarm(struct arm64_bootparams *abp)
* output is required. If it's grossly incorrect the kernel will never
* make it this far.
*/
- if ((boothowto & RB_VERBOSE) &&
- getenv_is_true("debug.dump_modinfo_at_boot"))
+ if (getenv_is_true("debug.dump_modinfo_at_boot"))
preload_dump();
init_proc0(abp->kern_stack);
Modified: head/sys/riscv/riscv/machdep.c
==
--- head/sys/riscv/riscv/machdep.c Thu Oct 15 18:03:14 2020
(r366736)
+++ head/sys/riscv/riscv/machdep.c Thu Oct 15 20:21:15 2020
(r366737)
@@ -954,8 +954,7 @@ initriscv(struct riscv_bootparams *rvbp)
* output is required. If it's grossly incorrect the kernel will never
* make it this far.
*/
- if ((boothowto & RB_VERBOSE) &&
- getenv_is_true("debug.dump_modinfo_at_boot"))
+ if (getenv_is_true("debug.dump_modinfo_at_boot"))
preload_dump();
init_proc0(rvbp->kern_stack);
___
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svn commit: r366574 - head/sys/riscv/conf
Author: mhorne Date: Fri Oct 9 14:45:41 2020 New Revision: 366574 URL: https://svnweb.freebsd.org/changeset/base/366574 Log: RISC-V LINT kernel config Create the RISC-V NOTES and LINT files. As of r366559, LINT configs are no longer generated but checked in to the tree. Reviewed by: imp Differential Revision:https://reviews.freebsd.org/D26502 Added: head/sys/riscv/conf/LINT (contents, props changed) head/sys/riscv/conf/NOTES (contents, props changed) Added: head/sys/riscv/conf/LINT == --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/riscv/conf/LINTFri Oct 9 14:45:41 2020(r366574) @@ -0,0 +1,4 @@ +# $FreeBSD$ + +include "../../conf/NOTES" +include NOTES Added: head/sys/riscv/conf/NOTES == --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/riscv/conf/NOTES Fri Oct 9 14:45:41 2020(r366574) @@ -0,0 +1,96 @@ +# +# NOTES -- Lines that can be cut/pasted into kernel and hints configs. +# +# This file contains machine dependent kernel configuration notes. For +# machine independent notes, look in /sys/conf/NOTES. +# +# $FreeBSD$ +# + +cpuRISCV + +makeoptionsDEBUG=-g# Build kernel with gdb(1) debug symbols +makeoptionsWITH_CTF=1 # Run ctfconvert(1) for DTrace support + +optionsPRINTF_BUFR_SIZE=128# Prevent printf output being interspersed. +optionsKDTRACE_FRAME # Ensure frames are compiled in +optionsKDTRACE_HOOKS # Kernel DTrace hooks +optionsDDB_CTF # Kernel ELF linker loads CTF data +optionsFPE # Floating-point extension support +optionsRACCT_DEFAULT_TO_DISABLED # Set kern.racct.enable=0 by default +optionsINTRNG # Include INTRNG framework + +# RISC-V SBI console +device rcons + +# EXT_RESOURCES pseudo devices +optionsEXT_RESOURCES +device clk +device phy +device regulator +device syscon +device syscon_power +device riscv_syscon + +# Backlight subsystem +device backlight + +# VirtIO support +device virtio # Generic VirtIO bus (required) +device virtio_pci # VirtIO PCI device +device vtnet # VirtIO Ethernet device +device virtio_blk # VirtIO Block device +device virtio_mmio # VirtIO MMIO bus +device virtio_random # VirtIO Entropy device + +# NOTE: dtrace introduces CDDL-licensed components into the kernel +device dtrace # dtrace core +device dtraceall # include all dtrace modules + +# Serial (COM) ports +device uart_lowrisc# lowRISC UART driver +device uart_ns8250 # ns8250-type UART driver + +# RTC +device goldfish_rtc# QEMU RTC + +# Ethernet drivers +device xae # Xilinx AXI Ethernet MAC + +# DMA support +device xdma# DMA interface +device axidma # Xilinx AXI DMA Controller + +# SPI +device xilinx_spi # Xilinx AXI Quad-SPI Controller + +# SOC-specific +device fe310aon +device fu540spi +files "../sifive/files.sifive" + +# Flattened Device Tree +optionsFDT +makeoptionsMODULES_EXTRA+="dtb/sifive" + +# FreeBSD/riscv didn't exist for these releases +nooptions COMPAT_FREEBSD4 +nooptions COMPAT_FREEBSD5 +nooptions COMPAT_FREEBSD6 +nooptions COMPAT_FREEBSD7 +nooptions COMPAT_FREEBSD9 +nooptions COMPAT_FREEBSD10 +nooptions COMPAT_FREEBSD11 + +# No support for remote GDB +nooptions GDB + +# riscv doesn't support inb/outb, so disable chipset probing which needs it +nooptions PPC_PROBE_CHIPSET + +# Makes assumptions about bus tags that aren't true on riscv +nodevice snd_cmi + +# Don't yet have hwpmc(4) +nodevice hwpmc +nooptions HWPMC_HOOKS ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
Re: svn commit: r366542 - in head/sys: amd64/amd64 arm/arm arm64/arm64 kern riscv/riscv sys
On Thu, Oct 8, 2020 at 3:15 PM Kyle Evans wrote: > > On Thu, Oct 8, 2020 at 1:02 PM Mitchell Horne wrote: > > > > Author: mhorne > > Date: Thu Oct 8 18:02:05 2020 > > New Revision: 366542 > > URL: https://svnweb.freebsd.org/changeset/base/366542 > > > > Log: > > Add a routine to dump boot metadata > > > > The boot metadata (also referred to as modinfo, or preload metadata) > > provides information about the size and location of the kernel, > > pre-loaded modules, and other metadata (e.g. the EFI framebuffer) to be > > consumed during by the kernel during early boot. It is encoded as a > > series of type-length-value entries and is usually constructed by > > loader(8) and passed to the kernel. It is also faked on some > > architectures when booted by other means. > > > > Although much of the module information is available via kldstat(8), > > there is no easy way to debug the metadata in its entirety. Add some > > routines to parse this data and allow it to be printed to the console > > during early boot or output via a sysctl. > > > > Since the output can be lengthly, printing to the console is gated > > behind the debug.dump_modinfo_at_boot kenv variable as well as the > > BOOTVERBOSE flag. The sysctl to print the metadata is named > > debug.dump_modinfo. > > > > Hi, > > Why both a tunable and boot -v? The tunable is already specifically > scoped to just this operation, it seems a little odd to double-gate > it. > Hey Kyle, The original patch was gated behind just boot -v. In testing I realized this change is potentially quite noisy (even by bootverbose standards), so I added the tunable to make it opt-in. The thinking is that you could set debug.dump_modinfo_at_boot=1 once in loader.conf and forget it, as you wouldn't see the preload_dump() output on a normal boot. Thinking about it again, this might be overly complicated for what is at best a niche debugging feature. If gating it behind just the tunable is more in line with how other things work then I'm happy to change it. Mitchell > Thanks, > > Kyle Evans ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
Re: svn commit: r366542 - in head/sys: amd64/amd64 arm/arm arm64/arm64 kern riscv/riscv sys
On Thu, Oct 8, 2020 at 3:19 PM Ravi Pokala wrote:
>
> Hi Mitchell,
>
> +static void
> +preload_dump_internal(struct sbuf *sbp)
> +{
> + uint32_t *bptr, type, len;
> +
> + KASSERT(preload_metadata != NULL,
> + ("%s called without setting up preload_metadata", __func__));
> +
> + /*
> +* Iterate through the TLV-encoded sections.
> +*/
> + bptr = (uint32_t *)preload_metadata;
> + sbuf_putc(sbp, '\n');
> + while (bptr[0] != MODINFO_END || bptr[0] != MODINFO_END) {
>
> The same expression is on both sides of the "||" ...?
>
> Thanks,
>
> Ravi (rpokala@)
Thank you for catching this --- it should be checking bptr[0] and
bptr[1]. Fixed in r366543.
Mitchell
>
> + sbuf_printf(sbp, " %p:\n", bptr);
> + type = *bptr++;
> + len = *bptr++;
> +
> + sbuf_printf(sbp, "\ttype:\t(%#04x) ", type);
> + preload_modinfo_type(sbp, type);
> + sbuf_putc(sbp, '\n');
> + sbuf_printf(sbp, "\tlen:\t%u\n", len);
> + sbuf_cat(sbp, "\tvalue:\t");
> + preload_modinfo_value(sbp, bptr, type, len);
> + sbuf_putc(sbp, '\n');
> +
> + bptr += roundup(len, sizeof(u_long)) / sizeof(uint32_t);
> + }
> +}
>
>
>
>
> -Original Message-
> From: on behalf of Mitchell Horne
>
> Date: 2020-10-08, Thursday at 11:02
> To: , ,
>
> Subject: svn commit: r366542 - in head/sys: amd64/amd64 arm/arm arm64/arm64
> kern riscv/riscv sys
>
> Author: mhorne
> Date: Thu Oct 8 18:02:05 2020
> New Revision: 366542
> URL: https://svnweb.freebsd.org/changeset/base/366542
>
> Log:
> Add a routine to dump boot metadata
>
> The boot metadata (also referred to as modinfo, or preload metadata)
> provides information about the size and location of the kernel,
> pre-loaded modules, and other metadata (e.g. the EFI framebuffer) to be
> consumed during by the kernel during early boot. It is encoded as a
> series of type-length-value entries and is usually constructed by
> loader(8) and passed to the kernel. It is also faked on some
> architectures when booted by other means.
>
> Although much of the module information is available via kldstat(8),
> there is no easy way to debug the metadata in its entirety. Add some
> routines to parse this data and allow it to be printed to the console
> during early boot or output via a sysctl.
>
> Since the output can be lengthly, printing to the console is gated
> behind the debug.dump_modinfo_at_boot kenv variable as well as the
> BOOTVERBOSE flag. The sysctl to print the metadata is named
> debug.dump_modinfo.
>
> Reviewed by: tsoome
> Sponsored by: NetApp, Inc.
> Sponsored by: Klara, Inc.
> Differential Revision:https://reviews.freebsd.org/D26687
>
> Modified:
> head/sys/amd64/amd64/machdep.c
> head/sys/arm/arm/machdep.c
> head/sys/arm64/arm64/machdep.c
> head/sys/kern/subr_module.c
> head/sys/riscv/riscv/machdep.c
> head/sys/sys/linker.h
>
> Modified: head/sys/amd64/amd64/machdep.c
>
> ==
> --- head/sys/amd64/amd64/machdep.c Thu Oct 8 17:30:05 2020
> (r366541)
> +++ head/sys/amd64/amd64/machdep.c Thu Oct 8 18:02:05 2020
> (r366542)
> @@ -1853,6 +1853,15 @@ hammer_time(u_int64_t modulep, u_int64_t physfree)
> if (late_console)
> cninit();
>
> + /*
> +* Dump the boot metadata. We have to wait for cninit() since console
> +* output is required. If it's grossly incorrect the kernel will never
> +* make it this far.
> +*/
> + if ((boothowto & RB_VERBOSE) &&
> + getenv_is_true("debug.dump_modinfo_at_boot"))
> + preload_dump();
> +
> #ifdef DEV_ISA
> #ifdef DEV_ATPIC
> elcr_probe();
>
> Modified: head/sys/arm/arm/machdep.c
>
> ==
> --- head/sys/arm/arm/machdep.c Thu Oct 8 17:30:05 2020
> (r366541)
> +++ head/sys/arm/arm/machdep.c Thu Oct 8 18:02:05 2020
> (r366542)
> @@ -1027,6 +1027,15 @@ initarm(struct arm_boot_params *abp)
> debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp
svn commit: r366543 - head/sys/kern
Author: mhorne
Date: Thu Oct 8 18:29:17 2020
New Revision: 366543
URL: https://svnweb.freebsd.org/changeset/base/366543
Log:
Fix a loop condition
The correct way to identify the end of the metadata is two adjacent
entries set to zero/MODINFO_END. I made a typo and this was checking the
first entry twice.
Reported by: rpokala
Sponsored by: NetApp, Inc.
Sponsored by: Klara, Inc.
Modified:
head/sys/kern/subr_module.c
Modified: head/sys/kern/subr_module.c
==
--- head/sys/kern/subr_module.c Thu Oct 8 18:02:05 2020(r366542)
+++ head/sys/kern/subr_module.c Thu Oct 8 18:29:17 2020(r366543)
@@ -496,7 +496,7 @@ preload_dump_internal(struct sbuf *sbp)
*/
bptr = (uint32_t *)preload_metadata;
sbuf_putc(sbp, '\n');
- while (bptr[0] != MODINFO_END || bptr[0] != MODINFO_END) {
+ while (bptr[0] != MODINFO_END || bptr[1] != MODINFO_END) {
sbuf_printf(sbp, " %p:\n", bptr);
type = *bptr++;
len = *bptr++;
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svn commit: r366542 - in head/sys: amd64/amd64 arm/arm arm64/arm64 kern riscv/riscv sys
Author: mhorne
Date: Thu Oct 8 18:02:05 2020
New Revision: 366542
URL: https://svnweb.freebsd.org/changeset/base/366542
Log:
Add a routine to dump boot metadata
The boot metadata (also referred to as modinfo, or preload metadata)
provides information about the size and location of the kernel,
pre-loaded modules, and other metadata (e.g. the EFI framebuffer) to be
consumed during by the kernel during early boot. It is encoded as a
series of type-length-value entries and is usually constructed by
loader(8) and passed to the kernel. It is also faked on some
architectures when booted by other means.
Although much of the module information is available via kldstat(8),
there is no easy way to debug the metadata in its entirety. Add some
routines to parse this data and allow it to be printed to the console
during early boot or output via a sysctl.
Since the output can be lengthly, printing to the console is gated
behind the debug.dump_modinfo_at_boot kenv variable as well as the
BOOTVERBOSE flag. The sysctl to print the metadata is named
debug.dump_modinfo.
Reviewed by: tsoome
Sponsored by: NetApp, Inc.
Sponsored by: Klara, Inc.
Differential Revision:https://reviews.freebsd.org/D26687
Modified:
head/sys/amd64/amd64/machdep.c
head/sys/arm/arm/machdep.c
head/sys/arm64/arm64/machdep.c
head/sys/kern/subr_module.c
head/sys/riscv/riscv/machdep.c
head/sys/sys/linker.h
Modified: head/sys/amd64/amd64/machdep.c
==
--- head/sys/amd64/amd64/machdep.c Thu Oct 8 17:30:05 2020
(r366541)
+++ head/sys/amd64/amd64/machdep.c Thu Oct 8 18:02:05 2020
(r366542)
@@ -1853,6 +1853,15 @@ hammer_time(u_int64_t modulep, u_int64_t physfree)
if (late_console)
cninit();
+ /*
+* Dump the boot metadata. We have to wait for cninit() since console
+* output is required. If it's grossly incorrect the kernel will never
+* make it this far.
+*/
+ if ((boothowto & RB_VERBOSE) &&
+ getenv_is_true("debug.dump_modinfo_at_boot"))
+ preload_dump();
+
#ifdef DEV_ISA
#ifdef DEV_ATPIC
elcr_probe();
Modified: head/sys/arm/arm/machdep.c
==
--- head/sys/arm/arm/machdep.c Thu Oct 8 17:30:05 2020(r366541)
+++ head/sys/arm/arm/machdep.c Thu Oct 8 18:02:05 2020(r366542)
@@ -1027,6 +1027,15 @@ initarm(struct arm_boot_params *abp)
debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp);
arm_print_kenv();
+ /*
+* Dump the boot metadata. We have to wait for cninit() since console
+* output is required. If it's grossly incorrect the kernel will never
+* make it this far.
+*/
+ if ((boothowto & RB_VERBOSE) &&
+ getenv_is_true("debug.dump_modinfo_at_boot"))
+ preload_dump();
+
env = kern_getenv("kernelname");
if (env != NULL) {
strlcpy(kernelname, env, sizeof(kernelname));
Modified: head/sys/arm64/arm64/machdep.c
==
--- head/sys/arm64/arm64/machdep.c Thu Oct 8 17:30:05 2020
(r366541)
+++ head/sys/arm64/arm64/machdep.c Thu Oct 8 18:02:05 2020
(r366542)
@@ -1242,6 +1242,15 @@ initarm(struct arm64_bootparams *abp)
panic("Invalid bus configuration: %s",
kern_getenv("kern.cfg.order"));
+ /*
+* Dump the boot metadata. We have to wait for cninit() since console
+* output is required. If it's grossly incorrect the kernel will never
+* make it this far.
+*/
+ if ((boothowto & RB_VERBOSE) &&
+ getenv_is_true("debug.dump_modinfo_at_boot"))
+ preload_dump();
+
init_proc0(abp->kern_stack);
msgbufinit(msgbufp, msgbufsize);
mutex_init();
Modified: head/sys/kern/subr_module.c
==
--- head/sys/kern/subr_module.c Thu Oct 8 17:30:05 2020(r366541)
+++ head/sys/kern/subr_module.c Thu Oct 8 18:02:05 2020(r366542)
@@ -3,6 +3,8 @@
*
* Copyright (c) 1998 Michael Smith
* All rights reserved.
+ * Copyright (c) 2020 NetApp Inc.
+ * Copyright (c) 2020 Klara Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -32,7 +34,11 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
+#include
+#include
+#include
+
#include
#include
@@ -304,3 +310,249 @@ preload_bootstrap_relocate(vm_offset_t offset)
}
}
}
+
+/*
+ * Parse the modinfo type and append to the provided sbuf.
+ */
+static void
+preload_modinfo_type(struct sbuf *sbp, int type)
+{
+
+ if ((type &
svn commit: r366526 - head/sys/kern
Author: mhorne Date: Wed Oct 7 23:14:49 2020 New Revision: 366526 URL: https://svnweb.freebsd.org/changeset/base/366526 Log: Handle kmod local relocation failures gracefully It is possible for elf_reloc_local() to fail in the unlikely case of an unsupported relocation type. If this occurs, do not continue to process the file. Reviewed by: kib, markj (earlier version) MFC after:1 week Sponsored by: NetApp, Inc. Sponsored by: Klara, Inc. Differential Revision:https://reviews.freebsd.org/D26701 Modified: head/sys/kern/link_elf_obj.c Modified: head/sys/kern/link_elf_obj.c == --- head/sys/kern/link_elf_obj.cWed Oct 7 22:52:24 2020 (r366525) +++ head/sys/kern/link_elf_obj.cWed Oct 7 23:14:49 2020 (r366526) @@ -1676,9 +1676,11 @@ link_elf_reloc_local(linker_file_t lf, bool ifuncs) if (ELF_ST_BIND(sym->st_info) != STB_LOCAL) continue; if ((ELF_ST_TYPE(sym->st_info) == STT_GNU_IFUNC || - elf_is_ifunc_reloc(rel->r_info)) == ifuncs) - elf_reloc_local(lf, base, rel, ELF_RELOC_REL, - elf_obj_lookup); + elf_is_ifunc_reloc(rel->r_info)) != ifuncs) + continue; + if (elf_reloc_local(lf, base, rel, ELF_RELOC_REL, + elf_obj_lookup) != 0) + return (ENOEXEC); } } @@ -1704,9 +1706,11 @@ link_elf_reloc_local(linker_file_t lf, bool ifuncs) if (ELF_ST_BIND(sym->st_info) != STB_LOCAL) continue; if ((ELF_ST_TYPE(sym->st_info) == STT_GNU_IFUNC || - elf_is_ifunc_reloc(rela->r_info)) == ifuncs) - elf_reloc_local(lf, base, rela, ELF_RELOC_RELA, - elf_obj_lookup); + elf_is_ifunc_reloc(rela->r_info)) != ifuncs) + continue; + if (elf_reloc_local(lf, base, rela, ELF_RELOC_RELA, + elf_obj_lookup) != 0) + return (ENOEXEC); } } return (0); ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r366519 - in head/sys: amd64/amd64 arm/arm arm64/arm64 i386/i386 mips/mips powerpc/powerpc riscv/riscv
Author: mhorne
Date: Wed Oct 7 18:48:10 2020
New Revision: 366519
URL: https://svnweb.freebsd.org/changeset/base/366519
Log:
Print symbol index for unsupported relocation types
It is unlikely, but possible, that an unrecognized or unsupported
relocation type is encountered while trying to load a kernel module. If
this occurs we should offer the symbol index as a hint to the user.
While here, fix some small style issues.
Reviewed by: markj, kib (amd64 part, in D26701)
Sponsored by: NetApp, Inc.
Sponsored by: Klara, Inc.
Modified:
head/sys/amd64/amd64/elf_machdep.c
head/sys/arm/arm/elf_machdep.c
head/sys/arm64/arm64/elf_machdep.c
head/sys/i386/i386/elf_machdep.c
head/sys/mips/mips/elf_machdep.c
head/sys/powerpc/powerpc/elf32_machdep.c
head/sys/powerpc/powerpc/elf64_machdep.c
head/sys/riscv/riscv/elf_machdep.c
Modified: head/sys/amd64/amd64/elf_machdep.c
==
--- head/sys/amd64/amd64/elf_machdep.c Wed Oct 7 17:46:49 2020
(r366518)
+++ head/sys/amd64/amd64/elf_machdep.c Wed Oct 7 18:48:10 2020
(r366519)
@@ -309,11 +309,11 @@ elf_reloc_internal(linker_file_t lf, Elf_Addr relocbas
case R_X86_64_NONE: /* none */
break;
- case R_X86_64_64: /* S + A */
+ case R_X86_64_64: /* S + A */
error = lookup(lf, symidx, 1, );
val = addr + addend;
if (error != 0)
- return -1;
+ return (-1);
if (*where != val)
*where = val;
break;
@@ -325,7 +325,7 @@ elf_reloc_internal(linker_file_t lf, Elf_Addr relocbas
where32 = (Elf32_Addr *)where;
val32 = (Elf32_Addr)(addr + addend - (Elf_Addr)where);
if (error != 0)
- return -1;
+ return (-1);
if (*where32 != val32)
*where32 = val32;
break;
@@ -335,7 +335,7 @@ elf_reloc_internal(linker_file_t lf, Elf_Addr relocbas
val32 = (Elf32_Addr)(addr + addend);
where32 = (Elf32_Addr *)where;
if (error != 0)
- return -1;
+ return (-1);
if (*where32 != val32)
*where32 = val32;
break;
@@ -345,14 +345,15 @@ elf_reloc_internal(linker_file_t lf, Elf_Addr relocbas
* There shouldn't be copy relocations in kernel
* objects.
*/
- printf("kldload: unexpected R_COPY relocation\n");
+ printf("kldload: unexpected R_COPY relocation, "
+ "symbol index %ld\n", symidx);
return (-1);
case R_X86_64_GLOB_DAT: /* S */
case R_X86_64_JMP_SLOT: /* XXX need addend + offset */
error = lookup(lf, symidx, 1, );
if (error != 0)
- return -1;
+ return (-1);
if (*where != addr)
*where = addr;
break;
@@ -372,8 +373,8 @@ elf_reloc_internal(linker_file_t lf, Elf_Addr relocbas
break;
default:
- printf("kldload: unexpected relocation type %ld\n",
- rtype);
+ printf("kldload: unexpected relocation type %ld, "
+ "symbol index %ld\n", rtype, symidx);
return (-1);
}
return (0);
Modified: head/sys/arm/arm/elf_machdep.c
==
--- head/sys/arm/arm/elf_machdep.c Wed Oct 7 17:46:49 2020
(r366518)
+++ head/sys/arm/arm/elf_machdep.c Wed Oct 7 18:48:10 2020
(r366519)
@@ -236,7 +236,7 @@ elf_reloc_internal(linker_file_t lf, Elf_Addr relocbas
case R_ARM_ABS32:
error = lookup(lf, symidx, 1, );
if (error != 0)
- return -1;
+ return (-1);
store_ptr(where, addr + load_ptr(where));
break;
@@ -245,8 +245,9 @@ elf_reloc_internal(linker_file_t lf, Elf_Addr relocbas
* There shouldn't be copy relocations in kernel
* objects.
*/
- printf("kldload: unexpected R_COPY relocation\n");
svn commit: r366503 - in head/sys: kern sys x86/x86
Author: mhorne
Date: Tue Oct 6 23:16:56 2020
New Revision: 366503
URL: https://svnweb.freebsd.org/changeset/base/366503
Log:
Remove unused function cpu_boot()
The prototype was added with the creation of kern_shutdown.c in r17658,
but it appears to have never been implemented. Remove it now.
Reviewed by: cem, kib
Differential Revision:https://reviews.freebsd.org/D26702
Modified:
head/sys/kern/kern_shutdown.c
head/sys/sys/systm.h
head/sys/x86/x86/cpu_machdep.c
Modified: head/sys/kern/kern_shutdown.c
==
--- head/sys/kern/kern_shutdown.c Tue Oct 6 22:53:11 2020
(r366502)
+++ head/sys/kern/kern_shutdown.c Tue Oct 6 23:16:56 2020
(r366503)
@@ -668,7 +668,6 @@ shutdown_reset(void *junk, int howto)
spinlock_enter();
#endif
- /* cpu_boot(howto); */ /* doesn't do anything at the moment */
cpu_reset();
/* NOTREACHED */ /* assuming reset worked */
}
Modified: head/sys/sys/systm.h
==
--- head/sys/sys/systm.hTue Oct 6 22:53:11 2020(r366502)
+++ head/sys/sys/systm.hTue Oct 6 23:16:56 2020(r366503)
@@ -268,7 +268,6 @@ void*phashinit_flags(int count, struct malloc_type
*t
int flags);
void g_waitidle(void);
-void cpu_boot(int);
void cpu_flush_dcache(void *, size_t);
void cpu_rootconf(void);
void critical_enter_KBI(void);
Modified: head/sys/x86/x86/cpu_machdep.c
==
--- head/sys/x86/x86/cpu_machdep.c Tue Oct 6 22:53:11 2020
(r366502)
+++ head/sys/x86/x86/cpu_machdep.c Tue Oct 6 23:16:56 2020
(r366503)
@@ -194,17 +194,6 @@ SYSCTL_BOOL(_machdep, OID_AUTO, mwait_cpustop_broken,
"Can not reliably wake MONITOR/MWAIT cpus without interrupts");
/*
- * Machine dependent boot() routine
- *
- * I haven't seen anything to put here yet
- * Possibly some stuff might be grafted back here from boot()
- */
-void
-cpu_boot(int howto)
-{
-}
-
-/*
* Flush the D-cache for non-DMA I/O so that the I-cache can
* be made coherent later.
*/
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svn commit: r366351 - head/contrib/netbsd-tests/fs
Author: mhorne
Date: Fri Oct 2 00:52:31 2020
New Revision: 366351
URL: https://svnweb.freebsd.org/changeset/base/366351
Log:
tmpfs tests: check for built-in tmpfs module
As of r363471, tmpfs is included in all GENERIC kernel configs. This
results in a warning being emitted for each call to kldload(8):
module_register: cannot register tmpfs from tmpfs.ko; already loaded from
kernel
Check for the presence of the module via kldstat first to quiet this
warning.
Reviewed by: asomers, arichardson
Differential Revision:https://reviews.freebsd.org/D26632
Modified:
head/contrib/netbsd-tests/fs/h_funcs.subr
Modified: head/contrib/netbsd-tests/fs/h_funcs.subr
==
--- head/contrib/netbsd-tests/fs/h_funcs.subr Thu Oct 1 23:28:21 2020
(r366350)
+++ head/contrib/netbsd-tests/fs/h_funcs.subr Fri Oct 2 00:52:31 2020
(r366351)
@@ -45,7 +45,7 @@ require_fs() {
# Begin FreeBSD
if true; then
- if kldload -n ${name}; then
+ if kldstat -qm ${name} || kldload -n ${name}; then
found=yes
else
found=no
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svn commit: r366271 - head/sys/arm64/arm64
Author: mhorne Date: Tue Sep 29 23:21:56 2020 New Revision: 366271 URL: https://svnweb.freebsd.org/changeset/base/366271 Log: arm64: set the correct HWCAP This appears to be a typo. The AdvSIMD field encodes support for half-precision floating point SIMD instructions, which corresponds to HWCAP_ASIMDHP, not HWCAP_ASIMDDP. MFC after:3 days Sponsored by: The FreeBSD Foundation Modified: head/sys/arm64/arm64/identcpu.c Modified: head/sys/arm64/arm64/identcpu.c == --- head/sys/arm64/arm64/identcpu.c Tue Sep 29 22:30:15 2020 (r366270) +++ head/sys/arm64/arm64/identcpu.c Tue Sep 29 23:21:56 2020 (r366271) @@ -1295,7 +1295,7 @@ parse_cpu_features_hwcap(void) hwcap |= HWCAP_ASIMD; break; case ID_AA64PFR0_AdvSIMD_HP: - hwcap |= HWCAP_ASIMD | HWCAP_ASIMDDP; + hwcap |= HWCAP_ASIMD | HWCAP_ASIMDHP; break; default: break; ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r365995 - head/sys/riscv/conf
Author: mhorne Date: Tue Sep 22 13:00:02 2020 New Revision: 365995 URL: https://svnweb.freebsd.org/changeset/base/365995 Log: RISC-V: build SiFive drivers and DTB in GENERIC In the spirit of the GENERIC config, we should include the drivers required to run on most supported platforms. Reviewed by: kp Differential Revision:https://reviews.freebsd.org/D26501 Modified: head/sys/riscv/conf/GENERIC Modified: head/sys/riscv/conf/GENERIC == --- head/sys/riscv/conf/GENERIC Tue Sep 22 12:14:46 2020(r365994) +++ head/sys/riscv/conf/GENERIC Tue Sep 22 13:00:02 2020(r365995) @@ -163,4 +163,10 @@ device firmware# firmware assist module # Note that 'bpf' is required for DHCP. device bpf # Berkeley packet filter +# Flattened Device Tree optionsFDT +makeoptionsMODULES_EXTRA+="dtb/sifive" + +# SiFive device drivers +device fu540spi +include"../sifive/std.sifive" ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r365955 - head/sys/sys
Author: mhorne
Date: Mon Sep 21 17:28:41 2020
New Revision: 365955
URL: https://svnweb.freebsd.org/changeset/base/365955
Log:
Hide tunable definitions behind _KERNEL
Some userspace code include sys/kernel.h. Namely, some OpenZFS tests do
this, and it was causing breakage after r365945 due to a lack of bool
typedef. Userspace should not need the TUNABLE_** stuff, so hide it
behind an #ifdef _KERNEL.
Sorry for the breakage.
Reported by: andrew, Michael Butler, Jenkins
Discussed with: kevans, allanjude
Modified:
head/sys/sys/kernel.h
Modified: head/sys/sys/kernel.h
==
--- head/sys/sys/kernel.h Mon Sep 21 17:06:36 2020(r365954)
+++ head/sys/sys/kernel.h Mon Sep 21 17:28:41 2020(r365955)
@@ -297,6 +297,8 @@ sysinit_tslog_shim(const void * data)
void sysinit_add(struct sysinit **set, struct sysinit **set_end);
+#ifdef _KERNEL
+
/*
* Infrastructure for tunable 'constants'. Value may be specified at compile
* time or kernel load time. Rules relating tunables together can be placed
@@ -458,6 +460,8 @@ struct tunable_str {
#defineTUNABLE_STR_FETCH(path, var, size) \
getenv_string((path), (var), (size))
+
+#endif /* _KERNEL */
typedef void (*ich_func_t)(void *_arg);
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svn commit: r365947 - head/sys/kern
Author: mhorne
Date: Mon Sep 21 15:44:23 2020
New Revision: 365947
URL: https://svnweb.freebsd.org/changeset/base/365947
Log:
Use getenv_is_true() in init_static_kenv()
A small example of how these functions can be used to simplify checks of
this nature.
Sponsored by: Klara, Inc.
Differential Revision:https://reviews.freebsd.org/D26271
Modified:
head/sys/kern/kern_environment.c
Modified: head/sys/kern/kern_environment.c
==
--- head/sys/kern/kern_environment.cMon Sep 21 15:41:47 2020
(r365946)
+++ head/sys/kern/kern_environment.cMon Sep 21 15:44:23 2020
(r365947)
@@ -253,7 +253,6 @@ done:
void
init_static_kenv(char *buf, size_t len)
{
- char *eval;
KASSERT(!dynamic_kenv, ("kenv: dynamic_kenv already initialized"));
/*
@@ -301,20 +300,17 @@ init_static_kenv(char *buf, size_t len)
* if the static environment has disabled the loader environment.
*/
kern_envp = static_env;
- eval = kern_getenv("loader_env.disabled");
- if (eval == NULL || strcmp(eval, "1") != 0) {
+ if (!getenv_is_true("loader_env.disabled")) {
md_envp = buf;
md_env_len = len;
md_env_pos = 0;
- eval = kern_getenv("static_env.disabled");
- if (eval != NULL && strcmp(eval, "1") == 0) {
+ if (getenv_is_true("static_env.disabled")) {
kern_envp[0] = '\0';
kern_envp[1] = '\0';
}
}
- eval = kern_getenv("static_hints.disabled");
- if (eval != NULL && strcmp(eval, "1") == 0) {
+ if (getenv_is_true("static_hints.disabled")) {
static_hints[0] = '\0';
static_hints[1] = '\0';
}
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svn commit: r365945 - in head: share/man/man9 sys/kern sys/sys
Author: mhorne
Date: Mon Sep 21 15:24:44 2020
New Revision: 365945
URL: https://svnweb.freebsd.org/changeset/base/365945
Log:
Add getenv(9) boolean parsing functions
This adds the getenv_bool() function, to parse a boolean value from a
kernel environment variable or tunable. This works for traditional
boolean values like "0" and "1", and also "true" and "false"
(case-insensitive). These semantics do not yet apply to sysctls declared
using SYSCTL_BOOL with CTLFLAG_TUN (they still only parse 1 and 0).
Also added are two wrapper functions, getenv_is_true() and
getenv_is_false(). These are slightly simpler for callers wishing to
perform a single check of a configuration variable.
Reviewed by: jhb (slightly earlier version)
Sponsored by: NetApp, Inc.
Sponsored by: Klara, Inc.
Differential Revision:https://reviews.freebsd.org/D26270
Modified:
head/share/man/man9/Makefile
head/share/man/man9/getenv.9
head/sys/kern/kern_environment.c
head/sys/sys/kernel.h
head/sys/sys/systm.h
Modified: head/share/man/man9/Makefile
==
--- head/share/man/man9/MakefileMon Sep 21 12:37:41 2020
(r365944)
+++ head/share/man/man9/MakefileMon Sep 21 15:24:44 2020
(r365945)
@@ -1092,6 +1092,9 @@ MLINKS+=getenv.9 freeenv.9 \
getenv.9 getenv_quad.9 \
getenv.9 getenv_uint.9 \
getenv.9 getenv_ulong.9 \
+ getenv.9 getenv_bool.9 \
+ getenv.9 getenv_is_true.9 \
+ getenv.9 getenv_is_false.9 \
getenv.9 kern_getenv.9 \
getenv.9 kern_setenv.9 \
getenv.9 kern_unsetenv.9 \
Modified: head/share/man/man9/getenv.9
==
--- head/share/man/man9/getenv.9Mon Sep 21 12:37:41 2020
(r365944)
+++ head/share/man/man9/getenv.9Mon Sep 21 15:24:44 2020
(r365945)
@@ -27,7 +27,7 @@
.\"
.\" $FreeBSD$
.\"
-.Dd June 1, 2017
+.Dd September 21, 2020
.Dt GETENV 9
.Os
.Sh NAME
@@ -39,6 +39,9 @@
.Nm getenv_quad ,
.Nm getenv_uint ,
.Nm getenv_ulong ,
+.Nm getenv_bool ,
+.Nm getenv_is_true ,
+.Nm getenv_is_false ,
.Nm kern_setenv ,
.Nm testenv ,
.Nm kern_unsetenv
@@ -63,6 +66,12 @@
.Ft int
.Fn getenv_ulong "const char *name" "unsigned long *data"
.Ft int
+.Fn getenv_bool "const char *name" "bool *data"
+.Ft bool
+.Fn getenv_is_true "const char *name"
+.Ft bool
+.Fn getenv_is_false "const char *name"
+.Ft int
.Fn kern_setenv "const char *name" "const char *value"
.Ft int
.Fn testenv "const char *name"
@@ -194,6 +203,28 @@ up to
characters of its value are copied to the buffer pointed to by
.Fa data
followed by a null character and a non-zero value is returned.
+.Pp
+The
+.Fn getenv_bool
+function interprets the value of the kernel environment variable
+.Fa name
+as a boolean value by performing a case-insensitive comparison against the
+strings "1",
+"0",
+"true",
+and "false".
+If the environment variable exists and has a valid boolean value, then that
+value will be copied to the variable pointed to by
+.Fa data .
+If the environment variable exists but is not a boolean value, then a warning
+will be printed to the kernel message buffer.
+The
+.Fn getenv_is_true
+and
+.Fn getenv_is_false
+functions are wrappers around
+.Fn getenv_bool
+that simplify testing for a desired boolean value.
.Sh RETURN VALUES
The
.Fn kern_getenv
@@ -211,12 +242,25 @@ The
.Fn testenv
function returns zero if the specified environment variable does not exist and
a non-zero value if it does exist.
+.Pp
The
.Fn getenv_int ,
.Fn getenv_long ,
.Fn getenv_string ,
.Fn getenv_quad ,
.Fn getenv_uint ,
+.Fn getenv_ulong ,
and
-.Fn getenv_ulong
+.Fn getenv_bool
functions return a non-zero value on success and zero on failure.
+.Pp
+The
+.Fn getenv_is_true
+and
+.Fn getenv_is_false
+functions return
+.Dv true
+if the specified environment variable exists and its value matches the desired
+boolean condition, and
+.Dv false
+otherwise.
Modified: head/sys/kern/kern_environment.c
==
--- head/sys/kern/kern_environment.cMon Sep 21 12:37:41 2020
(r365944)
+++ head/sys/kern/kern_environment.cMon Sep 21 15:24:44 2020
(r365945)
@@ -942,6 +942,65 @@ error:
}
/*
+ * Return a boolean value from an environment variable. This can be in
+ * numerical or string form, i.e. "1" or "true".
+ */
+int
+getenv_bool(const char *name, bool *data)
+{
+ char *val;
+ int ret = 0;
+
+ if (name == NULL)
+ return (0);
+
+ val = kern_getenv(name);
+ if (val == NULL)
+ return (0);
+
+ if ((strcmp(val, "1") == 0) || (strcasecmp(val, "true") == 0)) {
+ *data = true;
+ ret = 1;
+ } else if ((strcmp(val, "0") == 0) || (strcasecmp(val, "false") == 0)) {
+ *data = false;
svn commit: r365884 - head/release/arm64
Author: mhorne
Date: Fri Sep 18 14:40:13 2020
New Revision: 365884
URL: https://svnweb.freebsd.org/changeset/base/365884
Log:
arm64: generate ISO release images
Some IPMI implementations on arm64 are reportedly unable to load our
memstick installer images, but support the older ISO format. Start
generating these for arm64.
Unlike installer ISOs for other platforms, these images are UEFI-only.
Reviewed by: emaste
Relnotes: yes
Sponsored by: The FreeBSD Foundation
Differential Revision:https://reviews.freebsd.org/D26452
Added:
head/release/arm64/mkisoimages.sh (contents, props changed)
Added: head/release/arm64/mkisoimages.sh
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/release/arm64/mkisoimages.sh Fri Sep 18 14:40:13 2020
(r365884)
@@ -0,0 +1,93 @@
+#!/bin/sh
+#
+# $FreeBSD$
+#
+# This script is used by release/Makefile to build the (optional) ISO images
+# for a FreeBSD release. It is considered architecture dependent since each
+# platform has a slightly unique way of making bootable CDs. This script is
+# also allowed to generate any number of images since that is more of
+# publishing decision than anything else.
+#
+# Usage:
+#
+# mkisoimages.sh [-b] image-label image-name base-bits-dir [extra-bits-dir]
+#
+# Where -b is passed if the ISO image should be made "bootable" by
+# whatever standards this architecture supports (may be unsupported),
+# image-label is the ISO image label, image-name is the filename of the
+# resulting ISO image, base-bits-dir contains the image contents and
+# extra-bits-dir, if provided, contains additional files to be merged
+# into base-bits-dir as part of making the image.
+
+set -e
+
+scriptdir=$(dirname $(realpath $0))
+. ${scriptdir}/../../tools/boot/install-boot.sh
+
+if [ -z $ETDUMP ]; then
+ ETDUMP=etdump
+fi
+
+if [ -z $MAKEFS ]; then
+ MAKEFS=makefs
+fi
+
+if [ -z $MKIMG ]; then
+ MKIMG=mkimg
+fi
+
+if [ "$1" = "-b" ]; then
+ BASEBITSDIR="$4"
+
+ # Make an EFI system partition.
+ # The ISO file is a special case, in that it only has a maximum of
+ # 800 KB available for the boot code. So make an 800 KB ESP
+ espfilename=$(mktemp /tmp/efiboot.XX)
+ make_esp_file ${espfilename} 800 ${BASEBITSDIR}/boot/loader.efi
+
+ bootable="-o bootimage=efi;${espfilename} -o no-emul-boot -o
platformid=efi"
+
+ shift
+else
+ BASEBITSDIR="$3"
+ bootable=""
+fi
+
+if [ $# -lt 3 ]; then
+ echo "Usage: $0 [-b] image-label image-name base-bits-dir
[extra-bits-dir]"
+ exit 1
+fi
+
+LABEL=`echo "$1" | tr '[:lower:]' '[:upper:]'`; shift
+NAME="$1"; shift
+
+publisher="The FreeBSD Project. https://www.FreeBSD.org/;
+echo "/dev/iso9660/$LABEL / cd9660 ro 0 0" > "$BASEBITSDIR/etc/fstab"
+$MAKEFS -t cd9660 $bootable -o rockridge -o label="$LABEL" -o
publisher="$publisher" "$NAME" "$@"
+rm -f "$BASEBITSDIR/etc/fstab"
+rm -f ${espfilename}
+
+if [ "$bootable" != "" ]; then
+ # Look for the EFI System Partition image we dropped in the ISO image.
+ for entry in `$ETDUMP --format shell $NAME`; do
+ eval $entry
+ # XXX: etdump(8) returns "default" for the initial entry
+ if [ "$et_platform" = "default" ]; then
+ espstart=`expr $et_lba \* 2048`
+ espsize=`expr $et_sectors \* 512`
+ espparam="-p efi::$espsize:$espstart"
+ break
+ fi
+ done
+
+ # Create a GPT image containing the EFI partition.
+ imgsize=`stat -f %z "$NAME"`
+ $MKIMG -s gpt \
+ --capacity $imgsize \
+ $espparam \
+ -o efi.img
+
+ # Drop the GPT into the System Area of the ISO.
+ dd if=efi.img of="$NAME" bs=32k count=1 conv=notrunc
+ rm -f efi.img
+fi
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svn commit: r365881 - head/sys/netinet
Author: mhorne Date: Fri Sep 18 14:01:10 2020 New Revision: 365881 URL: https://svnweb.freebsd.org/changeset/base/365881 Log: Initialize some local variables earlier Move the initialization of these variables to the beginning of their respective functions. On our end this creates a small amount of unneeded churn, as these variables are properly initialized before their first use in all cases. However, changing this benefits at least one downstream consumer (NetApp) by allowing local and future modifications to these functions to be made without worrying about where the initialization occurs. Reviewed by: melifaro, rscheff Sponsored by: NetApp, Inc. Sponsored by: Klara, Inc. Differential Revision:https://reviews.freebsd.org/D26454 Modified: head/sys/netinet/ip_output.c head/sys/netinet/udp_usrreq.c Modified: head/sys/netinet/ip_output.c == --- head/sys/netinet/ip_output.cFri Sep 18 12:59:27 2020 (r365880) +++ head/sys/netinet/ip_output.cFri Sep 18 14:01:10 2020 (r365881) @@ -323,11 +323,11 @@ ip_output(struct mbuf *m, struct mbuf *opt, struct rou struct ifnet *ifp = NULL; /* keep compiler happy */ struct mbuf *m0; int hlen = sizeof (struct ip); - int mtu; + int mtu = 0; int error = 0; struct sockaddr_in *dst, sin; const struct sockaddr_in *gw; - struct in_ifaddr *ia; + struct in_ifaddr *ia = NULL; struct in_addr src; int isbroadcast; uint16_t ip_len, ip_off; @@ -485,7 +485,6 @@ again: * possible that a matching SPD entry exists. */ no_route_but_check_spd = 1; - mtu = 0; /* Silence GCC warning. */ goto sendit; #endif IPSTAT_INC(ips_noroute); @@ -521,7 +520,6 @@ again: * possible that a matching SPD entry exists. */ no_route_but_check_spd = 1; - mtu = 0; /* Silence GCC warning. */ goto sendit; #endif IPSTAT_INC(ips_noroute); Modified: head/sys/netinet/udp_usrreq.c == --- head/sys/netinet/udp_usrreq.c Fri Sep 18 12:59:27 2020 (r365880) +++ head/sys/netinet/udp_usrreq.c Fri Sep 18 14:01:10 2020 (r365881) @@ -1151,7 +1151,7 @@ udp_output(struct inpcb *inp, struct mbuf *m, struct s struct epoch_tracker et; int cscov_partial = 0; int error = 0; - int ipflags; + int ipflags = 0; u_short fport, lport; u_char tos; uint8_t pr; @@ -1435,7 +1435,6 @@ udp_output(struct inpcb *inp, struct mbuf *m, struct s ip->ip_off |= htons(IP_DF); } - ipflags = 0; if (inp->inp_socket->so_options & SO_DONTROUTE) ipflags |= IP_ROUTETOIF; if (inp->inp_socket->so_options & SO_BROADCAST) ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r365835 - head/sys/modules/dtb/sifive
Author: mhorne Date: Thu Sep 17 14:58:30 2020 New Revision: 365835 URL: https://svnweb.freebsd.org/changeset/base/365835 Log: Add dtb/sifive module This allows building the HiFive Unleashed device tree blob. Reviewed by: manu Differential Revision:https://reviews.freebsd.org/D26459 Added: head/sys/modules/dtb/sifive/ head/sys/modules/dtb/sifive/Makefile (contents, props changed) Added: head/sys/modules/dtb/sifive/Makefile == --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/modules/dtb/sifive/MakefileThu Sep 17 14:58:30 2020 (r365835) @@ -0,0 +1,6 @@ +# $FreeBSD$ + +DTS= \ + sifive/hifive-unleashed-a00.dts + +.include ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r365801 - head/sys/net
Author: mhorne
Date: Wed Sep 16 14:45:16 2020
New Revision: 365801
URL: https://svnweb.freebsd.org/changeset/base/365801
Log:
if_media: definitions for 40GE LM4 ethernet media type
Reviewed by: erj
Sponsored by: NetApp, Inc.
Sponsored by: Klara, Inc.
Differential Revision:https://reviews.freebsd.org/D26276
Modified:
head/sys/net/ieee8023ad_lacp.c
head/sys/net/if_media.h
Modified: head/sys/net/ieee8023ad_lacp.c
==
--- head/sys/net/ieee8023ad_lacp.c Wed Sep 16 14:20:45 2020
(r365800)
+++ head/sys/net/ieee8023ad_lacp.c Wed Sep 16 14:45:16 2020
(r365801)
@@ -1213,6 +1213,7 @@ lacp_compose_key(struct lacp_port *lp)
case IFM_40G_CR4:
case IFM_40G_SR4:
case IFM_40G_LR4:
+ case IFM_40G_LM4:
case IFM_40G_XLPPI:
case IFM_40G_KR4:
case IFM_40G_XLAUI:
Modified: head/sys/net/if_media.h
==
--- head/sys/net/if_media.h Wed Sep 16 14:20:45 2020(r365800)
+++ head/sys/net/if_media.h Wed Sep 16 14:45:16 2020(r365801)
@@ -258,6 +258,7 @@ uint64_tifmedia_baudrate(int);
#defineIFM_400G_AUI8_AC IFM_X(116) /* 400G-AUI8 active
copper/optical */
#defineIFM_400G_AUI8 IFM_X(117) /* 400G-AUI8 */
#defineIFM_50G_KR4 IFM_X(118) /* 50GBase-KR4 */
+#defineIFM_40G_LM4 IFM_X(119) /* 40GBase-LM4 */
/*
* Please update ieee8023ad_lacp.c:lacp_compose_key()
@@ -456,6 +457,7 @@ struct ifmedia_description {
{ IFM_40G_CR4, "40Gbase-CR4" },\
{ IFM_40G_SR4, "40Gbase-SR4" },\
{ IFM_40G_LR4, "40Gbase-LR4" },\
+ { IFM_40G_LM4, "40GBase-LM4" },\
{ IFM_1000_KX, "1000Base-KX" },\
{ IFM_OTHER,"Other" }, \
{ IFM_10G_KX4, "10GBase-KX4" },\
@@ -801,6 +803,7 @@ struct ifmedia_baudrate {
{ IFM_ETHER | IFM_40G_CR4, IF_Gbps(40ULL) }, \
{ IFM_ETHER | IFM_40G_SR4, IF_Gbps(40ULL) }, \
{ IFM_ETHER | IFM_40G_LR4, IF_Gbps(40ULL) }, \
+ { IFM_ETHER | IFM_40G_LM4, IF_Gbps(40ULL) }, \
{ IFM_ETHER | IFM_1000_KX, IF_Mbps(1000) },\
{ IFM_ETHER | IFM_10G_KX4, IF_Gbps(10ULL) }, \
{ IFM_ETHER | IFM_10G_KR, IF_Gbps(10ULL) }, \
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Re: svn commit: r365460 - in head/sys/arm64: arm64 include
On Tue, Sep 8, 2020 at 12:36 PM Mitchell Horne wrote:
>
> Author: mhorne
> Date: Tue Sep 8 15:36:38 2020
> New Revision: 365460
> URL: https://svnweb.freebsd.org/changeset/base/365460
>
> Log:
> arm64: export new HWCAP features
>
> Expose some of the new HWCAP features added in r65304. This includes the
Small typo, this should be r365304.
> addition of elf_hwcap2 into the sysvec, and a separate function to parse
> for those features.
>
> This only exposes features which require no further configuration, e.g.
> indicating the presence of certain instructions. Larger features (SVE)
> will not be advertised until we actually support them. The exact list of
> features/extensions this patch exposes is:
> - ARMv8.0-DGH
> - ARMv8.0-SB
> - ARMv8.2-BF16
> - ARMv8.2-DCCVADP
> - ARMv8.2-I8MM
> - ARMv8.4-LRCPC
> - ARMv8.5-CondM
> - ARMv8.5-FRINT
> - ARMv8.5-RNG
> - PSTATE.SSBS
>
> While here, annotate elf_hwcap and elf_hwcap2 as __read_frequently, and
> move the declarations to the machine/md_var.h header.
>
> Submitted by: mikael@ (D22314 portion)
> MFC after:2 weeks
> Sponsored by: The FreeBSD Foundation
> Differential Revision:https://reviews.freebsd.org/D26031
> Differential Revision:https://reviews.freebsd.org/D22314
>
> Modified:
> head/sys/arm64/arm64/elf_machdep.c
> head/sys/arm64/arm64/identcpu.c
> head/sys/arm64/include/md_var.h
>
> Modified: head/sys/arm64/arm64/elf_machdep.c
> ==
> --- head/sys/arm64/arm64/elf_machdep.c Tue Sep 8 15:08:20 2020
> (r365459)
> +++ head/sys/arm64/arm64/elf_machdep.c Tue Sep 8 15:36:38 2020
> (r365460)
> @@ -55,7 +55,8 @@ __FBSDID("$FreeBSD$");
>
> #include "linker_if.h"
>
> -u_long elf_hwcap;
> +u_long __read_frequently elf_hwcap;
> +u_long __read_frequently elf_hwcap2;
>
> static struct sysentvec elf64_freebsd_sysvec = {
> .sv_size= SYS_MAXSYSCALL,
> @@ -92,6 +93,7 @@ static struct sysentvec elf64_freebsd_sysvec = {
> .sv_thread_detach = NULL,
> .sv_trap= NULL,
> .sv_hwcap = _hwcap,
> + .sv_hwcap2 = _hwcap2,
> };
> INIT_SYSENTVEC(elf64_sysvec, _freebsd_sysvec);
>
>
> Modified: head/sys/arm64/arm64/identcpu.c
> ==
> --- head/sys/arm64/arm64/identcpu.c Tue Sep 8 15:08:20 2020
> (r365459)
> +++ head/sys/arm64/arm64/identcpu.c Tue Sep 8 15:36:38 2020
> (r365460)
> @@ -43,11 +43,13 @@ __FBSDID("$FreeBSD$");
> #include
> #include
> #include
> -#include
> #include
> +#include
> +#include
>
> static void print_cpu_features(u_int cpu);
> static u_long parse_cpu_features_hwcap(void);
> +static u_long parse_cpu_features_hwcap2(void);
>
> char machine[] = "arm64";
>
> @@ -869,7 +871,7 @@ static struct mrs_field_value id_aa64pfr1_mte[] = {
>
> static struct mrs_field id_aa64pfr1_fields[] = {
> MRS_FIELD(ID_AA64PFR1, BT, false, MRS_EXACT, id_aa64pfr1_bt),
> - MRS_FIELD(ID_AA64PFR1, SSBS, false, MRS_EXACT, id_aa64pfr1_ssbs),
> + MRS_FIELD(ID_AA64PFR1, SSBS, false, MRS_LOWER, id_aa64pfr1_ssbs),
> MRS_FIELD(ID_AA64PFR1, MTE, false, MRS_EXACT, id_aa64pfr1_mte),
> MRS_FIELD_END,
> };
> @@ -1126,7 +1128,6 @@ update_special_regs(u_int cpu)
> }
>
> /* HWCAP */
> -extern u_long elf_hwcap;
> bool __read_frequently lse_supported = false;
>
> bool __read_frequently icache_aliasing = false;
> @@ -1156,8 +1157,9 @@ identify_cpu_sysinit(void *dummy __unused)
> idc = false;
> }
>
> - /* Exposed to userspace as AT_HWCAP */
> + /* Exposed to userspace as AT_HWCAP and AT_HWCAP2 */
> elf_hwcap = parse_cpu_features_hwcap();
> + elf_hwcap2 = parse_cpu_features_hwcap2();
>
> if (dic && idc) {
> arm64_icache_sync_range = _dic_idc_icache_sync_range;
> @@ -1194,6 +1196,15 @@ parse_cpu_features_hwcap(void)
> {
> u_long hwcap = 0;
>
> + switch (ID_AA64ISAR0_TS_VAL(user_cpu_desc.id_aa64isar0)) {
> + case ID_AA64ISAR0_TS_CondM_8_4:
> + case ID_AA64ISAR0_TS_CondM_8_5:
> + hwcap |= HWCAP_FLAGM;
> + break;
> + default:
> + break;
> + }
> +
> if (ID_AA64ISAR0_DP_VAL(user_cpu_desc.id_aa64isar0) ==
> ID_AA64ISAR0_DP_IMPL)
> hwcap |= HWCAP_ASIMDDP;
> @@ -1206,6 +1217,10 @@ par
svn commit: r365461 - head/sys/libkern
Author: mhorne
Date: Tue Sep 8 15:39:19 2020
New Revision: 365461
URL: https://svnweb.freebsd.org/changeset/base/365461
Log:
arm64: check for CRC32 support via HWCAP
Doing it this way eliminates the assumption about homogeneous support
for the feature, since HWCAP values are only set if support is present
on all CPUs.
Reviewed by: tuexen, markj
MFC after:1 week
Sponsored by: The FreeBSD Foundation
Differential Revision:https://reviews.freebsd.org/D26032
Modified:
head/sys/libkern/gsb_crc32.c
Modified: head/sys/libkern/gsb_crc32.c
==
--- head/sys/libkern/gsb_crc32.cTue Sep 8 15:36:38 2020
(r365460)
+++ head/sys/libkern/gsb_crc32.cTue Sep 8 15:39:19 2020
(r365461)
@@ -58,7 +58,8 @@ __FBSDID("$FreeBSD$");
#endif
#if defined(__aarch64__)
-#include
+#include
+#include
#endif
#endif /* _KERNEL */
@@ -755,14 +756,7 @@ calculate_crc32c(uint32_t crc32c,
} else
#endif
#if defined(__aarch64__)
- uint64_t reg;
-
- /*
-* We only test for CRC32 support on the CPU with index 0 assuming that
-* this applies to all CPUs.
-*/
- reg = READ_SPECIALREG(id_aa64isar0_el1);
- if (ID_AA64ISAR0_CRC32_VAL(reg) != ID_AA64ISAR0_CRC32_NONE) {
+ if ((elf_hwcap & HWCAP_CRC32) != 0) {
return (armv8_crc32c(crc32c, buffer, length));
} else
#endif
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svn commit: r365460 - in head/sys/arm64: arm64 include
Author: mhorne
Date: Tue Sep 8 15:36:38 2020
New Revision: 365460
URL: https://svnweb.freebsd.org/changeset/base/365460
Log:
arm64: export new HWCAP features
Expose some of the new HWCAP features added in r65304. This includes the
addition of elf_hwcap2 into the sysvec, and a separate function to parse
for those features.
This only exposes features which require no further configuration, e.g.
indicating the presence of certain instructions. Larger features (SVE)
will not be advertised until we actually support them. The exact list of
features/extensions this patch exposes is:
- ARMv8.0-DGH
- ARMv8.0-SB
- ARMv8.2-BF16
- ARMv8.2-DCCVADP
- ARMv8.2-I8MM
- ARMv8.4-LRCPC
- ARMv8.5-CondM
- ARMv8.5-FRINT
- ARMv8.5-RNG
- PSTATE.SSBS
While here, annotate elf_hwcap and elf_hwcap2 as __read_frequently, and
move the declarations to the machine/md_var.h header.
Submitted by: mikael@ (D22314 portion)
MFC after:2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision:https://reviews.freebsd.org/D26031
Differential Revision:https://reviews.freebsd.org/D22314
Modified:
head/sys/arm64/arm64/elf_machdep.c
head/sys/arm64/arm64/identcpu.c
head/sys/arm64/include/md_var.h
Modified: head/sys/arm64/arm64/elf_machdep.c
==
--- head/sys/arm64/arm64/elf_machdep.c Tue Sep 8 15:08:20 2020
(r365459)
+++ head/sys/arm64/arm64/elf_machdep.c Tue Sep 8 15:36:38 2020
(r365460)
@@ -55,7 +55,8 @@ __FBSDID("$FreeBSD$");
#include "linker_if.h"
-u_long elf_hwcap;
+u_long __read_frequently elf_hwcap;
+u_long __read_frequently elf_hwcap2;
static struct sysentvec elf64_freebsd_sysvec = {
.sv_size= SYS_MAXSYSCALL,
@@ -92,6 +93,7 @@ static struct sysentvec elf64_freebsd_sysvec = {
.sv_thread_detach = NULL,
.sv_trap= NULL,
.sv_hwcap = _hwcap,
+ .sv_hwcap2 = _hwcap2,
};
INIT_SYSENTVEC(elf64_sysvec, _freebsd_sysvec);
Modified: head/sys/arm64/arm64/identcpu.c
==
--- head/sys/arm64/arm64/identcpu.c Tue Sep 8 15:08:20 2020
(r365459)
+++ head/sys/arm64/arm64/identcpu.c Tue Sep 8 15:36:38 2020
(r365460)
@@ -43,11 +43,13 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
-#include
#include
+#include
+#include
static void print_cpu_features(u_int cpu);
static u_long parse_cpu_features_hwcap(void);
+static u_long parse_cpu_features_hwcap2(void);
char machine[] = "arm64";
@@ -869,7 +871,7 @@ static struct mrs_field_value id_aa64pfr1_mte[] = {
static struct mrs_field id_aa64pfr1_fields[] = {
MRS_FIELD(ID_AA64PFR1, BT, false, MRS_EXACT, id_aa64pfr1_bt),
- MRS_FIELD(ID_AA64PFR1, SSBS, false, MRS_EXACT, id_aa64pfr1_ssbs),
+ MRS_FIELD(ID_AA64PFR1, SSBS, false, MRS_LOWER, id_aa64pfr1_ssbs),
MRS_FIELD(ID_AA64PFR1, MTE, false, MRS_EXACT, id_aa64pfr1_mte),
MRS_FIELD_END,
};
@@ -1126,7 +1128,6 @@ update_special_regs(u_int cpu)
}
/* HWCAP */
-extern u_long elf_hwcap;
bool __read_frequently lse_supported = false;
bool __read_frequently icache_aliasing = false;
@@ -1156,8 +1157,9 @@ identify_cpu_sysinit(void *dummy __unused)
idc = false;
}
- /* Exposed to userspace as AT_HWCAP */
+ /* Exposed to userspace as AT_HWCAP and AT_HWCAP2 */
elf_hwcap = parse_cpu_features_hwcap();
+ elf_hwcap2 = parse_cpu_features_hwcap2();
if (dic && idc) {
arm64_icache_sync_range = _dic_idc_icache_sync_range;
@@ -1194,6 +1196,15 @@ parse_cpu_features_hwcap(void)
{
u_long hwcap = 0;
+ switch (ID_AA64ISAR0_TS_VAL(user_cpu_desc.id_aa64isar0)) {
+ case ID_AA64ISAR0_TS_CondM_8_4:
+ case ID_AA64ISAR0_TS_CondM_8_5:
+ hwcap |= HWCAP_FLAGM;
+ break;
+ default:
+ break;
+ }
+
if (ID_AA64ISAR0_DP_VAL(user_cpu_desc.id_aa64isar0) ==
ID_AA64ISAR0_DP_IMPL)
hwcap |= HWCAP_ASIMDDP;
@@ -1206,6 +1217,10 @@ parse_cpu_features_hwcap(void)
ID_AA64ISAR0_SM3_IMPL)
hwcap |= HWCAP_SM3;
+ if (ID_AA64ISAR0_SHA3_VAL(user_cpu_desc.id_aa64isar0) ==
+ ID_AA64ISAR0_SHA3_IMPL)
+ hwcap |= HWCAP_SHA3;
+
if (ID_AA64ISAR0_RDM_VAL(user_cpu_desc.id_aa64isar0) ==
ID_AA64ISAR0_RDM_IMPL)
hwcap |= HWCAP_ASIMDRDM;
@@ -1229,7 +1244,8 @@ parse_cpu_features_hwcap(void)
break;
}
- if (ID_AA64ISAR0_SHA1_VAL(user_cpu_desc.id_aa64isar0))
+ if (ID_AA64ISAR0_SHA1_VAL(user_cpu_desc.id_aa64isar0) ==
+ ID_AA64ISAR0_SHA1_BASE)
hwcap |= HWCAP_SHA1;
switch (ID_AA64ISAR0_AES_VAL(user_cpu_desc.id_aa64isar0)) {
@@ -1243,9 +1259,20 @@
svn commit: r365459 - in head/sys: arm64/include sys
Author: mhorne Date: Tue Sep 8 15:08:20 2020 New Revision: 365459 URL: https://svnweb.freebsd.org/changeset/base/365459 Log: arm64: fix incorrect HWCAP definitions FreeBSD exports CPU features as bits in the AT_HWCAP and AT_HWCAP2 vectors via elf_aux_info(3). This interface is similar to getauxval(3) on Linux, and for simplicity to consumers we try to maintain an identical set of feature flags on arm64. The first batch of AT_HWCAP flags were added in r350166, corresponding to definitions that already existed in Linux. Unfortunately, one flag was missed, and a portion of the values are shifted one bit to the right as a result. Add the missing definition for HWCAP_ASIMDHP, and adjust the affected values to match their Linux counterparts. Although this is an ABI-breaking change, there is no plan to provide compat code for old binaries. An audit of our ports tree and other software via Debian code search indicates that there are not yet any consumers of this interface for FreeBSD/arm64. Bump __FreeBSD_version to be on the safe side, in case compat code needs to be added in the future. Reviewed by: emaste, manu MFC after:2 weeks Sponsored by: The FreeBSD Foundation Differential Revision:https://reviews.freebsd.org/D26329 Modified: head/sys/arm64/include/elf.h head/sys/sys/param.h Modified: head/sys/arm64/include/elf.h == --- head/sys/arm64/include/elf.hTue Sep 8 15:01:49 2020 (r365458) +++ head/sys/arm64/include/elf.hTue Sep 8 15:08:20 2020 (r365459) @@ -102,25 +102,29 @@ __ElfType(Auxinfo); #defineHWCAP_CRC32 0x0080 #defineHWCAP_ATOMICS 0x0100 #defineHWCAP_FPHP 0x0200 -/* XXX: The following bits don't match the Linux definitions */ -#defineHWCAP_CPUID 0x0400 -#defineHWCAP_ASIMDRDM 0x0800 -#defineHWCAP_JSCVT 0x1000 -#defineHWCAP_FCMA 0x2000 -#defineHWCAP_LRCPC 0x4000 -#defineHWCAP_DCPOP 0x8000 -#defineHWCAP_SHA3 0x0001 -#defineHWCAP_SM3 0x0002 -#defineHWCAP_SM4 0x0004 -#defineHWCAP_ASIMDDP 0x0008 -#defineHWCAP_SHA5120x0010 -#defineHWCAP_SVE 0x0020 -#defineHWCAP_ASIMDFHM 0x0040 -#defineHWCAP_DIT 0x0080 -#defineHWCAP_USCAT 0x0100 -#defineHWCAP_ILRCPC0x0200 -#defineHWCAP_FLAGM 0x0400 -/* XXX: end of incorrect definitions */ +#defineHWCAP_ASIMDHP 0x0400 +/* + * XXX: The following bits (from CPUID to FLAGM) were originally incorrect, + * but later changed to match the Linux definitions. No compatibility code is + * provided, as the fix was expected to result in near-zero fallout. + */ +#defineHWCAP_CPUID 0x0800 +#defineHWCAP_ASIMDRDM 0x1000 +#defineHWCAP_JSCVT 0x2000 +#defineHWCAP_FCMA 0x4000 +#defineHWCAP_LRCPC 0x8000 +#defineHWCAP_DCPOP 0x0001 +#defineHWCAP_SHA3 0x0002 +#defineHWCAP_SM3 0x0004 +#defineHWCAP_SM4 0x0008 +#defineHWCAP_ASIMDDP 0x0010 +#defineHWCAP_SHA5120x0020 +#defineHWCAP_SVE 0x0040 +#defineHWCAP_ASIMDFHM 0x0080 +#defineHWCAP_DIT 0x0100 +#defineHWCAP_USCAT 0x0200 +#defineHWCAP_ILRCPC0x0400 +#defineHWCAP_FLAGM 0x0800 #defineHWCAP_SSBS 0x1000 #defineHWCAP_SB0x2000 #defineHWCAP_PACA 0x4000 Modified: head/sys/sys/param.h == --- head/sys/sys/param.hTue Sep 8 15:01:49 2020(r365458) +++ head/sys/sys/param.hTue Sep 8 15:08:20 2020(r365459) @@ -60,7 +60,7 @@ * in the range 5 to 9. */ #undef __FreeBSD_version -#define __FreeBSD_version 1300113 /* Master, propagated to newvers */ +#define __FreeBSD_version 1300114 /* Master, propagated to newvers */ /* * __FreeBSD_kernel__ indicates that this system uses the kernel of FreeBSD, ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
Re: svn commit: r365449 - head/sbin/rcorder
Hi,
I think this change warrants an entry in RELNOTES.
Cheers,
Mitchell
On Tue, Sep 8, 2020 at 7:36 AM Andrey V. Elsukov wrote:
>
> Author: ae
> Date: Tue Sep 8 10:36:11 2020
> New Revision: 365449
> URL: https://svnweb.freebsd.org/changeset/base/365449
>
> Log:
> Add a few features to rcorder:
>
> o Enhance dependency loop logging: print full chain instead of the
> last link competing the loop;
> o Add -g option to generate dependency graph suitable for GraphViz
> visualization, loops and other graph generation issues are highlighted
> automatically;
> o Add -p option that enables grouping items that can be processed in
> parallel.
>
> Submitted by: Boris Lytochkin
> Reviewed by: melifaro
> MFC after:1 week
> Differential Revision:https://reviews.freebsd.org/D25389
>
> Modified:
> head/sbin/rcorder/rcorder.8
> head/sbin/rcorder/rcorder.c
>
> Modified: head/sbin/rcorder/rcorder.8
> ==
> --- head/sbin/rcorder/rcorder.8 Tue Sep 8 07:37:45 2020(r365448)
> +++ head/sbin/rcorder/rcorder.8 Tue Sep 8 10:36:11 2020(r365449)
> @@ -31,7 +31,7 @@
> .\"
> .\" $FreeBSD$
> .\"
> -.Dd June 22, 2020
> +.Dd September 8, 2020
> .Dt RCORDER 8
> .Os
> .Sh NAME
> @@ -39,6 +39,7 @@
> .Nd print a dependency ordering of interdependent files
> .Sh SYNOPSIS
> .Nm
> +.Op Fl gp
> .Op Fl k Ar keep
> .Op Fl s Ar skip
> .Ar
> @@ -95,6 +96,9 @@ is reached, parsing stops.
> .Pp
> The options are as follows:
> .Bl -tag -width "-k keep"
> +.It Fl g
> +Produce a GraphViz (.dot) of the complete dependency graph instead of
> +plaintext calling order list.
> .It Fl k Ar keep
> Add the specified keyword to the
> .Dq "keep list" .
> @@ -102,6 +106,9 @@ If any
> .Fl k
> option is given, only those files containing the matching keyword are listed.
> This option can be specified multiple times.
> +.It Fl p
> +Generate ordering suitable for parallel startup, placing files that can be
> +executed simultaneously on the same line.
> .It Fl s Ar skip
> Add the specified keyword to the
> .Dq "skip list" .
> @@ -178,19 +185,46 @@ The
> utility may print one of the following error messages and exit with a
> non-zero
> status if it encounters an error while processing the file list.
> .Bl -diag
> -.It "Requirement %s has no providers, aborting."
> +.It "Requirement %s in file %s has no providers."
> No file has a
> .Ql PROVIDE
> line corresponding to a condition present in a
> .Ql REQUIRE
> line in another file.
> -.It "Circular dependency on provision %s, aborting."
> +.It "Circular dependency on provision %s in file %s."
> A set of files has a circular dependency which was detected while
> processing the stated condition.
> -.It "Circular dependency on file %s, aborting."
> +Loop visualization follows this message.
> +.It "Circular dependency on file %s."
> A set of files has a circular dependency which was detected while
> processing the stated file.
> +.It "%s was seen in circular dependencies for %d times."
> +Each node that was a part of circular dependency loops reports total number
> of
> +such encounters.
> +Start with files having biggest counter when fighting with broken
> dependencies.
> .El
> +.Sh DIAGNOSTICS WITH GRAPHVIZ
> +Direct dependency is drawn with solid line,
> +.Ql BEFORE
> +dependency is drawn as a dashed line.
> +Each node of a graph represents an item from
> +.Ql PROVIDE
> +lines.
> +In case there are more than one file providing an item, a list of filenames
> +shortened with
> +.Xr basename 3
> +is shown.
> +Shortened filenames are also shown in case
> +.Ql PROVIDE
> +item does not match file name.
> +.Pp
> +Edges and nodes where circular dependencies were detected are drawn bold red.
> +If a file has an item in
> +.Ql REQUIRE
> +or in
> +.Ql BEFORE
> +that could not be provided,
> +this missing provider and the requirement will be drawn bold red as well.
> .Sh SEE ALSO
> .Xr acpiconf 8 ,
> .Xr rc 8 ,
>
> Modified: head/sbin/rcorder/rcorder.c
> ==
> --- head/sbin/rcorder/rcorder.c Tue Sep 8 07:37:45 2020(r365448)
> +++ head/sbin/rcorder/rcorder.c Tue Sep 8 10:36:11 2020(r365449)
> @@ -9,6 +9,8 @@
> * All rights reserved.
> * Copyright (c) 1998
> * Perry E. Metzger. All rights reserved.
> + * Copyright (c) 2020
> + * Boris N. Lytochkin. All rights reserved.
> *
> * Redistribution and use in source and binary forms, with or without
> * modification, are permitted provided that the following conditions
> @@ -48,6 +50,8 @@ __FBSDID("$FreeBSD$");
> #include
> #include
> #include
> +#include
> +#include
>
> #include "ealloc.h"
> #include "sprite.h"
> @@ -75,17 +79,21 @@ static int debug = 0;
> #define KEYWORDS_STR "# KEYWORDS:"
> #define KEYWORDS_LEN (sizeof(KEYWORDS_STR) - 1)
>
> +#defineFAKE_PROV_NAME
svn commit: r365456 - head/sys/conf
Author: mhorne
Date: Tue Sep 8 13:24:44 2020
New Revision: 365456
URL: https://svnweb.freebsd.org/changeset/base/365456
Log:
RISC-V: enable MK_FORMAT_EXTENSIONS
This option was marked as broken because our riscv64-xtoolchain-gcc
package lacked support. Since we are moving away from xtoolchain gcc in
favor of freebsd-gcc9, there should be no issue in enabling this option
by default.
Notably, this enables -Wformat errors.
Reviewed by: kp, jhb
Differential Revision:https://reviews.freebsd.org/D26320
Modified:
head/sys/conf/kern.opts.mk
Modified: head/sys/conf/kern.opts.mk
==
--- head/sys/conf/kern.opts.mk Tue Sep 8 13:21:13 2020(r365455)
+++ head/sys/conf/kern.opts.mk Tue Sep 8 13:24:44 2020(r365456)
@@ -80,10 +80,6 @@ BROKEN_OPTIONS+= CDDL ZFS SSP
BROKEN_OPTIONS+= ZFS
.endif
-.if ${MACHINE_CPUARCH} == "riscv"
-BROKEN_OPTIONS+= FORMAT_EXTENSIONS
-.endif
-
# Things that don't work because the kernel doesn't have the support
# for them.
.if ${MACHINE} != "i386" && ${MACHINE} != "amd64"
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svn commit: r365455 - in head/sys: dev/xilinx riscv/riscv
Author: mhorne
Date: Tue Sep 8 13:21:13 2020
New Revision: 365455
URL: https://svnweb.freebsd.org/changeset/base/365455
Log:
RISC-V: fix some mismatched format specifiers
RISC-V is currently built with -Wno-format, which is how these went
undetected. Address them now before re-enabling those warnings.
Differential Revision:https://reviews.freebsd.org/D26319
Modified:
head/sys/dev/xilinx/axidma.c
head/sys/riscv/riscv/db_disasm.c
head/sys/riscv/riscv/intr_machdep.c
head/sys/riscv/riscv/pmap.c
head/sys/riscv/riscv/sbi.c
head/sys/riscv/riscv/trap.c
Modified: head/sys/dev/xilinx/axidma.c
==
--- head/sys/dev/xilinx/axidma.cTue Sep 8 12:38:34 2020
(r365454)
+++ head/sys/dev/xilinx/axidma.cTue Sep 8 13:21:13 2020
(r365455)
@@ -363,7 +363,7 @@ axidma_desc_alloc(struct axidma_softc *sc, struct xdma
chan->mem_vaddr = kva_alloc(chan->mem_size);
pmap_kenter_device(chan->mem_vaddr, chan->mem_size, chan->mem_paddr);
- device_printf(sc->dev, "Allocated chunk %lx %d\n",
+ device_printf(sc->dev, "Allocated chunk %lx %lu\n",
chan->mem_paddr, chan->mem_size);
for (i = 0; i < nsegments; i++) {
Modified: head/sys/riscv/riscv/db_disasm.c
==
--- head/sys/riscv/riscv/db_disasm.cTue Sep 8 12:38:34 2020
(r365454)
+++ head/sys/riscv/riscv/db_disasm.cTue Sep 8 13:21:13 2020
(r365455)
@@ -416,7 +416,7 @@ oprint(struct riscv_op *op, vm_offset_t loc, int insn)
imm |= ((insn >> 12) & 0x1) << 5;
if (imm & (1 << 5))
imm |= (0x7ff << 5); /* sign ext */
- db_printf("0x%lx", imm);
+ db_printf("0x%x", imm);
break;
case 'o':
imm = ((insn >> 2) & 0x1f) << 0;
@@ -524,7 +524,7 @@ oprint(struct riscv_op *op, vm_offset_t loc, int insn)
imm = (insn >> 12) & 0xf;
if (imm & (1 << 20))
imm |= (0xfff << 20); /* sign extend */
- db_printf("0x%lx", imm);
+ db_printf("0x%x", imm);
break;
case 'j':
/* imm[11:0] << 20 */
Modified: head/sys/riscv/riscv/intr_machdep.c
==
--- head/sys/riscv/riscv/intr_machdep.c Tue Sep 8 12:38:34 2020
(r365454)
+++ head/sys/riscv/riscv/intr_machdep.c Tue Sep 8 13:21:13 2020
(r365455)
@@ -73,9 +73,9 @@ struct intc_irqsrc isrcs[INTC_NIRQS];
static void
riscv_mask_irq(void *source)
{
- uintptr_t irq;
+ int irq;
- irq = (uintptr_t)source;
+ irq = (int)(uintptr_t)source;
switch (irq) {
case IRQ_TIMER_SUPERVISOR:
@@ -95,9 +95,9 @@ riscv_mask_irq(void *source)
static void
riscv_unmask_irq(void *source)
{
- uintptr_t irq;
+ int irq;
- irq = (uintptr_t)source;
+ irq = (int)(uintptr_t)source;
switch (irq) {
case IRQ_TIMER_SUPERVISOR:
Modified: head/sys/riscv/riscv/pmap.c
==
--- head/sys/riscv/riscv/pmap.c Tue Sep 8 12:38:34 2020(r365454)
+++ head/sys/riscv/riscv/pmap.c Tue Sep 8 13:21:13 2020(r365455)
@@ -590,7 +590,7 @@ pmap_bootstrap(vm_offset_t l1pt, vm_paddr_t kernstart,
if (physmap[i + 1] > max_pa)
max_pa = physmap[i + 1];
}
- printf("physmap_idx %lx\n", physmap_idx);
+ printf("physmap_idx %u\n", physmap_idx);
printf("min_pa %lx\n", min_pa);
printf("max_pa %lx\n", max_pa);
Modified: head/sys/riscv/riscv/sbi.c
==
--- head/sys/riscv/riscv/sbi.c Tue Sep 8 12:38:34 2020(r365454)
+++ head/sys/riscv/riscv/sbi.c Tue Sep 8 13:21:13 2020(r365455)
@@ -104,7 +104,7 @@ sbi_print_version(void)
switch (sbi_impl_id) {
case (SBI_IMPL_ID_BBL):
- printf("SBI: Berkely Boot Loader %u\n", sbi_impl_version);
+ printf("SBI: Berkely Boot Loader %lu\n", sbi_impl_version);
break;
case (SBI_IMPL_ID_OPENSBI):
major = sbi_impl_version >> OPENSBI_VERSION_MAJOR_OFFSET;
@@ -112,7 +112,7 @@ sbi_print_version(void)
printf("SBI: OpenSBI v%u.%u\n", major, minor);
break;
default:
- printf("SBI: Unrecognized Implementation: %u\n", sbi_impl_id);
+ printf("SBI: Unrecognized Implementation: %lu\n", sbi_impl_id);
break;
svn commit: r365316 - head/sys/rpc/rpcsec_tls
Author: mhorne
Date: Thu Sep 3 22:40:51 2020
New Revision: 365316
URL: https://svnweb.freebsd.org/changeset/base/365316
Log:
Remove a duplicate declaration
This is already declared in sys/file.h, which is included directly.
Compiling with GCC9 emits an error.
Discussed with: rmacklem
Modified:
head/sys/rpc/rpcsec_tls/rpctls_impl.c
Modified: head/sys/rpc/rpcsec_tls/rpctls_impl.c
==
--- head/sys/rpc/rpcsec_tls/rpctls_impl.c Thu Sep 3 22:24:52 2020
(r365315)
+++ head/sys/rpc/rpcsec_tls/rpctls_impl.c Thu Sep 3 22:40:51 2020
(r365316)
@@ -62,8 +62,6 @@ __FBSDID("$FreeBSD$");
#include "rpctlscd.h"
#include "rpctlssd.h"
-extern struct fileops badfileops;
-
/*
* Syscall hooks
*/
___
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svn commit: r365304 - head/sys/arm64/include
Author: mhorne Date: Thu Sep 3 17:07:58 2020 New Revision: 365304 URL: https://svnweb.freebsd.org/changeset/base/365304 Log: arm64: update the set of HWCAP definitions This is in sync with what is defined for Linux 5.8. Note that all bits in HWCAP are exhausted, and HWCAP2 has been added. This also revealed an error in some of the existing definitions. We are missing HWCAP_ASIMDHP, and as a result a portion of the HWCAP values are shifted right by one bit. This will be fixed in an upcoming change, but the values being added now are compatible with what Linux defines. Reviewed by: emaste, markj, manu MFC after:1 week Sponsored by: The FreeBSD Foundation Differential Revision:https://reviews.freebsd.org/D26030 Modified: head/sys/arm64/include/elf.h Modified: head/sys/arm64/include/elf.h == --- head/sys/arm64/include/elf.hThu Sep 3 15:57:37 2020 (r365303) +++ head/sys/arm64/include/elf.hThu Sep 3 17:07:58 2020 (r365304) @@ -92,33 +92,58 @@ __ElfType(Auxinfo); #endif /* HWCAP */ +#defineHWCAP_FP0x0001 +#defineHWCAP_ASIMD 0x0002 +#defineHWCAP_EVTSTRM 0x0004 +#defineHWCAP_AES 0x0008 +#defineHWCAP_PMULL 0x0010 +#defineHWCAP_SHA1 0x0020 +#defineHWCAP_SHA2 0x0040 +#defineHWCAP_CRC32 0x0080 +#defineHWCAP_ATOMICS 0x0100 +#defineHWCAP_FPHP 0x0200 +/* XXX: The following bits don't match the Linux definitions */ +#defineHWCAP_CPUID 0x0400 +#defineHWCAP_ASIMDRDM 0x0800 +#defineHWCAP_JSCVT 0x1000 +#defineHWCAP_FCMA 0x2000 +#defineHWCAP_LRCPC 0x4000 +#defineHWCAP_DCPOP 0x8000 +#defineHWCAP_SHA3 0x0001 +#defineHWCAP_SM3 0x0002 +#defineHWCAP_SM4 0x0004 +#defineHWCAP_ASIMDDP 0x0008 +#defineHWCAP_SHA5120x0010 +#defineHWCAP_SVE 0x0020 +#defineHWCAP_ASIMDFHM 0x0040 +#defineHWCAP_DIT 0x0080 +#defineHWCAP_USCAT 0x0100 +#defineHWCAP_ILRCPC0x0200 +#defineHWCAP_FLAGM 0x0400 +/* XXX: end of incorrect definitions */ +#defineHWCAP_SSBS 0x1000 +#defineHWCAP_SB0x2000 +#defineHWCAP_PACA 0x4000 +#defineHWCAP_PACG 0x8000 -#defineHWCAP_FP0x0001 -#defineHWCAP_ASIMD 0x0002 -#defineHWCAP_EVTSTRM 0x0004 -#defineHWCAP_AES 0x0008 -#defineHWCAP_PMULL 0x0010 -#defineHWCAP_SHA1 0x0020 -#defineHWCAP_SHA2 0x0040 -#defineHWCAP_CRC32 0x0080 -#defineHWCAP_ATOMICS 0x0100 -#defineHWCAP_FPHP 0x0200 -#defineHWCAP_CPUID 0x0400 -#defineHWCAP_ASIMDRDM 0x0800 -#defineHWCAP_JSCVT 0x1000 -#defineHWCAP_FCMA 0x2000 -#defineHWCAP_LRCPC 0x4000 -#defineHWCAP_DCPOP 0x8000 -#defineHWCAP_SHA3 0x0001 -#defineHWCAP_SM3 0x0002 -#defineHWCAP_SM4 0x0004 -#defineHWCAP_ASIMDDP 0x0008 -#defineHWCAP_SHA5120x0010 -#defineHWCAP_SVE 0x0020 -#defineHWCAP_ASIMDFHM 0x0040 -#defineHWCAP_DIT 0x0080 -#defineHWCAP_USCAT 0x0100 -#defineHWCAP_ILRCPC0x0200 -#defineHWCAP_FLAGM 0x0400 +/* HWCAP2 */ +#defineHWCAP2_DCPODP 0x0001 +#defineHWCAP2_SVE2 0x0002 +#defineHWCAP2_SVEAES 0x0004 +#defineHWCAP2_SVEPMULL 0x0008 +#defineHWCAP2_SVEBITPERM 0x0010 +#defineHWCAP2_SVESHA3 0x0020 +#defineHWCAP2_SVESM4 0x0040 +#defineHWCAP2_FLAGM2 0x0080 +#defineHWCAP2_FRINT0x0100 +#defineHWCAP2_SVEI8MM 0x0200 +#defineHWCAP2_SVEF32MM 0x0400 +#defineHWCAP2_SVEF64MM 0x0800 +#defineHWCAP2_SVEBF16 0x1000 +#defineHWCAP2_I8MM 0x2000 +#defineHWCAP2_BF16 0x4000 +#defineHWCAP2_DGH 0x8000 +#defineHWCAP2_RNG 0x0001 +#defineHWCAP2_BTI 0x0002 #endif /* !_MACHINE_ELF_H_ */
svn commit: r364256 - head/sys/riscv/riscv
Author: mhorne
Date: Sat Aug 15 16:15:34 2020
New Revision: 364256
URL: https://svnweb.freebsd.org/changeset/base/364256
Log:
RISC-V: copy kernelname from the environment
This is allows kern.bootfile to report the correct value.
Modified:
head/sys/riscv/riscv/machdep.c
Modified: head/sys/riscv/riscv/machdep.c
==
--- head/sys/riscv/riscv/machdep.c Sat Aug 15 15:06:39 2020
(r364255)
+++ head/sys/riscv/riscv/machdep.c Sat Aug 15 16:15:34 2020
(r364256)
@@ -861,6 +861,7 @@ initriscv(struct riscv_bootparams *rvbp)
phandle_t chosen;
uint32_t hart;
#endif
+ char *env;
TSRAW(, TS_ENTER, __func__, NULL);
@@ -954,6 +955,10 @@ initriscv(struct riscv_bootparams *rvbp)
mutex_init();
init_param2(physmem);
kdb_init();
+
+ env = kern_getenv("kernelname");
+ if (env != NULL)
+ strlcpy(kernelname, env, sizeof(kernelname));
if (boothowto & RB_VERBOSE)
physmem_print_tables();
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svn commit: r364255 - head/sys/arm64/arm64
Author: mhorne
Date: Sat Aug 15 15:06:39 2020
New Revision: 364255
URL: https://svnweb.freebsd.org/changeset/base/364255
Log:
arm64: parse HWCAP values using user_cpu_desc
The hard work of parsing fields per-CPU, handling heterogeneous
features, and excluding features from userspace is already done by
update_special_regs. We can build our set of HWCAPs from the result.
This exposed a small bug in update_special_regs, in which the
generated bitmask was not wide enough, and as a result some bits
weren't being exposed in user_cpu_desc. Fix this.
While here, adjust some formatting.
Reviewed by: andrew
MFC after:2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision:https://reviews.freebsd.org/D26069
Modified:
head/sys/arm64/arm64/identcpu.c
Modified: head/sys/arm64/arm64/identcpu.c
==
--- head/sys/arm64/arm64/identcpu.c Sat Aug 15 14:57:53 2020
(r364254)
+++ head/sys/arm64/arm64/identcpu.c Sat Aug 15 15:06:39 2020
(r364255)
@@ -47,7 +47,7 @@ __FBSDID("$FreeBSD$");
#include
static void print_cpu_features(u_int cpu);
-static u_long parse_cpu_features_hwcap(u_int cpu);
+static u_long parse_cpu_features_hwcap(void);
char machine[] = "arm64";
@@ -1095,7 +1095,7 @@ update_special_regs(u_int cpu)
for (j = 0; fields[j].type != 0; j++) {
switch (fields[j].type & MRS_TYPE_MASK) {
case MRS_EXACT:
- user_reg &= ~(0xfu << fields[j].shift);
+ user_reg &= ~(0xful << fields[j].shift);
user_reg |=
(uint64_t)MRS_EXACT_FIELD(fields[j].type) <<
fields[j].shift;
@@ -1131,7 +1131,6 @@ static void
identify_cpu_sysinit(void *dummy __unused)
{
int cpu;
- u_long hwcap;
bool dic, idc;
dic = (allow_dic != 0);
@@ -1139,11 +1138,6 @@ identify_cpu_sysinit(void *dummy __unused)
CPU_FOREACH(cpu) {
check_cpu_regs(cpu);
- hwcap = parse_cpu_features_hwcap(cpu);
- if (elf_hwcap == 0)
- elf_hwcap = hwcap;
- else
- elf_hwcap &= hwcap;
if (cpu != 0)
update_special_regs(cpu);
@@ -1153,6 +1147,9 @@ identify_cpu_sysinit(void *dummy __unused)
idc = false;
}
+ /* Exposed to userspace as AT_HWCAP */
+ elf_hwcap = parse_cpu_features_hwcap();
+
if (dic && idc) {
arm64_icache_sync_range = _dic_idc_icache_sync_range;
if (bootverbose)
@@ -1184,43 +1181,49 @@ cpu_features_sysinit(void *dummy __unused)
SYSINIT(cpu_features, SI_SUB_SMP, SI_ORDER_ANY, cpu_features_sysinit, NULL);
static u_long
-parse_cpu_features_hwcap(u_int cpu)
+parse_cpu_features_hwcap(void)
{
u_long hwcap = 0;
- if (ID_AA64ISAR0_DP_VAL(cpu_desc[cpu].id_aa64isar0) ==
ID_AA64ISAR0_DP_IMPL)
+ if (ID_AA64ISAR0_DP_VAL(user_cpu_desc.id_aa64isar0) ==
+ ID_AA64ISAR0_DP_IMPL)
hwcap |= HWCAP_ASIMDDP;
- if (ID_AA64ISAR0_SM4_VAL(cpu_desc[cpu].id_aa64isar0) ==
ID_AA64ISAR0_SM4_IMPL)
+ if (ID_AA64ISAR0_SM4_VAL(user_cpu_desc.id_aa64isar0) ==
+ ID_AA64ISAR0_SM4_IMPL)
hwcap |= HWCAP_SM4;
- if (ID_AA64ISAR0_SM3_VAL(cpu_desc[cpu].id_aa64isar0) ==
ID_AA64ISAR0_SM3_IMPL)
+ if (ID_AA64ISAR0_SM3_VAL(user_cpu_desc.id_aa64isar0) ==
+ ID_AA64ISAR0_SM3_IMPL)
hwcap |= HWCAP_SM3;
- if (ID_AA64ISAR0_RDM_VAL(cpu_desc[cpu].id_aa64isar0) ==
ID_AA64ISAR0_RDM_IMPL)
+ if (ID_AA64ISAR0_RDM_VAL(user_cpu_desc.id_aa64isar0) ==
+ ID_AA64ISAR0_RDM_IMPL)
hwcap |= HWCAP_ASIMDRDM;
- if (ID_AA64ISAR0_Atomic_VAL(cpu_desc[cpu].id_aa64isar0) ==
ID_AA64ISAR0_Atomic_IMPL)
+ if (ID_AA64ISAR0_Atomic_VAL(user_cpu_desc.id_aa64isar0) ==
+ ID_AA64ISAR0_Atomic_IMPL)
hwcap |= HWCAP_ATOMICS;
- if (ID_AA64ISAR0_CRC32_VAL(cpu_desc[cpu].id_aa64isar0) ==
ID_AA64ISAR0_CRC32_BASE)
+ if (ID_AA64ISAR0_CRC32_VAL(user_cpu_desc.id_aa64isar0) ==
+ ID_AA64ISAR0_CRC32_BASE)
hwcap |= HWCAP_CRC32;
- switch (ID_AA64ISAR0_SHA2_VAL(cpu_desc[cpu].id_aa64isar0)) {
- case ID_AA64ISAR0_SHA2_BASE:
- hwcap |= HWCAP_SHA2;
- break;
- case ID_AA64ISAR0_SHA2_512:
- hwcap |= HWCAP_SHA2 | HWCAP_SHA512;
- break;
+ switch (ID_AA64ISAR0_SHA2_VAL(user_cpu_desc.id_aa64isar0)) {
+ case ID_AA64ISAR0_SHA2_BASE:
+ hwcap |= HWCAP_SHA2;
+ break;
+ case ID_AA64ISAR0_SHA2_512:
+ hwcap |=
svn commit: r364254 - in head/sys/arm64: arm64 include
Author: mhorne
Date: Sat Aug 15 14:57:53 2020
New Revision: 364254
URL: https://svnweb.freebsd.org/changeset/base/364254
Log:
arm64: update instruction set attribute register definitions
This adds definitions for the latest additions to the AA64ISAR[01] ID
registers. This brings these registers in sync with ARMv8.6 initial spec
release.
An future change will parse many of these fields for HWCAP features.
Reviewed by: andrew, manu, markj (all previous versions)
MFC after:2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision:https://reviews.freebsd.org/D26029
Modified:
head/sys/arm64/arm64/identcpu.c
head/sys/arm64/include/armreg.h
Modified: head/sys/arm64/arm64/identcpu.c
==
--- head/sys/arm64/arm64/identcpu.c Sat Aug 15 12:29:55 2020
(r364253)
+++ head/sys/arm64/arm64/identcpu.c Sat Aug 15 14:57:53 2020
(r364254)
@@ -364,6 +364,31 @@ static struct mrs_field id_aa64dfr1_fields[] = {
/* ID_AA64ISAR0_EL1 */
+static struct mrs_field_value id_aa64isar0_rndr[] = {
+ MRS_FIELD_VALUE(ID_AA64ISAR0_RNDR_NONE, ""),
+ MRS_FIELD_VALUE(ID_AA64ISAR0_RNDR_IMPL, "RNG"),
+ MRS_FIELD_VALUE_END,
+};
+
+static struct mrs_field_value id_aa64isar0_tlb[] = {
+ MRS_FIELD_VALUE(ID_AA64ISAR0_TLB_NONE, ""),
+ MRS_FIELD_VALUE(ID_AA64ISAR0_TLB_TLBIOS, "TLBI-OS"),
+ MRS_FIELD_VALUE(ID_AA64ISAR0_TLB_TLBIOSR, "TLBI-OSR"),
+ MRS_FIELD_VALUE_END,
+};
+
+static struct mrs_field_value id_aa64isar0_ts[] = {
+ MRS_FIELD_VALUE(ID_AA64ISAR0_TS_NONE, ""),
+ MRS_FIELD_VALUE(ID_AA64ISAR0_TS_CondM_8_4, "CondM-8.4"),
+ MRS_FIELD_VALUE(ID_AA64ISAR0_TS_CondM_8_5, "CondM-8.5"),
+ MRS_FIELD_VALUE_END,
+};
+
+static struct mrs_field_value id_aa64isar0_fhm[] = {
+ MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR0, FHM, NONE, IMPL),
+ MRS_FIELD_VALUE_END,
+};
+
static struct mrs_field_value id_aa64isar0_dp[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR0, DP, NONE, IMPL),
MRS_FIELD_VALUE_END,
@@ -417,6 +442,10 @@ static struct mrs_field_value id_aa64isar0_aes[] = {
};
static struct mrs_field id_aa64isar0_fields[] = {
+ MRS_FIELD(ID_AA64ISAR0, RNDR, false, MRS_LOWER, id_aa64isar0_rndr),
+ MRS_FIELD(ID_AA64ISAR0, TLB, false, MRS_LOWER, id_aa64isar0_tlb),
+ MRS_FIELD(ID_AA64ISAR0, TS, false, MRS_LOWER, id_aa64isar0_ts),
+ MRS_FIELD(ID_AA64ISAR0, FHM, false, MRS_LOWER, id_aa64isar0_fhm),
MRS_FIELD(ID_AA64ISAR0, DP, false, MRS_LOWER, id_aa64isar0_dp),
MRS_FIELD(ID_AA64ISAR0, SM4, false, MRS_LOWER, id_aa64isar0_sm4),
MRS_FIELD(ID_AA64ISAR0, SM3, false, MRS_LOWER, id_aa64isar0_sm3),
@@ -432,6 +461,37 @@ static struct mrs_field id_aa64isar0_fields[] = {
/* ID_AA64ISAR1_EL1 */
+static struct mrs_field_value id_aa64isar1_i8mm[] = {
+ MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, I8MM, NONE, IMPL),
+ MRS_FIELD_VALUE_END,
+};
+
+static struct mrs_field_value id_aa64isar1_dgh[] = {
+ MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, DGH, NONE, IMPL),
+ MRS_FIELD_VALUE_END,
+};
+
+static struct mrs_field_value id_aa64isar1_bf16[] = {
+ MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, BF16, NONE, IMPL),
+ MRS_FIELD_VALUE_END,
+};
+
+static struct mrs_field_value id_aa64isar1_specres[] = {
+ MRS_FIELD_VALUE(ID_AA64ISAR1_SPECRES_NONE, ""),
+ MRS_FIELD_VALUE(ID_AA64ISAR1_SPECRES_IMPL, "PredInv"),
+ MRS_FIELD_VALUE_END,
+};
+
+static struct mrs_field_value id_aa64isar1_sb[] = {
+ MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, SB, NONE, IMPL),
+ MRS_FIELD_VALUE_END,
+};
+
+static struct mrs_field_value id_aa64isar1_frintts[] = {
+ MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, FRINTTS, NONE, IMPL),
+ MRS_FIELD_VALUE_END,
+};
+
static struct mrs_field_value id_aa64isar1_gpi[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, GPI, NONE, IMPL),
MRS_FIELD_VALUE_END,
@@ -443,7 +503,9 @@ static struct mrs_field_value id_aa64isar1_gpa[] = {
};
static struct mrs_field_value id_aa64isar1_lrcpc[] = {
- MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, LRCPC, NONE, IMPL),
+ MRS_FIELD_VALUE(ID_AA64ISAR1_LRCPC_NONE, ""),
+ MRS_FIELD_VALUE(ID_AA64ISAR1_LRCPC_RCPC_8_3, "RCPC-8.3"),
+ MRS_FIELD_VALUE(ID_AA64ISAR1_LRCPC_RCPC_8_4, "RCPC-8.4"),
MRS_FIELD_VALUE_END,
};
@@ -463,16 +525,26 @@ static struct mrs_field_value id_aa64isar1_api[] = {
};
static struct mrs_field_value id_aa64isar1_apa[] = {
- MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, GPA, NONE, IMPL),
+ MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, APA, NONE, IMPL),
MRS_FIELD_VALUE_END,
};
static struct mrs_field_value id_aa64isar1_dpb[] = {
- MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, DPB, NONE, IMPL),
+ MRS_FIELD_VALUE(ID_AA64ISAR1_DPB_NONE, ""),
+ MRS_FIELD_VALUE(ID_AA64ISAR1_DPB_DCCVAP, "DCPoP"),
+
svn commit: r364193 - head/sys/riscv/riscv
Author: mhorne
Date: Thu Aug 13 14:21:05 2020
New Revision: 364193
URL: https://svnweb.freebsd.org/changeset/base/364193
Log:
Enable interrupts while handling traps
I observed hangs post-r362977 in QEMU with -smp 2, in which one thread
would acquire write access to an rm_lock (sysctllock) and get stuck
waiting in smp_rendezvous_cpus while the other CPU was servicing a trap.
The other thread was waiting for read access to the same lock, thus
causing deadlock.
It's clear that this is just one symptom of a larger problem. The
general expectation of MI kernel code is that interrupts are enabled.
Violating this assumption will at best create some additional latency,
but otherwise might cause locking or other unforeseen issues. All other
architectures do so for some subset of trap values, but this somehow got
missed in the RISC-V port. Enable interrupts now during kernel page
faults and for all user trap types.
The code in exception.S already knows to disable interrupts while
handling the return from exception, so there are no changes required
there.
Reviewed by: jhb, markj
MFC after:2 weeks
Differential Revision:https://reviews.freebsd.org/D26017
Modified:
head/sys/riscv/riscv/trap.c
Modified: head/sys/riscv/riscv/trap.c
==
--- head/sys/riscv/riscv/trap.c Thu Aug 13 14:17:36 2020(r364192)
+++ head/sys/riscv/riscv/trap.c Thu Aug 13 14:21:05 2020(r364193)
@@ -198,14 +198,22 @@ data_abort(struct trapframe *frame, int usermode)
"Kernel page fault") != 0)
goto fatal;
- if (usermode)
+ if (usermode) {
map = >td_proc->p_vmspace->vm_map;
- else if (stval >= VM_MAX_USER_ADDRESS)
- map = kernel_map;
- else {
- if (pcb->pcb_onfault == 0)
- goto fatal;
- map = >td_proc->p_vmspace->vm_map;
+ } else {
+ /*
+* Enable interrupts for the duration of the page fault. For
+* user faults this was done already in do_trap_user().
+*/
+ intr_enable();
+
+ if (stval >= VM_MAX_USER_ADDRESS) {
+ map = kernel_map;
+ } else {
+ if (pcb->pcb_onfault == 0)
+ goto fatal;
+ map = >td_proc->p_vmspace->vm_map;
+ }
}
va = trunc_page(stval);
@@ -324,6 +332,7 @@ do_trap_user(struct trapframe *frame)
riscv_cpu_intr(frame);
return;
}
+ intr_enable();
CTR3(KTR_TRAP, "do_trap_user: curthread: %p, sepc: %lx, frame: %p",
curthread, frame->tf_sepc, frame);
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svn commit: r364192 - head/sys/riscv/riscv
Author: mhorne Date: Thu Aug 13 14:17:36 2020 New Revision: 364192 URL: https://svnweb.freebsd.org/changeset/base/364192 Log: Small fixes in locore.S - Properly set up the frame pointer - Hang if we return from mi_startup - Whitespace Clearing the frame pointer marks the end of the backtrace. This fixes "bt 0" in ddb, which previously would unwind one frame too far. Reviewed by: jhb Differential Revision:https://reviews.freebsd.org/D26016 Modified: head/sys/riscv/riscv/locore.S Modified: head/sys/riscv/riscv/locore.S == --- head/sys/riscv/riscv/locore.S Thu Aug 13 14:14:51 2020 (r364191) +++ head/sys/riscv/riscv/locore.S Thu Aug 13 14:17:36 2020 (r364192) @@ -223,19 +223,21 @@ va: csrwsscratch, t0 /* Initialize stack pointer */ - la s3, initstack_end - mv sp, s3 + la sp, initstack_end + /* Clear frame pointer */ + mv s0, zero + /* Allocate space for thread0 PCB and riscv_bootparams */ addisp, sp, -(PCB_SIZE + RISCV_BOOTPARAMS_SIZE) & ~STACKALIGNBYTES /* Clear BSS */ - la s0, _C_LABEL(__bss_start) - la s1, _C_LABEL(_end) + la t0, _C_LABEL(__bss_start) + la t1, _C_LABEL(_end) 1: - sd zero, 0(s0) - addis0, s0, 8 - bltus0, s1, 1b + sd zero, 0(t0) + addit0, t0, 8 + bltut0, t1, 1b /* Fill riscv_bootparams */ la t0, pagetable_l1 @@ -259,6 +261,11 @@ va: call_C_LABEL(initriscv) /* Off we go */ call_C_LABEL(mi_startup) + /* We should never reach here, but if so just hang. */ +2: + wfi + j 2b + /* * Get the physical address the kernel is loaded to. Returned in s9. */ @@ -350,7 +357,7 @@ ENTRY(mpentry) ld sp, 0(t0) /* Get the kernel's load address */ - jal get_physmem + jal get_physmem /* Setup supervisor trap vector */ lla t0, mpva ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r364172 - head/sys/net
Author: mhorne
Date: Wed Aug 12 16:43:20 2020
New Revision: 364172
URL: https://svnweb.freebsd.org/changeset/base/364172
Log:
Correctly set error in rt_mpath_unlink
It is possible for rn_delete() to return NULL. If this happens, then set
*perror to ESRCH, as is done in the rest of the function.
Sponsored by: NetApp, Inc.
Sponsored by: Klara, Inc.
Differential Revision:https://reviews.freebsd.org/D25871
Modified:
head/sys/net/route.c
Modified: head/sys/net/route.c
==
--- head/sys/net/route.cWed Aug 12 16:30:33 2020(r364171)
+++ head/sys/net/route.cWed Aug 12 16:43:20 2020(r364172)
@@ -1107,7 +1107,11 @@ rt_mpath_unlink(struct rib_head *rnh, struct rt_addrin
rn = rnh->rnh_deladdr(info->rti_info[RTAX_DST],
info->rti_info[RTAX_NETMASK],
>head);
- *perror = 0;
+ if (rn != NULL) {
+ *perror = 0;
+ } else {
+ *perror = ESRCH;
+ }
return (rn);
}
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svn commit: r363404 - in head/sys: kern riscv/riscv
Author: mhorne
Date: Tue Jul 21 22:47:02 2020
New Revision: 363404
URL: https://svnweb.freebsd.org/changeset/base/363404
Log:
INTRNG: only shuffle for !EARLY_AP_STARTUP
During device attachment, all interrupt sources will bind to the BSP,
as it is the only processor online. This means interrupts must be
redistributed ("shuffled") later, during SI_SUB_SMP.
For the EARLY_AP_STARTUP case, this is no longer true. SI_SUB_SMP will
execute much earlier, meaning APs will be online and available before
devices begin attachment, and there will therefore be nothing to
shuffle.
All PIC-conforming interrupt controllers will handle this early
distribution properly, except for RISC-V's PLIC. Make the necessary
tweak to the PLIC driver.
While here, convert irq_assign_cpu from a boolean_t to a bool.
Reviewed by: markj
Differential Revision:https://reviews.freebsd.org/D25693
Modified:
head/sys/kern/subr_intr.c
head/sys/riscv/riscv/plic.c
Modified: head/sys/kern/subr_intr.c
==
--- head/sys/kern/subr_intr.c Tue Jul 21 19:56:13 2020(r363403)
+++ head/sys/kern/subr_intr.c Tue Jul 21 22:47:02 2020(r363404)
@@ -128,8 +128,12 @@ static struct intr_irqsrc *irq_sources[NIRQ];
u_int irq_next_free;
#ifdef SMP
-static boolean_t irq_assign_cpu = FALSE;
+#ifdef EARLY_AP_STARTUP
+static bool irq_assign_cpu = true;
+#else
+static bool irq_assign_cpu = false;
#endif
+#endif
/*
* - 2 counters for each I/O interrupt.
@@ -1191,6 +1195,7 @@ intr_irq_next_cpu(u_int last_cpu, cpuset_t *cpumask)
return (last_cpu);
}
+#ifndef EARLY_AP_STARTUP
/*
* Distribute all the interrupt sources among the available
* CPUs once the AP's have been launched.
@@ -1205,7 +1210,7 @@ intr_irq_shuffle(void *arg __unused)
return;
mtx_lock(_table_lock);
- irq_assign_cpu = TRUE;
+ irq_assign_cpu = true;
for (i = 0; i < NIRQ; i++) {
isrc = irq_sources[i];
if (isrc == NULL || isrc->isrc_handlers == 0 ||
@@ -1231,6 +1236,7 @@ intr_irq_shuffle(void *arg __unused)
mtx_unlock(_table_lock);
}
SYSINIT(intr_irq_shuffle, SI_SUB_SMP, SI_ORDER_SECOND, intr_irq_shuffle, NULL);
+#endif /* !EARLY_AP_STARTUP */
#else
u_int
@@ -1239,7 +1245,7 @@ intr_irq_next_cpu(u_int current_cpu, cpuset_t *cpumask
return (PCPU_GET(cpuid));
}
-#endif
+#endif /* SMP */
/*
* Allocate memory for new intr_map_data structure.
Modified: head/sys/riscv/riscv/plic.c
==
--- head/sys/riscv/riscv/plic.c Tue Jul 21 19:56:13 2020(r363403)
+++ head/sys/riscv/riscv/plic.c Tue Jul 21 22:47:02 2020(r363404)
@@ -408,8 +408,7 @@ plic_setup_intr(device_t dev, struct intr_irqsrc *isrc
sc = device_get_softc(dev);
src = (struct plic_irqsrc *)isrc;
- /* Bind to the boot CPU for now. */
- CPU_SET(PCPU_GET(cpuid), >isrc_cpu);
+ CPU_ZERO(>isrc_cpu);
plic_bind_intr(dev, isrc);
return (0);
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svn commit: r363345 - head/sys/riscv/riscv
Author: mhorne
Date: Sun Jul 19 23:34:52 2020
New Revision: 363345
URL: https://svnweb.freebsd.org/changeset/base/363345
Log:
riscv: look for bootargs in FDT
The FDT may contain a short /chosen/bootargs string which we should pass
to boot_parse_cmdline. Notably, this allows the use of qemu's -append
option to pass things like -s to boot to single user mode.
Submitted by: Nathaniel Filardo
Reviewed by: mhorne
MFC after:1 week
Differential Revision:https://reviews.freebsd.org/D25544
Modified:
head/sys/riscv/riscv/machdep.c
Modified: head/sys/riscv/riscv/machdep.c
==
--- head/sys/riscv/riscv/machdep.c Sun Jul 19 23:34:01 2020
(r363344)
+++ head/sys/riscv/riscv/machdep.c Sun Jul 19 23:34:52 2020
(r363345)
@@ -40,6 +40,7 @@ __FBSDID("$FreeBSD$");
#include
#include
+#include
#include
#include
#include
@@ -800,6 +801,19 @@ fake_preload_metadata(struct riscv_bootparams *rvbp)
rvbp->kern_phys, rvbp->kern_phys + (lastaddr - KERNBASE));
}
+#ifdef FDT
+static void
+parse_fdt_bootargs(void)
+{
+ char bootargs[512];
+
+ bootargs[sizeof(bootargs) - 1] = '\0';
+ if (fdt_get_chosen_bootargs(bootargs, sizeof(bootargs) - 1) == 0) {
+ boothowto |= boot_parse_cmdline(bootargs);
+ }
+}
+#endif
+
static vm_offset_t
parse_metadata(void)
{
@@ -829,6 +843,8 @@ parse_metadata(void)
#endif
#ifdef FDT
try_load_dtb(kmdp);
+ if (kern_envp == NULL)
+ parse_fdt_bootargs();
#endif
return (lastaddr);
}
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svn commit: r363339 - head/sys/modules
Author: mhorne
Date: Sun Jul 19 23:19:09 2020
New Revision: 363339
URL: https://svnweb.freebsd.org/changeset/base/363339
Log:
Make efirt module dependent on MK_EFI
MK_EFI was added to kern.opts.mk in r331099, but is currently unused.
Take advantage of that fact and gate the build of efirt behind it.
Reviewed by: imp
Differential Revision:https://reviews.freebsd.org/D24673
Modified:
head/sys/modules/Makefile
Modified: head/sys/modules/Makefile
==
--- head/sys/modules/Makefile Sun Jul 19 23:17:43 2020(r363338)
+++ head/sys/modules/Makefile Sun Jul 19 23:19:09 2020(r363339)
@@ -421,6 +421,12 @@ _ktls_ocf= ktls_ocf
SUBDIR+= cuse
.endif
+.if ${MK_EFI} != "no"
+.if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "amd64"
+_efirt=efirt
+.endif
+.endif
+
.if (${MK_INET_SUPPORT} != "no" || ${MK_INET6_SUPPORT} != "no") || \
defined(ALL_MODULES)
_carp= carp
@@ -585,7 +591,6 @@ _cxgb= cxgb
.if ${MACHINE_CPUARCH} == "aarch64"
_allwinner=allwinner
_armv8crypto= armv8crypto
-_efirt=efirt
_em= em
_rockchip= rockchip
.endif
@@ -707,7 +712,6 @@ _x86bios= x86bios
.if ${MACHINE_CPUARCH} == "amd64"
_amdgpio= amdgpio
_ccp= ccp
-_efirt=efirt
_iavf= iavf
_ioat= ioat
_ixl= ixl
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Re: svn commit: r363242 - head/sys/amd64/include
On Thu, Jul 16, 2020 at 8:28 AM Mateusz Guzik wrote:
>
> Author: mjg
> Date: Thu Jul 16 11:28:24 2020
> New Revision: 363242
> URL: https://svnweb.freebsd.org/changeset/base/363242
>
> Log:
> amd64: patch ffsl to use the compiler builtin
>
> This shortens fdalloc by over 60 bytes. Correctness verified by running both
> variants at the same time and comparing the result of each call.
>
> Note someone(tm) should make a pass at converting everything else feasible.
>
I have a local version of such a change. I'll see about getting it up
for review in the next little while.
Mitchell
> Modified:
> head/sys/amd64/include/cpufunc.h
>
> Modified: head/sys/amd64/include/cpufunc.h
> ==
> --- head/sys/amd64/include/cpufunc.hThu Jul 16 10:20:35 2020
> (r363241)
> +++ head/sys/amd64/include/cpufunc.hThu Jul 16 11:28:24 2020
> (r363242)
> @@ -167,7 +167,8 @@ enable_intr(void)
> static __inline __pure2 int
> ffsl(long mask)
> {
> - return (mask == 0 ? mask : (int)bsfq((u_long)mask) + 1);
> +
> + return (__builtin_ffsl(mask));
> }
>
> #defineHAVE_INLINE_FFSLL
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svn commit: r363197 - head/stand
Author: mhorne
Date: Tue Jul 14 21:15:16 2020
New Revision: 363197
URL: https://svnweb.freebsd.org/changeset/base/363197
Log:
Really fix cleandir after r362973
I made an attempt to fix this in r362978, but all it really did was
confine the issue to the $MACHINE_CPUARCH == "riscv" case. The real
problem is that LINKER_FEATURES is not defined here, so bsd.linker.mk
needs to be included.
This error with cleandir only occurs when META_MODE is disabled, which
explains why it was missed by both CI and myself.
Note that this effectively reverts r362978.
Reported by: mjg
Reviewed by: imp, kevans (in IRC)
Modified:
head/stand/defs.mk
Modified: head/stand/defs.mk
==
--- head/stand/defs.mk Tue Jul 14 21:14:59 2020(r363196)
+++ head/stand/defs.mk Tue Jul 14 21:15:16 2020(r363197)
@@ -17,6 +17,7 @@ INTERNALLIB=
.endif
.include
+.include
WARNS?=1
@@ -151,7 +152,7 @@ CFLAGS+=-fPIC
# Some RISC-V linkers have support for relaxations, while some (lld) do not
# yet. If this is the case we inhibit the compiler from emitting relaxations.
-.if ${MACHINE_CPUARCH} == "riscv" && ${LINKER_FEATURES:Mriscv-relaxations} ==
""
+.if ${LINKER_FEATURES:Mriscv-relaxations} == ""
CFLAGS+= -mno-relax
.endif
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svn commit: r362978 - head/stand
Author: mhorne
Date: Mon Jul 6 21:39:14 2020
New Revision: 362978
URL: https://svnweb.freebsd.org/changeset/base/362978
Log:
Fix cleandir target post r362973
Reported by: mmacy
Modified:
head/stand/defs.mk
Modified: head/stand/defs.mk
==
--- head/stand/defs.mk Mon Jul 6 21:29:50 2020(r362977)
+++ head/stand/defs.mk Mon Jul 6 21:39:14 2020(r362978)
@@ -151,7 +151,7 @@ CFLAGS+=-fPIC
# Some RISC-V linkers have support for relaxations, while some (lld) do not
# yet. If this is the case we inhibit the compiler from emitting relaxations.
-.if ${LINKER_FEATURES:Mriscv-relaxations} == ""
+.if ${MACHINE_CPUARCH} == "riscv" && ${LINKER_FEATURES:Mriscv-relaxations} ==
""
CFLAGS+= -mno-relax
.endif
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svn commit: r362974 - head/share/man/man5
Author: mhorne Date: Mon Jul 6 18:43:00 2020 New Revision: 362974 URL: https://svnweb.freebsd.org/changeset/base/362974 Log: src.conf.5: regen after r362972, r362973, RISC-V EFI support Modified: head/share/man/man5/src.conf.5 Modified: head/share/man/man5/src.conf.5 == --- head/share/man/man5/src.conf.5 Mon Jul 6 18:19:42 2020 (r362973) +++ head/share/man/man5/src.conf.5 Mon Jul 6 18:43:00 2020 (r362974) @@ -1,6 +1,6 @@ .\" DO NOT EDIT-- this file is @generated by tools/build/options/makeman. .\" $FreeBSD$ -.Dd June 24, 2020 +.Dd July 6, 2020 .Dt SRC.CONF 5 .Os .Sh NAME @@ -585,7 +585,7 @@ and .Xr efivar 8 . .Pp This is a default setting on -mips/mips, mips/mips64, powerpc/powerpc, powerpc/powerpc64, riscv/riscv64 and riscv/riscv64sf. +mips/mips, mips/mips64, powerpc/powerpc and powerpc/powerpc64. .It Va WITH_EFI Set to build .Xr efivar 3 @@ -593,7 +593,7 @@ and .Xr efivar 8 . .Pp This is a default setting on -amd64/amd64, arm/armv6, arm/armv7, arm64/aarch64 and i386/i386. +amd64/amd64, arm/armv6, arm/armv7, arm64/aarch64, i386/i386, riscv/riscv64 and riscv/riscv64sf. .It Va WITHOUT_ELFTOOLCHAIN_BOOTSTRAP Set to not build ELF Tool Chain tools (addr2line, nm, size, strings and strip) ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
Re: svn commit: r362973 - in head: share/mk stand stand/common stand/efi/include/riscv stand/efi/libefi stand/efi/loader stand/efi/loader/arch/riscv sys/riscv/include
On Mon, Jul 6, 2020 at 3:19 PM Mitchell Horne wrote:
>
> Author: mhorne
> Date: Mon Jul 6 18:19:42 2020
> New Revision: 362973
> URL: https://svnweb.freebsd.org/changeset/base/362973
>
> Log:
> RISC-V boot1.efi and loader.efi support
>
> This implementation doesn't have any major deviations from the other EFI
> ports. I've copied the boilerplate from arm and arm64.
>
> I've tested this with the following boot flows:
> OpenSBI (M-mode) -> u-boot (S-mode) -> loader.efi -> FreeBSD
> OpenSBI (M-mode) -> u-boot (S-mode) -> boot1.efi -> loader.efi -> FreeBSD
>
> Due to the way that u-boot handles secondary CPUs, OpenSBI >= v0.7 is
> required,
> as the HSM extension is needed to bring them up explicitly. Because of this,
> using BBL as the SBI implementation will not be possible. Additionally,
> there
> are a few recent u-boot changes that are required as well, all of which
> will be
> present in the upcoming v2020.07 release.
>
> Looks good: emaste
> Differential Revision:https://reviews.freebsd.org/D25135
>
> Added:
> head/stand/efi/include/riscv/
> head/stand/efi/include/riscv/efibind.h
> - copied unchanged from r362787, head/stand/efi/include/arm64/efibind.h
> head/stand/efi/loader/arch/riscv/
> head/stand/efi/loader/arch/riscv/Makefile.inc (contents, props changed)
> head/stand/efi/loader/arch/riscv/exec.c
> - copied, changed from r362787, head/stand/efi/loader/arch/arm/exec.c
> head/stand/efi/loader/arch/riscv/ldscript.riscv (contents, props changed)
> head/stand/efi/loader/arch/riscv/start.S (contents, props changed)
> Modified:
> head/share/mk/src.opts.mk
> head/stand/common/self_reloc.c
> head/stand/defs.mk
> head/stand/efi/libefi/Makefile
> head/stand/efi/loader/copy.c
> head/stand/efi/loader/main.c
> head/stand/loader.mk
> head/sys/riscv/include/metadata.h
>
> Modified: head/share/mk/src.opts.mk
> ==
> --- head/share/mk/src.opts.mk Mon Jul 6 17:47:29 2020(r362972)
> +++ head/share/mk/src.opts.mk Mon Jul 6 18:19:42 2020(r362973)
> @@ -318,8 +318,8 @@ BROKEN_OPTIONS+=LIBSOFT
> # marked no longer broken with the switch to LLVM.
> BROKEN_OPTIONS+=GOOGLETEST SSP
> .endif
> -# EFI doesn't exist on mips, powerpc, or riscv.
> -.if ${__T:Mmips*} || ${__T:Mpowerpc*} || ${__T:Mriscv*}
> +# EFI doesn't exist on mips or powerpc.
> +.if ${__T:Mmips*} || ${__T:Mpowerpc*}
> BROKEN_OPTIONS+=EFI
> .endif
> # OFW is only for powerpc, exclude others
>
I meant to commit this hunk separately, but included it by mistake.
The log would have been:
Enable MK_EFI by default on RISC-V
We can now build the EFI libraries, utilities, and bootloader. This is
enough for EFI boot-time services and for us to un-break this option.
Reviewed by: br
Differential Revision: https://reviews.freebsd.org/D25137
> Modified: head/stand/common/self_reloc.c
> ==
> --- head/stand/common/self_reloc.c Mon Jul 6 17:47:29 2020
> (r362972)
> +++ head/stand/common/self_reloc.c Mon Jul 6 18:19:42 2020
> (r362973)
> @@ -31,7 +31,7 @@ __FBSDID("$FreeBSD$");
> #include
> #include
>
> -#if defined(__aarch64__) || defined(__amd64__)
> +#if defined(__aarch64__) || defined(__amd64__) || defined(__riscv)
> #defineElfW_RelElf64_Rela
> #defineElfW_DynElf64_Dyn
> #defineELFW_R_TYPE ELF64_R_TYPE
> @@ -55,6 +55,9 @@ __FBSDID("$FreeBSD$");
> #elif defined(__i386__)
> #defineRELOC_TYPE_NONE R_386_NONE
> #defineRELOC_TYPE_RELATIVE R_386_RELATIVE
> +#elif defined(__riscv)
> +#defineRELOC_TYPE_NONE R_RISCV_NONE
> +#defineRELOC_TYPE_RELATIVE R_RISCV_RELATIVE
> #endif
>
> void self_reloc(Elf_Addr baseaddr, ElfW_Dyn *dynamic);
>
> Modified: head/stand/defs.mk
> ==
> --- head/stand/defs.mk Mon Jul 6 17:47:29 2020(r362972)
> +++ head/stand/defs.mk Mon Jul 6 18:19:42 2020(r362973)
> @@ -115,13 +115,14 @@ AFLAGS+= --32
> SSP_CFLAGS=
>
> # Add in the no float / no SIMD stuff and announce we're freestanding
> -# aarch64 and riscv don't have -msoft-float, but all others do. riscv
> -# currently has no /boot/loader, but may soon.
> +# aarch64 and riscv don't have -msoft-float, but all others do.
> CFLAGS+= -ffreestanding ${CFLAGS_NO_SIMD}
> .if ${MACHINE_CPUARCH} == "aarch64"
> CFLAGS+= -mgeneral-regs-only -f
svn commit: r362973 - in head: share/mk stand stand/common stand/efi/include/riscv stand/efi/libefi stand/efi/loader stand/efi/loader/arch/riscv sys/riscv/include
NULL
};
-
Added: head/stand/efi/loader/arch/riscv/ldscript.riscv
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/stand/efi/loader/arch/riscv/ldscript.riscv Mon Jul 6 18:19:42
2020(r362973)
@@ -0,0 +1,87 @@
+/* $FreeBSD$ */
+OUTPUT_FORMAT("elf64-littleriscv", "elf64-littleriscv", "elf64-littleriscv")
+OUTPUT_ARCH(riscv64)
+ENTRY(_start)
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = 0;
+ ImageBase = .;
+ .text: {
+*(.peheader)
+*(.text .stub .text.* .gnu.linkonce.t.*)
+/* .gnu.warning sections are handled specially by elf32.em. */
+*(.gnu.warning)
+*(.plt)
+ } =0x9090
+ . = ALIGN(16);
+ .data: {
+*(.rodata .rodata.* .gnu.linkonce.r.*)
+*(.rodata1)
+*(.sdata2 .sdata2.* .gnu.linkonce.s2.*)
+*(.sbss2 .sbss2.* .gnu.linkonce.sb2.*)
+*(.opd)
+*(.data .data.* .gnu.linkonce.d.*)
+*(.data1)
+*(.plabel)
+
+. = ALIGN(16);
+__bss_start = .;
+*(.sbss .sbss.* .gnu.linkonce.sb.*)
+*(.scommon)
+*(.dynbss)
+*(.bss *.bss.*)
+*(COMMON)
+. = ALIGN(16);
+__bss_end = .;
+ }
+ . = ALIGN(16);
+ set_Xcommand_set : {
+__start_set_Xcommand_set = .;
+*(set_Xcommand_set)
+__stop_set_Xcommand_set = .;
+ }
+ set_Xficl_compile_set: {
+__start_set_Xficl_compile_set = .;
+*(set_Xficl_compile_set)
+__stop_set_Xficl_compile_set = .;
+ }
+ . = ALIGN(16);
+ .sdata : {
+/*
+ * u-boot expects the gp register to be untouched by the EFI payload, so we
+ * can't enable this yet.
+ */
+/* __global_pointer$ = . + 0x800; */
+*(.got.plt .got)
+*(.sdata .sdata.* .gnu.linkonce.s.*)
+*(dynsbss)
+*(.scommon)
+ }
+ . = ALIGN(16);
+ .dynamic : { *(.dynamic) }
+ . = ALIGN(16);
+ .rela.dyn: {
+*(.rela.text .rela.text.* .rela.gnu.linkonce.t.*)
+*(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*)
+*(.rela.data .rela.data.* .rela.gnu.linkonce.d.*)
+*(.rela.got)
+*(.rela.sdata .rela.sdata.* .rela.gnu.linkonce.s.*)
+*(.rela.sbss .rela.sbss.* .rela.gnu.linkonce.sb.*)
+*(.rela.sdata2 .rela.sdata2.* .rela.gnu.linkonce.s2.*)
+*(.rela.sbss2 .rela.sbss2.* .rela.gnu.linkonce.sb2.*)
+*(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*)
+*(.rela.plt)
+*(.relset_*)
+*(.rela.dyn .rela.dyn.*)
+ }
+ . = ALIGN(16);
+ .reloc : { *(.reloc) }
+ . = ALIGN(16);
+ .dynsym : { *(.dynsym) }
+ _edata = .;
+
+ /* Unused sections */
+ .dynstr : { *(.dynstr) }
+ .hash: { *(.hash) }
+}
Added: head/stand/efi/loader/arch/riscv/start.S
======
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/stand/efi/loader/arch/riscv/start.SMon Jul 6 18:19:42 2020
(r362973)
@@ -0,0 +1,168 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2020 Mitchell Horne
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#include
+
+/*
+ * We need to be a PE32+ file for EFI. On some architectures we can use
+ * objcopy to create the correct file, however on RISC-V we need to do
+ * it ourselves.
+ */
+
+#defineIMAGE_FILE_MACHINE_RISCV64 0x5064
+
+#defineIMAGE_SCN_CNT_CODE 0x0020
+#defineIMAGE_SCN_CNT_INITIALIZED_DATA 0x0040
+#defineIMAGE_SCN_MEM_DISCARDABLE 0x0200
+#defineIMAGE_SCN_MEM_EXECUTE 0x2000
+#defineIMAGE_SCN_MEM_READ
svn commit: r362972 - head/lib/libefivar
Author: mhorne Date: Mon Jul 6 17:47:29 2020 New Revision: 362972 URL: https://svnweb.freebsd.org/changeset/base/362972 Log: libefivar: define MDE_CPU_RISCV64 The necessary definitions from EDK2 are present, so this allows the library to be built on RISC-V. Modified: head/lib/libefivar/efi-osdep.h Modified: head/lib/libefivar/efi-osdep.h == --- head/lib/libefivar/efi-osdep.h Mon Jul 6 16:34:49 2020 (r362971) +++ head/lib/libefivar/efi-osdep.h Mon Jul 6 17:47:29 2020 (r362972) @@ -104,6 +104,8 @@ typedef void VOID; #define MDE_CPU_ARM #elif defined(__aarch64__) #define MDE_CPU_AARCH64 +#elif defined(__riscv) +#define MDE_CPU_RISCV64 #endif /* FreeBSD doesn't have/use MDE_CPU_EBC or MDE_CPU_IPF (ia64) */ ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r362788 - head/lib/libc/riscv
Author: mhorne
Date: Mon Jun 29 19:30:35 2020
New Revision: 362788
URL: https://svnweb.freebsd.org/changeset/base/362788
Log:
Fix printf(3) output of long doubles on RISC-V
When the RISC-V port was initially committed to FreeBSD, GCC would
generate 64-bit long doubles, and the definitions in _fpmath.h reflected
that. This was changed to 128-bit in GCC later that year [1], but the
definitions were never updated, despite the documented workaround. This
causes printf(3) and friends to interpret only the low 64-bits of a long
double in ldtoa, thereby printing incorrect values.
Update the definitions now that both clang and GCC generate 128-bit long
doubles.
[1]
https://github.com/riscv/riscv-gcc/commit/54b21fc5ae83cefec44bc2caed4a8c664c274ba0
PR: 242067
Reported by: Dennis Clarke
MFC after:1 week
Differential Revision:https://reviews.freebsd.org/D25420
Modified:
head/lib/libc/riscv/_fpmath.h
Modified: head/lib/libc/riscv/_fpmath.h
==
--- head/lib/libc/riscv/_fpmath.h Mon Jun 29 18:06:00 2020
(r362787)
+++ head/lib/libc/riscv/_fpmath.h Mon Jun 29 19:30:35 2020
(r362788)
@@ -46,19 +46,6 @@ union IEEEl2bits {
#defineLDBL_IMPLICIT_NBIT
#definemask_nbit_l(u) ((void)0)
-#defineLDBL_MANH_SIZE 20
-#defineLDBL_MANL_SIZE 32
-
-#defineLDBL_TO_ARRAY32(u, a) do { \
- (a)[0] = (uint32_t)(u).bits.manl; \
- (a)[1] = (uint32_t)(u).bits.manh; \
-} while(0)
-
-/*
- * TODO: Due to compiler problem we are temporary using
- * LDBL_PREC == 53. Use code below for LDBL_PREC == 113
- */
-#if 0
#defineLDBL_MANH_SIZE 48
#defineLDBL_MANL_SIZE 64
@@ -68,4 +55,3 @@ union IEEEl2bits {
(a)[2] = (uint32_t)(u).bits.manh; \
(a)[3] = (uint32_t)((u).bits.manh >> 32); \
} while(0)
-#endif
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svn commit: r362584 - head/sys/riscv/riscv
Author: mhorne
Date: Wed Jun 24 15:21:12 2020
New Revision: 362584
URL: https://svnweb.freebsd.org/changeset/base/362584
Log:
Only invalidate the early DTB mapping if it exists
This temporary mapping will become optional. Booting via loader(8)
means that the DTB will have already been copied into the kernel's
staging area, and is therefore covered by the early KVA mappings.
Reviewed by: markj
Differential Revision:https://reviews.freebsd.org/D24911
Modified:
head/sys/riscv/riscv/pmap.c
Modified: head/sys/riscv/riscv/pmap.c
==
--- head/sys/riscv/riscv/pmap.c Wed Jun 24 15:20:00 2020(r362583)
+++ head/sys/riscv/riscv/pmap.c Wed Jun 24 15:21:12 2020(r362584)
@@ -619,8 +619,8 @@ pmap_bootstrap(vm_offset_t l1pt, vm_paddr_t kernstart,
* possibility of an aliased mapping in the future.
*/
l2p = pmap_l2(kernel_pmap, VM_EARLY_DTB_ADDRESS);
- KASSERT((pmap_load(l2p) & PTE_V) != 0, ("dtpb not mapped"));
- pmap_clear(l2p);
+ if ((pmap_load(l2p) & PTE_V) != 0)
+ pmap_clear(l2p);
sfence_vma();
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svn commit: r362583 - in head/sys/riscv: include riscv
Author: mhorne
Date: Wed Jun 24 15:20:00 2020
New Revision: 362583
URL: https://svnweb.freebsd.org/changeset/base/362583
Log:
Handle load from loader(8)
In locore, we must detect and handle different arguments passed by
loader(8) compared to what we recieve when booting directly via SBI
firmware. Currently we receive the hart ID in a0 and a pointer to the
device tree blob in a1. loader(8) provides only a pointer to its
metadata in a0.
The solution to this is to add an additional entry point, _alt_start.
This will be placed first in the .text section, so SBI firmware will
enter here, and jump to the common pagetable setup shortly after. Since
loader(8) understands our ELF kernel, it will enter at the ELF's entry
address, which points to _start. This approach leads to very little
guesswork as to which way we booted.
Fix-up initriscv() to parse the loader's metadata, continuing to use
fake_preload_metadata() in the SBI direct boot case.
Reviewed by: markj, jrtc27 (asm portion)
Differential Revision:https://reviews.freebsd.org/D24912
Modified:
head/sys/riscv/include/machdep.h
head/sys/riscv/riscv/genassym.c
head/sys/riscv/riscv/locore.S
head/sys/riscv/riscv/machdep.c
Modified: head/sys/riscv/include/machdep.h
==
--- head/sys/riscv/include/machdep.hWed Jun 24 15:05:42 2020
(r362582)
+++ head/sys/riscv/include/machdep.hWed Jun 24 15:20:00 2020
(r362583)
@@ -43,12 +43,12 @@ struct riscv_bootparams {
vm_offset_t kern_stack;
vm_offset_t dtbp_virt; /* Device tree blob virtual addr */
vm_offset_t dtbp_phys; /* Device tree blob physical addr */
+ vm_offset_t modulep;/* loader(8) metadata */
};
extern vm_paddr_t physmap[PHYS_AVAIL_ENTRIES];
extern u_int physmap_idx;
-vm_offset_t fake_preload_metadata(struct riscv_bootparams *rbp);
void initriscv(struct riscv_bootparams *);
#endif /* _MACHINE_MACHDEP_H_ */
Modified: head/sys/riscv/riscv/genassym.c
==
--- head/sys/riscv/riscv/genassym.c Wed Jun 24 15:05:42 2020
(r362582)
+++ head/sys/riscv/riscv/genassym.c Wed Jun 24 15:20:00 2020
(r362583)
@@ -107,3 +107,4 @@ ASSYM(RISCV_BOOTPARAMS_KERN_STACK, offsetof(struct ris
kern_stack));
ASSYM(RISCV_BOOTPARAMS_DTBP_VIRT, offsetof(struct riscv_bootparams,
dtbp_virt));
ASSYM(RISCV_BOOTPARAMS_DTBP_PHYS, offsetof(struct riscv_bootparams,
dtbp_phys));
+ASSYM(RISCV_BOOTPARAMS_MODULEP, offsetof(struct riscv_bootparams, modulep));
Modified: head/sys/riscv/riscv/locore.S
==
--- head/sys/riscv/riscv/locore.S Wed Jun 24 15:05:42 2020
(r362582)
+++ head/sys/riscv/riscv/locore.S Wed Jun 24 15:20:00 2020
(r362583)
@@ -46,24 +46,24 @@
.globl kernbase
.setkernbase, KERNBASE
- /* Trap entries */
.text
-
- /* Reset vector */
- .text
- .globl _start
-_start:
+/*
+ * Alternate entry point. Used when booting via SBI firmware. It must be placed
+ * at the beginning of the .text section. Arguments are as follows:
+ * - a0 = hart ID
+ * - a1 = dtbp
+ *
+ * Multiple CPUs might enter from this point, so we perform a hart lottery and
+ * send the losers to mpentry.
+ */
+ .globl _alt_start
+_alt_start:
/* Set the global pointer */
.option push
.option norelax
lla gp, __global_pointer$
.option pop
- /*
-* a0 = hart id
-* a1 = dtbp
-*/
-
/* Pick a hart to run the boot process. */
lla t0, hart_lottery
li t1, 1
@@ -75,11 +75,43 @@ _start:
*/
beqzt0, 1f
j mpentry
+1:
+ /* Store the boot hart */
+ lla t0, boot_hart
+ sw a0, 0(t0)
+ /* Load zero as modulep */
+ mv a0, zero
+ j pagetables
+
+/*
+ * Main entry point. This routine is marked as the ELF entry, and is where
+ * loader(8) will enter the kernel. Arguments are as follows:
+ * - a0 = modulep
+ * - a1 = ???
+ *
+ * It is expected that only a single CPU will enter here.
+ */
+ .globl _start
+_start:
+ /* Set the global pointer */
+.option push
+.option norelax
+ lla gp, __global_pointer$
+.option pop
+
/*
-* Page tables
+* Zero a1 to indicate that we have no DTB pointer. It is already
+* included in the loader(8) metadata.
*/
-1:
+ mv a1, zero
+
+ /*
+* Page tables setup
+* a0 - modulep or zero
+* a1 - zero or dtbp
+*/
+pagetables:
/* Get the kernel's load address */
jal get_physmem
@@ -107,7 +139,7 @@ _start:
li t2, 512 /* Build 512 entries */
add
svn commit: r362576 - in head/lib: libc/tests/gen libc/tests/stdlib msun/tests
Author: mhorne
Date: Wed Jun 24 13:11:19 2020
New Revision: 362576
URL: https://svnweb.freebsd.org/changeset/base/362576
Log:
Enable long double tests on RISC-V
Some of the NetBSD contributed tests are gated behind the
__HAVE_LONG_DOUBLE flag. This flag seems to be defined only for
platforms whose long double is larger than their double. I could not
find this explicitly documented anywhere, but it is implied by the
definitions in NetBSD's sys/arch/${arch}/include/math.h headers, and the
following assertion from the UBSAN code:
#ifdef __HAVE_LONG_DOUBLE
long double LD;
ASSERT(sizeof(LD) > sizeof(uint64_t));
#endif
RISC-V has 128-bit long doubles, so enable the tests on this platform,
and update the comments to better explain the purpose of this flag.
Reviewed by: ngie
MFC after:1 week
Differential Revision:https://reviews.freebsd.org/D25419
Modified:
head/lib/libc/tests/gen/Makefile
head/lib/libc/tests/stdlib/Makefile
head/lib/msun/tests/Makefile
Modified: head/lib/libc/tests/gen/Makefile
==
--- head/lib/libc/tests/gen/MakefileWed Jun 24 12:17:40 2020
(r362575)
+++ head/lib/libc/tests/gen/MakefileWed Jun 24 13:11:19 2020
(r362576)
@@ -35,11 +35,12 @@ posix_spawn_test_FILESPACKAGE= ${PACKAGE}
CFLAGS+= -DTEST_LONG_DOUBLE
-# Not sure why this isn't defined for all architectures, since most
-# have long double.
+# Define __HAVE_LONG_DOUBLE for architectures whose long double has greater
+# precision than their double.
.if ${MACHINE_CPUARCH} == "aarch64" || \
${MACHINE_CPUARCH} == "amd64" || \
-${MACHINE_CPUARCH} == "i386"
+${MACHINE_CPUARCH} == "i386" || \
+${MACHINE_CPUARCH} == "riscv"
CFLAGS+= -D__HAVE_LONG_DOUBLE
.endif
Modified: head/lib/libc/tests/stdlib/Makefile
==
--- head/lib/libc/tests/stdlib/Makefile Wed Jun 24 12:17:40 2020
(r362575)
+++ head/lib/libc/tests/stdlib/Makefile Wed Jun 24 13:11:19 2020
(r362576)
@@ -19,11 +19,12 @@ ATF_TESTS_CXX+= cxa_thread_atexit_nothr_test
# All architectures on FreeBSD have fenv.h
CFLAGS+= -D__HAVE_FENV
-# Not sure why this isn't defined for all architectures, since most
-# have long double.
+# Define __HAVE_LONG_DOUBLE for architectures whose long double has greater
+# precision than their double.
.if ${MACHINE_CPUARCH} == "aarch64" || \
${MACHINE_CPUARCH} == "amd64" || \
-${MACHINE_CPUARCH} == "i386"
+${MACHINE_CPUARCH} == "i386" || \
+${MACHINE_CPUARCH} == "riscv"
CFLAGS+= -D__HAVE_LONG_DOUBLE
.endif
Modified: head/lib/msun/tests/Makefile
==
--- head/lib/msun/tests/MakefileWed Jun 24 12:17:40 2020
(r362575)
+++ head/lib/msun/tests/MakefileWed Jun 24 13:11:19 2020
(r362576)
@@ -10,11 +10,12 @@ CFLAGS+=-DHAVE_FENV_H
# For isqemu.h
CFLAGS+= -I${TESTSRC:H}/libc/gen
-# Not sure why this isn't defined for all architectures, since most
-# have long double.
+# Define __HAVE_LONG_DOUBLE for architectures whose long double has greater
+# precision than their double.
.if ${MACHINE_CPUARCH} == "aarch64" || \
${MACHINE_CPUARCH} == "amd64" || \
-${MACHINE_CPUARCH} == "i386"
+${MACHINE_CPUARCH} == "i386" || \
+${MACHINE_CPUARCH} == "riscv"
CFLAGS+= -D__HAVE_LONG_DOUBLE
.endif
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svn commit: r362546 - head/share/man/man7
Author: mhorne Date: Tue Jun 23 17:17:13 2020 New Revision: 362546 URL: https://svnweb.freebsd.org/changeset/base/362546 Log: arch(7): small corrections for RISC-V Document that RISC-V supports multiple page sizes: 4K, 2M, and 1G. RISC-V's long double is always 128-bits wide, therefore quad precision. Mention __riscv_float_abi_soft, which can be used to differentiate between riscv64 and riscv64sf in userland code. MFC after:3 days Modified: head/share/man/man7/arch.7 Modified: head/share/man/man7/arch.7 == --- head/share/man/man7/arch.7 Tue Jun 23 16:43:48 2020(r362545) +++ head/share/man/man7/arch.7 Tue Jun 23 17:17:13 2020(r362546) @@ -26,7 +26,7 @@ .\" .\" $FreeBSD$ .\" -.Dd March 28, 2020 +.Dd June 23, 2020 .Dt ARCH 7 .Os .Sh NAME @@ -256,8 +256,8 @@ is 8 bytes on all supported architectures except i386. .It powerpc Ta 4K .It powerpcspe Ta 4K .It powerpc64 Ta 4K -.It riscv64 Ta 4K -.It riscv64sf Ta 4K +.It riscv64 Ta 4K, 2M, 1G +.It riscv64sf Ta 4K, 2M, 1G .El .Ss Floating Point .Bl -column -offset indent "Architecture" "float, double" "long double" @@ -279,8 +279,8 @@ is 8 bytes on all supported architectures except i386. .It powerpc Ta hard Ta hard, double precision .It powerpcspe Ta hard Ta hard, double precision .It powerpc64 Ta hard Ta hard, double precision -.It riscv64 Ta hard Ta hard, double precision -.It riscv64sf Ta soft Ta soft, double precision +.It riscv64 Ta hard Ta hard, quad precision +.It riscv64sf Ta soft Ta soft, quad precision .El .Ss Default Tool Chain .Fx @@ -358,7 +358,7 @@ Architecture-specific macros: .It powerpcspe Ta Dv __powerpc__, Dv __SPE__ .It powerpc64 Ta Dv __powerpc__, Dv __powerpc64__ .It riscv64 Ta Dv __riscv, Dv __riscv_xlen == 64 -.It riscv64sf Ta Dv __riscv, Dv __riscv_xlen == 64 +.It riscv64sf Ta Dv __riscv, Dv __riscv_xlen == 64, Dv __riscv_float_abi_soft .El .Pp Compilers may define additional variants of architecture-specific macros. ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
Re: svn commit: r361587 - in head/sys/riscv: include riscv
On Thu, May 28, 2020 at 11:56 AM Mitchell Horne wrote:
>
> Author: mhorne
> Date: Thu May 28 14:56:11 2020
> New Revision: 361587
> URL: https://svnweb.freebsd.org/changeset/base/361587
>
> Log:
> Add macros simplifying the fake preload setup
>
> This is in preparation for booting via loader(8). Lift these macros from
> arm64
> so we don't need to worry about the size when inserting new elements. This
> could have been done in r359673, but I didn't think I would be returning to
> this function so soon.
>
> Reviewed by: markj
> Differential Revision:https://reviews.freebsd.org/D24910
>
> Modified:
> head/sys/riscv/include/vmparam.h
> head/sys/riscv/riscv/machdep.c
>
> Modified: head/sys/riscv/include/vmparam.h
> ==
> --- head/sys/riscv/include/vmparam.hThu May 28 13:48:33 2020
> (r361586)
> +++ head/sys/riscv/include/vmparam.hThu May 28 14:56:11 2020
> (r361587)
> @@ -190,8 +190,6 @@
> #defineSHAREDPAGE (VM_MAXUSER_ADDRESS - PAGE_SIZE)
> #defineUSRSTACKSHAREDPAGE
>
> -#defineKERNENTRY (0)
> -
> #defineVM_EARLY_DTB_ADDRESS(VM_MAX_KERNEL_ADDRESS - (2 *
> L2_SIZE))
>
> /*
>
> Modified: head/sys/riscv/riscv/machdep.c
> ==
> --- head/sys/riscv/riscv/machdep.c Thu May 28 13:48:33 2020
> (r361586)
> +++ head/sys/riscv/riscv/machdep.c Thu May 28 14:56:11 2020
> (r361587)
> @@ -733,29 +733,36 @@ fake_preload_metadata(struct riscv_bootparams *rvbp)
> vm_offset_t zstart = 0, zend = 0;
> #endif
> vm_offset_t lastaddr;
> - size_t dtb_size;
> - int i;
> + size_t fake_size, dtb_size;
>
> - i = 0;
> +#define PRELOAD_PUSH_VALUE(type, value) do { \
> + *(type *)((char *)fake_preload + fake_size) = (value); \
> + fake_size += sizeof(type); \
> +} while (0)
>
> - fake_preload[i++] = MODINFO_NAME;
> - fake_preload[i++] = strlen("kernel") + 1;
> - strcpy((char*)_preload[i++], "kernel");
> - i += 1;
> - fake_preload[i++] = MODINFO_TYPE;
> - fake_preload[i++] = strlen("elf64 kernel") + 1;
> - strcpy((char*)_preload[i++], "elf64 kernel");
> - i += 3;
> - fake_preload[i++] = MODINFO_ADDR;
> - fake_preload[i++] = sizeof(vm_offset_t);
> - *(vm_offset_t *)_preload[i++] =
> - (vm_offset_t)(KERNBASE + KERNENTRY);
> - i += 1;
> - fake_preload[i++] = MODINFO_SIZE;
> - fake_preload[i++] = sizeof(vm_offset_t);
> - fake_preload[i++] = (vm_offset_t) -
> - (vm_offset_t)(KERNBASE + KERNENTRY);
> - i += 1;
> +#define PRELOAD_PUSH_STRING(str) do { \
> + uint32_t ssize; \
> + ssize = strlen(str) + 1;\
> + PRELOAD_PUSH_VALUE(uint32_t, ssize);\
> + strcpy(((char *)fake_preload + fake_size), str);\
> + fake_size += ssize; \
> + fake_size = roundup(fake_size, sizeof(u_long)); \
> +} while (0)
> +
> + fake_size = 0;
> +
> + PRELOAD_PUSH_VALUE(uint32_t, MODINFO_NAME);
> + PRELOAD_PUSH_STRING("kernel");
> + PRELOAD_PUSH_VALUE(uint32_t, MODINFO_TYPE);
> + PRELOAD_PUSH_STRING("elf kernel");
Note that the type here was unintentionally changed from "elf64
kernel" to "elf kernel". Fortunately, this ends up being more
consistent with both loader(8) and the other fake_preload_metadata
routines, which set the type as "elf kernel".
Thanks to rpokala@ for pointing this out.
> +
> + PRELOAD_PUSH_VALUE(uint32_t, MODINFO_ADDR);
> + PRELOAD_PUSH_VALUE(uint32_t, sizeof(vm_offset_t));
> + PRELOAD_PUSH_VALUE(uint64_t, KERNBASE);
> +
> + PRELOAD_PUSH_VALUE(uint32_t, MODINFO_SIZE);
> + PRELOAD_PUSH_VALUE(uint32_t, sizeof(size_t));
> + PRELOAD_PUSH_VALUE(uint64_t, (size_t)((vm_offset_t) - KERNBASE));
> #ifdef DDB
> #if 0
> /* RISCVTODO */
> @@ -777,19 +784,20 @@ fake_preload_metadata(struct riscv_bootparams *rvbp)
>
> /* Copy the DTB to KVA space. */
> lastaddr = roundup(lastaddr, sizeof(int));
> - fake_preload[i++] = MODINFO_METADATA | MODINFOMD_DTBP;
> - fake_preload[i++] = sizeof(vm_offset_t);
> - *(vm_offset_t *)_preload[i
svn commit: r361807 - head/sys/contrib/edk2
Author: mhorne Date: Thu Jun 4 20:48:57 2020 New Revision: 361807 URL: https://svnweb.freebsd.org/changeset/base/361807 Log: Document upgrade procedure in FREEBSD-upgrade It was pointed out to me that this is the convention for documenting upgrade instructions, rather than just leaving the instructions in the commit message. It's possible these commands won't be used again before we transition to git, but then at least they'll give a path forward for whoever touches this next. Suggested by: lwhsu Added: head/sys/contrib/edk2/FREEBSD-upgrade (contents, props changed) Added: head/sys/contrib/edk2/FREEBSD-upgrade == --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/contrib/edk2/FREEBSD-upgrade Thu Jun 4 20:48:57 2020 (r361807) @@ -0,0 +1,23 @@ +$FreeBSD$ + +We try to maintain the minimal set of headers required to build, as the full +set of files from MdePkg is quite large (10MB at the time of writing). To do +this when performing an upgrade, execute the following: + +# Generate list of the headers needed to build +cp -r ../vendor/edk2/dist/MdePkg/Include sys/contrib/edk2 +cd lib/libefivar +make +pushd `make -V .OBJDIR` +cat .depend*.o | grep sys/contrib | cut -d' ' -f 3 | +sort -u | sed -e 's=/full/path/sys/contrib/edk2/==' > /tmp/xxx +popd + +# Merge the needed files +cd ../../sys/contrib/edk2 +svn revert -R . +for i in `cat /tmp/xxx`; do +svn merge -c VendorRevision svn+ssh://repo.freebsd.org/base/vendor/edk2/dist/MdePkg/$i $i +done +svn merge -c VendorRevision \ +svn+ssh://repo.freebsd.org/base/vendor/edk2/dist/MdePkg/MdePkg.dec MdePkg.dec ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r361802 - in head/sys/contrib/edk2: . Include Include/Guid Include/IndustryStandard Include/Library Include/Protocol Include/Uefi
Author: mhorne Date: Thu Jun 4 19:21:41 2020 New Revision: 361802 URL: https://svnweb.freebsd.org/changeset/base/361802 Log: Update edk2 headers to stable202005 We use these to compile libefivar. The particular motivation for this update is the inclusion of the RISC-V machine definitions that allow us to build the library on the platform. This support could easily have been submitted as a small local diff, but the timing of the release coincided with this work, and it has been over 3 years since these sources were initially imported. Note that this comes with a license change from regular BSD 2-clause to the BSD+Patent license. This has been approved by core@ for this particular project [1]. As with the original import, we retain only the subset of headers that we actually need to build libefivar. I adapted imp@'s process slightly for this update: # Generate list of the headers needed to build cp -r ../vendor/edk2/dist/MdePkg/Include sys/contrib/edk2 cd lib/libefivar make pushd `make -V .OBJDIR` cat .depend*.o | grep sys/contrib | cut -d' ' -f 3 | sort -u | sed -e 's=/full/path/sys/contrib/edk2/==' > /tmp/xxx popd # Merge the needed files cd ../../sys/contrib/edk2 svn revert -R . for i in `cat /tmp/xxx`; do svn merge -c VendorRevision svn+ssh://repo.freebsd.org/base/vendor/edk2/dist/MdePkg/$i $i done svn merge -c VendorRevision svn+ssh://repo.freebsd.org/base/vendor/edk2/dist/MdePkg/MdePkg.dec MdePkg.dec [1] https://www.freebsd.org/internal/software-license.html Modified: head/sys/contrib/edk2/Include/Base.h (contents, props changed) head/sys/contrib/edk2/Include/Guid/HiiFormMapMethodGuid.h (contents, props changed) head/sys/contrib/edk2/Include/Guid/PcAnsi.h (contents, props changed) head/sys/contrib/edk2/Include/Guid/WinCertificate.h (contents, props changed) head/sys/contrib/edk2/Include/IndustryStandard/Acpi10.h (contents, props changed) head/sys/contrib/edk2/Include/IndustryStandard/Acpi20.h (contents, props changed) head/sys/contrib/edk2/Include/IndustryStandard/Acpi30.h (contents, props changed) head/sys/contrib/edk2/Include/IndustryStandard/Acpi40.h (contents, props changed) head/sys/contrib/edk2/Include/IndustryStandard/Acpi50.h (contents, props changed) head/sys/contrib/edk2/Include/IndustryStandard/Acpi51.h (contents, props changed) head/sys/contrib/edk2/Include/IndustryStandard/Acpi60.h (contents, props changed) head/sys/contrib/edk2/Include/IndustryStandard/AcpiAml.h (contents, props changed) head/sys/contrib/edk2/Include/IndustryStandard/Bluetooth.h (contents, props changed) head/sys/contrib/edk2/Include/Library/BaseLib.h (contents, props changed) head/sys/contrib/edk2/Include/Library/BaseMemoryLib.h (contents, props changed) head/sys/contrib/edk2/Include/Library/DebugLib.h (contents, props changed) head/sys/contrib/edk2/Include/Library/DevicePathLib.h (contents, props changed) head/sys/contrib/edk2/Include/Library/MemoryAllocationLib.h (contents, props changed) head/sys/contrib/edk2/Include/Library/PcdLib.h (contents, props changed) head/sys/contrib/edk2/Include/Library/PrintLib.h (contents, props changed) head/sys/contrib/edk2/Include/Library/UefiBootServicesTableLib.h (contents, props changed) head/sys/contrib/edk2/Include/Protocol/DebugPort.h (contents, props changed) head/sys/contrib/edk2/Include/Protocol/DevicePath.h (contents, props changed) head/sys/contrib/edk2/Include/Protocol/DevicePathFromText.h (contents, props changed) head/sys/contrib/edk2/Include/Protocol/DevicePathToText.h (contents, props changed) head/sys/contrib/edk2/Include/Protocol/DevicePathUtilities.h (contents, props changed) head/sys/contrib/edk2/Include/Protocol/SimpleTextIn.h (contents, props changed) head/sys/contrib/edk2/Include/Protocol/SimpleTextInEx.h (contents, props changed) head/sys/contrib/edk2/Include/Protocol/SimpleTextOut.h (contents, props changed) head/sys/contrib/edk2/Include/Uefi.h (contents, props changed) head/sys/contrib/edk2/Include/Uefi/UefiBaseType.h (contents, props changed) head/sys/contrib/edk2/Include/Uefi/UefiGpt.h (contents, props changed) head/sys/contrib/edk2/Include/Uefi/UefiInternalFormRepresentation.h (contents, props changed) head/sys/contrib/edk2/Include/Uefi/UefiMultiPhase.h (contents, props changed) head/sys/contrib/edk2/Include/Uefi/UefiPxe.h (contents, props changed) head/sys/contrib/edk2/Include/Uefi/UefiSpec.h (contents, props changed) head/sys/contrib/edk2/MdePkg.dec (contents, props changed) Directory Properties: head/sys/contrib/edk2/ (props changed) Modified: head/sys/contrib/edk2/Include/Base.h == --- head/sys/contrib/edk2/Include/Base.hThu Jun 4 18:35:21 2020
svn commit: r361754 - head/stand/efi/gptboot
Author: mhorne
Date: Wed Jun 3 16:38:16 2020
New Revision: 361754
URL: https://svnweb.freebsd.org/changeset/base/361754
Log:
gptboot.efi: align secbuf to 4K
The u-boot EFI implementation of the ReadBlocks and WriteBlocks methods
requires that the provided buffer meet the IO alignment requirements of
the underlying disk. Unlike loader.efi, gptboot.efi doesn't check this
requirement, and therefore fails to perform a successful read. Adjust
secbuf's alignment to 4K in hopes that we will always meet this
requirement.
Reviewed by: imp
MFC after:1 week
Differential Revision:https://reviews.freebsd.org/D25111
Modified:
head/stand/efi/gptboot/proto.c
Modified: head/stand/efi/gptboot/proto.c
==
--- head/stand/efi/gptboot/proto.c Wed Jun 3 14:54:54 2020
(r361753)
+++ head/stand/efi/gptboot/proto.c Wed Jun 3 16:38:16 2020
(r361754)
@@ -42,7 +42,7 @@ __FBSDID("$FreeBSD$");
#include "gpt.h"
#include
static const uuid_t freebsd_ufs_uuid = GPT_ENT_TYPE_FREEBSD_UFS;
-static char secbuf[4096];
+static char secbuf[4096] __aligned(4096);
static struct dsk dsk;
static dev_info_t *devices = NULL;
static dev_info_t *raw_device = NULL;
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svn commit: r361661 - in head/sys: arm/arm arm/include arm64/arm64 riscv/riscv
Author: mhorne
Date: Sun May 31 14:43:04 2020
New Revision: 361661
URL: https://svnweb.freebsd.org/changeset/base/361661
Log:
Remove remnant of arm's ELF trampoline
The trampoline code used for loading gzipped a.out kernels on arm was
removed in r350436. A portion of this code allowed for DDB to find the
symbol tables when booting without loader(8), and some of this was
untouched in the removal. Remove it now.
Differential Revision:https://reviews.freebsd.org/D24950
Modified:
head/sys/arm/arm/machdep_boot.c
head/sys/arm/include/elf.h
head/sys/arm64/arm64/machdep_boot.c
head/sys/riscv/riscv/machdep.c
Modified: head/sys/arm/arm/machdep_boot.c
==
--- head/sys/arm/arm/machdep_boot.c Sun May 31 05:02:15 2020
(r361660)
+++ head/sys/arm/arm/machdep_boot.c Sun May 31 14:43:04 2020
(r361661)
@@ -352,13 +352,12 @@ vm_offset_t
fake_preload_metadata(struct arm_boot_params *abp __unused, void *dtb_ptr,
size_t dtb_size)
{
-#ifdef DDB
- vm_offset_t zstart = 0, zend = 0;
-#endif
vm_offset_t lastaddr;
int i = 0;
static uint32_t fake_preload[35];
+ lastaddr = (vm_offset_t)
+
fake_preload[i++] = MODINFO_NAME;
fake_preload[i++] = strlen("kernel") + 1;
strcpy((char*)_preload[i++], "kernel");
@@ -373,21 +372,6 @@ fake_preload_metadata(struct arm_boot_params *abp __un
fake_preload[i++] = MODINFO_SIZE;
fake_preload[i++] = sizeof(uint32_t);
fake_preload[i++] = (uint32_t) - KERNVIRTADDR;
-#ifdef DDB
- if (*(uint32_t *)KERNVIRTADDR == MAGIC_TRAMP_NUMBER) {
- fake_preload[i++] = MODINFO_METADATA|MODINFOMD_SSYM;
- fake_preload[i++] = sizeof(vm_offset_t);
- fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 4);
- fake_preload[i++] = MODINFO_METADATA|MODINFOMD_ESYM;
- fake_preload[i++] = sizeof(vm_offset_t);
- fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 8);
- lastaddr = *(uint32_t *)(KERNVIRTADDR + 8);
- zend = lastaddr;
- zstart = *(uint32_t *)(KERNVIRTADDR + 4);
- db_fetch_ksymtab(zstart, zend);
- } else
-#endif
- lastaddr = (vm_offset_t)
if (dtb_ptr != NULL) {
/* Copy DTB to KVA space and insert it into module chain. */
lastaddr = roundup(lastaddr, sizeof(int));
Modified: head/sys/arm/include/elf.h
==
--- head/sys/arm/include/elf.h Sun May 31 05:02:15 2020(r361660)
+++ head/sys/arm/include/elf.h Sun May 31 14:43:04 2020(r361661)
@@ -78,12 +78,6 @@ __ElfType(Auxinfo);
#defineEF_ARM_EABI_VERSION_UNKNOWN 0
#defineEF_ARM_EABI_FREEBSD_MIN 4
-/*
- * Magic number for the elf trampoline, chosen wisely to be an immediate
- * value.
- */
-#defineMAGIC_TRAMP_NUMBER 0x5c03
-
#defineET_DYN_LOAD_ADDR0x50
/* Flags passed in AT_HWCAP. */
Modified: head/sys/arm64/arm64/machdep_boot.c
==
--- head/sys/arm64/arm64/machdep_boot.c Sun May 31 05:02:15 2020
(r361660)
+++ head/sys/arm64/arm64/machdep_boot.c Sun May 31 14:43:04 2020
(r361661)
@@ -84,14 +84,12 @@ static char linux_command_line[LBABI_MAX_COMMAND_LINE
static vm_offset_t
fake_preload_metadata(void *dtb_ptr, size_t dtb_size)
{
-#ifdef DDB
- vm_offset_t zstart = 0, zend = 0;
-#endif
vm_offset_t lastaddr;
static char fake_preload[256];
caddr_t preload_ptr;
size_t size;
+ lastaddr = (vm_offset_t)
preload_ptr = (caddr_t)_preload[0];
size = 0;
@@ -108,25 +106,7 @@ fake_preload_metadata(void *dtb_ptr, size_t dtb_size)
PRELOAD_PUSH_VALUE(uint32_t, MODINFO_SIZE);
PRELOAD_PUSH_VALUE(uint32_t, sizeof(size_t));
PRELOAD_PUSH_VALUE(uint64_t, (size_t)( - VM_MIN_KERNEL_ADDRESS));
-#ifdef DDB
- if (*(uint64_t *)VM_MIN_KERNEL_ADDRESS == MAGIC_TRAMP_NUMBER) {
- PRELOAD_PUSH_VALUE(uint32_t, MODINFO_METADATA|MODINFOMD_SSYM);
- PRELOAD_PUSH_VALUE(uint32_t, sizeof(vm_offset_t));
- PRELOAD_PUSH_VALUE(uint64_t,
- *(uint64_t *)(VM_MIN_KERNEL_ADDRESS + 4));
- PRELOAD_PUSH_VALUE(uint32_t, MODINFO_METADATA | MODINFOMD_ESYM);
- PRELOAD_PUSH_VALUE(uint32_t, sizeof(vm_offset_t));
- PRELOAD_PUSH_VALUE(uint64_t,
- *(uint64_t *)(VM_MIN_KERNEL_ADDRESS + 8));
-
- lastaddr = *(uint64_t *)(VM_MIN_KERNEL_ADDRESS + 8);
- zend = lastaddr;
- zstart = *(uint64_t *)(VM_MIN_KERNEL_ADDRESS + 4);
- db_fetch_ksymtab(zstart, zend);
- } else
-#endif
- lastaddr = (vm_offset_t)
svn commit: r361587 - in head/sys/riscv: include riscv
Author: mhorne
Date: Thu May 28 14:56:11 2020
New Revision: 361587
URL: https://svnweb.freebsd.org/changeset/base/361587
Log:
Add macros simplifying the fake preload setup
This is in preparation for booting via loader(8). Lift these macros from arm64
so we don't need to worry about the size when inserting new elements. This
could have been done in r359673, but I didn't think I would be returning to
this function so soon.
Reviewed by: markj
Differential Revision:https://reviews.freebsd.org/D24910
Modified:
head/sys/riscv/include/vmparam.h
head/sys/riscv/riscv/machdep.c
Modified: head/sys/riscv/include/vmparam.h
==
--- head/sys/riscv/include/vmparam.hThu May 28 13:48:33 2020
(r361586)
+++ head/sys/riscv/include/vmparam.hThu May 28 14:56:11 2020
(r361587)
@@ -190,8 +190,6 @@
#defineSHAREDPAGE (VM_MAXUSER_ADDRESS - PAGE_SIZE)
#defineUSRSTACKSHAREDPAGE
-#defineKERNENTRY (0)
-
#defineVM_EARLY_DTB_ADDRESS(VM_MAX_KERNEL_ADDRESS - (2 * L2_SIZE))
/*
Modified: head/sys/riscv/riscv/machdep.c
==
--- head/sys/riscv/riscv/machdep.c Thu May 28 13:48:33 2020
(r361586)
+++ head/sys/riscv/riscv/machdep.c Thu May 28 14:56:11 2020
(r361587)
@@ -733,29 +733,36 @@ fake_preload_metadata(struct riscv_bootparams *rvbp)
vm_offset_t zstart = 0, zend = 0;
#endif
vm_offset_t lastaddr;
- size_t dtb_size;
- int i;
+ size_t fake_size, dtb_size;
- i = 0;
+#define PRELOAD_PUSH_VALUE(type, value) do { \
+ *(type *)((char *)fake_preload + fake_size) = (value); \
+ fake_size += sizeof(type); \
+} while (0)
- fake_preload[i++] = MODINFO_NAME;
- fake_preload[i++] = strlen("kernel") + 1;
- strcpy((char*)_preload[i++], "kernel");
- i += 1;
- fake_preload[i++] = MODINFO_TYPE;
- fake_preload[i++] = strlen("elf64 kernel") + 1;
- strcpy((char*)_preload[i++], "elf64 kernel");
- i += 3;
- fake_preload[i++] = MODINFO_ADDR;
- fake_preload[i++] = sizeof(vm_offset_t);
- *(vm_offset_t *)_preload[i++] =
- (vm_offset_t)(KERNBASE + KERNENTRY);
- i += 1;
- fake_preload[i++] = MODINFO_SIZE;
- fake_preload[i++] = sizeof(vm_offset_t);
- fake_preload[i++] = (vm_offset_t) -
- (vm_offset_t)(KERNBASE + KERNENTRY);
- i += 1;
+#define PRELOAD_PUSH_STRING(str) do { \
+ uint32_t ssize; \
+ ssize = strlen(str) + 1;\
+ PRELOAD_PUSH_VALUE(uint32_t, ssize);\
+ strcpy(((char *)fake_preload + fake_size), str);\
+ fake_size += ssize; \
+ fake_size = roundup(fake_size, sizeof(u_long)); \
+} while (0)
+
+ fake_size = 0;
+
+ PRELOAD_PUSH_VALUE(uint32_t, MODINFO_NAME);
+ PRELOAD_PUSH_STRING("kernel");
+ PRELOAD_PUSH_VALUE(uint32_t, MODINFO_TYPE);
+ PRELOAD_PUSH_STRING("elf kernel");
+
+ PRELOAD_PUSH_VALUE(uint32_t, MODINFO_ADDR);
+ PRELOAD_PUSH_VALUE(uint32_t, sizeof(vm_offset_t));
+ PRELOAD_PUSH_VALUE(uint64_t, KERNBASE);
+
+ PRELOAD_PUSH_VALUE(uint32_t, MODINFO_SIZE);
+ PRELOAD_PUSH_VALUE(uint32_t, sizeof(size_t));
+ PRELOAD_PUSH_VALUE(uint64_t, (size_t)((vm_offset_t) - KERNBASE));
#ifdef DDB
#if 0
/* RISCVTODO */
@@ -777,19 +784,20 @@ fake_preload_metadata(struct riscv_bootparams *rvbp)
/* Copy the DTB to KVA space. */
lastaddr = roundup(lastaddr, sizeof(int));
- fake_preload[i++] = MODINFO_METADATA | MODINFOMD_DTBP;
- fake_preload[i++] = sizeof(vm_offset_t);
- *(vm_offset_t *)_preload[i] = (vm_offset_t)lastaddr;
- i += sizeof(vm_offset_t) / sizeof(uint32_t);
+ PRELOAD_PUSH_VALUE(uint32_t, MODINFO_METADATA | MODINFOMD_DTBP);
+ PRELOAD_PUSH_VALUE(uint32_t, sizeof(vm_offset_t));
+ PRELOAD_PUSH_VALUE(vm_offset_t, lastaddr);
dtb_size = fdt_totalsize(rvbp->dtbp_virt);
memmove((void *)lastaddr, (const void *)rvbp->dtbp_virt, dtb_size);
lastaddr = roundup(lastaddr + dtb_size, sizeof(int));
- fake_preload[i++] = 0;
- fake_preload[i] = 0;
- preload_metadata = (void *)fake_preload;
+ /* End marker */
+ PRELOAD_PUSH_VALUE(uint32_t, 0);
+ PRELOAD_PUSH_VALUE(uint32_t, 0);
+ preload_metadata = (caddr_t)fake_preload;
- KASSERT(i < nitems(fake_preload), ("Too many fake_preload items"));
+ KASSERT(fake_size < sizeof(fake_preload),
+ ("Too many fake_preload items"));
return (lastaddr);
}
svn commit: r361402 - head/sys/conf
Author: mhorne
Date: Fri May 22 18:54:56 2020
New Revision: 361402
URL: https://svnweb.freebsd.org/changeset/base/361402
Log:
Simplify the RISC-V kernel linker invocation
Remove our custom SYSTEM_LD definition. This generates program headers
that are more consistent with other architectures, and more importantly,
are in line with what loader(8) expects when loading a kernel.
As noted in https://reviews.freebsd.org/D22920, there is no apparent
reason why the kernel would need a writable text segment, so removal of
the -N flag isn't likely to cause issue.
Reviewed by: kp, br
MFC after:1 week
Differential Revision:https://reviews.freebsd.org/D24909
Modified:
head/sys/conf/Makefile.riscv
Modified: head/sys/conf/Makefile.riscv
==
--- head/sys/conf/Makefile.riscvFri May 22 18:11:17 2020
(r361401)
+++ head/sys/conf/Makefile.riscvFri May 22 18:54:56 2020
(r361402)
@@ -35,12 +35,7 @@ INCLUDES+= -I$S/contrib/libfdt
# We set this value using --defsym rather than hardcoding it in ldscript.riscv
# so that different kernel configs can override the load address.
KERNEL_LMA?= 0x8020
-
-SYSTEM_LD= @${LD} -N -m ${LD_EMULATION} -Bdynamic -T ${LDSCRIPT} ${_LDFLAGS} \
- --no-warn-mismatch --warn-common --export-dynamic \
- --defsym='kernel_lma=${KERNEL_LMA}' \
- --dynamic-linker /red/herring \
- -o ${.TARGET} -X ${SYSTEM_OBJS} vers.o
+LDFLAGS+= --defsym='kernel_lma=${KERNEL_LMA}'
.if !empty(DDB_ENABLED)
CFLAGS += -fno-omit-frame-pointer -fno-optimize-sibling-calls
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svn commit: r360826 - head/sys/sys
Author: mhorne
Date: Fri May 8 22:21:56 2020
New Revision: 360826
URL: https://svnweb.freebsd.org/changeset/base/360826
Log:
Sync relocation definitions
Add the most recent relocation types from the RISC-V ELF psABI spec.
MFC after:3 days
Modified:
head/sys/sys/elf_common.h
Modified: head/sys/sys/elf_common.h
==
--- head/sys/sys/elf_common.h Fri May 8 22:14:39 2020(r360825)
+++ head/sys/sys/elf_common.h Fri May 8 22:21:56 2020(r360826)
@@ -1342,6 +1342,8 @@ typedef struct {
#defineR_RISCV_SET854
#defineR_RISCV_SET16 55
#defineR_RISCV_SET32 56
+#defineR_RISCV_32_PCREL57
+#defineR_RISCV_IRELATIVE 58
#defineR_SPARC_NONE0
#defineR_SPARC_8 1
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svn commit: r360554 - head/sys/riscv/riscv
Author: mhorne
Date: Fri May 1 21:59:47 2020
New Revision: 360554
URL: https://svnweb.freebsd.org/changeset/base/360554
Log:
Use the HSM SBI extension to halt CPUs
Differential Revision:https://reviews.freebsd.org/D24498
Modified:
head/sys/riscv/riscv/machdep.c
Modified: head/sys/riscv/riscv/machdep.c
==
--- head/sys/riscv/riscv/machdep.c Fri May 1 21:58:19 2020
(r360553)
+++ head/sys/riscv/riscv/machdep.c Fri May 1 21:59:47 2020
(r360554)
@@ -473,9 +473,16 @@ void
cpu_halt(void)
{
+ /*
+* Try to power down using the HSM SBI extension and fall back to a
+* simple wfi loop.
+*/
intr_disable();
+ if (sbi_probe_extension(SBI_EXT_ID_HSM) != 0)
+ sbi_hsm_hart_stop();
for (;;)
__asm __volatile("wfi");
+ /* NOTREACHED */
}
/*
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svn commit: r360553 - head/sys/riscv/riscv
Author: mhorne
Date: Fri May 1 21:58:19 2020
New Revision: 360553
URL: https://svnweb.freebsd.org/changeset/base/360553
Log:
Use the HSM SBI extension to start APs
The addition of the HSM SBI extension to OpenSBI introduces a new
breaking change: secondary harts will remain parked in the firmware,
until they are brought up explicitly via sbi_hsm_hart_start(). Add
the call to do this, sending the secondary harts to mpentry.
If the HSM extension is not present, secondary harts are assumed to be
released by the firmware, as is the case for OpenSBI =< v0.6 and BBL.
In the case that the HSM call fails we exclude the CPU, notify the
user, and allow the system to proceed with booting.
Reviewed by: markj (older version)
Differential Revision:https://reviews.freebsd.org/D24497
Modified:
head/sys/riscv/riscv/mp_machdep.c
Modified: head/sys/riscv/riscv/mp_machdep.c
==
--- head/sys/riscv/riscv/mp_machdep.c Fri May 1 21:55:51 2020
(r360552)
+++ head/sys/riscv/riscv/mp_machdep.c Fri May 1 21:58:19 2020
(r360553)
@@ -97,6 +97,7 @@ static uint32_t cpu_reg[MAXCPU][2];
#endif
static device_t cpu_list[MAXCPU];
+void mpentry(u_long hartid);
void init_secondary(uint64_t);
static struct mtx ap_boot_mtx;
@@ -297,7 +298,7 @@ smp_after_idle_runnable(void *arg __unused)
struct pcpu *pc;
int cpu;
- for (cpu = 1; cpu < mp_ncpus; cpu++) {
+ for (cpu = 1; cpu <= mp_maxid; cpu++) {
if (bootstacks[cpu] != NULL) {
pc = pcpu_find(cpu);
while (atomic_load_ptr(>pc_curpcb) == NULL)
@@ -399,9 +400,11 @@ static boolean_t
cpu_init_fdt(u_int id, phandle_t node, u_int addr_size, pcell_t *reg)
{
struct pcpu *pcpup;
+ vm_paddr_t start_addr;
uint64_t hart;
u_int cpuid;
int naps;
+ int error;
/* Check if this hart supports MMU. */
if (OF_getproplen(node, "mmu-type") < 0)
@@ -440,6 +443,23 @@ cpu_init_fdt(u_int id, phandle_t node, u_int addr_size
/* Check if we are able to start this cpu */
if (cpuid > mp_maxid)
return (0);
+
+ /*
+* Depending on the SBI implementation, APs are waiting either in
+* locore.S or to be activated explicitly, via SBI call.
+*/
+ if (sbi_probe_extension(SBI_EXT_ID_HSM) != 0) {
+ start_addr = pmap_kextract((vm_offset_t)mpentry);
+ error = sbi_hsm_hart_start(hart, start_addr, 0);
+ if (error != 0) {
+ mp_ncpus--;
+
+ /* Send a warning to the user and continue. */
+ printf("AP %u (hart %lu) failed to start, error %d\n",
+ cpuid, hart, error);
+ return (0);
+ }
+ }
pcpup = &__pcpu[cpuid];
pcpu_init(pcpup, cpuid, sizeof(struct pcpu));
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svn commit: r360552 - in head/sys/riscv: include riscv
Author: mhorne
Date: Fri May 1 21:55:51 2020
New Revision: 360552
URL: https://svnweb.freebsd.org/changeset/base/360552
Log:
Add support for HSM SBI extension
The Hardware State Management (HSM) extension provides a set of SBI
calls that allow the supervisor software to start and stop hart
execution.
The HSM extension has been implemented in OpenSBI and is present in
the v0.7 release.
[1] https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc
Reviewed by: br
Differential Revision:https://reviews.freebsd.org/D24496
Modified:
head/sys/riscv/include/sbi.h
head/sys/riscv/riscv/sbi.c
Modified: head/sys/riscv/include/sbi.h
==
--- head/sys/riscv/include/sbi.hFri May 1 21:52:29 2020
(r360551)
+++ head/sys/riscv/include/sbi.hFri May 1 21:55:51 2020
(r360552)
@@ -55,6 +55,7 @@
#defineSBI_ERR_INVALID_PARAM -3
#defineSBI_ERR_DENIED -4
#defineSBI_ERR_INVALID_ADDRESS -5
+#defineSBI_ERR_ALREADY_AVAILABLE -6
/* SBI Base Extension */
#defineSBI_EXT_ID_BASE 0x10
@@ -66,6 +67,16 @@
#defineSBI_BASE_GET_MARCHID5
#defineSBI_BASE_GET_MIMPID 6
+/* Hart State Management (HSM) Extension */
+#defineSBI_EXT_ID_HSM 0x48534D
+#defineSBI_HSM_HART_START 0
+#defineSBI_HSM_HART_STOP 1
+#defineSBI_HSM_HART_STATUS 2
+#define SBI_HSM_STATUS_STARTED 0
+#define SBI_HSM_STATUS_STOPPED 1
+#define SBI_HSM_STATUS_START_PENDING 2
+#define SBI_HSM_STATUS_STOP_PENDING3
+
/* Legacy Extensions */
#defineSBI_SET_TIMER 0
#defineSBI_CONSOLE_PUTCHAR 1
@@ -127,6 +138,30 @@ sbi_probe_extension(long id)
{
return (SBI_CALL1(SBI_EXT_ID_BASE, SBI_BASE_PROBE_EXTENSION, id).value);
}
+
+/* Hart State Management extension functions. */
+
+/*
+ * Start execution on the specified hart at physical address start_addr. The
+ * register a0 will contain the hart's ID, and a1 will contain the value of
+ * priv.
+ */
+int sbi_hsm_hart_start(u_long hart, u_long start_addr, u_long priv);
+
+/*
+ * Stop execution on the current hart. Interrupts should be disabled, or this
+ * function may return.
+ */
+void sbi_hsm_hart_stop(void);
+
+/*
+ * Get the execution status of the specified hart. The status will be one of:
+ * - SBI_HSM_STATUS_STARTED
+ * - SBI_HSM_STATUS_STOPPED
+ * - SBI_HSM_STATUS_START_PENDING
+ * - SBI_HSM_STATUS_STOP_PENDING
+ */
+int sbi_hsm_hart_status(u_long hart);
/* Legacy extension functions. */
static __inline void
Modified: head/sys/riscv/riscv/sbi.c
==
--- head/sys/riscv/riscv/sbi.c Fri May 1 21:52:29 2020(r360551)
+++ head/sys/riscv/riscv/sbi.c Fri May 1 21:55:51 2020(r360552)
@@ -113,6 +113,31 @@ sbi_print_version(void)
printf("SBI Specification Version: %u.%u\n", major, minor);
}
+int
+sbi_hsm_hart_start(u_long hart, u_long start_addr, u_long priv)
+{
+ struct sbi_ret ret;
+
+ ret = SBI_CALL3(SBI_EXT_ID_HSM, SBI_HSM_HART_START, hart, start_addr,
priv);
+ return (ret.error != 0 ? (int)ret.error : 0);
+}
+
+void
+sbi_hsm_hart_stop(void)
+{
+ (void)SBI_CALL0(SBI_EXT_ID_HSM, SBI_HSM_HART_STOP);
+}
+
+int
+sbi_hsm_hart_status(u_long hart)
+{
+ struct sbi_ret ret;
+
+ ret = SBI_CALL1(SBI_EXT_ID_HSM, SBI_HSM_HART_STATUS, hart);
+
+ return (ret.error != 0 ? (int)ret.error : (int)ret.value);
+}
+
void
sbi_init(void)
{
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svn commit: r360551 - head/sys/riscv/riscv
Author: mhorne Date: Fri May 1 21:52:29 2020 New Revision: 360551 URL: https://svnweb.freebsd.org/changeset/base/360551 Log: Make mpentry independent of _start APs enter the kernel at the same point as the BSP, the _start routine. They then jump to mpentry, but not before storing the kernel's physical load address in the s9 register. Extract this calculation into its own routine, so that APs can be instructed to enter directly from mpentry. Differential Revision:https://reviews.freebsd.org/D24495 Modified: head/sys/riscv/riscv/locore.S Modified: head/sys/riscv/riscv/locore.S == --- head/sys/riscv/riscv/locore.S Fri May 1 21:24:19 2020 (r360550) +++ head/sys/riscv/riscv/locore.S Fri May 1 21:52:29 2020 (r360551) @@ -59,13 +59,6 @@ _start: lla gp, __global_pointer$ .option pop - /* Get the physical address kernel loaded to */ - lla t0, virt_map - ld t1, 0(t0) - sub t1, t1, t0 - li t2, KERNBASE - sub s9, t2, t1 /* s9 = physmem base */ - /* * a0 = hart id * a1 = dtbp @@ -87,6 +80,9 @@ _start: * Page tables */ 1: + /* Get the kernel's load address */ + jal get_physmem + /* Add L1 entry for kernel */ lla s1, pagetable_l1 lla s2, pagetable_l2/* Link to next level PN */ @@ -224,6 +220,17 @@ va: call_C_LABEL(initriscv) /* Off we go */ call_C_LABEL(mi_startup) +/* + * Get the physical address the kernel is loaded to. Returned in s9. + */ +get_physmem: + lla t0, virt_map/* physical address of virt_map */ + ld t1, 0(t0) /* virtual address of virt_map */ + sub t1, t1, t0 /* calculate phys->virt delta */ + li t2, KERNBASE + sub s9, t2, t1 /* s9 = physmem base */ + ret + .align 4 initstack: .space (PAGE_SIZE * KSTACK_PAGES) @@ -302,6 +309,9 @@ ENTRY(mpentry) /* Setup stack pointer */ lla t0, bootstack ld sp, 0(t0) + + /* Get the kernel's load address */ + jal get_physmem /* Setup supervisor trap vector */ lla t0, mpva ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r360519 - head/usr.sbin/binmiscctl
Author: mhorne Date: Fri May 1 01:31:19 2020 New Revision: 360519 URL: https://svnweb.freebsd.org/changeset/base/360519 Log: Add RISC-V interpreter example Now that RISC-V support has landed in qemu-user-static, add to the list of examples in the binmiscctl(8) manpage. Reviewed by: kevans MFC after:3 days Differential Revision:https://reviews.freebsd.org/D24646 Modified: head/usr.sbin/binmiscctl/binmiscctl.8 Modified: head/usr.sbin/binmiscctl/binmiscctl.8 == --- head/usr.sbin/binmiscctl/binmiscctl.8 Fri May 1 01:30:11 2020 (r360518) +++ head/usr.sbin/binmiscctl/binmiscctl.8 Fri May 1 01:31:19 2020 (r360519) @@ -27,7 +27,7 @@ .\" .\" Support for miscellaneous binary image activators .\" -.Dd February 10, 2020 +.Dd April 30, 2020 .Dt BINMISCCTL 8 .Os .Sh NAME @@ -269,6 +269,17 @@ Add QEMU bsd-user program as an image activator for Po \ex00\ex00\ex00\ex00\ex00\ex00\ex00\ex02\ex00\ex15" \e --mask "\exff\exff\exff\exff\exff\exff\exff\ex00\exff\exff\e \exff\exff\exff\exff\exff\exff\exff\exfe\exff\exff" \e + --size 20 --set-enabled +.Ed +.Pp +Add QEMU bsd-user program as an image activator for 64-bit RISC-V binaries: +.Bd -literal -offset indent +# binmiscctl add riscv64 \e + --interpreter "/usr/local/bin/qemu-riscv64-static" \e + --magic "\ex7f\ex45\ex4c\ex46\ex02\ex01\ex01\ex00\ex00\ex00\e + \ex00\ex00\ex00\ex00\ex00\ex00\ex02\ex00\exf3\ex00" \e + --mask "\exff\exff\exff\exff\exff\exff\exff\ex00\exff\exff\e + \exff\exff\exff\exff\exff\exff\exfe\exff\exff\exff" \e --size 20 --set-enabled .Ed .Ss "Create and use an ARMv6 chroot on an AMD64 host" ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r360085 - head/sys/riscv/riscv
Author: mhorne Date: Sun Apr 19 00:34:49 2020 New Revision: 360085 URL: https://svnweb.freebsd.org/changeset/base/360085 Log: RISC-V: provide the correct value for kernstart pmap_bootstrap() expects the kernel's physical load address, but we have been providing the start of physical memory. This had the nice effect of protecting the memory used by the SBI runtime firmware, but now that we have alternate means of achieving that, we should provide the correct value. This will free up any memory between the SBI firmware and the kernel for allocation. Reviewed by: markj Differential Revision:https://reviews.freebsd.org/D24156 Modified: head/sys/riscv/riscv/machdep.c Modified: head/sys/riscv/riscv/machdep.c == --- head/sys/riscv/riscv/machdep.c Sun Apr 19 00:33:05 2020 (r360084) +++ head/sys/riscv/riscv/machdep.c Sun Apr 19 00:34:49 2020 (r360085) @@ -851,7 +851,7 @@ initriscv(struct riscv_bootparams *rvbp) /* Bootstrap enough of pmap to enter the kernel proper */ kernlen = (lastaddr - KERNBASE); - pmap_bootstrap(rvbp->kern_l1pt, mem_regions[0].mr_start, kernlen); + pmap_bootstrap(rvbp->kern_l1pt, rvbp->kern_phys, kernlen); #ifdef FDT /* ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r360084 - head/sys/riscv/riscv
Author: mhorne
Date: Sun Apr 19 00:33:05 2020
New Revision: 360084
URL: https://svnweb.freebsd.org/changeset/base/360084
Log:
RISC-V: exclude reserved memory regions
The device tree may contain a "reserved-memory" node, whose purpose is
to communicate sections of physical memory that should not be used for
general allocations. Add the logic to parse and exclude these regions.
The particular motivation for this is protection of the SBI runtime
firmware. Currently, there is no mechanism through which the SBI
can communicate the details of its reserved memory region(s) to
a supervisor payload. There has been some discussion recently on how
this can be achieved [1], and it seems that the path going forward
will be to add an entry to the reserved-memory node.
This hasn't caused any issues for us yet, since we exclude all physical
memory below the kernel's load address from being allocated, and on all
currently supported platforms this covers the SBI firmware region. This
will change in another commit, so as a safety measure, ensure that the
lowest 2MB of memory is excluded if this region has not been reported.
[1] https://github.com/riscv/riscv-sbi-doc/pull/37
Reviewed by: markj, nick (older version)
Differential Revision:https://reviews.freebsd.org/D24155
Modified:
head/sys/riscv/riscv/machdep.c
Modified: head/sys/riscv/riscv/machdep.c
==
--- head/sys/riscv/riscv/machdep.c Sun Apr 19 00:18:16 2020
(r360083)
+++ head/sys/riscv/riscv/machdep.c Sun Apr 19 00:33:05 2020
(r360084)
@@ -84,6 +84,7 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
+#include
#include
#include
#include
@@ -827,6 +828,15 @@ initriscv(struct riscv_bootparams *rvbp)
#ifdef FDT
try_load_dtb(kmdp);
+ /*
+* Exclude reserved memory specified by the device tree. Typically,
+* this contains an entry for memory used by the runtime SBI firmware.
+*/
+ if (fdt_get_reserved_mem(mem_regions, _regions_sz) == 0) {
+ physmem_exclude_regions(mem_regions, mem_regions_sz,
+ EXFLAG_NODUMP | EXFLAG_NOALLOC);
+ }
+
/* Grab physical memory regions information from device tree. */
if (fdt_get_mem_regions(mem_regions, _regions_sz, NULL) != 0) {
panic("Cannot get physical memory regions");
@@ -843,6 +853,21 @@ initriscv(struct riscv_bootparams *rvbp)
kernlen = (lastaddr - KERNBASE);
pmap_bootstrap(rvbp->kern_l1pt, mem_regions[0].mr_start, kernlen);
+#ifdef FDT
+ /*
+* XXX: Exclude the lowest 2MB of physical memory, if it hasn't been
+* already, as this area is assumed to contain the SBI firmware. This
+* is a little fragile, but it is consistent with the platforms we
+* support so far.
+*
+* TODO: remove this when the all regular booting methods properly
+* report their reserved memory in the device tree.
+*/
+ if (mem_regions[0].mr_start == physmap[0]) {
+ physmem_exclude_region(mem_regions[0].mr_start, L2_SIZE,
+ EXFLAG_NODUMP | EXFLAG_NOALLOC);
+ }
+#endif
physmem_init_kernel_globals();
/* Establish static device mappings */
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