Author: np
Date: Wed Mar 16 19:46:22 2016
New Revision: 296952
URL: https://svnweb.freebsd.org/changeset/base/296952
Log:
cxgbe(4): Enable PFs 0-3, and allow creation of SR-IOV VFs on these PFs
in the default configuration files.
Modified:
head/sys/dev/cxgbe/firmware/t4fw_cfg.txt
head/sys/dev/cxgbe/firmware/t5fw_cfg.txt
Modified: head/sys/dev/cxgbe/firmware/t4fw_cfg.txt
==============================================================================
--- head/sys/dev/cxgbe/firmware/t4fw_cfg.txt Wed Mar 16 19:43:44 2016
(r296951)
+++ head/sys/dev/cxgbe/firmware/t4fw_cfg.txt Wed Mar 16 19:46:22 2016
(r296952)
@@ -44,38 +44,58 @@
tp_tcptuning = lan
# PFs 0-3. These get 8 MSI/8 MSI-X vectors each. VFs are supported by
-# these 4 PFs only. Not used here at all.
+# these 4 PFs only.
[function "0"]
- nvf = 16
- nvi = 1
- rssnvi = 0
-[function "0/*"]
- nvi = 1
- rssnvi = 0
+ nvf = 4
+ wx_caps = all
+ r_caps = all
+ nvi = 2
+ rssnvi = 2
+ niqflint = 4
+ nethctrl = 4
+ neq = 8
+ nexactf = 4
+ cmask = all
+ pmask = 0x1
[function "1"]
- nvf = 16
- nvi = 1
- rssnvi = 0
-[function "1/*"]
- nvi = 1
- rssnvi = 0
+ nvf = 4
+ wx_caps = all
+ r_caps = all
+ nvi = 2
+ rssnvi = 2
+ niqflint = 4
+ nethctrl = 4
+ neq = 8
+ nexactf = 4
+ cmask = all
+ pmask = 0x2
[function "2"]
- nvf = 16
- nvi = 1
- rssnvi = 0
-[function "2/*"]
- nvi = 1
- rssnvi = 0
+ nvf = 4
+ wx_caps = all
+ r_caps = all
+ nvi = 2
+ rssnvi = 2
+ niqflint = 4
+ nethctrl = 4
+ neq = 8
+ nexactf = 4
+ cmask = all
+ pmask = 0x4
[function "3"]
- nvf = 16
- nvi = 1
- rssnvi = 0
-[function "3/*"]
- nvi = 1
- rssnvi = 0
+ nvf = 4
+ wx_caps = all
+ r_caps = all
+ nvi = 2
+ rssnvi = 2
+ niqflint = 4
+ nethctrl = 4
+ neq = 8
+ nexactf = 4
+ cmask = all
+ pmask = 0x8
# PF4 is the resource-rich PF that the bus/nexus driver attaches to.
# It gets 32 MSI/128 MSI-X vectors.
@@ -87,7 +107,7 @@
niqflint = 512
nethctrl = 1024
neq = 2048
- nexactf = 328
+ nexactf = 280
cmask = all
pmask = all
@@ -135,6 +155,60 @@
nexactf = 8
nfilter = 16
+# For Virtual functions, we only allow NIC functionality and we only allow
+# access to one port (1 << PF). Note that because of limitations in the
+# Scatter Gather Engine (SGE) hardware which checks writes to VF KDOORBELL
+# and GTS registers, the number of Ingress and Egress Queues must be a power
+# of 2.
+#
+[function "0/*"]
+ wx_caps = 0x82
+ r_caps = 0x86
+ nvi = 1
+ rssnvi = 1
+ niqflint = 2
+ nethctrl = 2
+ neq = 4
+ nexactf = 2
+ cmask = all
+ pmask = 0x1
+
+[function "1/*"]
+ wx_caps = 0x82
+ r_caps = 0x86
+ nvi = 1
+ rssnvi = 1
+ niqflint = 2
+ nethctrl = 2
+ neq = 4
+ nexactf = 2
+ cmask = all
+ pmask = 0x2
+
+[function "2/*"]
+ wx_caps = 0x82
+ r_caps = 0x86
+ nvi = 1
+ rssnvi = 1
+ niqflint = 2
+ nethctrl = 2
+ neq = 4
+ nexactf = 2
+ cmask = all
+ pmask = 0x4
+
+[function "3/*"]
+ wx_caps = 0x82
+ r_caps = 0x86
+ nvi = 1
+ rssnvi = 1
+ niqflint = 2
+ nethctrl = 2
+ neq = 4
+ nexactf = 2
+ cmask = all
+ pmask = 0x8
+
# MPS has 192K buffer space for ingress packets from the wire as well as
# loopback path of the L2 switch.
[port "0"]
@@ -171,7 +245,7 @@
[fini]
version = 0x1
- checksum = 0x76b034e0
+ checksum = 0xbec0621
#
# $FreeBSD$
#
Modified: head/sys/dev/cxgbe/firmware/t5fw_cfg.txt
==============================================================================
--- head/sys/dev/cxgbe/firmware/t5fw_cfg.txt Wed Mar 16 19:43:44 2016
(r296951)
+++ head/sys/dev/cxgbe/firmware/t5fw_cfg.txt Wed Mar 16 19:46:22 2016
(r296952)
@@ -88,38 +88,58 @@
# TPT error.
# PFs 0-3. These get 8 MSI/8 MSI-X vectors each. VFs are supported by
-# these 4 PFs only. Not used here at all.
+# these 4 PFs only.
[function "0"]
- nvf = 16
- nvi = 1
- rssnvi = 0
-[function "0/*"]
- nvi = 1
- rssnvi = 0
+ nvf = 4
+ wx_caps = all
+ r_caps = all
+ nvi = 2
+ rssnvi = 2
+ niqflint = 4
+ nethctrl = 4
+ neq = 8
+ nexactf = 4
+ cmask = all
+ pmask = 0x1
[function "1"]
- nvf = 16
- nvi = 1
- rssnvi = 0
-[function "1/*"]
- nvi = 1
- rssnvi = 0
+ nvf = 4
+ wx_caps = all
+ r_caps = all
+ nvi = 2
+ rssnvi = 2
+ niqflint = 4
+ nethctrl = 4
+ neq = 8
+ nexactf = 4
+ cmask = all
+ pmask = 0x2
[function "2"]
- nvf = 16
- nvi = 1
- rssnvi = 0
-[function "2/*"]
- nvi = 1
- rssnvi = 0
+ nvf = 4
+ wx_caps = all
+ r_caps = all
+ nvi = 2
+ rssnvi = 2
+ niqflint = 4
+ nethctrl = 4
+ neq = 8
+ nexactf = 4
+ cmask = all
+ pmask = 0x4
[function "3"]
- nvf = 16
- nvi = 1
- rssnvi = 0
-[function "3/*"]
- nvi = 1
- rssnvi = 0
+ nvf = 4
+ wx_caps = all
+ r_caps = all
+ nvi = 2
+ rssnvi = 2
+ niqflint = 4
+ nethctrl = 4
+ neq = 8
+ nexactf = 4
+ cmask = all
+ pmask = 0x8
# PF4 is the resource-rich PF that the bus/nexus driver attaches to.
# It gets 32 MSI/128 MSI-X vectors.
@@ -131,7 +151,7 @@
niqflint = 512
nethctrl = 1024
neq = 2048
- nexactf = 328
+ nexactf = 456
cmask = all
pmask = all
@@ -179,6 +199,60 @@
nexactf = 8
nfilter = 16
+# For Virtual functions, we only allow NIC functionality and we only allow
+# access to one port (1 << PF). Note that because of limitations in the
+# Scatter Gather Engine (SGE) hardware which checks writes to VF KDOORBELL
+# and GTS registers, the number of Ingress and Egress Queues must be a power
+# of 2.
+#
+[function "0/*"]
+ wx_caps = 0x82
+ r_caps = 0x86
+ nvi = 1
+ rssnvi = 1
+ niqflint = 2
+ nethctrl = 2
+ neq = 4
+ nexactf = 2
+ cmask = all
+ pmask = 0x1
+
+[function "1/*"]
+ wx_caps = 0x82
+ r_caps = 0x86
+ nvi = 1
+ rssnvi = 1
+ niqflint = 2
+ nethctrl = 2
+ neq = 4
+ nexactf = 2
+ cmask = all
+ pmask = 0x2
+
+[function "2/*"]
+ wx_caps = 0x82
+ r_caps = 0x86
+ nvi = 1
+ rssnvi = 1
+ niqflint = 2
+ nethctrl = 2
+ neq = 4
+ nexactf = 2
+ cmask = all
+ pmask = 0x4
+
+[function "3/*"]
+ wx_caps = 0x82
+ r_caps = 0x86
+ nvi = 1
+ rssnvi = 1
+ niqflint = 2
+ nethctrl = 2
+ neq = 4
+ nexactf = 2
+ cmask = all
+ pmask = 0x8
+
# MPS has 192K buffer space for ingress packets from the wire as well as
# loopback path of the L2 switch.
[port "0"]
@@ -215,7 +289,7 @@
[fini]
version = 0x1
- checksum = 0xebb87494
+ checksum = 0x2d7417e5
#
# $FreeBSD$
#
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