Hudson-2/SB900 was tested by Jorg Willekens, works the same as the SB800.
...
piixpm0 at pci0 dev 20 function 0 "AMD Hudson-2 SMBus" rev 0x13: polling
iic0 at piixpm0
spdmem0 at iic0 addr 0x50: 4GB DDR3 SDRAM PC3-10600
spdmem1 at iic0 addr 0x51: 4GB DDR3 SDRAM PC3-10600
spdmem2 at iic0 addr 0x52: 4GB DDR3 SDRAM PC3-10600
spdmem3 at iic0 addr 0x53: 4GB DDR3 SDRAM PC3-10600
..
ok?
-Bryan.
Index: piixpm.c
===================================================================
RCS file: /cvs/src/sys/dev/pci/piixpm.c,v
retrieving revision 1.36
diff -u -p -u -r1.36 piixpm.c
--- dev/pci/piixpm.c 28 May 2011 14:56:32 -0000 1.36
+++ dev/pci/piixpm.c 5 Mar 2012 00:02:40 -0000
@@ -85,6 +85,8 @@ struct cfdriver piixpm_cd = {
};
const struct pci_matchid piixpm_ids[] = {
+ { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_HUDSON2_SMB },
+
{ PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB200_SMB },
{ PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB300_SMB },
{ PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB400_SMB },
@@ -124,11 +126,13 @@ piixpm_attach(struct device *parent, str
sc->sc_iot = pa->pa_iot;
- if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ATI &&
+ if ((PCI_VENDOR(pa->pa_id) == PCI_VENDOR_AMD &&
+ PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_HUDSON2_SMB) ||
+ (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ATI &&
PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ATI_SBX00_SMB &&
- PCI_REVISION(pa->pa_class) >= 0x40) {
+ PCI_REVISION(pa->pa_class) >= 0x40)) {
/*
- * On the AMD SB800, the SMBus I/O registers are well
+ * On the AMD SB800+, the SMBus I/O registers are well
* hidden. We need to look at the "SMBus0En" Power
* Management register to find out where they live.
* We use indirect IO access through the index/data
