subject:"preliminary kabylake support for inteldrm"

Re: preliminary kabylake support for inteldrm

2017-09-29 Thread Maximilian Pichler

Works fine with my Intel HD Graphics 630 (on i7-7700K) at 2560x1440@60Hz.

Full-screen glxgears uses the CPU and runs at only 3 fps, though.

Max

Re: preliminary kabylake support for inteldrm

2017-09-28 Thread Renato Aguiar

Hi Robert,

It is working fine on my Ivy Bridge. No regressions.

i7-3520M -- Intel HD Graphics 4000 (ThinkPad x230)

kern.version=OpenBSD 6.2 (GENERIC.MP) #115: Wed Sep 27 10:45:53 MDT 2017

Regards,

Robert Nagy  writes:

> Hi
>
> This is an updated diff for preliminary kabylake support for 6.2,
> this needs extensive testing on all inteldrm variants.
>
> This diff is also in snapshots now so please, test, test test!
>
> Thank you
>
> Index: sys/dev/pci/drm/i915_pciids.h
> ===
> RCS file: /cvs/src/sys/dev/pci/drm/i915_pciids.h,v
> retrieving revision 1.3
> diff -u -p -u -r1.3 i915_pciids.h
> --- sys/dev/pci/drm/i915_pciids.h 1 Jul 2017 16:14:10 -   1.3
> +++ sys/dev/pci/drm/i915_pciids.h 26 Sep 2017 14:57:52 -
> @@ -295,4 +295,40 @@
>   INTEL_VGA_DEVICE(0x5A84, info), /* APL HD Graphics 505 */ \
>   INTEL_VGA_DEVICE(0x5A85, info)  /* APL HD Graphics 500 */
>
> +#define INTEL_KBL_GT1_IDS(info)  \
> + INTEL_VGA_DEVICE(0x5913, info), /* ULT GT1.5 */ \
> + INTEL_VGA_DEVICE(0x5915, info), /* ULX GT1.5 */ \
> + INTEL_VGA_DEVICE(0x5917, info), /* DT  GT1.5 */ \
> + INTEL_VGA_DEVICE(0x5906, info), /* ULT GT1 */ \
> + INTEL_VGA_DEVICE(0x590E, info), /* ULX GT1 */ \
> + INTEL_VGA_DEVICE(0x5902, info), /* DT  GT1 */ \
> + INTEL_VGA_DEVICE(0x590B, info), /* Halo GT1 */ \
> + INTEL_VGA_DEVICE(0x590A, info) /* SRV GT1 */
> +
> +#define INTEL_KBL_GT2_IDS(info)  \
> + INTEL_VGA_DEVICE(0x5916, info), /* ULT GT2 */ \
> + INTEL_VGA_DEVICE(0x5921, info), /* ULT GT2F */ \
> + INTEL_VGA_DEVICE(0x591E, info), /* ULX GT2 */ \
> + INTEL_VGA_DEVICE(0x5912, info), /* DT  GT2 */ \
> + INTEL_VGA_DEVICE(0x591B, info), /* Halo GT2 */ \
> + INTEL_VGA_DEVICE(0x591A, info), /* SRV GT2 */ \
> + INTEL_VGA_DEVICE(0x591D, info) /* WKS GT2 */
> +
> +#define INTEL_KBL_GT3_IDS(info)  \
> + INTEL_VGA_DEVICE(0x5926, info), /* ULT GT3 */ \
> + INTEL_VGA_DEVICE(0x592B, info), /* Halo GT3 */ \
> + INTEL_VGA_DEVICE(0x592A, info) /* SRV GT3 */
> +
> +#define INTEL_KBL_GT4_IDS(info)  \
> + INTEL_VGA_DEVICE(0x5932, info), /* DT  GT4 */ \
> + INTEL_VGA_DEVICE(0x593B, info), /* Halo GT4 */ \
> + INTEL_VGA_DEVICE(0x593A, info), /* SRV GT4 */ \
> + INTEL_VGA_DEVICE(0x593D, info)  /* WKS GT4 */
> +
> +#define INTEL_KBL_IDS(info) \
> + INTEL_KBL_GT1_IDS(info), \
> + INTEL_KBL_GT2_IDS(info), \
> + INTEL_KBL_GT3_IDS(info), \
> + INTEL_KBL_GT4_IDS(info)
> +
>  #endif /* _I915_PCIIDS_H */
> Index: sys/dev/pci/drm/i915/i915_devlist.h
> ===
> RCS file: /cvs/src/sys/dev/pci/drm/i915/i915_devlist.h,v
> retrieving revision 1.6
> diff -u -p -u -r1.6 i915_devlist.h
> --- sys/dev/pci/drm/i915/i915_devlist.h   6 Jul 2017 10:09:26 -   
> 1.6
> +++ sys/dev/pci/drm/i915/i915_devlist.h   26 Sep 2017 14:57:52 -
> @@ -154,4 +154,26 @@ static const struct pci_matchid i915_dev
>   { 0x8086, 0x1a85 },
>   { 0x8086, 0x5a84 },
>   { 0x8086, 0x5a85 },
> + { 0x8086, 0x5913 },
> + { 0x8086, 0x5915 },
> + { 0x8086, 0x5917 },
> + { 0x8086, 0x5906 },
> + { 0x8086, 0x590e },
> + { 0x8086, 0x5902 },
> + { 0x8086, 0x590b },
> + { 0x8086, 0x590a },
> + { 0x8086, 0x5916 },
> + { 0x8086, 0x5921 },
> + { 0x8086, 0x591e },
> + { 0x8086, 0x5912 },
> + { 0x8086, 0x591b },
> + { 0x8086, 0x591a },
> + { 0x8086, 0x591d },
> + { 0x8086, 0x5926 },
> + { 0x8086, 0x592b },
> + { 0x8086, 0x592a },
> + { 0x8086, 0x5932 },
> + { 0x8086, 0x593b },
> + { 0x8086, 0x593a },
> + { 0x8086, 0x593d },
>  };
> Index: sys/dev/pci/drm/i915/i915_dma.c
> ===
> RCS file: /cvs/src/sys/dev/pci/drm/i915/i915_dma.c,v
> retrieving revision 1.25
> diff -u -p -u -r1.25 i915_dma.c
> --- sys/dev/pci/drm/i915/i915_dma.c   1 Jul 2017 16:14:10 -   1.25
> +++ sys/dev/pci/drm/i915/i915_dma.c   26 Sep 2017 14:57:52 -
> @@ -712,7 +712,8 @@ static void gen9_sseu_info_init(struct d
>* supports EU power gating on devices with more than one EU
>* pair per subslice.
>   */
> - info->has_slice_pg = (IS_SKYLAKE(dev) && (info->slice_total > 1));
> + info->has_slice_pg = ((IS_SKYLAKE(dev) || IS_KABYLAKE(dev)) &&
> +(info->slice_total > 1));
>   info->has_subslice_pg = (IS_BROXTON(dev) && (info->subslice_total > 1));
>   info->has_eu_pg = (info->eu_per_subslice > 2);
>  }
> @@ -858,6 +859,37 @@ static void intel_device_info_runtime_in
>   DRM_INFO("Display fused off, disabling\n");
>   info->num_pipes = 0;
>   }
> + } else if (info->num_pipes > 0 && INTEL_INFO(dev)->gen == 9) {
> + u32 dfsm =

Re: preliminary kabylake support for inteldrm

2017-09-27 Thread Richard Toohey


On 09/28/17 08:43, Peter N. M. Hansteen wrote:

On 09/27/17 18:41, Peter N. M. Hansteen wrote:

On 09/27/17 00:07, Robert Nagy wrote:

Hi

This is an updated diff for preliminary kabylake support for 6.2,
this needs extensive testing on all inteldrm variants.

This diff is also in snapshots now so please, test, test test!

Installed the latest snapshot (OpenBSD 6.2 (GENERIC.MP) #114: Wed Sep 27
01:19:45 MDT 2017), now running the machine from
http://bsdly.blogspot.com/2017/07/openbsd-and-modern-laptop.html with no
xorg.conf, and it looks wonderful so far!

Preserved dmesg and xdpyinfo output:

https://home.nuug.no/~peter/20170927_dmesg_greyhame.txt
https://home.nuug.no/~peter/20170927_xdpyinfo_greyhame.txt

Following up on this, I see that there is a firmware load failure

error: [drm:pid0:i915_firmware_load_error_print] *ERROR* failed to load
firmware i915/kbl_dmc_ver1.bin (-22)
I took my SSD from an older Dell (Optiplex 790) to a new Dell (Optiplex 
7050).  Before the recent snapshot I was without graphics.


With the recent snapshot - I've got graphics (thank you), but I do see 
the same message (above) as Peter, but haven't noticed anything 
obviously amiss because of it (Google says: "DMC provides additional 
graphics low-power idle states. It provides capability to save and 
restore display registers across these low-power states independently 
from the OS/Kernel.")


But I was getting these messages (below) /before/ the recent snapshot, 
when the SSD was in a different machine:


Sep 22 09:52:50 devssd /bsd: error: 
[drm:pid46438:intel_pipe_update_start] *ERROR* Potential atomic update 
failure on pipe A


... so these atomic update messages don't seem to be new (and didn't see 
anything not working because of them).


Thanks,
Richard.


and later, repeated at intervals

[Wed Sep 27 21:39:21] peter@greyhame:~/div/hailmary/2016$ grep drm
/var/log/messages
Sep 27 19:44:35 greyhame /bsd: error:
[drm:pid46498:intel_pipe_update_start] *ERROR* Potential atomic update
failure on pipe A
Sep 27 21:37:09 greyhame /bsd: error:
[drm:pid46498:intel_pipe_update_start] *ERROR* Potential atomic update
failure on pipe A

Then again, I'm not sure what if any functionality is impacted here

- P

Re: preliminary kabylake support for inteldrm

2017-09-27 Thread Olivier Cherrier

Hi Robert,

Snapshot works pretty well on my new laptop (Intel HD Graphics 510).
Resuming is working great! No regression. Thank you!
dmesg is attached.


There are those error messages :
error: [drm:pid0:i915_firmware_load_error_print] *ERROR* failed to load 
firmware i915/skl_dmc_ver1.bin (-22)
error: [drm:pid0:i915_gem_init_hw] *ERROR* Failed to initialize GuC, error 
-8 (ignored)
error: [drm:pid0:i915_firmware_load_error_print] *ERROR* failed to load 
firmware i915/skl_dmc_ver1.bin (-22)
error: [drm:pid0:i915_gem_init_hw] *ERROR* Failed to initialize GuC, error 
-8 (ignored)


Thanks,
Best
oc


Or Wed, Sep 27, 2017 at 12:07:42AM +0200, rob...@openbsd.org wrote:
> Date: Wed, 27 Sep 2017 00:07:42 +0200
> From: Robert Nagy <rob...@openbsd.org>
> To: tech@openbsd.org
> Subject: Re: preliminary kabylake support for inteldrm
> 
> 
> Hi
> 
> This is an updated diff for preliminary kabylake support for 6.2,
> this needs extensive testing on all inteldrm variants.
> 
> This diff is also in snapshots now so please, test, test test!
> 
> Thank you
OpenBSD 6.2 (GENERIC.MP) #111: Tue Sep 26 11:09:09 MDT 2017
dera...@amd64.openbsd.org:/usr/src/sys/arch/amd64/compile/GENERIC.MP
real mem = 4188946432 (3994MB)
avail mem = 4054966272 (3867MB)
mpath0 at root
scsibus0 at mpath0: 256 targets
mainbus0 at root
bios0 at mainbus0: SMBIOS rev. 3.0 @ 0x87ee6000 (43 entries)
bios0: vendor American Megatrends Inc. version "5.11" date 06/03/2016
bios0: Notebook N24_25JU
acpi0 at bios0: rev 2
acpi0: sleep states S0 S3 S4 S5
acpi0: tables DSDT FACP APIC FPDT FIDT MCFG HPET SSDT SSDT DBGP DBG2 SSDT UEFI 
SSDT DMAR ASF!
acpi0: wakeup devices PEGP(S4) PEG0(S4) PEGP(S4) PEG1(S4) PEGP(S4) PEG2(S4) 
PXSX(S4) RP17(S4) PXSX(S4) RP18(S4) PXSX(S4) RP19(S4) PXSX(S4) RP20(S4) 
PXSX(S4) RP01(S4) [...]
acpitimer0 at acpi0: 3579545 Hz, 24 bits
acpimadt0 at acpi0 addr 0xfee0: PC-AT compat
cpu0 at mainbus0: apid 0 (boot processor)
cpu0: Intel(R) Pentium(R) CPU 4405U @ 2.10GHz, 2112.00 MHz
cpu0: 
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,SDBG,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,RDRAND,NXE,PAGE1GB,RDTSCP,LONG,LAHF,ABM,3DNOWP,PERF,ITSC,FSGSBASE,SGX,ERMS,INVPCID,RDSEED,SMAP,CLFLUSHOPT,PT,SENSOR,ARAT
cpu0: 256KB 64b/line 8-way L2 cache
cpu0: TSC frequency 211200 Hz
cpu0: smt 0, core 0, package 0
mtrr: Pentium Pro MTRR support, 10 var ranges, 88 fixed ranges
cpu0: apic clock running at 24MHz
cpu0: mwait min=64, max=64, C-substates=0.2.1.2.4.1.1.1, IBE
cpu1 at mainbus0: apid 2 (application processor)
cpu1: Intel(R) Pentium(R) CPU 4405U @ 2.10GHz, 2112.00 MHz
cpu1: 
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,SDBG,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,RDRAND,NXE,PAGE1GB,RDTSCP,LONG,LAHF,ABM,3DNOWP,PERF,ITSC,FSGSBASE,SGX,ERMS,INVPCID,RDSEED,SMAP,CLFLUSHOPT,PT,SENSOR,ARAT
cpu1: 256KB 64b/line 8-way L2 cache
cpu1: smt 0, core 1, package 0
cpu2 at mainbus0: apid 1 (application processor)
cpu2: Intel(R) Pentium(R) CPU 4405U @ 2.10GHz, 2112.00 MHz
cpu2: 
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,SDBG,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,RDRAND,NXE,PAGE1GB,RDTSCP,LONG,LAHF,ABM,3DNOWP,PERF,ITSC,FSGSBASE,SGX,ERMS,INVPCID,RDSEED,SMAP,CLFLUSHOPT,PT,SENSOR,ARAT
cpu2: 256KB 64b/line 8-way L2 cache
cpu2: smt 1, core 0, package 0
cpu3 at mainbus0: apid 3 (application processor)
cpu3: Intel(R) Pentium(R) CPU 4405U @ 2.10GHz, 2112.00 MHz
cpu3: 
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,SDBG,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,RDRAND,NXE,PAGE1GB,RDTSCP,LONG,LAHF,ABM,3DNOWP,PERF,ITSC,FSGSBASE,SGX,ERMS,INVPCID,RDSEED,SMAP,CLFLUSHOPT,PT,SENSOR,ARAT
cpu3: 256KB 64b/line 8-way L2 cache
cpu3: smt 1, core 1, package 0
ioapic0 at mainbus0: apid 2 pa 0xfec0, version 20, 120 pins
acpimcfg0 at acpi0 addr 0xe000, bus 0-255
acpihpet0 at acpi0: 2399 Hz
acpiprt0 at acpi0: bus 0 (PCI0)
acpiprt1 at acpi0: bus -1 (PEG0)
acpiprt2 at acpi0: bus -1 (PEG1)
acpiprt3 at acpi0: bus -1 (PEG2)
acpiprt4 at acpi0: bus -1 (RP17)
acpiprt5 at acpi0: bus -1 (RP18)
acpiprt6 at acpi0: bus -1 (RP19)
acpiprt7 at acpi0: bus -1 (RP20)
acpiprt8 at acpi0: bus 1 (RP01)
acpiprt9 at acpi0: bus 2 (RP02)
acpiprt10 at acpi0: bus -1 (RP03)
acpiprt11 at acpi0: bus -1 (RP04)
acpiprt12 at acpi0: bus -1 (RP05)
acpiprt13 at acpi0: bus -1 (RP06)
acpiprt14 at acpi0: bus -1 (RP07)
a

Re: preliminary kabylake support for inteldrm

2017-09-27 Thread Peter N. M. Hansteen

On 09/27/17 18:41, Peter N. M. Hansteen wrote:
> On 09/27/17 00:07, Robert Nagy wrote:
>>
>> Hi
>>
>> This is an updated diff for preliminary kabylake support for 6.2,
>> this needs extensive testing on all inteldrm variants.
>>
>> This diff is also in snapshots now so please, test, test test!
> 
> Installed the latest snapshot (OpenBSD 6.2 (GENERIC.MP) #114: Wed Sep 27
> 01:19:45 MDT 2017), now running the machine from
> http://bsdly.blogspot.com/2017/07/openbsd-and-modern-laptop.html with no
> xorg.conf, and it looks wonderful so far!
> 
> Preserved dmesg and xdpyinfo output:
> 
> https://home.nuug.no/~peter/20170927_dmesg_greyhame.txt
> https://home.nuug.no/~peter/20170927_xdpyinfo_greyhame.txt

Following up on this, I see that there is a firmware load failure

error: [drm:pid0:i915_firmware_load_error_print] *ERROR* failed to load
firmware i915/kbl_dmc_ver1.bin (-22)

and later, repeated at intervals

[Wed Sep 27 21:39:21] peter@greyhame:~/div/hailmary/2016$ grep drm
/var/log/messages
Sep 27 19:44:35 greyhame /bsd: error:
[drm:pid46498:intel_pipe_update_start] *ERROR* Potential atomic update
failure on pipe A
Sep 27 21:37:09 greyhame /bsd: error:
[drm:pid46498:intel_pipe_update_start] *ERROR* Potential atomic update
failure on pipe A

Then again, I'm not sure what if any functionality is impacted here

- P
-- 
Peter N. M. Hansteen, member of the first RFC 1149 implementation team
http://bsdly.blogspot.com/ http://www.bsdly.net/ http://www.nuug.no/
"Remember to set the evil bit on all malicious network traffic"
delilah spamd[29949]: 85.152.224.147: disconnected after 42673 seconds.

Re: preliminary kabylake support for inteldrm

2017-09-27 Thread Peter N. M. Hansteen

On 09/27/17 00:07, Robert Nagy wrote:
> 
> Hi
> 
> This is an updated diff for preliminary kabylake support for 6.2,
> this needs extensive testing on all inteldrm variants.
> 
> This diff is also in snapshots now so please, test, test test!

Installed the latest snapshot (OpenBSD 6.2 (GENERIC.MP) #114: Wed Sep 27
01:19:45 MDT 2017), now running the machine from
http://bsdly.blogspot.com/2017/07/openbsd-and-modern-laptop.html with no
xorg.conf, and it looks wonderful so far!

Preserved dmesg and xdpyinfo output:

https://home.nuug.no/~peter/20170927_dmesg_greyhame.txt
https://home.nuug.no/~peter/20170927_xdpyinfo_greyhame.txt

- Peter
-- 
Peter N. M. Hansteen, member of the first RFC 1149 implementation team
http://bsdly.blogspot.com/ http://www.bsdly.net/ http://www.nuug.no/
"Remember to set the evil bit on all malicious network traffic"
delilah spamd[29949]: 85.152.224.147: disconnected after 42673 seconds.

Re: preliminary kabylake support for inteldrm

2017-09-27 Thread Peter Hessler

On 2017 Sep 27 (Wed) at 00:07:42 +0200 (+0200), Robert Nagy wrote:
:
:Hi
:
:This is an updated diff for preliminary kabylake support for 6.2,
:this needs extensive testing on all inteldrm variants.
:
:This diff is also in snapshots now so please, test, test test!
:
:Thank you
:

Works fine on an i3-3220-based IvyBridge desktop with two monitors.


-- 
Although the moon is smaller than the earth, it is farther away.

Re: preliminary kabylake support for inteldrm

2017-09-27 Thread Manuel Giraud

Matthieu Herrb  writes:

> No visible regression so far on my IvyBridge and SandyBridge laptops.

Same here on a skylake.
-- 
Manuel Giraud

Re: preliminary kabylake support for inteldrm

2017-09-27 Thread Matthieu Herrb

On Wed, Sep 27, 2017 at 12:07:42AM +0200, Robert Nagy wrote:
> 
> Hi
> 
> This is an updated diff for preliminary kabylake support for 6.2,
> this needs extensive testing on all inteldrm variants.
> 
> This diff is also in snapshots now so please, test, test test!

No visible regression so far on my IvyBridge and SandyBridge laptops.

-- 
Matthieu Herrb

Re: preliminary kabylake support for inteldrm

2017-09-26 Thread Base Pr1me

Sorry, have to send this from gmail right now. WOO, suspend works! I'll
keep testing this week.

On Tue, Sep 26, 2017 at 4:07 PM, Robert Nagy  wrote:

>
> Hi
>
> This is an updated diff for preliminary kabylake support for 6.2,
> this needs extensive testing on all inteldrm variants.
>
> This diff is also in snapshots now so please, test, test test!
>
> Thank you
>
> Index: sys/dev/pci/drm/i915_pciids.h
> ===
> RCS file: /cvs/src/sys/dev/pci/drm/i915_pciids.h,v
> retrieving revision 1.3
> diff -u -p -u -r1.3 i915_pciids.h
> --- sys/dev/pci/drm/i915_pciids.h   1 Jul 2017 16:14:10 -   1.3
> +++ sys/dev/pci/drm/i915_pciids.h   26 Sep 2017 14:57:52 -
> @@ -295,4 +295,40 @@
> INTEL_VGA_DEVICE(0x5A84, info), /* APL HD Graphics 505 */ \
> INTEL_VGA_DEVICE(0x5A85, info)  /* APL HD Graphics 500 */
>
> +#define INTEL_KBL_GT1_IDS(info)\
> +   INTEL_VGA_DEVICE(0x5913, info), /* ULT GT1.5 */ \
> +   INTEL_VGA_DEVICE(0x5915, info), /* ULX GT1.5 */ \
> +   INTEL_VGA_DEVICE(0x5917, info), /* DT  GT1.5 */ \
> +   INTEL_VGA_DEVICE(0x5906, info), /* ULT GT1 */ \
> +   INTEL_VGA_DEVICE(0x590E, info), /* ULX GT1 */ \
> +   INTEL_VGA_DEVICE(0x5902, info), /* DT  GT1 */ \
> +   INTEL_VGA_DEVICE(0x590B, info), /* Halo GT1 */ \
> +   INTEL_VGA_DEVICE(0x590A, info) /* SRV GT1 */
> +
> +#define INTEL_KBL_GT2_IDS(info)\
> +   INTEL_VGA_DEVICE(0x5916, info), /* ULT GT2 */ \
> +   INTEL_VGA_DEVICE(0x5921, info), /* ULT GT2F */ \
> +   INTEL_VGA_DEVICE(0x591E, info), /* ULX GT2 */ \
> +   INTEL_VGA_DEVICE(0x5912, info), /* DT  GT2 */ \
> +   INTEL_VGA_DEVICE(0x591B, info), /* Halo GT2 */ \
> +   INTEL_VGA_DEVICE(0x591A, info), /* SRV GT2 */ \
> +   INTEL_VGA_DEVICE(0x591D, info) /* WKS GT2 */
> +
> +#define INTEL_KBL_GT3_IDS(info)\
> +   INTEL_VGA_DEVICE(0x5926, info), /* ULT GT3 */ \
> +   INTEL_VGA_DEVICE(0x592B, info), /* Halo GT3 */ \
> +   INTEL_VGA_DEVICE(0x592A, info) /* SRV GT3 */
> +
> +#define INTEL_KBL_GT4_IDS(info)\
> +   INTEL_VGA_DEVICE(0x5932, info), /* DT  GT4 */ \
> +   INTEL_VGA_DEVICE(0x593B, info), /* Halo GT4 */ \
> +   INTEL_VGA_DEVICE(0x593A, info), /* SRV GT4 */ \
> +   INTEL_VGA_DEVICE(0x593D, info)  /* WKS GT4 */
> +
> +#define INTEL_KBL_IDS(info) \
> +   INTEL_KBL_GT1_IDS(info), \
> +   INTEL_KBL_GT2_IDS(info), \
> +   INTEL_KBL_GT3_IDS(info), \
> +   INTEL_KBL_GT4_IDS(info)
> +
>  #endif /* _I915_PCIIDS_H */
> Index: sys/dev/pci/drm/i915/i915_devlist.h
> ===
> RCS file: /cvs/src/sys/dev/pci/drm/i915/i915_devlist.h,v
> retrieving revision 1.6
> diff -u -p -u -r1.6 i915_devlist.h
> --- sys/dev/pci/drm/i915/i915_devlist.h 6 Jul 2017 10:09:26 -
>  1.6
> +++ sys/dev/pci/drm/i915/i915_devlist.h 26 Sep 2017 14:57:52 -
> @@ -154,4 +154,26 @@ static const struct pci_matchid i915_dev
> { 0x8086, 0x1a85 },
> { 0x8086, 0x5a84 },
> { 0x8086, 0x5a85 },
> +   { 0x8086, 0x5913 },
> +   { 0x8086, 0x5915 },
> +   { 0x8086, 0x5917 },
> +   { 0x8086, 0x5906 },
> +   { 0x8086, 0x590e },
> +   { 0x8086, 0x5902 },
> +   { 0x8086, 0x590b },
> +   { 0x8086, 0x590a },
> +   { 0x8086, 0x5916 },
> +   { 0x8086, 0x5921 },
> +   { 0x8086, 0x591e },
> +   { 0x8086, 0x5912 },
> +   { 0x8086, 0x591b },
> +   { 0x8086, 0x591a },
> +   { 0x8086, 0x591d },
> +   { 0x8086, 0x5926 },
> +   { 0x8086, 0x592b },
> +   { 0x8086, 0x592a },
> +   { 0x8086, 0x5932 },
> +   { 0x8086, 0x593b },
> +   { 0x8086, 0x593a },
> +   { 0x8086, 0x593d },
>  };
> Index: sys/dev/pci/drm/i915/i915_dma.c
> ===
> RCS file: /cvs/src/sys/dev/pci/drm/i915/i915_dma.c,v
> retrieving revision 1.25
> diff -u -p -u -r1.25 i915_dma.c
> --- sys/dev/pci/drm/i915/i915_dma.c 1 Jul 2017 16:14:10 -
>  1.25
> +++ sys/dev/pci/drm/i915/i915_dma.c 26 Sep 2017 14:57:52 -
> @@ -712,7 +712,8 @@ static void gen9_sseu_info_init(struct d
>  * supports EU power gating on devices with more than one EU
>  * pair per subslice.
> */
> -   info->has_slice_pg = (IS_SKYLAKE(dev) && (info->slice_total > 1));
> +   info->has_slice_pg = ((IS_SKYLAKE(dev) || IS_KABYLAKE(dev)) &&
> +  (info->slice_total > 1));
> info->has_subslice_pg = (IS_BROXTON(dev) && (info->subslice_total
> > 1));
> info->has_eu_pg = (info->eu_per_subslice > 2);
>  }
> @@ -858,6 +859,37 @@ static void intel_device_info_runtime_in
> DRM_INFO("Display fused off, disabling\n");
> info->num_pipes = 0;
> }
> +   } else if (info->num_pipes > 0 &&

Re: preliminary kabylake support for inteldrm

2017-09-26 Thread Robert Nagy


Hi

This is an updated diff for preliminary kabylake support for 6.2,
this needs extensive testing on all inteldrm variants.

This diff is also in snapshots now so please, test, test test!

Thank you

Index: sys/dev/pci/drm/i915_pciids.h
===
RCS file: /cvs/src/sys/dev/pci/drm/i915_pciids.h,v
retrieving revision 1.3
diff -u -p -u -r1.3 i915_pciids.h
--- sys/dev/pci/drm/i915_pciids.h   1 Jul 2017 16:14:10 -   1.3
+++ sys/dev/pci/drm/i915_pciids.h   26 Sep 2017 14:57:52 -
@@ -295,4 +295,40 @@
INTEL_VGA_DEVICE(0x5A84, info), /* APL HD Graphics 505 */ \
INTEL_VGA_DEVICE(0x5A85, info)  /* APL HD Graphics 500 */
 
+#define INTEL_KBL_GT1_IDS(info)\
+   INTEL_VGA_DEVICE(0x5913, info), /* ULT GT1.5 */ \
+   INTEL_VGA_DEVICE(0x5915, info), /* ULX GT1.5 */ \
+   INTEL_VGA_DEVICE(0x5917, info), /* DT  GT1.5 */ \
+   INTEL_VGA_DEVICE(0x5906, info), /* ULT GT1 */ \
+   INTEL_VGA_DEVICE(0x590E, info), /* ULX GT1 */ \
+   INTEL_VGA_DEVICE(0x5902, info), /* DT  GT1 */ \
+   INTEL_VGA_DEVICE(0x590B, info), /* Halo GT1 */ \
+   INTEL_VGA_DEVICE(0x590A, info) /* SRV GT1 */
+
+#define INTEL_KBL_GT2_IDS(info)\
+   INTEL_VGA_DEVICE(0x5916, info), /* ULT GT2 */ \
+   INTEL_VGA_DEVICE(0x5921, info), /* ULT GT2F */ \
+   INTEL_VGA_DEVICE(0x591E, info), /* ULX GT2 */ \
+   INTEL_VGA_DEVICE(0x5912, info), /* DT  GT2 */ \
+   INTEL_VGA_DEVICE(0x591B, info), /* Halo GT2 */ \
+   INTEL_VGA_DEVICE(0x591A, info), /* SRV GT2 */ \
+   INTEL_VGA_DEVICE(0x591D, info) /* WKS GT2 */
+
+#define INTEL_KBL_GT3_IDS(info)\
+   INTEL_VGA_DEVICE(0x5926, info), /* ULT GT3 */ \
+   INTEL_VGA_DEVICE(0x592B, info), /* Halo GT3 */ \
+   INTEL_VGA_DEVICE(0x592A, info) /* SRV GT3 */
+
+#define INTEL_KBL_GT4_IDS(info)\
+   INTEL_VGA_DEVICE(0x5932, info), /* DT  GT4 */ \
+   INTEL_VGA_DEVICE(0x593B, info), /* Halo GT4 */ \
+   INTEL_VGA_DEVICE(0x593A, info), /* SRV GT4 */ \
+   INTEL_VGA_DEVICE(0x593D, info)  /* WKS GT4 */
+
+#define INTEL_KBL_IDS(info) \
+   INTEL_KBL_GT1_IDS(info), \
+   INTEL_KBL_GT2_IDS(info), \
+   INTEL_KBL_GT3_IDS(info), \
+   INTEL_KBL_GT4_IDS(info)
+
 #endif /* _I915_PCIIDS_H */
Index: sys/dev/pci/drm/i915/i915_devlist.h
===
RCS file: /cvs/src/sys/dev/pci/drm/i915/i915_devlist.h,v
retrieving revision 1.6
diff -u -p -u -r1.6 i915_devlist.h
--- sys/dev/pci/drm/i915/i915_devlist.h 6 Jul 2017 10:09:26 -   1.6
+++ sys/dev/pci/drm/i915/i915_devlist.h 26 Sep 2017 14:57:52 -
@@ -154,4 +154,26 @@ static const struct pci_matchid i915_dev
{ 0x8086, 0x1a85 },
{ 0x8086, 0x5a84 },
{ 0x8086, 0x5a85 },
+   { 0x8086, 0x5913 },
+   { 0x8086, 0x5915 },
+   { 0x8086, 0x5917 },
+   { 0x8086, 0x5906 },
+   { 0x8086, 0x590e },
+   { 0x8086, 0x5902 },
+   { 0x8086, 0x590b },
+   { 0x8086, 0x590a },
+   { 0x8086, 0x5916 },
+   { 0x8086, 0x5921 },
+   { 0x8086, 0x591e },
+   { 0x8086, 0x5912 },
+   { 0x8086, 0x591b },
+   { 0x8086, 0x591a },
+   { 0x8086, 0x591d },
+   { 0x8086, 0x5926 },
+   { 0x8086, 0x592b },
+   { 0x8086, 0x592a },
+   { 0x8086, 0x5932 },
+   { 0x8086, 0x593b },
+   { 0x8086, 0x593a },
+   { 0x8086, 0x593d },
 };
Index: sys/dev/pci/drm/i915/i915_dma.c
===
RCS file: /cvs/src/sys/dev/pci/drm/i915/i915_dma.c,v
retrieving revision 1.25
diff -u -p -u -r1.25 i915_dma.c
--- sys/dev/pci/drm/i915/i915_dma.c 1 Jul 2017 16:14:10 -   1.25
+++ sys/dev/pci/drm/i915/i915_dma.c 26 Sep 2017 14:57:52 -
@@ -712,7 +712,8 @@ static void gen9_sseu_info_init(struct d
 * supports EU power gating on devices with more than one EU
 * pair per subslice.
*/
-   info->has_slice_pg = (IS_SKYLAKE(dev) && (info->slice_total > 1));
+   info->has_slice_pg = ((IS_SKYLAKE(dev) || IS_KABYLAKE(dev)) &&
+  (info->slice_total > 1));
info->has_subslice_pg = (IS_BROXTON(dev) && (info->subslice_total > 1));
info->has_eu_pg = (info->eu_per_subslice > 2);
 }
@@ -858,6 +859,37 @@ static void intel_device_info_runtime_in
DRM_INFO("Display fused off, disabling\n");
info->num_pipes = 0;
}
+   } else if (info->num_pipes > 0 && INTEL_INFO(dev)->gen == 9) {
+   u32 dfsm = I915_READ(SKL_DFSM);
+   u8 disabled_mask = 0;
+   bool invalid;
+   int num_bits;
+
+   if (dfsm & SKL_DFSM_PIPE_A_DISABLE)
+   disabled_mask |= BIT(PIPE_A);
+   if (dfsm & SKL_DFSM_PIPE_B_DISABLE)
+   disabled_mask |= BIT(PIPE_B);
+

preliminary kabylake support for inteldrm

2017-09-07 Thread Robert Nagy

Hi!

It turns out that the changes to get kabylake to work are quiet minimal so I 
took a
stab at it and backported all the relevant kabylake commits from linux-4.8.y to
our drm tree. I did not touch anything outside of dev/pci/drm/i915 on purprose,
so that the update work of kettenis@ is only touched minimally.
There are some not really needed changes but at least that syncs some code with
linux for the future as well.

I am sending this diff to tech@ so that we can get more tests. You can run this
with !kabylake as well to see if there is any regression.

Index: sys/dev/pci/drm/i915_pciids.h
===
RCS file: /cvs/src/sys/dev/pci/drm/i915_pciids.h,v
retrieving revision 1.3
diff -u -p -u -r1.3 i915_pciids.h
--- sys/dev/pci/drm/i915_pciids.h   1 Jul 2017 16:14:10 -   1.3
+++ sys/dev/pci/drm/i915_pciids.h   5 Sep 2017 22:50:05 -
@@ -295,4 +295,40 @@
INTEL_VGA_DEVICE(0x5A84, info), /* APL HD Graphics 505 */ \
INTEL_VGA_DEVICE(0x5A85, info)  /* APL HD Graphics 500 */
 
+#define INTEL_KBL_GT1_IDS(info)\
+   INTEL_VGA_DEVICE(0x5913, info), /* ULT GT1.5 */ \
+   INTEL_VGA_DEVICE(0x5915, info), /* ULX GT1.5 */ \
+   INTEL_VGA_DEVICE(0x5917, info), /* DT  GT1.5 */ \
+   INTEL_VGA_DEVICE(0x5906, info), /* ULT GT1 */ \
+   INTEL_VGA_DEVICE(0x590E, info), /* ULX GT1 */ \
+   INTEL_VGA_DEVICE(0x5902, info), /* DT  GT1 */ \
+   INTEL_VGA_DEVICE(0x590B, info), /* Halo GT1 */ \
+   INTEL_VGA_DEVICE(0x590A, info) /* SRV GT1 */
+
+#define INTEL_KBL_GT2_IDS(info)\
+   INTEL_VGA_DEVICE(0x5916, info), /* ULT GT2 */ \
+   INTEL_VGA_DEVICE(0x5921, info), /* ULT GT2F */ \
+   INTEL_VGA_DEVICE(0x591E, info), /* ULX GT2 */ \
+   INTEL_VGA_DEVICE(0x5912, info), /* DT  GT2 */ \
+   INTEL_VGA_DEVICE(0x591B, info), /* Halo GT2 */ \
+   INTEL_VGA_DEVICE(0x591A, info), /* SRV GT2 */ \
+   INTEL_VGA_DEVICE(0x591D, info) /* WKS GT2 */
+
+#define INTEL_KBL_GT3_IDS(info)\
+   INTEL_VGA_DEVICE(0x5926, info), /* ULT GT3 */ \
+   INTEL_VGA_DEVICE(0x592B, info), /* Halo GT3 */ \
+   INTEL_VGA_DEVICE(0x592A, info) /* SRV GT3 */
+
+#define INTEL_KBL_GT4_IDS(info)\
+   INTEL_VGA_DEVICE(0x5932, info), /* DT  GT4 */ \
+   INTEL_VGA_DEVICE(0x593B, info), /* Halo GT4 */ \
+   INTEL_VGA_DEVICE(0x593A, info), /* SRV GT4 */ \
+   INTEL_VGA_DEVICE(0x593D, info)  /* WKS GT4 */
+
+#define INTEL_KBL_IDS(info) \
+   INTEL_KBL_GT1_IDS(info), \
+   INTEL_KBL_GT2_IDS(info), \
+   INTEL_KBL_GT3_IDS(info), \
+   INTEL_KBL_GT4_IDS(info)
+
 #endif /* _I915_PCIIDS_H */
Index: sys/dev/pci/drm/i915/i915_dma.c
===
RCS file: /cvs/src/sys/dev/pci/drm/i915/i915_dma.c,v
retrieving revision 1.25
diff -u -p -u -r1.25 i915_dma.c
--- sys/dev/pci/drm/i915/i915_dma.c 1 Jul 2017 16:14:10 -   1.25
+++ sys/dev/pci/drm/i915/i915_dma.c 5 Sep 2017 22:50:06 -
@@ -712,7 +712,8 @@ static void gen9_sseu_info_init(struct d
 * supports EU power gating on devices with more than one EU
 * pair per subslice.
*/
-   info->has_slice_pg = (IS_SKYLAKE(dev) && (info->slice_total > 1));
+   info->has_slice_pg = ((IS_SKYLAKE(dev) || IS_KABYLAKE(dev)) &&
+  (info->slice_total > 1));
info->has_subslice_pg = (IS_BROXTON(dev) && (info->subslice_total > 1));
info->has_eu_pg = (info->eu_per_subslice > 2);
 }
@@ -858,6 +859,37 @@ static void intel_device_info_runtime_in
DRM_INFO("Display fused off, disabling\n");
info->num_pipes = 0;
}
+   } else if (info->num_pipes > 0 && INTEL_INFO(dev)->gen == 9) {
+   u32 dfsm = I915_READ(SKL_DFSM);
+   u8 disabled_mask = 0;
+   bool invalid;
+   int num_bits;
+
+   if (dfsm & SKL_DFSM_PIPE_A_DISABLE)
+   disabled_mask |= BIT(PIPE_A);
+   if (dfsm & SKL_DFSM_PIPE_B_DISABLE)
+   disabled_mask |= BIT(PIPE_B);
+   if (dfsm & SKL_DFSM_PIPE_C_DISABLE)
+   disabled_mask |= BIT(PIPE_C);
+
+   num_bits = hweight8(disabled_mask);
+
+   switch (disabled_mask) {
+   case BIT(PIPE_A):
+   case BIT(PIPE_B):
+   case BIT(PIPE_A) | BIT(PIPE_B):
+   case BIT(PIPE_A) | BIT(PIPE_C):
+   invalid = true;
+   break;
+   default:
+   invalid = false;
+   }
+
+   if (num_bits > info->num_pipes || invalid)
+   DRM_ERROR("invalid pipe fuse configuration: 0x%x\n",
+ disabled_mask);
+   else
+   info->num_pipes -= num_bits;

Re: preliminary kabylake support for inteldrm

Re: preliminary kabylake support for inteldrm

Re: preliminary kabylake support for inteldrm

Re: preliminary kabylake support for inteldrm

Re: preliminary kabylake support for inteldrm

Re: preliminary kabylake support for inteldrm

Re: preliminary kabylake support for inteldrm

Re: preliminary kabylake support for inteldrm

Re: preliminary kabylake support for inteldrm

Re: preliminary kabylake support for inteldrm

Re: preliminary kabylake support for inteldrm

preliminary kabylake support for inteldrm

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