Re: [time-nuts] 4 KV Power Supply Recommendations Update

[J. L. Trantham]

Just an  update on the status of the 5061A.  I started this thread on
January 17.  

When first turned on, it pegged the Ion Pump I meter and, at glacial speed,
seemed to be 'pumping down', as judged by measurements of voltage on pin 3
of the A18 +3500 VDC power supply.  I finally got tired of waiting and
obtained an Electrophoresis Power Supply, an E-C Apparatus EC600, that does
0-4000 V, 0-200 W, and 0-200 mA with any one of the three limiting as
selected (thanks to Tom Frank for this suggestion, does anyone have a
schematic for this unit?).  

After several weeks, it finally pumped down to the point that the internal
power supply would allow the CS Oven to turn on but then the Ion Pump I
would peg and take forever to pump down again.  After a few weeks of this
along with further 'pumping', I decided to modify the internal power supply
to allow the supply to 'cut off' the CS Oven at 80 uA instead of the
designed 40 uA by adding a 56K resistor across R6, the 75K resistor in the
A18 +3500 VDC power supply.  

This allowed the CS Oven to come on, then the Ion Pump I meter indication
would go up to the mid 40's, the  CS Oven would turn off, then the pump
would pump down, and repeat the cycle.  It now rests at around 30 uA on the
Ion Pump I and all meter indications are now normal with the 'turn on' value
on the Ion Pump I meter indication at around 36.  The Continuous Operation
light now comes on and, seemingly, it is working.

However, I don't think it is, at least not yet.  

I have the 5 MHz adjusted slightly high (about 5 mHz), as compared to my
GPSDO, and the control voltage slowly increases, the frequency slowly
decreases, passing through the GPSDO frequency and then the EFC voltage
continues to increase, driving the frequency progressively lower.  However,
it does not appear to 'lock' though I have not given it hours to show that.
My other CS units appear to 'lock' almost immediately once the Continuous
Operation light comes on.

It is behaving as if the 'Loop' is not closed even though it appears to be
able to make the comparison of the 5 MHz to the CS, adjust the frequency of
the 5 MHz in the appropriate direction, but then fails to 'lock'.

In order to get the 2nd Harmonic indication reasonable, I had to turn up the
Loop Gain and put the A7 in 'High' gain.  I am suspicious that I have other
'adjustments' to make but have not had time to pursue this in detail.

So, it appears that I have more work to do.  However, at least as far as the
Ion Pump goes, I think I have made progress.

Thanks to all for the suggestions/discussion thus far and any further
suggestions would be appreciated.

Joe


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Re: [time-nuts] Fluke1 Monitor

[EB4APL]

Arthur,

I'm trying to contact you directly, please let me know if you received 
my emails.


Thank you and sorry for the BW guys.
Ignacio, EB4APL


Arthur Dent wrote:

I posted this photo before but I built the display, P.S., dist. amp, and Tbolt 
into a small case with the Tbolt supplying power and data to the display. I can 
still use the external RS-232 unmodified for Lady Heather. Seemed like a good 
simple way to do it.
 
http://farm3.static.flickr.com/2798/4307285448_1921a16b26_o.jpg


  



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[time-nuts] Austron 2110 B

[Donald Henderickx]

I wonder if some one might have an idea of what might be happening with 
my 2110 B?
I am getting an alarm light and a display message (local oscillator 
returned) If I press page select I get erratic
parameters. at times no ET voltage will be displayed,other times I get a 
voltage of 3.75 volts,after a few seconds
the display goes back to (local oscillator returned) The manual makes no 
mention of this error message.
I did a power off reset last night ,this morning the alarm was off but 
during the day it went back to an alarm condition.

Any ideas?
Don H


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Re: [time-nuts] HP3420B calibration

[Dick Moore]

On Mar 18, 2010, at 3:14 PM, time-nuts-requ...@febo.com wrote:

> Message: 5
> Date: Thu, 18 Mar 2010 22:53:46 +0100
> From: "Dr. Frank Stellmach" 
> Subject: [time-nuts] HP 3420B calibration assistance
> To: time-nuts@febo.com
> Message-ID: <4ba2a0ea.2080...@freenet.de>
> Content-Type: text/plain; charset=UTF-8; format=flowed
> 
> Hi Dick,
> 
> I'm sure, I met the 3420B long time ago..that's a nice unit,.. but I do 
> not have the schematics of the 3420B at hand, also did not find them on 
> the agilent site, only the HP catalogue from 1970.
> 
> The instrument - as far as I remember - compares the input voltage 
> directly against 0-10V or 0-1V given by an internal reference and a 
> Kelvin-Varley divider. 100V and 1kV input are divided first down to 10V 
> and/or 1V.

Internal ref is 11V and 1,1V, 100V and 1kV are divided down to 1 V in both 
cases, whereas I would think that the most stable would be to divide down to 
10V.
> 
> So you have to calibrate the linearity of the KV first, best done in the 
> 10V range.
> Then you have to calibrate the 10V, 1V range, then the 100V and 1kV range.
> 
> Using the 5440B only is the best way to handle this process, even better 
> and faster than using an internal Wheatstone Bridge for linearity 
> calibration. As far as I remeber, the missing card did not contain the 
> necessary precision resistors for the Wheatstone Bridge, the user had to 
> solder the Bridge on his own.

Exactly right.
> 
> Linearity of the 5440 is ~0.5ppm, sufficient for the 3420Bs KV.
> Range uncertainty is also superior.
> 
> First two decades should be binary coded, so they should be calibrated 
> each by a 1-2-4-8 sequence from the 5440B.
> The 3458A may be used for adjustments in the 100mV range.
> 
> I do not remember the construction of the KV, especially how the 
> adjustment from one decade to the other is designed. I.e. if the next 
> lower decade is applied directly to the predecessor, or if an adjustment 
> resistor is used (probable, if you mention 5 resistors per decade). 
> Perhaps you may send me a scan of the KV, with the adjustment pots.
> 
> I think, this should work if no additional decade resistor is used:
> 
> Use the normal 10V range of the 3420B for linearity calibration.
> 
> Start with the third decade, which cannot be adjusted, all its digits 
> and lower ones to 0.0999X, which gives 100mV. Set 5440B for this assumed 
> voltage of 100mV in the divider mode, freshly calibrated by 3458A, and 
> set to operate.
> Adjust 10V range cal of 3420B , so that differential VM of 3420B shows 
> Zero to 1?V or less.
> 
> Set DVM un-sensitive and change 3420B setting to 0.1, ?1`being the 
> first decade resistor which can be adjusted.
> Apply 100mV again, set DVM to sensitive, and adjust this resistors 
> adjustment to Zero deflection. This calibrates the transfer from the 
> third decade to the 2nd.
> 
> Now, apply 200mV, 400mV and 800mV, and adjust the appropriate resistors 
> of the 2nd decade at 0.2V, 0.4V, 0.8V settings acoordingly 
> to Zero, 1?V or less.
> 
> Set 2nd decade to 0.X, or to 0.X if the first setting is not 
> possible.
> 
> Apply 1V from the 5440B in the normal mode (not divided, control by 
> 3458A) and adjust 3420B 10V range to zero deflection again, to have a 
> more precise adjustment.
> Set 3420B to 1.0V and adjust the first resistor of the 1st decade to 
> a Zero deflection, <1?V.
> 
> This calibrates the transfer from 2nd to 1st decade.
> May also be different, if an additional decade resistor is designed in.
> 
> Now calibrate 2V, 4V, 8V from 5440B against 2.0V, 4.0V, 8.0V 
> of 3420B to Zero deflection to 2?V, 4?V,8?V, or better, if not too noisy.
> 
> Now apply 10V, setting 3420B to 9.XV or X.0V, whichever is 
> possible, finally adjust 10V range.
> Apply 1V, 100V and 1kV and adjust those ranges at the 3420B.
> As far as I remember, 1000V adjustment may not be not necessary, as this 
> is accomplished already in the 100V range.
> 
> Hope,this description helps.
> 
> Frank

Thanks Frank -- your memory is pretty good! The decade resistors are 1k 
(fixed), 1k (adj), 2k (adj), 2k (adj), and 4k (adj) in the second decade for 
10k total, with an extra 1k (adj) added for the first decade, which has an X 
position, to bring it to 11k total. The thing is, the switched resistors of the 
two decades with adjustments are always in series with each other, and are used 
in every position, being switched from the upper leg of the decade divider to 
the lower leg (and vv) depending on the dial position, so that adjusting one 
intrinsically changes the whole string at every setting -- I don't see an easy 
way to isolate a particular resistor's adjustment. 

You are right, the precision resistors to use the internal Wheatstone bridge 
system had to be supplied by the user and kludged up by hand.

I think this calibration will involve a lot of back-and-forth tweaks up and 
down the line. As mentioned above, an X switch p

Re: [time-nuts] Schematic and BOM

[David C. Partridge]

Bill,

just re-join the end of the names that have been split to the next line of the 
post. 

Again sent to the list 'cos your ISP still refuses email from me.

Apologies to the list 

Regards,
David Partridge
Email:david.partri...@perdrix.co.uk

-Original Message-
From: mason...@wcc.net [mailto:mason...@wcc.net] 
Sent: 18 March 2010 20:21
To: time-nuts-boun...@febo.com; 'David C. Partridge'
Subject: Schematic and BOM

David:

 

Neither the Schematic nor BOM would download..the Write Up, however did.

 

Bill Mason

W5STP



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Re: [time-nuts] Frequency divider PCB: Current status on"pre-orders", and pointers to documentation.

[Bob Camp]

Hi

Thus my earlier set of posts about this point, and which CPLD's were the better 
ones to use for this sort of thing. 

Bob


On Mar 18, 2010, at 6:14 PM, Bruce Griffiths wrote:

> You need to select the CPLD with some care.
> Typically a low power CMOS CPLD uses an internal state machine to transfer 
> the configuration data sored in internal EEPROM (or similar) to internal CMOS 
> RAM cells that control the CPLD internal interconnections/routing.
> 
> This intialisation process occurs during power up.
> After this initialisation the EEPROM storage is powered off to reduce the 
> static power consumption.
> Some CPLDs turn the internal initialisation state machine oscillator off when 
> this process is complete, some do not.
> 
> Thus the internal intialisation state machine oscillator is a potential 
> source of unwanted asynchronous phase modulation of the divider outputs.
> 
> Bruce
> 
> Bob Camp wrote:
>> Hi
>> 
>> I think I'd just take the design over to a reasonable CPLD and be done it,
>> if you are trying to improve it's floor. Having everything on a single
>> "lump" of high speed silicon takes care of a lot of issues.
>> 
>> Bob
>> 
>> -Original Message-
>> From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On
>> Behalf Of David C. Partridge
>> Sent: Thursday, March 18, 2010 8:41 AM
>> To: 'Discussion of precise time and frequency measurement'
>> Subject: Re: [time-nuts] Frequency divider PCB: Current status
>> on"pre-orders", and pointers to documentation.
>> 
>> I've just had in interesting offline chat with Warren S.
>> 
>> Basic outline is that this divider is plenty good enough to use with e.g. a
>> TBolt (which was my design target), and probably also for the less than
>> totally committed time nuts.
>> 
>> To quote him:
>> 
>> "What I'm saying is does not meet the Nut cases description of a low noise
>> buffer / divider."
>> For good performance, do make absolutely certain that the power supply for
>> this board isn't fed from the same PSU as your Rb or GPSDO, or if it is,
>> make sure you take the regulated 12V from that supply and feed this board
>> through another stage of cleanup using a 5V linear regulator and decoupling
>> caps right close to the power input connector.   Linear supply rather than
>> switched (I admit that mine is switched, then post regulated).  Star
>> grounding of course.
>> 
>> But for the ultimate time nuttery level of low jitter (low pS level), the
>> following changes would NEED to be made.
>> 
>> 1) Transformer coupled input clock shaper with multi-stage filtering to
>> restrict input fed to comparator to only the intended single input frequency
>> (10MHz).
>> 
>> 2) Change the power supply to the board to be (say) 12V or 9V.  Then use
>> several 5V on board regulators to feed:
>> 
>>  a) the clock shaper
>>  b) the main '163 divider
>>  c) the 4017 divider chain
>>  d) each 74AC541 output driver and related FFs.
>> 
>> Did I get that right Warren?
>> 
>> This ensures that if e.g. the switched output is set for 1Hz, that the 5V
>> supply for the other parts of the board doesn't twitch in sympathy when the
>> '541 switches.
>> 
>> 3) Maybe use BIG earth bond terminal and feed +ve supply in on single
>> header.
>> 
>> Warren, please jump in to add further points
>> 
>> Warren is of the view that using COGs and thin film resistors isn't
>> necessary except possibly to use thin film parts for R4&  R5
>> 
>> Regards,
>> David Partridge
>> Email:david.partri...@perdrix.co.uk
>> 
>> -Original Message-
>> From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On
>> Behalf Of David C. Partridge
>> Sent: 17 March 2010 18:28
>> To: teksco...@yahoogroups.com; tekscop...@yahoogroups.com;
>> hp_agilent_equipm...@yahoogroups.com; testequiptra...@yahoogroups.com;
>> 'Discussion of precise time and frequency measurement'
>> Subject: [time-nuts] Frequency divider PCB: Current status on
>> "pre-orders",and pointers to documentation.
>> 
>> The current situation is that I have almost enough statements of intent to
>> get to the magic 50 which will allow a price of GBP14.50 per board plus
>> delivery.   For the avoidance of doubt, this is the price for a bare PCB,
>> not for a kit, and definitely not for a made up board.
>> 
>> I intend to "keep the book open" until 18:00 Zulu (UTC or GMT) on Sunday
>> 21st March, I will then count up what I have and order that many boards (and
>> maybe a few over to get a nice round number).
>> 
>> I've received numerous reqeusts for the design documentation, schematic, and
>> a bill of materials
>> 
>> They can all be downloaded from my website, but there's no way (yet) to
>> navigate to them (a round tuit problem).
>> 
>> Write up:
>> 
>> 
>> 
>> Schematic:
>> 
>> > ic.pdf>
>> 
>> and BOM:
>> 
>> 

[time-nuts] HP 3420B..

[Dr. Frank Stellmach]

Sorry, this post went to wrong mailing list.

Frank

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Re: [time-nuts] Frequency divider PCB: Current status on"pre-orders", and pointers to documentation.

[Bruce Griffiths]

You need to select the CPLD with some care.
Typically a low power CMOS CPLD uses an internal state machine to 
transfer the configuration data sored in internal EEPROM (or similar) to 
internal CMOS RAM cells that control the CPLD internal 
interconnections/routing.


This intialisation process occurs during power up.
After this initialisation the EEPROM storage is powered off to reduce 
the static power consumption.
Some CPLDs turn the internal initialisation state machine oscillator off 
when this process is complete, some do not.


Thus the internal intialisation state machine oscillator is a potential 
source of unwanted asynchronous phase modulation of the divider outputs.


Bruce

Bob Camp wrote:

Hi

I think I'd just take the design over to a reasonable CPLD and be done it,
if you are trying to improve it's floor. Having everything on a single
"lump" of high speed silicon takes care of a lot of issues.

Bob

-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On
Behalf Of David C. Partridge
Sent: Thursday, March 18, 2010 8:41 AM
To: 'Discussion of precise time and frequency measurement'
Subject: Re: [time-nuts] Frequency divider PCB: Current status
on"pre-orders", and pointers to documentation.

I've just had in interesting offline chat with Warren S.

Basic outline is that this divider is plenty good enough to use with e.g. a
TBolt (which was my design target), and probably also for the less than
totally committed time nuts.

To quote him:

"What I'm saying is does not meet the Nut cases description of a low noise
buffer / divider."
For good performance, do make absolutely certain that the power supply for
this board isn't fed from the same PSU as your Rb or GPSDO, or if it is,
make sure you take the regulated 12V from that supply and feed this board
through another stage of cleanup using a 5V linear regulator and decoupling
caps right close to the power input connector.   Linear supply rather than
switched (I admit that mine is switched, then post regulated).  Star
grounding of course.

But for the ultimate time nuttery level of low jitter (low pS level), the
following changes would NEED to be made.

1) Transformer coupled input clock shaper with multi-stage filtering to
restrict input fed to comparator to only the intended single input frequency
(10MHz).

2) Change the power supply to the board to be (say) 12V or 9V.  Then use
several 5V on board regulators to feed:

  a) the clock shaper
  b) the main '163 divider
  c) the 4017 divider chain
  d) each 74AC541 output driver and related FFs.

Did I get that right Warren?

This ensures that if e.g. the switched output is set for 1Hz, that the 5V
supply for the other parts of the board doesn't twitch in sympathy when the
'541 switches.

3) Maybe use BIG earth bond terminal and feed +ve supply in on single
header.

Warren, please jump in to add further points

Warren is of the view that using COGs and thin film resistors isn't
necessary except possibly to use thin film parts for R4&  R5

Regards,
David Partridge
Email:david.partri...@perdrix.co.uk

-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On
Behalf Of David C. Partridge
Sent: 17 March 2010 18:28
To: teksco...@yahoogroups.com; tekscop...@yahoogroups.com;
hp_agilent_equipm...@yahoogroups.com; testequiptra...@yahoogroups.com;
'Discussion of precise time and frequency measurement'
Subject: [time-nuts] Frequency divider PCB: Current status on
"pre-orders",and pointers to documentation.

The current situation is that I have almost enough statements of intent to
get to the magic 50 which will allow a price of GBP14.50 per board plus
delivery.   For the avoidance of doubt, this is the price for a bare PCB,
not for a kit, and definitely not for a made up board.

I intend to "keep the book open" until 18:00 Zulu (UTC or GMT) on Sunday
21st March, I will then count up what I have and order that many boards (and
maybe a few over to get a nice round number).

I've received numerous reqeusts for the design documentation, schematic, and
a bill of materials

They can all be downloaded from my website, but there's no way (yet) to
navigate to them (a round tuit problem).

Write up:



Schematic:



and BOM:



The schematic and write up have both been updated today, and the BOM is new
today.

For those who worry about SMT soldering, you don't need a reflow oven, it
can all be done with tweezers, a small tipped iron, fine solder wire, and
liquid flux (or a flux pen).  A good pair of strong reading glasses helps
too!   See:



I've also had questions on part pricing:  Back in 2008, the cost to populate
one PCB

[time-nuts] HP 3420B calibration assistance

[Dr. Frank Stellmach]

Hi Dick,

I'm sure, I met the 3420B long time ago..that's a nice unit,.. but I do 
not have the schematics of the 3420B at hand, also did not find them on 
the agilent site, only the HP catalogue from 1970.


The instrument - as far as I remember - compares the input voltage 
directly against 0-10V or 0-1V given by an internal reference and a 
Kelvin-Varley divider. 100V and 1kV input are divided first down to 10V 
and/or 1V.


So you have to calibrate the linearity of the KV first, best done in the 
10V range.

Then you have to calibrate the 10V, 1V range, then the 100V and 1kV range.

Using the 5440B only is the best way to handle this process, even better 
and faster than using an internal Wheatstone Bridge for linearity 
calibration. As far as I remeber, the missing card did not contain the 
necessary precision resistors for the Wheatstone Bridge, the user had to 
solder the Bridge on his own.


Linearity of the 5440 is ~0.5ppm, sufficient for the 3420Bs KV.
Range uncertainty is also superior.

First two decades should be binary coded, so they should be calibrated 
each by a 1-2-4-8 sequence from the 5440B.

The 3458A may be used for adjustments in the 100mV range.

I do not remember the construction of the KV, especially how the 
adjustment from one decade to the other is designed. I.e. if the next 
lower decade is applied directly to the predecessor, or if an adjustment 
resistor is used (probable, if you mention 5 resistors per decade). 
Perhaps you may send me a scan of the KV, with the adjustment pots.



I think, this should work if no additional decade resistor is used:

Use the normal 10V range of the 3420B for linearity calibration.

Start with the third decade, which cannot be adjusted, all its digits 
and lower ones to 0.0999X, which gives 100mV. Set 5440B for this assumed 
voltage of 100mV in the divider mode, freshly calibrated by 3458A, and 
set to operate.
Adjust 10V range cal of 3420B , so that differential VM of 3420B shows 
Zero to 1µV or less.


Set DVM un-sensitive and change 3420B setting to 0.1, ´1`being the 
first decade resistor which can be adjusted.
Apply 100mV again, set DVM to sensitive, and adjust this resistors 
adjustment to Zero deflection. This calibrates the transfer from the 
third decade to the 2nd.


Now, apply 200mV, 400mV and 800mV, and adjust the appropriate resistors 
of the 2nd decade at 0.2V, 0.4V, 0.8V settings acoordingly 
to Zero, 1µV or less.


Set 2nd decade to 0.X, or to 0.X if the first setting is not 
possible.


Apply 1V from the 5440B in the normal mode (not divided, control by 
3458A) and adjust 3420B 10V range to zero deflection again, to have a 
more precise adjustment.
Set 3420B to 1.0V and adjust the first resistor of the 1st decade to 
a Zero deflection, <1µV.


This calibrates the transfer from 2nd to 1st decade.
May also be different, if an additional decade resistor is designed in.

Now calibrate 2V, 4V, 8V from 5440B against 2.0V, 4.0V, 8.0V 
of 3420B to Zero deflection to 2µV, 4µV,8µV, or better, if not too noisy.


Now apply 10V, setting 3420B to 9.XV or X.0V, whichever is 
possible, finally adjust 10V range.

Apply 1V, 100V and 1kV and adjust those ranges at the 3420B.
As far as I remember, 1000V adjustment may not be not necessary, as this 
is accomplished already in the 100V range.


Hope,this description helps.

Frank


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Re: [time-nuts] Frequency divider PCB: Current status on"pre-orders", and pointers to documentation.

[Bruce Griffiths]

David C. Partridge wrote:

Ooops I did mean to say R4 and R7 - the 2K divider pair.

Regards,
David Partridge
Email:david.partri...@perdrix.co.uk

-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On
Behalf Of David C. Partridge
Sent: 18 March 2010 12:41
To: 'Discussion of precise time and frequency measurement'
Subject: Re: [time-nuts] Frequency divider PCB: Current status
on"pre-orders", and pointers to documentation.


   

except possibly to use thin film parts for R4&  R5
 


The problem with thick film resistors is their flicker when a 
substantial dc (or very low frequency) voltage is present across the 
resistor.


Resistors with a potentially significant dc voltage across them:

R2, R3 if the source has a dc output component.

R5, R6 due to the comparator input bias current.
The dc voltage drop will be around 150mV.
(flicker noise due to the comparator bias current flicker noise will 
also be developed across these resistors)


R4, R7
The dc voltage drop across each is 2.5V.
The flicker noise (and power supply noise) at the junction of R4 and R7 
is a common mode signal to the comparator and its effect on flicker 
phase noise is significantly reduced by the comparator's 70-80dB low 
frequency CMRR.


R8-R23
The dc voltage drop across these resistors depends on the load.
If the load is AC coupled there is no dc component.
However for the lower frequency (1Hz and perhaps 10Hz) outputs there may 
be substantial low frequency current in the output buffer series resistors.


Another, often neglected contribution to output noise is the power 
supply low frequency noise.
Depending on the application the low frequency output noise produced by 
common 3 terminal regulators may be significant.
Worst case one may need to resort to using NiCd batteries (measured by 
NIST to have extremely low noise for load currents of 1mA or less).


However before resorting to this a lower phase noise input circuit 
should be used.
The one used was originally designed to be reasonably rugged with 
respect to input overload whilst operating over a wide frequency and 
amplitude range.


The phase noise contribution of the various coupling capacitors is 
determined by the phase noise characteristics of the dielectric and the 
phase shift due to the capacitor.

If the phase shift is sufficiently small almost any dielectric can be used.
If the low frequency voltage noise across the coupling capacitors is 
large then phase modulation due to the voltage dependence of the 
capacitor value can occur.
In this case its important to use a capacitor with a low voltage 
coefficient dielectric such as NP0/C0G.


If an input transformer is used then if the phase shift due to the 
transformer magnetising inductance significant flicker phase noise can 
be added if the transformer core has a permeability greater than unity. 
Ferrite cores produce more phase noise but the amount depends on the 
particular ferrite used. Powdered iron cores contribute lower phase noise.


If one uses an input filter then a tuned air cored transformer may be 
useful in that it contributes very little phase noise whilst providing 
isolation.


For the fastidious, the fact that a digital divider samples its input 
noise and aliases it down needs to be considered.
This effect can be substantial, bandpass filtering the input signal will 
help but with large division ratios a very narrow bandwidth input filter 
is required.

The very large associated phase shift tempco usually makes this impractical.
A more practical solution is to use a cascade of bandpass (`10%) filter 
+ shaper + divider with low value divisor (<64) modules.


Bruce


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Re: [time-nuts] Frequency divider PCB: Current status on"pre-orders", and pointers to documentation.

[David C. Partridge]

Ooops I did mean to say R4 and R7 - the 2K divider pair.

Regards,
David Partridge
Email:david.partri...@perdrix.co.uk

-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On
Behalf Of David C. Partridge
Sent: 18 March 2010 12:41
To: 'Discussion of precise time and frequency measurement'
Subject: Re: [time-nuts] Frequency divider PCB: Current status
on"pre-orders", and pointers to documentation.


> except possibly to use thin film parts for R4 & R5


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Re: [time-nuts] Frequency divider PCB: Current status

[WarrenS]

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Re: [time-nuts] Frequency divider PCB: Current status on"pre-orders", and pointers to documentation.

[Bob Camp]

Hi

I think I'd just take the design over to a reasonable CPLD and be done it,
if you are trying to improve it's floor. Having everything on a single
"lump" of high speed silicon takes care of a lot of issues. 

Bob

-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On
Behalf Of David C. Partridge
Sent: Thursday, March 18, 2010 8:41 AM
To: 'Discussion of precise time and frequency measurement'
Subject: Re: [time-nuts] Frequency divider PCB: Current status
on"pre-orders", and pointers to documentation.

I've just had in interesting offline chat with Warren S. 

Basic outline is that this divider is plenty good enough to use with e.g. a
TBolt (which was my design target), and probably also for the less than
totally committed time nuts.

To quote him:

"What I'm saying is does not meet the Nut cases description of a low noise
buffer / divider."
For good performance, do make absolutely certain that the power supply for
this board isn't fed from the same PSU as your Rb or GPSDO, or if it is,
make sure you take the regulated 12V from that supply and feed this board
through another stage of cleanup using a 5V linear regulator and decoupling
caps right close to the power input connector.   Linear supply rather than
switched (I admit that mine is switched, then post regulated).  Star
grounding of course.   

But for the ultimate time nuttery level of low jitter (low pS level), the
following changes would NEED to be made.

1) Transformer coupled input clock shaper with multi-stage filtering to
restrict input fed to comparator to only the intended single input frequency
(10MHz).

2) Change the power supply to the board to be (say) 12V or 9V.  Then use
several 5V on board regulators to feed:

 a) the clock shaper
 b) the main '163 divider
 c) the 4017 divider chain
 d) each 74AC541 output driver and related FFs.

Did I get that right Warren?

This ensures that if e.g. the switched output is set for 1Hz, that the 5V
supply for the other parts of the board doesn't twitch in sympathy when the
'541 switches.

3) Maybe use BIG earth bond terminal and feed +ve supply in on single
header.

Warren, please jump in to add further points

Warren is of the view that using COGs and thin film resistors isn't
necessary except possibly to use thin film parts for R4 & R5

Regards,
David Partridge
Email:david.partri...@perdrix.co.uk

-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On
Behalf Of David C. Partridge
Sent: 17 March 2010 18:28
To: teksco...@yahoogroups.com; tekscop...@yahoogroups.com;
hp_agilent_equipm...@yahoogroups.com; testequiptra...@yahoogroups.com;
'Discussion of precise time and frequency measurement'
Subject: [time-nuts] Frequency divider PCB: Current status on
"pre-orders",and pointers to documentation.

The current situation is that I have almost enough statements of intent to
get to the magic 50 which will allow a price of GBP14.50 per board plus
delivery.   For the avoidance of doubt, this is the price for a bare PCB,
not for a kit, and definitely not for a made up board.

I intend to "keep the book open" until 18:00 Zulu (UTC or GMT) on Sunday
21st March, I will then count up what I have and order that many boards (and
maybe a few over to get a nice round number).

I've received numerous reqeusts for the design documentation, schematic, and
a bill of materials

They can all be downloaded from my website, but there's no way (yet) to
navigate to them (a round tuit problem).

Write up:



Schematic:

 

and BOM:



The schematic and write up have both been updated today, and the BOM is new
today.

For those who worry about SMT soldering, you don't need a reflow oven, it
can all be done with tweezers, a small tipped iron, fine solder wire, and
liquid flux (or a flux pen).  A good pair of strong reading glasses helps
too!   See:



I've also had questions on part pricing:  Back in 2008, the cost to populate
one PCB using a MAX999, thick film resistors, and standard (X7R) chip
capacitors was about GBP28 including Molex headers and SMB sockets.   I
don't expect it to be massively different now.   I'm afraid I don't have
full parts kits, and the necessary up front costs to do so is more than my
finances allow at present.

FWIW, the ADCMP600 is a bit pricier than the MAX999, and is supposed to be
"better", though I'm not sure in what respects it is better.

If you want the lowest possible level of phase noise, you would follow the
bill of materials recommendations and use thin film resistors and C0G
capacitors in the clock shaper part of the circuit at the very least, but
this adds considerably to the cost (for examp

Re: [time-nuts] HP 5328A Divider / Timebase Output performance

[Bert, VE2ZAZ]

All,

Just to convince myself that my setup is OK, I decided to check my 5370A 
counter by doing ADEV/MDEV on its own OCXO output, a self-check as recommended 
in the manual. 50 ohms input on START, HiZ input on STOP, thresholds in preset 
(~ 0 Volt), common input (internally bridged), rising edge on START, falling 
edge on STOP. The results are shown in purple. I also measured the HP 8644A 
OCXO output the same way and got the green plot. No surprise there, more noise 
because the counter is measuring an external source as opposed to its own 
timebase.  Based on that, I know that the 5370A counter is not the one 
generating all that noise on the 5328A divider readings. The one thing I will 
do just for fun is to measure all the OCXOs I have in-house to see if results 
will vary a lot. I will try to keep the START-to-STOP interval small using an 
external delay line on the STOP input instead of bridging inside.

>From all that discussion, and after having tried various settings, I
come up to the conclusion that the HP 5328A counter makes a good
general purpose divider, for example, checking GPS PPS performance. But
I need a much better performing divider for serious low jitter source
measurements.

One thing I notice on my 5370A, I don't get ~50 ns readings when the thresholds 
are set to PRESET (0.00 on the readout). I get ~45 ns. I can adjust the 
thresholds to get 50 ns, but I would have expected the readings to be much 
closer to 50ns, even with a sine wave. Amplitude is 400mV pk-pk. Is this 
typical of the 5370A, or it needs calibration?

Bert.

ps: I am thankful to Magnus, Bruce, John, Pete and a few others for the hints 
on ADEV and MDEV measurements. I also got a few emails of people who are, like 
me, learning a lot from this email exchange.


- Original Message 
From: "time-nuts-requ...@febo.com" 
To: time-nuts@febo.com
Sent: Wed, March 17, 2010 4:14:51 PM
Subject: time-nuts Digest, Vol 68, Issue 95

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Today's Topics:

   1. Re: HP 5328A Divider / Timebase Output performance
  (SAL CORNACCHIA)
   2. Frequency divider PCB: Current status on "pre-orders",and
  pointers to documentation. (David C. Partridge)
   3. Re: Frequency divider PCB: Current status on "pre-orders",
  and pointers to documentation. (erniepe...@aol.com)
   4. Re: Frequency divider PCB: Current status on"pre-orders",
  and pointers to documentation. (Bill Mason)
   5. Re: HP 5328A Divider / Timebase Output performance
  (Magnus Danielson)
   6. Re: HP 5328A Divider / Timebase Output performance
  (Bruce Griffiths)


--

Message: 1
Date: Wed, 17 Mar 2010 08:46:27 -0700 (PDT)
From: SAL CORNACCHIA 
Subject: Re: [time-nuts] HP 5328A Divider / Timebase Output
performance
To: Discussion of precise time and frequency measurement

Message-ID: <322935.78365...@web88204.mail.re2.yahoo.com>
Content-Type: text/plain; charset=iso-8859-1

Hi Bert,
Could You tell me?how to?produced the trace for two timebase oscillators.
Thank You
?Best regards,
Sal C. Cornacchia
Electronic RF Microwave Engineer (Ret.) 








From: "Bert, VE2ZAZ" 
To: time-nuts@febo.com
Sent: Wed, March 17, 2010 11:01:14 AM
Subject: [time-nuts] HP 5328A Divider / Timebase Output performance

OK, I am doing a 24-hour ADEV analysis of the HP 5328A Timebase Output when set 
to divide-by-10,000,000. I use the 10MHz output from an HP 8644A sig.gen. OCXO. 
I split that 10MHz signal into two; one end goes to the the input of the HP 
5328A counter. The other 10MHz end goes to the Stop input of the 5370A. The 
Start input gets the 5328A Timebase Output PPS. The 5370A is free running. I 
have included the plot of what I get so far. 

I would tend to say that the divider is pretty lousy for short term, but it is 
all fine for longer runs, right? 

Is this what I should expect from a TTL/ECL divider chain designed in the 
'70s-'80s? How would this compare to a modern divider chain, like the PIC 
divider or David Partridge's divider board?

Since I get a straight line pretty much up to 500s or so, do I conclude that 
the divider dominates the system noise up to there? 

Of course, the 5370A timebase drift has to be taken into account but is not 
subtracted on that plot.

Thanks,

Bert.



? ? ? __
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[time-nuts] TSIP, SCIP time sync

[Mark Sims]

I did some playing with the time sync code in Lady Heather (and made some 
tweaks).   You can force a time sync on demand,  once a minute,  hour,  or day.

Also you can cause an automatic time sync whenever the system clock and Tbolt 
clock difference exceeds x milliseconds.  Windoze reports the time to a 
millisecond,  but only increments the clock at typically 50-60 Hz.   That 
limits your absolute time sync accuracy.

If you have a slow machine,  the Heather window is minimized,  the command line 
help window is being displayed,   some graphics intensive screen (like the 
zoomed antenna plot) is being displayed, etc then automatic time syncs  might 
be triggered every second if you specify small values for x milliseconds since 
the program could be busy or asleep for more than that amount of time. 


  
_
Hotmail is redefining busy with tools for the New Busy. Get more from your 
inbox.
http://www.windowslive.com/campaign/thenewbusy?ocid=PID27925::T:WLMTAGL:ON:WL:en-US:WM_HMP:032010_2
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Re: [time-nuts] Frequency divider PCB: Current status on "pre-orders", and pointers to documentation.

[David C. Partridge]

I've just had in interesting offline chat with Warren S. 

Basic outline is that this divider is plenty good enough to use with e.g. a
TBolt (which was my design target), and probably also for the less than
totally committed time nuts.

To quote him:

"What I'm saying is does not meet the Nut cases description of a low noise
buffer / divider."
For good performance, do make absolutely certain that the power supply for
this board isn't fed from the same PSU as your Rb or GPSDO, or if it is,
make sure you take the regulated 12V from that supply and feed this board
through another stage of cleanup using a 5V linear regulator and decoupling
caps right close to the power input connector.   Linear supply rather than
switched (I admit that mine is switched, then post regulated).  Star
grounding of course.   

But for the ultimate time nuttery level of low jitter (low pS level), the
following changes would NEED to be made.

1) Transformer coupled input clock shaper with multi-stage filtering to
restrict input fed to comparator to only the intended single input frequency
(10MHz).

2) Change the power supply to the board to be (say) 12V or 9V.  Then use
several 5V on board regulators to feed:

 a) the clock shaper
 b) the main '163 divider
 c) the 4017 divider chain
 d) each 74AC541 output driver and related FFs.

Did I get that right Warren?

This ensures that if e.g. the switched output is set for 1Hz, that the 5V
supply for the other parts of the board doesn't twitch in sympathy when the
'541 switches.

3) Maybe use BIG earth bond terminal and feed +ve supply in on single
header.

Warren, please jump in to add further points

Warren is of the view that using COGs and thin film resistors isn't
necessary except possibly to use thin film parts for R4 & R5

Regards,
David Partridge
Email:david.partri...@perdrix.co.uk

-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On
Behalf Of David C. Partridge
Sent: 17 March 2010 18:28
To: teksco...@yahoogroups.com; tekscop...@yahoogroups.com;
hp_agilent_equipm...@yahoogroups.com; testequiptra...@yahoogroups.com;
'Discussion of precise time and frequency measurement'
Subject: [time-nuts] Frequency divider PCB: Current status on
"pre-orders",and pointers to documentation.

The current situation is that I have almost enough statements of intent to
get to the magic 50 which will allow a price of GBP14.50 per board plus
delivery.   For the avoidance of doubt, this is the price for a bare PCB,
not for a kit, and definitely not for a made up board.

I intend to "keep the book open" until 18:00 Zulu (UTC or GMT) on Sunday
21st March, I will then count up what I have and order that many boards (and
maybe a few over to get a nice round number).

I've received numerous reqeusts for the design documentation, schematic, and
a bill of materials

They can all be downloaded from my website, but there's no way (yet) to
navigate to them (a round tuit problem).

Write up:



Schematic:

 

and BOM:



The schematic and write up have both been updated today, and the BOM is new
today.

For those who worry about SMT soldering, you don't need a reflow oven, it
can all be done with tweezers, a small tipped iron, fine solder wire, and
liquid flux (or a flux pen).  A good pair of strong reading glasses helps
too!   See:



I've also had questions on part pricing:  Back in 2008, the cost to populate
one PCB using a MAX999, thick film resistors, and standard (X7R) chip
capacitors was about GBP28 including Molex headers and SMB sockets.   I
don't expect it to be massively different now.   I'm afraid I don't have
full parts kits, and the necessary up front costs to do so is more than my
finances allow at present.

FWIW, the ADCMP600 is a bit pricier than the MAX999, and is supposed to be
"better", though I'm not sure in what respects it is better.

If you want the lowest possible level of phase noise, you would follow the
bill of materials recommendations and use thin film resistors and C0G
capacitors in the clock shaper part of the circuit at the very least, but
this adds considerably to the cost (for example 100nF C0G 1206 capacitors
are about 1 pound each, while an X7R part is only a few pence).

Regards,
David Partridge


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Re: [time-nuts] Frequency divider PCB: Current status on "pre-orders", and pointers to documentation.

[Roy Phillips]

Hello David
I would also like to order the PCB at the price of £14.50 plus delivery.
Thank you.
Roy Phillips.


--
From: "David C. Partridge" 
Sent: Wednesday, March 17, 2010 6:28 PM
To: ; ; 
; ; 
"'Discussion of precise time and frequency measurement'" 

Subject: [time-nuts] Frequency divider PCB: Current status on 
"pre-orders",and pointers to documentation.



The current situation is that I have almost enough statements of intent to
get to the magic 50 which will allow a price of GBP14.50 per board plus
delivery.   For the avoidance of doubt, this is the price for a bare PCB,
not for a kit, and definitely not for a made up board.

I intend to "keep the book open" until 18:00 Zulu (UTC or GMT) on Sunday
21st March, I will then count up what I have and order that many boards 
(and

maybe a few over to get a nice round number).

I've received numerous reqeusts for the design documentation, schematic, 
and

a bill of materials

They can all be downloaded from my website, but there's no way (yet) to
navigate to them (a round tuit problem).

Write up:



Schematic:



and BOM:



The schematic and write up have both been updated today, and the BOM is 
new

today.

For those who worry about SMT soldering, you don't need a reflow oven, it
can all be done with tweezers, a small tipped iron, fine solder wire, and
liquid flux (or a flux pen).  A good pair of strong reading glasses helps
too!   See:



I've also had questions on part pricing:  Back in 2008, the cost to 
populate

one PCB using a MAX999, thick film resistors, and standard (X7R) chip
capacitors was about GBP28 including Molex headers and SMB sockets.   I
don't expect it to be massively different now.   I'm afraid I don't have
full parts kits, and the necessary up front costs to do so is more than my
finances allow at present.

FWIW, the ADCMP600 is a bit pricier than the MAX999, and is supposed to be
"better", though I'm not sure in what respects it is better.

If you want the lowest possible level of phase noise, you would follow the
bill of materials recommendations and use thin film resistors and C0G
capacitors in the clock shaper part of the circuit at the very least, but
this adds considerably to the cost (for example 100nF C0G 1206 capacitors
are about 1 pound each, while an X7R part is only a few pence).

Regards,
David Partridge


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Re: [time-nuts] Frequency divider PCB: Current status on "pre-ord ers", and pointers to documentation.

[Reeves Paul]

Hello David,

Could you add me to the list for one board please?

regards
Paul Reeves G8GJA

-Original Message-
From: David C. Partridge [mailto:david.partri...@dsl.pipex.com]
Sent: 17 March 2010 18:28
To: teksco...@yahoogroups.com; tekscop...@yahoogroups.com;
hp_agilent_equipm...@yahoogroups.com; testequiptra...@yahoogroups.com;
'Discussion of precise time and frequency measurement'
Subject: [time-nuts] Frequency divider PCB: Current status on
"pre-orders", and pointers to documentation.


The current situation is that I have almost enough statements of intent to
get to the magic 50 which will allow a price of GBP14.50 per board plus
delivery.   For the avoidance of doubt, this is the price for a bare PCB,
not for a kit, and definitely not for a made up board.

I intend to "keep the book open" until 18:00 Zulu (UTC or GMT) on Sunday
21st March, I will then count up what I have and order that many boards (and
maybe a few over to get a nice round number).

I've received numerous reqeusts for the design documentation, schematic, and
a bill of materials

They can all be downloaded from my website, but there's no way (yet) to
navigate to them (a round tuit problem).

Write up:



Schematic:

 

and BOM:



The schematic and write up have both been updated today, and the BOM is new
today.

For those who worry about SMT soldering, you don't need a reflow oven, it
can all be done with tweezers, a small tipped iron, fine solder wire, and
liquid flux (or a flux pen).  A good pair of strong reading glasses helps
too!   See:



I've also had questions on part pricing:  Back in 2008, the cost to populate
one PCB using a MAX999, thick film resistors, and standard (X7R) chip
capacitors was about GBP28 including Molex headers and SMB sockets.   I
don't expect it to be massively different now.   I'm afraid I don't have
full parts kits, and the necessary up front costs to do so is more than my
finances allow at present.

FWIW, the ADCMP600 is a bit pricier than the MAX999, and is supposed to be
"better", though I'm not sure in what respects it is better.

If you want the lowest possible level of phase noise, you would follow the
bill of materials recommendations and use thin film resistors and C0G
capacitors in the clock shaper part of the circuit at the very least, but
this adds considerably to the cost (for example 100nF C0G 1206 capacitors
are about 1 pound each, while an X7R part is only a few pence).

Regards,
David Partridge


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