Re: [time-nuts] An embedded NTP server

2013-01-02 Thread Dan Kemppainen


On 1/1/2013 4:58 PM, time-nuts-requ...@febo.com wrote:

True story:

Many years ago when the very first ARM silicon arrived and they started
testing it, it was generally execeeding expectations but a little bit
flakey at high clock rates.

After the bubbly had been drunk and hangovers subdued, the serious testing
started and one of the first thing they found was that they had forgotten
to hook up VCC:  The chip ran entirely on leaked power from the I/O pins,
most notably the #RESET pin.

When they also connected the VCC pin, it was stable well above spec'ed
speed.

-- Poul-Henning Kamp | UNIX since Zilog Zeus 3.20
Ive also seen this, but with a design based on a 8 bit micro running 
at 50Mhz. Took a while to trace down, because the guy how laid out the 
board is usually good about power and gnd connections. We found it by 
putting a volt meter on the VCC pin, and realized it wasn't at 5 
volts. (It's surprising how often people don't check VCC voltages on a 
new layout!)  I never figured a 50Mhz proc at ~75mA would run from 
leakage current into the inputs, but realizing that a lot of I/O have 
protection diodes, it is probably more common than one would expect.


Back on topic (sort of). I've been playing with some of the PIC24 
chips lately. They have some neat oscillator options internally, 
however they seem to have a lot of jitter on I/O compared to other 
micros that run without a VCO and PLL. Again these PIC's are also 
designed to be run at low power if necessary. That said, some do have 
PWM with resolutions down to 1.04nS with special hardware which is 
impressive. I think it's a DLL locked to ~120Mhz ref clock, locked to 
an internal RC at ~7.5Mhz. Lots of multiplying going on there!


Dan


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[time-nuts] HP 5065A short term stabilities, update

2013-01-02 Thread cdelect


A few years ago I posted the short term stabilities of some HP 5065A.
Here is an updated list with some more results. The 1 sec figures
with a * indicate a maximum. The actual 1 sec results for those units 
will be better. 

The 1340A unit was exceptional!


  1 SEC.   10 SEC.   100 SEC.  1K SEC.
--
HP 5065A Spec.   5.0-12  1.6-12   5.0-13   5.0-13
--

940-3.51-12  1.02-12   2.43-13   1.00-13 
2432A1.40-12  6.06-13   3.31-13   3.28-14
2340A1.66-12  7.09-13   2.93-13   6.54-14
2640A1.16-12  4.06-13   1.23-13   2.10-14
2816A1  1.04-12  3.89-13   2.40-13   3.37-14
TESTER 1.15-12  7.40-13   3.66-13   7.54-14 
RB09  5.50-12  1.00-12   3.00-13   3.00-13
RB02  9.00-13  3.00-13   1.00-13   6.00-14
RB12  2.00-12  4.00-13   1.10-13   5.10-14
TVB2  1.17-12  4.80-13   1.50-13   7.80-14
TVB1  1.13-12  3.32-13   1.13-13   5.10-14
2816A2 *2.62-12  1.09-12   4.12-13   1.10-13
2816A3   1.38-12  5.93-13   2.51-13   7.81-14
1532A 1.8 -12   8.0 -134.0 -13
2432A1   1.4 -12   4.5 -131.6 -13
2816A4   8.0 -13   3.2 -131.1 -13
RB34 *2.10-12  4.5 -131.15-13
2816A5   1.04-12  3.50-13   8.15-14
2816A6 *2.16-12  4.50-13   1.15-13
2740A   *2.07-12  4.05-13   1.01-13
1340A9.45-13   3.31-13   9.60-14
2432A2  1.02-12   3.43-13   1.03-13
2432A3*2.01-12   4.11-13   1.25-13

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Re: [time-nuts] HP 5065A short term stabilities, update

2013-01-02 Thread Tom Van Baak
Corby,

Thanks very much for the updated list. I can only imagine how much work that 
involved over the years. Can you describe your test setup?

Also, are you up to testing/repairing more 5065A? I have a few here that I'm 
not making any progress on.

Thanks,
/tvb

- Original Message - 
From: cdel...@juno.com
To: time-nuts@febo.com
Sent: Wednesday, January 02, 2013 8:18 AM
Subject: [time-nuts] HP 5065A short term stabilities, update


 
 
 A few years ago I posted the short term stabilities of some HP 5065A.
 Here is an updated list with some more results. The 1 sec figures
 with a * indicate a maximum. The actual 1 sec results for those units 
 will be better. 
 
 The 1340A unit was exceptional!
 
 
  1 SEC.   10 SEC.   100 SEC.  1K SEC.
 --
 HP 5065A Spec.   5.0-12  1.6-12   5.0-13   5.0-13
 --
 
 940-3.51-12  1.02-12   2.43-13   1.00-13 
 2432A1.40-12  6.06-13   3.31-13   3.28-14
 2340A1.66-12  7.09-13   2.93-13   6.54-14
 2640A1.16-12  4.06-13   1.23-13   2.10-14
 2816A1  1.04-12  3.89-13   2.40-13   3.37-14
 TESTER 1.15-12  7.40-13   3.66-13   7.54-14 
 RB09  5.50-12  1.00-12   3.00-13   3.00-13
 RB02  9.00-13  3.00-13   1.00-13   6.00-14
 RB12  2.00-12  4.00-13   1.10-13   5.10-14
 TVB2  1.17-12  4.80-13   1.50-13   7.80-14
 TVB1  1.13-12  3.32-13   1.13-13   5.10-14
 2816A2 *2.62-12  1.09-12   4.12-13   1.10-13
 2816A3   1.38-12  5.93-13   2.51-13   7.81-14
 1532A 1.8 -12   8.0 -134.0 -13
 2432A1   1.4 -12   4.5 -131.6 -13
 2816A4   8.0 -13   3.2 -131.1 -13
 RB34 *2.10-12  4.5 -131.15-13
 2816A5   1.04-12  3.50-13   8.15-14
 2816A6 *2.16-12  4.50-13   1.15-13
 2740A   *2.07-12  4.05-13   1.01-13
 1340A9.45-13   3.31-13   9.60-14
 2432A2  1.02-12   3.43-13   1.03-13
 2432A3*2.01-12   4.11-13   1.25-13
 



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[time-nuts] 10 MHz - 16 MHz clock multiplier

2013-01-02 Thread Tom Van Baak
What's the simplest way to generate 16 MHz from 10 MHz? This will be for 
clocking a microcontroller at 16 MHz given 10 MHz (Cs/Rb/GPSDO). Low price and 
low parts count is a goal; jitter is not a concern but absolute long-term phase 
coherence is a must.

The ICS525 (as in TAPR Clock-Block) is a good candidate but I was wondering if 
there's something cheaper, less functional, and maybe not SSOP. Any suggestions?

Thanks,
/tvb


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Re: [time-nuts] An embedded NTP server

2013-01-02 Thread Poul-Henning Kamp

In message 50e45382.8090...@irtelemetrics.com, Dan Kemppainen writes:

Back on topic (sort of). I've been playing with some of the PIC24 
chips lately. They have some neat oscillator options internally, 

I've given up on PIC and Atmel microcontrollers and their antiquated
CPU designs.

My life is too short to fight odd-ball compilers, when I can get a
real 32 bit CPU and a good compiler instead.

-- 
Poul-Henning Kamp   | UNIX since Zilog Zeus 3.20
p...@freebsd.org | TCP/IP since RFC 956
FreeBSD committer   | BSD since 4.3-tahoe
Never attribute to malice what can adequately be explained by incompetence.

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Re: [time-nuts] An embedded NTP server

2013-01-02 Thread Chris Albertson
On Wed, Jan 2, 2013 at 11:16 AM, Poul-Henning Kamp p...@phk.freebsd.dk wrote:

 I've given up on PIC and Atmel microcontrollers and their antiquated
 CPU designs.

 My life is too short to fight odd-ball compilers, when I can get a
 real 32 bit CPU and a good compiler instead.

That is a valid point if you are building a one-off project.  Your
time is worth something.  But if you plan to sell a million AA cell
battery chargers using a 32-bit controller is uneconomical.   These
will always be a bigger market for 8-bit chips then for 32-bit chips.

For an NTP server I'd go with something that can run an OS and the NTP
reverence implementation.  ARM (and others) can do that.

--

Chris Albertson
Redondo Beach, California

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Re: [time-nuts] 10 MHz - 16 MHz clock multiplier

2013-01-02 Thread paul swed
Tom.
OK the challenge simple. CD4046 16 MHz vco and div by 8 using a 2 Mhz ref.
Thats pretty easy as they say.
As an alternative and very easy 10 MHz div 2 2MHz X 4 X 2. This requires
BPF but pretty easy also.
Lastly an injection osc. 10 Mhz div to 2 Mhz differentiate and feed to a 16
Mhz osc.
Thats actually the easiest of the approaches.
Regards
Paul


On Wed, Jan 2, 2013 at 1:54 PM, Tom Van Baak t...@leapsecond.com wrote:

 What's the simplest way to generate 16 MHz from 10 MHz? This will be for
 clocking a microcontroller at 16 MHz given 10 MHz (Cs/Rb/GPSDO). Low price
 and low parts count is a goal; jitter is not a concern but absolute
 long-term phase coherence is a must.

 The ICS525 (as in TAPR Clock-Block) is a good candidate but I was
 wondering if there's something cheaper, less functional, and maybe not
 SSOP. Any suggestions?

 Thanks,
 /tvb


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Re: [time-nuts] An embedded NTP server

2013-01-02 Thread Poul-Henning Kamp

In message CABbxVHuc1CcVqa2fgY_nriNrT3PYHtP8BSi=5=bsbk9eyhl...@mail.gmail.com
, Chris Albertson writes:

That is a valid point if you are building a one-off project.  Your
time is worth something.  But if you plan to sell a million AA cell
battery chargers using a 32-bit controller is uneconomical.

But that's generally not what we discuss here on time-nuts, so I didn't
feel I needed to state the obvious...

For an NTP server I'd go with something that can run an OS and the NTP
reverence implementation.  ARM (and others) can do that.

Actually, the OS is not important, floating point support is.


-- 
Poul-Henning Kamp   | UNIX since Zilog Zeus 3.20
p...@freebsd.org | TCP/IP since RFC 956
FreeBSD committer   | BSD since 4.3-tahoe
Never attribute to malice what can adequately be explained by incompetence.

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Re: [time-nuts] An embedded NTP server

2013-01-02 Thread James Harrison
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1

On 02/01/2013 19:25, Chris Albertson wrote:
 For an NTP server I'd go with something that can run an OS and the 
 NTP reverence implementation.  ARM (and others) can do that.
 

This is exactly what I've done using the Raspberry Pi (Broadcom ARM
SOC running Linux) and a GPS module with the PPS kernel hook for Linux
GPIO. Still a beginner/aspiring time-nut so I'm not sure on accuracy
(PLL offset jitter suggests ~5-10ms worst-case but I've not looked
much into measuring it yet), but it's an improvement on internet NTP
at least.

(Brief writeup here:
http://www.talkunafraid.co.uk/2012/12/the-ntpi-accurate-time-with-a-raspberry-pi-and-venus638flpx/
- - be gentle, it's my first 'real' timing project!)

James
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Re: [time-nuts] 10 MHz - 16 MHz clock multiplier

2013-01-02 Thread Bruce Griffiths
Since injection locking is possible when the ratio of the 2 frequencies 
involved is a rational number, a 16 MHz oscillator can be directly 
injection locked to a 10MHz signal without the need for dividers etc.


Bruce

paul swed wrote:

Tom.
OK the challenge simple. CD4046 16 MHz vco and div by 8 using a 2 Mhz ref.
Thats pretty easy as they say.
As an alternative and very easy 10 MHz div 2 2MHz X 4 X 2. This requires
BPF but pretty easy also.
Lastly an injection osc. 10 Mhz div to 2 Mhz differentiate and feed to a 16
Mhz osc.
Thats actually the easiest of the approaches.
Regards
Paul


On Wed, Jan 2, 2013 at 1:54 PM, Tom Van Baakt...@leapsecond.com  wrote:

   

What's the simplest way to generate 16 MHz from 10 MHz? This will be for
clocking a microcontroller at 16 MHz given 10 MHz (Cs/Rb/GPSDO). Low price
and low parts count is a goal; jitter is not a concern but absolute
long-term phase coherence is a must.

The ICS525 (as in TAPR Clock-Block) is a good candidate but I was
wondering if there's something cheaper, less functional, and maybe not
SSOP. Any suggestions?

Thanks,
/tvb


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Re: [time-nuts] 10 MHz - 16 MHz clock multiplier

2013-01-02 Thread paul swed
Bruce is right about that fact. Thanks.
Square up the 10 Mhz. Diff the leading edge (It actually doesn't matter)
maybe 2-5pf cap and 300 ohm R to ground. Feed this into a transistor that
is in the bottom end of a one transistor oscillator. There are actually
several ways to inject. Think of a totem pole of 2 transistors.
Use google and do a search and you will see what I am  talking about. There
were some articles that the spread spectrum hams used that describe it.

On Wed, Jan 2, 2013 at 2:48 PM, Bruce Griffiths
bruce.griffi...@xtra.co.nzwrote:

 Since injection locking is possible when the ratio of the 2 frequencies
 involved is a rational number, a 16 MHz oscillator can be directly
 injection locked to a 10MHz signal without the need for dividers etc.

 Bruce


 paul swed wrote:

 Tom.
 OK the challenge simple. CD4046 16 MHz vco and div by 8 using a 2 Mhz ref.
 Thats pretty easy as they say.
 As an alternative and very easy 10 MHz div 2 2MHz X 4 X 2. This requires
 BPF but pretty easy also.
 Lastly an injection osc. 10 Mhz div to 2 Mhz differentiate and feed to a
 16
 Mhz osc.
 Thats actually the easiest of the approaches.
 Regards
 Paul


 On Wed, Jan 2, 2013 at 1:54 PM, Tom Van Baakt...@leapsecond.com  wrote:



 What's the simplest way to generate 16 MHz from 10 MHz? This will be for
 clocking a microcontroller at 16 MHz given 10 MHz (Cs/Rb/GPSDO). Low
 price
 and low parts count is a goal; jitter is not a concern but absolute
 long-term phase coherence is a must.

 The ICS525 (as in TAPR Clock-Block) is a good candidate but I was
 wondering if there's something cheaper, less functional, and maybe not
 SSOP. Any suggestions?

 Thanks,
 /tvb


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Re: [time-nuts] 10 MHz - 16 MHz clock multiplier

2013-01-02 Thread Bob Camp
Hi

I think I'd second the thought of join with an ARM or something like it that 
will be happy with 10 MHz in. Next choice would be a PIC24 / dsPIC33 that's 
also happy with 10 MHz in.  The money you will pay for the clock conversion 
chip(s) will go a long way spent on a CPU.

Bob

On Jan 2, 2013, at 1:54 PM, Tom Van Baak t...@leapsecond.com wrote:

 What's the simplest way to generate 16 MHz from 10 MHz? This will be for 
 clocking a microcontroller at 16 MHz given 10 MHz (Cs/Rb/GPSDO). Low price 
 and low parts count is a goal; jitter is not a concern but absolute long-term 
 phase coherence is a must.
 
 The ICS525 (as in TAPR Clock-Block) is a good candidate but I was wondering 
 if there's something cheaper, less functional, and maybe not SSOP. Any 
 suggestions?
 
 Thanks,
 /tvb
 
 
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Re: [time-nuts] An embedded NTP server

2013-01-02 Thread David J Taylor

From: James Harrison
[]
This is exactly what I've done using the Raspberry Pi (Broadcom ARM
SOC running Linux) and a GPS module with the PPS kernel hook for Linux
GPIO. Still a beginner/aspiring time-nut so I'm not sure on accuracy
(PLL offset jitter suggests ~5-10ms worst-case but I've not looked
much into measuring it yet), but it's an improvement on internet NTP
at least.

(Brief writeup here:
http://www.talkunafraid.co.uk/2012/12/the-ntpi-accurate-time-with-a-raspberry-pi-and-venus638flpx/
- - be gentle, it's my first 'real' timing project!)

James


James,

You might be interested in my write-up:

 http://www.satsignal.eu/ntp/Raspberry-Pi-NTP.html

and its performance:

 http://www.satsignal.eu/mrtg/performance_ntp.php

I was playing with RasPi-1 today to see whether a different (navigation) GPS 
receiver or system configuration would make any difference to the 
oscillatory nature of the offset, hence the big step around 11:00 when the 
card was restarted after an hour's power down.  RasPi-2 with a timing GPS 
receiver looks better, and it should have an identical configuration to 
RasPi-1 (except that the USB port is being sent data).


Cheers,
David
--
SatSignal Software - Quality software written to your requirements
Web: http://www.satsignal.eu
Email: david-tay...@blueyonder.co.uk 



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[time-nuts] Set up for short term stability tests on HP 5065A

2013-01-02 Thread cdelect
Tom,

My setup consists of:

NBS 106B DMTD unit that I have upgraded a bit
A selected FTS 1200 as an offset oscillator
Berts mini counter RS232 interfaced to a laptop
for the 1 sec taus without the * the reference is  a cherry picked
10811
for the others as well as the higher taus the reference is the EFOS2
Active Hydrogen Maser
+ the odd cables attenuators etc.

I think that's about it!

Corby

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Re: [time-nuts] 10 MHz - 16 MHz clock multiplier

2013-01-02 Thread kevin-usenet
 What's the simplest way to generate 16 MHz from 10 MHz?

Well, it's a few dollars and *is* a TSSOP, but I've been playing with
TI's CDCE913/925/937/949 series.  They're nice little I2C-programmable
fractional-N PLL chips.

You can either program them in software, or save the config to on-board
flash and pin-select various configs.

They also have onboard varactors and EFC inputs for making a VCXO.

The on-board VCXO range is 80 to 230 MHz, so I'd multiply the 10 MHz
up to 160 MHz and then divide by 10.

I like to throw one in a circuit and know that I can generate whatever
clocks I need in software.  They're also pin-compatible, so if you lay
down a pad for a part larger than needed, you have spare outputs in case
you need them for something.  (The second digit in the P/N is the number
of PLLs; the third is the number of outputs.)

The main limitation is that there's no way to produce a desired phase
relationship between different divisors for e.g. a half-speed clock.


Looking for something cheaper, I can see SiLabs' Si51210 factory-
programmable part, which is cheaper in quantity, but I don't know
the minimum order quantities.


It depends what you mean by simplest; the injection-locking idea is
definitely the simplest circuit, but it does require some up-front work
to find coupling capacitor values that work reliably over tolerance.

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Re: [time-nuts] An embedded NTP server

2013-01-02 Thread James Harrison
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1


On 02/01/2013 20:05, David J Taylor wrote:
 James,
 
 You might be interested in my write-up:
 
 http://www.satsignal.eu/ntp/Raspberry-Pi-NTP.html
 
 and its performance:
 
 http://www.satsignal.eu/mrtg/performance_ntp.php
 
 I was playing with RasPi-1 today to see whether a different
 (navigation) GPS receiver or system configuration would make any
 difference to the oscillatory nature of the offset, hence the big
 step around 11:00 when the card was restarted after an hour's power
 down.  RasPi-2 with a timing GPS receiver looks better, and it
 should have an identical configuration to RasPi-1 (except that the
 USB port is being sent data).
 
 Cheers, David

Interesting stuff indeed - the timing receiver certainly looks much
more stable, which is to be expected.

I'm not seeing quite as much stability on my Pi/setup -
http://i.imgur.com/6L8ur.png is the munin-measured kernel offset for
the last day. I've only been running it for a few days but I'd have
thought the clock loop should've stabilized a bit more than it has at
present. Could be that this particular GPS receiver isn't managing
very well at all to give particularly precise PPS pulses, which is
possible given it's a navigational receiver. The datasheet specifies a
60nsec accuracy but it's unclear if that relates to the 1PPS output.

Once this one's been running for a few more days I should have some
more interesting graphs; I'm getting one of my home boxes set up with
Graphite so I can push more detailed statistics and information to
that from the RPi about NTP etc and get a better feel for what's going on.

Cheers,
James
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Re: [time-nuts] 10 MHz - 16 MHz clock multiplier

2013-01-02 Thread Gerhard Hoffmann

Am 02.01.2013 19:54, schrieb Tom Van Baak:

What's the simplest way to generate 16 MHz from 10 MHz? This will be for 
clocking a microcontroller at 16 MHz given 10 MHz (Cs/Rb/GPSDO). Low price and 
low parts count is a goal; jitter is not a concern but absolute long-term phase 
coherence is a must.



Probably not the simplest way, but straightforward  maybe you can 
recycle parts of it:



http://www.hoffmann-hochfrequenz.de/downloads/vnwa_sync_1.1.pdf

http://www.hoffmann-hochfrequenz.de/downloads/vnwa_sync_1.1_layout.png


That's how I did (optional) 10 MHz  --- 32 MHz for my DG8SAQ VNWA.
parts are cheap  available  @ digikey.


regards, Gerhard

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Re: [time-nuts] 10 MHz - 16 MHz clock multiplier

2013-01-02 Thread paul swed
I looked at the TI chip that really seems simple.

On Wed, Jan 2, 2013 at 3:58 PM, Gerhard Hoffmann dk...@arcor.de wrote:

 Am 02.01.2013 19:54, schrieb Tom Van Baak:

 What's the simplest way to generate 16 MHz from 10 MHz? This will be for
 clocking a microcontroller at 16 MHz given 10 MHz (Cs/Rb/GPSDO). Low price
 and low parts count is a goal; jitter is not a concern but absolute
 long-term phase coherence is a must.


 Probably not the simplest way, but straightforward  maybe you can recycle
 parts of it:


 http://www.hoffmann-**hochfrequenz.de/downloads/**vnwa_sync_1.1.pdfhttp://www.hoffmann-hochfrequenz.de/downloads/vnwa_sync_1.1.pdf

 http://www.hoffmann-**hochfrequenz.de/downloads/**vnwa_sync_1.1_layout.pnghttp://www.hoffmann-hochfrequenz.de/downloads/vnwa_sync_1.1_layout.png


 That's how I did (optional) 10 MHz  --- 32 MHz for my DG8SAQ VNWA.
 parts are cheap  available  @ digikey.


 regards, Gerhard


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Re: [time-nuts] 10 MHz - 16 MHz clock multiplier

2013-01-02 Thread kevin-usenet
I wrote:
 The on-board VCXO range is 80 to 230 MHz, so I'd multiply the 10 MHz
 up to 160 MHz and then divide by 10.

In case it's not obvious, I meant to write the on-chip VCO.
Obviously it's *not* a crystal oscillator; I just failed to
supervise my typing fingers carefully enough.

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[time-nuts] Undocumented FE5680A commands, and a python script

2013-01-02 Thread Fabio Eboli

Hello,
I've read about undocumented FE5680A commands
(On excellent Didier' FE5680 FAQ page).

This python script is a collection of the
functions I'm using to connect to FE5680:
http://pastebin.com/VpZVuw0t
And I will add to it more functions based
on these new fields.

I'd like to know if anybody have worked out
more details about these commands.

Thanks,
Fabio.

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Re: [time-nuts] An embedded NTP server

2013-01-02 Thread Jim Lux

On 1/2/13 11:37 AM, Poul-Henning Kamp wrote:


Actually, the OS is not important, floating point support is.




floating point support in the sense that the compiler supports it and 
generates appropriate code to use software FP or hardware FP as available?


Or you need HW floating point for performance.
(after all, I ran floating point FORTRAN code on a 4 MHz Z80 with 48k 
back in the late 70s... not speedy, but it works)


We just went through an exercise to enable the use of HW FP on our SPARC 
processors for flight use.  The original gcc tool chain  RTEMS setup 
used software FP, even though the hardware has an FPU.  But to implement 
the GPS receiver, we needed HW FP, so we had to work through all those 
issues.  I don't recall precisely what the issues were (probably 
something about saving/restoring FPU registers or, at least, not 
tampering with their contents through an interrupt or library call).


The problem wasn't that GCC couldn't generate the right object code, it 
was something more high level than that.









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Re: [time-nuts] 10 MHz - 16 MHz clock multiplier

2013-01-02 Thread Bruce Griffiths
The optimum width of the injection pulse is equal to 1/2 the period of 
the output frequency of the injection locked oscillator.

In this case a pulse width of around 31.25ns

Bruce

paul swed wrote:

Bruce is right about that fact. Thanks.
Square up the 10 Mhz. Diff the leading edge (It actually doesn't matter)
maybe 2-5pf cap and 300 ohm R to ground. Feed this into a transistor that
is in the bottom end of a one transistor oscillator. There are actually
several ways to inject. Think of a totem pole of 2 transistors.
Use google and do a search and you will see what I am  talking about. There
were some articles that the spread spectrum hams used that describe it.

On Wed, Jan 2, 2013 at 2:48 PM, Bruce Griffiths
bruce.griffi...@xtra.co.nzwrote:

   

Since injection locking is possible when the ratio of the 2 frequencies
involved is a rational number, a 16 MHz oscillator can be directly
injection locked to a 10MHz signal without the need for dividers etc.

Bruce


paul swed wrote:

 

Tom.
OK the challenge simple. CD4046 16 MHz vco and div by 8 using a 2 Mhz ref.
Thats pretty easy as they say.
As an alternative and very easy 10 MHz div 2 2MHz X 4 X 2. This requires
BPF but pretty easy also.
Lastly an injection osc. 10 Mhz div to 2 Mhz differentiate and feed to a
16
Mhz osc.
Thats actually the easiest of the approaches.
Regards
Paul


On Wed, Jan 2, 2013 at 1:54 PM, Tom Van Baakt...@leapsecond.com   wrote:



   

What's the simplest way to generate 16 MHz from 10 MHz? This will be for
clocking a microcontroller at 16 MHz given 10 MHz (Cs/Rb/GPSDO). Low
price
and low parts count is a goal; jitter is not a concern but absolute
long-term phase coherence is a must.

The ICS525 (as in TAPR Clock-Block) is a good candidate but I was
wondering if there's something cheaper, less functional, and maybe not
SSOP. Any suggestions?

Thanks,
/tvb


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Re: [time-nuts] An embedded NTP server

2013-01-02 Thread Joseph Gray
On Wed, Jan 2, 2013 at 12:37 PM, Poul-Henning Kamp p...@phk.freebsd.dk wrote:
 
 Actually, the OS is not important, floating point support is.

That is one reason that the recent crop of inexpensive ARM Cortex M4
experimenter boards is quite interesting. I picked up two of the TI
Stellaris Launchpads on preorder for $5 each and also snagged a free
STM32F3 board (both are Cortex M4). I haven't gotten to them yet, but
I have projects in mind (always too many projects and not enough
time).

I just finished reading a book that described the STM Cortex line in
detail. All I can say is wow. What you get for the money is quite
impressive.

Joe Gray
W5JG

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Re: [time-nuts] An embedded NTP server

2013-01-02 Thread Bob Camp
Hi

That's the point I've been trying to make for about a month now. At some point, 
for a hobby project, the cost of the CPU becomes irrelevant. In my book, once 
the CPU goes below the price of lunch at McDonalds, it really doesn't matter 
much.

Bob

On Jan 2, 2013, at 7:36 PM, Joseph Gray jg...@zianet.com wrote:

 On Wed, Jan 2, 2013 at 12:37 PM, Poul-Henning Kamp p...@phk.freebsd.dk 
 wrote:
 
 Actually, the OS is not important, floating point support is.
 
 That is one reason that the recent crop of inexpensive ARM Cortex M4
 experimenter boards is quite interesting. I picked up two of the TI
 Stellaris Launchpads on preorder for $5 each and also snagged a free
 STM32F3 board (both are Cortex M4). I haven't gotten to them yet, but
 I have projects in mind (always too many projects and not enough
 time).
 
 I just finished reading a book that described the STM Cortex line in
 detail. All I can say is wow. What you get for the money is quite
 impressive.
 
 Joe Gray
 W5JG
 
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Re: [time-nuts] An embedded NTP server

2013-01-02 Thread Jim Lux

On 1/2/13 4:46 PM, Bob Camp wrote:

Hi

That's the point I've been trying to make for about a month now. At some point, 
for a hobby project, the cost of the CPU becomes irrelevant. In my book, once 
the CPU goes below the price of lunch at McDonalds, it really doesn't matter 
much.




yes.. it's all about ease of interfacing and ease of programming. 
(unless you're making hundreds or 1000s of them)


This is why Arduino is so popular.. dead simple for a lot of hackery 
kinds of things.  The first steps on the learning stairway are pretty 
darn low (to the point that *artists* use them grin.. what is the 
world of computers coming to?)





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Re: [time-nuts] An embedded NTP server

2013-01-02 Thread Bob Camp
Hi

Arduino's original popularity was based on low cost. These days you can get a 
*lot* more for your money.

Bob

On Jan 2, 2013, at 8:07 PM, Jim Lux jim...@earthlink.net wrote:

 On 1/2/13 4:46 PM, Bob Camp wrote:
 Hi
 
 That's the point I've been trying to make for about a month now. At some 
 point, for a hobby project, the cost of the CPU becomes irrelevant. In my 
 book, once the CPU goes below the price of lunch at McDonalds, it really 
 doesn't matter much.
 
 
 
 yes.. it's all about ease of interfacing and ease of programming. (unless 
 you're making hundreds or 1000s of them)
 
 This is why Arduino is so popular.. dead simple for a lot of hackery kinds of 
 things.  The first steps on the learning stairway are pretty darn low (to 
 the point that *artists* use them grin.. what is the world of computers 
 coming to?)
 
 
 
 
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Re: [time-nuts] 10 MHz - 16 MHz clock multiplier

2013-01-02 Thread Didier Juges
Tom,

This may not be the answer you are looking for, but the simplest way may be
to use a uC that has a PLL for clock generation.

Didier


On Wed, Jan 2, 2013 at 12:54 PM, Tom Van Baak t...@leapsecond.com wrote:

 What's the simplest way to generate 16 MHz from 10 MHz? This will be for
 clocking a microcontroller at 16 MHz given 10 MHz (Cs/Rb/GPSDO). Low price
 and low parts count is a goal; jitter is not a concern but absolute
 long-term phase coherence is a must.

 The ICS525 (as in TAPR Clock-Block) is a good candidate but I was
 wondering if there's something cheaper, less functional, and maybe not
 SSOP. Any suggestions?

 Thanks,
 /tvb


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Re: [time-nuts] An embedded NTP server

2013-01-02 Thread Tom Harris
+1 for Forth!

+1 for your opinions on PICs  AVRs. We can buy low end NXP ARM Cortex M0
chips (e.g. LPC1113) for less than the PIC18 we were using before, and it
has a real compiler and (unlike the real world) evidence of intelligent
design!

Do you really need an OS? Surely for a box that is only ever going to be an
NTP server you just need a network interface and good maths? I've just seen
a later comment where you mention floating point support, but would 64 bit
integer maths work just as well?

On 3 January 2013 06:25, Chris Albertson albertson.ch...@gmail.com wrote:

 On Wed, Jan 2, 2013 at 11:16 AM, Poul-Henning Kamp p...@phk.freebsd.dk
 wrote:

  I've given up on PIC and Atmel microcontrollers and their antiquated
  CPU designs.
 
  My life is too short to fight odd-ball compilers, when I can get a
  real 32 bit CPU and a good compiler instead.

 That is a valid point if you are building a one-off project.  Your
 time is worth something.  But if you plan to sell a million AA cell
 battery chargers using a 32-bit controller is uneconomical.   These
 will always be a bigger market for 8-bit chips then for 32-bit chips.

 For an NTP server I'd go with something that can run an OS and the NTP
 reverence implementation.  ARM (and others) can do that.

 --

 Chris Albertson
 Redondo Beach, California

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-- 

Tom Harris celephi...@gmail.com
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Re: [time-nuts] An embedded NTP server

2013-01-02 Thread Jim Lux

On 1/2/13 5:34 PM, Tom Harris wrote:

+1 for Forth!

+1 for your opinions on PICs  AVRs. We can buy low end NXP ARM Cortex M0
chips (e.g. LPC1113) for less than the PIC18 we were using before, and it
has a real compiler and (unlike the real world) evidence of intelligent
design!

Do you really need an OS? Surely for a box that is only ever going to be an
NTP server you just need a network interface and good maths? I've just seen
a later comment where you mention floating point support, but would 64 bit
integer maths work just as well?



Well, one might not need a full-up multitasking OS, but I'd sure like to 
have a high level interface to the network (say BSD sockets or something 
like that).  And most OSes (or OS-like infrastructure) also gives you 
some handy stuff like timers, threads, queues, etc.


If you are doing something that is TRULY single function, the one big 
loop scheme can work, particularly if you've got a lot of nice 
libraries to do stuff like string handling/parsing/device interaction.


I think the dividing line might be where you are trying to do more than 
one thing with different time scales. It would be straightforward to do 
something like multiple PID loops with a common sample/update rate (like 
a lot of PLC industrial controllers do), but as soon as you start 
running things at different rates (check the Ethernet, check the serial 
port, update the loop, etc.)  having an OS to do the book-keeping is 
pretty nice.





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Re: [time-nuts] An embedded NTP server

2013-01-02 Thread Michael Tharp

On 01/02/2013 08:34 PM, Tom Harris wrote:

Do you really need an OS? Surely for a box that is only ever going to be an
NTP server you just need a network interface and good maths? I've just seen
a later comment where you mention floating point support, but would 64 bit
integer maths work just as well?


You certainly do not need an OS. For this project I am using a RTOS 
called ChibiOS that provides a threading interface and handles the 
tedium of flinging packets as well as timers, serial, etc. but it's not 
an OS in the same sense as Linux is and I'm still interacting directly 
with the critical peripherals.


Since the PPS measurements are being done in dedicated hardware and the 
Ethernet interface is a hard-wired MAC and not USB, it performs quite a 
bit better than something with the overhead of a managed OS. Raspberry 
Pi and some other Linux-ready boards I've seen also use Ethernet 
interfaces built into the USB host, not quite sure why that's more 
cost-effective but it's sure to result in much poorer jitter versus a 
direct MAC.


I'm using a F1 part which does not have a FPU, so all the math is 64bit 
integers. Soft floats are also an option, and for even the fanciest 
GPSDO there's not nearly enough number crunching going on to make a FPU 
absolutely necessary.


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Re: [time-nuts] clock-block any need ?

2013-01-02 Thread Magnus Danielson

On 02/01/13 02:57, Dennis Ferguson wrote:


On 27 Dec, 2012, at 15:13 , Magnus Danielsonmag...@rubidium.dyndns.org  wrote:

On GE, a full-length packet is about 12 us, so a single packets head-of-line 
blocking can be anything up to that amount, multiple packets... well, it keeps 
adding. Knowing how switches works doesn't really help as packets arrive in a 
myriad of rates, they interact and cross-modulate and create strange patterns 
and dance in interesting ways that is ever changing in unpredictable fashion.


I wanted to address this bit because it seems like most
people base their expectations for NTP on this complexity,
as does the argument being made above, but the holiday
intervened.  While I suspect many people are thoroughly
bored of this topic by now I can't resist completing the
thought.


Be advised that it was the short description of a much lengthier discussion.


Yes, the delay of a sample packet through an output queue
will be proportional to the number of untransmitted bits in
the queue ahead of it, yes, the magnitude of that delay can
be very large and largely variable and, even, yes, the
statistics governing that delay may often be unpredictable and
non-gaussian, exhibiting dangerously heavy tails.  The thing is,
though, that this doesn't necessarily have to matter so much.  A
better approach might avoid relying on the things you can't know.


Hard to avoid fundamental properties of transmission, at least when they 
have been made fundamental properties.


Recall that the queue length is quantized in steps, and that various 
padding (preamble-sequence, header, trailer, postamble-sequence) 
occurs. 8-bit quantization is safe to assume as minimum step for GE, due 
to its 8B10B encoding format on the optical channel. For optical GE, 
event resolution is therefore 8 ns.



To see how, consider a different question: what is the
probability that any two samples sent through that queue
will experience precisely the same delay (i.e. find precisely
the same number of bits queued in front of it when it
gets there)?  I think it is fairly conservative to predict
that the probability that two samples will arrive at a non-empty
output queue with exactly the same number of bits in front of
them will be fairly small; the number of bits in the queue will
be continuously changing, so the delay through a non-empty queue
should have a near-continuous (and unpredictable) probability
distribution, as you point out, and if the sampling is uncorrelated
with the competing traffic it is unlikely that any pair of
samples will find exactly the same point on that distribution.


Yes and no. It is hard to do with a low asking rate, but some properties 
can improve with a high asking rate.



The exception to this, of course, is a queue length of
precisely 0 bits (which is precisely why the behaviour
of a switch with no competing traffic is interesting).  The
vast majority of queues in the vast majority of network
devices in real networks are no where near continuously
occupied for long periods.  The time-averaged fractional load
on the circuit a queue is feeding is also the probability of
finding the queue not-empty.  If the average load on the
output circuit is less than 100% then multiple samples are
probably going to find that queue precisely empty; if the
average load on the output circuit is 50% (and that would be
an unusually high number in a LAN, though maybe less
unusual in other contexts) then 50% of the samples that pass
through that queue are going to find it empty.  Since samples
that found the queue empty will have experienced pretty much
identical delays, the results (for some value of result)
from those samples will cluster closely together.  The
results from samples which experienced a delay will
differ from that cluster but, as discussed above, will also
differ from each other and generally won't form a cluster
somewhere else.  The cluster marks the good spot independent
of the precise (and precisely unknowable) nature of the statistics
governing the distribution of samples outside the cluster.  If
we can find the cluster we have a result which does not depend
on understanding the precise behaviour of samples outside the
cluster.


Whenever you want to do this, you need to measure the network more 
furiously, those the asking rate goes up.



Given this it is also worth while to consider jitter, which
intuition based on a normal distribution assumption might suggest
should be predictive of the quality of the result derived from a
collection of samples.  In the situation above, however, the
dominant contributors to jitter, however measured, are going
to be the samples outside the cluster since they are the ones
that are jittering (it is that property we are relying on to
define the cluster).  If jitter mostly measures information
about the samples the estimate doesn't rely on then it tells you
little about the samples the estimate does rely on, and hence
can provide no prediction about the quality 

Re: [time-nuts] An embedded NTP server

2013-01-02 Thread Magnus Danielson

On 03/01/13 03:26, Jim Lux wrote:

On 1/2/13 5:34 PM, Tom Harris wrote:

+1 for Forth!

+1 for your opinions on PICs  AVRs. We can buy low end NXP ARM Cortex M0
chips (e.g. LPC1113) for less than the PIC18 we were using before, and it
has a real compiler and (unlike the real world) evidence of intelligent
design!

Do you really need an OS? Surely for a box that is only ever going to
be an
NTP server you just need a network interface and good maths? I've just
seen
a later comment where you mention floating point support, but would 64
bit
integer maths work just as well?



Well, one might not need a full-up multitasking OS, but I'd sure like to
have a high level interface to the network (say BSD sockets or something
like that). And most OSes (or OS-like infrastructure) also gives you
some handy stuff like timers, threads, queues, etc.

If you are doing something that is TRULY single function, the one big
loop scheme can work, particularly if you've got a lot of nice
libraries to do stuff like string handling/parsing/device interaction.


It fails quite quickly if you have not though through the real time 
execution needs. Essentially, what execute when, triggered by what, with 
what data and how late can it be, and what else needs to be done?


Real time properties does not need to be resolved by a real-time 
operating system, but it needs to be resolved by doing the real time 
analysis, and then attempting to find stable solutions. Bare-bone 
processors can work just as well, but things like HW-drivers, lack of 
network support etc. can be trouble-some.



I think the dividing line might be where you are trying to do more than
one thing with different time scales. It would be straightforward to do
something like multiple PID loops with a common sample/update rate (like
a lot of PLC industrial controllers do), but as soon as you start
running things at different rates (check the Ethernet, check the serial
port, update the loop, etc.) having an OS to do the book-keeping is
pretty nice.


If it gives the needed infrastructure. It can just as well keep the 
confusion high enough that the issues becomes fuzzidized enough for you 
not to see them clearly.


Also, do not underestimate what a little HW/FW-support can do to relax 
requirements significantly, or for that matter seemingly trivial OS 
support features. HW/FW timestamping is one. Good quality timer support 
another.


Just grabbing an RTOS and believing that it will solve all problems will 
not work. I've seen it fail miserably. I all to often see people 
expecting a few lines of code to solve bad system design, so do the 
system design and figure out your needs, then figure out what hardware 
and software platforms support those needs the best. You end up with a 
few alternatives and then iterate a good solution. It's always in the 
nitty gritty details, so few wide assumptions work very well.


Cheers,
Magnus

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Re: [time-nuts] An embedded NTP server

2013-01-02 Thread Don Latham
how about a Propeller? 8 cpu's no waiting :-)
Don

Magnus Danielson
 On 03/01/13 03:26, Jim Lux wrote:
 On 1/2/13 5:34 PM, Tom Harris wrote:
 +1 for Forth!

 +1 for your opinions on PICs  AVRs. We can buy low end NXP ARM
 Cortex M0
 chips (e.g. LPC1113) for less than the PIC18 we were using before,
 and it
 has a real compiler and (unlike the real world) evidence of
 intelligent
 design!

 Do you really need an OS? Surely for a box that is only ever going to
 be an
 NTP server you just need a network interface and good maths? I've
 just
 seen
 a later comment where you mention floating point support, but would
 64
 bit
 integer maths work just as well?


 Well, one might not need a full-up multitasking OS, but I'd sure like
 to
 have a high level interface to the network (say BSD sockets or
 something
 like that). And most OSes (or OS-like infrastructure) also gives you
 some handy stuff like timers, threads, queues, etc.

 If you are doing something that is TRULY single function, the one big
 loop scheme can work, particularly if you've got a lot of nice
 libraries to do stuff like string handling/parsing/device interaction.

 It fails quite quickly if you have not though through the real time
 execution needs. Essentially, what execute when, triggered by what, with
 what data and how late can it be, and what else needs to be done?

 Real time properties does not need to be resolved by a real-time
 operating system, but it needs to be resolved by doing the real time
 analysis, and then attempting to find stable solutions. Bare-bone
 processors can work just as well, but things like HW-drivers, lack of
 network support etc. can be trouble-some.

 I think the dividing line might be where you are trying to do more
 than
 one thing with different time scales. It would be straightforward to
 do
 something like multiple PID loops with a common sample/update rate
 (like
 a lot of PLC industrial controllers do), but as soon as you start
 running things at different rates (check the Ethernet, check the
 serial
 port, update the loop, etc.) having an OS to do the book-keeping is
 pretty nice.

 If it gives the needed infrastructure. It can just as well keep the
 confusion high enough that the issues becomes fuzzidized enough for you
 not to see them clearly.

 Also, do not underestimate what a little HW/FW-support can do to relax
 requirements significantly, or for that matter seemingly trivial OS
 support features. HW/FW timestamping is one. Good quality timer support
 another.

 Just grabbing an RTOS and believing that it will solve all problems will
 not work. I've seen it fail miserably. I all to often see people
 expecting a few lines of code to solve bad system design, so do the
 system design and figure out your needs, then figure out what hardware
 and software platforms support those needs the best. You end up with a
 few alternatives and then iterate a good solution. It's always in the
 nitty gritty details, so few wide assumptions work very well.

 Cheers,
 Magnus

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Neither the voice of authority nor the weight of reason and argument
are as significant as experiment, for thence comes quiet to the mind.
De Erroribus Medicorum, R. Bacon, 13th century.
If you don't know what it is, don't poke it.
Ghost in the Shell


Dr. Don Latham AJ7LL
Six Mile Systems LLP
17850 Six Mile Road
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VOX 406-626-4304
www.lightningforensics.com
www.sixmilesystems.com



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Re: [time-nuts] 10 MHz - 16 MHz clock multiplier

2013-01-02 Thread johncroos

 Interesting problem


Re: 10 MHz - 16 MHz clock multiplier

 What is low cost?? Serious question.
john k6iql

 

 

-Original Message-
From: time-nuts-request time-nuts-requ...@febo.com
To: time-nuts time-nuts@febo.com
Sent: Wed, Jan 2, 2013 9:19 pm
Subject: time-nuts Digest, Vol 102, Issue 10


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Today's Topics:

   1. Re: 10 MHz - 16 MHz clock multiplier (Didier Juges)
   2. Re: An embedded NTP server (Tom Harris)
   3. Re: An embedded NTP server (Jim Lux)
   4. Re: An embedded NTP server (Michael Tharp)
   5. Re: clock-block any need ? (Magnus Danielson)


--

Message: 1
Date: Wed, 2 Jan 2013 19:31:52 -0600
From: Didier Juges shali...@gmail.com
To: Tom Van Baak t...@leapsecond.com, Discussion of precise time and
frequency measurement time-nuts@febo.com
Subject: Re: [time-nuts] 10 MHz - 16 MHz clock multiplier
Message-ID:
CAMQqFu=ghst14ygddgw8pvjrnmnryyfne13g06p+qrmv48a...@mail.gmail.com
Content-Type: text/plain; charset=ISO-8859-1

Tom,

This may not be the answer you are looking for, but the simplest way may be
to use a uC that has a PLL for clock generation.

Didier


On Wed, Jan 2, 2013 at 12:54 PM, Tom Van Baak t...@leapsecond.com wrote:

 What's the simplest way to generate 16 MHz from 10 MHz? This will be for
 clocking a microcontroller at 16 MHz given 10 MHz (Cs/Rb/GPSDO). Low price
 and low parts count is a goal; jitter is not a concern but absolute
 long-term phase coherence is a must.

 The ICS525 (as in TAPR Clock-Block) is a good candidate but I was
 wondering if there's something cheaper, less functional, and maybe not
 SSOP. Any suggestions?

 Thanks,
 /tvb


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Message: 2
Date: Thu, 3 Jan 2013 12:34:15 +1100
From: Tom Harris celephi...@gmail.com
To: Discussion of precise time and frequency measurement
time-nuts@febo.com
Subject: Re: [time-nuts] An embedded NTP server
Message-ID:
cahjg12qxpb9px8dp6ngk-x575etnsfc+csqr6acsrx7gfw-...@mail.gmail.com
Content-Type: text/plain; charset=ISO-8859-1

+1 for Forth!

+1 for your opinions on PICs  AVRs. We can buy low end NXP ARM Cortex M0
chips (e.g. LPC1113) for less than the PIC18 we were using before, and it
has a real compiler and (unlike the real world) evidence of intelligent
design!

Do you really need an OS? Surely for a box that is only ever going to be an
NTP server you just need a network interface and good maths? I've just seen
a later comment where you mention floating point support, but would 64 bit
integer maths work just as well?

On 3 January 2013 06:25, Chris Albertson albertson.ch...@gmail.com wrote:

 On Wed, Jan 2, 2013 at 11:16 AM, Poul-Henning Kamp p...@phk.freebsd.dk
 wrote:

  I've given up on PIC and Atmel microcontrollers and their antiquated
  CPU designs.
 
  My life is too short to fight odd-ball compilers, when I can get a
  real 32 bit CPU and a good compiler instead.

 That is a valid point if you are building a one-off project.  Your
 time is worth something.  But if you plan to sell a million AA cell
 battery chargers using a 32-bit controller is uneconomical.   These
 will always be a bigger market for 8-bit chips then for 32-bit chips.

 For an NTP server I'd go with something that can run an OS and the NTP
 reverence implementation.  ARM (and others) can do that.

 --

 Chris Albertson
 Redondo Beach, California

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Tom Harris celephi...@gmail.com


--

Message: 3
Date: Wed, 02 Jan 2013 18:26:24 -0800
From: Jim Lux jim...@earthlink.net
To: time-nuts@febo.com
Subject: Re: [time-nuts] An embedded NTP server
Message-ID: 50e4ec50.1030...@earthlink.net
Content-Type: text/plain; charset=ISO-8859-1; format=flowed

On 1/2/13 5:34 PM, Tom Harris wrote:
 +1 for Forth!

 +1 for your opinions on PICs  AVRs. We can buy low end NXP ARM Cortex M0
 chips (e.g. LPC1113) for less than the PIC18 we were using before, and it
 has a real compiler and (unlike the real world) evidence of intelligent
 design!

 Do you really need an OS? Surely for a box that is only ever 

Re: [time-nuts] 10 MHz - 16 MHz clock multiplier

2013-01-02 Thread Said Jackson
How about simply using a 16MHz GPSDO?

We have shipped FireFly-1A units with 16MHz Ocxo..

Those can also generate 16MHz out of a 1PPS reference.

Bye,
Said

Sent From iPhone

On Jan 2, 2013, at 12:58, Gerhard Hoffmann dk...@arcor.de wrote:

 Am 02.01.2013 19:54, schrieb Tom Van Baak:
 What's the simplest way to generate 16 MHz from 10 MHz? This will be for 
 clocking a microcontroller at 16 MHz given 10 MHz (Cs/Rb/GPSDO). Low price 
 and low parts count is a goal; jitter is not a concern but absolute 
 long-term phase coherence is a must.
 
 
 Probably not the simplest way, but straightforward  maybe you can recycle 
 parts of it:
 
 
 http://www.hoffmann-hochfrequenz.de/downloads/vnwa_sync_1.1.pdf
 
 http://www.hoffmann-hochfrequenz.de/downloads/vnwa_sync_1.1_layout.png
 
 
 That's how I did (optional) 10 MHz  --- 32 MHz for my DG8SAQ VNWA.
 parts are cheap  available  @ digikey.
 
 
 regards, Gerhard
 
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Re: [time-nuts] 10 MHz - 16 MHz clock multiplier

2013-01-02 Thread WarrenS

Tom

For simple, cheap, low performance and fast to build with junk box parts, 
hard to beat:

What I made long ago for myself (before time-nut days).
I still use it today for low end stuff, and it is all done with standard 
74HC DIP parts.

The main IC is a 74HCT4046 Phase lock loop with internal Osc.
The internal osc output is divided by 16  using a 74HC93. The 10MHz ref is 
divide by 10 using a 74HC90
The two 1 MHz signals are feed into it's phase comparator. A couple of 
resistors and caps and I have a low tech 16 / 8 / 4 / 2 / 1  MHz tracking 
ref.
With a couple of tweaks, I got the noise jitter down to a couple of ns as 
measured with a scope.
16 MHz is pushing the limits of the internal Osc, but I did not have any 
trouble getting there using less than the recommended osc cap.


ws



What's the simplest way to generate 16 MHz from 10 MHz? This will be for 
clocking a microcontroller at 16 MHz given 10 MHz (Cs/Rb/GPSDO).
Low price and low parts count is a goal; jitter is not a concern but 
absolute long-term phase coherence is a must.


The ICS525 (as in TAPR Clock-Block) is a good candidate but I was wondering 
if there's something cheaper, less functional, and maybe not SSOP. Any 
suggestions?


Thanks,
/tvb 



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Re: [time-nuts] 10 MHz - 16 MHz clock multiplier

2013-01-02 Thread Magnus Danielson

On 02/01/13 19:54, Tom Van Baak wrote:

What's the simplest way to generate 16 MHz from 10 MHz? This will be for 
clocking a microcontroller at 16 MHz given 10 MHz (Cs/Rb/GPSDO). Low price and 
low parts count is a goal; jitter is not a concern but absolute long-term phase 
coherence is a must.

The ICS525 (as in TAPR Clock-Block) is a good candidate but I was wondering if 
there's something cheaper, less functional, and maybe not SSOP. Any suggestions?


One approach is to divide by 5 to get 2 MHz, but recalling that the 20% 
PWM factor (top bit of divide by 5 counter) has a strong 8th overtone 
compared to the 40% PWM factor, an LC-tank at 16 MHz and a simple 
gain-stage (such as the Wenzel sine input) should be able to pull it 
off. The divide by 5 is standard TTL/CMOS of your choosing.


Cheers,
Magnus

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Re: [time-nuts] An embedded NTP server

2013-01-02 Thread Chris Albertson
Not only SSH access, loggin g things like DNS lookup and rading the
ntp.comf file from local (flash?) memory.  And then without an OS
you'd have to implement sceduling and process creation yourself.  How
else to accept SSH log ins, talk to multiple NT clients and yu
reference clocks and write to the log server all at the same time?

The trouble is that if you decide to go with an OS all of this becomes
easy because it is already available for ARM and any other platforms
the OS runs on.

On Wed, Jan 2, 2013 at 10:44 PM, David J Taylor
david-tay...@blueyonder.co.uk wrote:
 From: Tom Harris


 +1 for Forth!

 +1 for your opinions on PICs  AVRs. We can buy low end NXP ARM Cortex M0
 chips (e.g. LPC1113) for less than the PIC18 we were using before, and it
 has a real compiler and (unlike the real world) evidence of intelligent
 design!

 Do you really need an OS? Surely for a box that is only ever going to be an
 NTP server you just need a network interface and good maths? I've just seen
 a later comment where you mention floating point support, but would 64 bit
 integer maths work just as well?
 ==


 Having an OS makes access to things like SNMP for monitoring, SSL for
 control, and Samba for log extraction and management easier.


 Cheers,
 David
 --
 SatSignal Software - Quality software written to your requirements
 Web: http://www.satsignal.eu
 Email: david-tay...@blueyonder.co.uk

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-- 

Chris Albertson
Redondo Beach, California

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