[time-nuts] FE-5680A internal signal waveforms (60, 30, 10 MHz)

2011-12-12 Thread beale
I have two of the FE-5680A (FEI P/N 217400-30352-1) Rb references, and I'm 
looking at the signals on digital side of the PCB inside, in particular the 
Xilinx CPLD, that is the XC9572XL in a 64-pin package.  Here is a photo with 
the signals marked:
https://picasaweb.google.com/109928236040342205185/FE5680A#5685304134718133138

pin 64 has a nice looking 60.00 MHz sine wave, I gather this is the input 
signal to the CPLD.
pin 22 has a 30 MHz square wave, although it has some ripples (see scope trace 
in same Picasa album)
pin 49 has a 10 MHz square wave but with a very odd shape. 

Pin 49 is the signal which is LC filtered (?) to become the 10 MHz sine wave 
out on the internal J8 mini-connector, and the external DB9.  The signal is 
about 3.3 Vpp, but becomes an 11 Vpp sine wave at the far side of a blue part 
(inductor?) marked 2R2J.

The 10 MHz sine out on my unit has some noticeable amplitude noise, at least a 
few %. Since I'm only using the signal as a digital clock, I prefer a square 
wave, assuming the fast edge will give me lower jitter. A 200 MHz Rigol scope 
reads a risetime of 2 ns on CPLD pin 49, but the waveform looks so noisy and 
odd (see below), maybe I would be better off just squaring up the output sine.  
...maybe if pin 49 was disconnected from the sine output filter, it would be 
more square (?)

https://picasaweb.google.com/109928236040342205185/FE5680A#5685304143859526258

-John Beale

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Re: [time-nuts] FE-5680A internal signal waveforms (60, 30, 10 MHz)

2011-12-12 Thread Robert LaJeunesse
Was the probe grounded using a spring clip off the probe tip, hitting the 
nearest ground that is tied directly to the 9572? If not, the waveform captured 
is not the waveform present during operation. Also, using a 10pF probe on a 2ns 
risetime signal is quite a heavy load / impedance mismatch. I've used 100:1 low 
capacitance probes (Zin = 5000 Ohms, Cin = 2pF or less) to mitigate that 
problem 
at less cost than a good FET probe. I also suspect the filter impedance is not 
constant versus frequency, leading to additional distortion of the square wave.
 
Bob LaJeunesse




From: beale be...@bealecorner.com
To: time-nuts@febo.com
Sent: Mon, December 12, 2011 1:29:24 PM
Subject: [time-nuts] FE-5680A internal signal waveforms (60, 30, 10 MHz)

... A 200 MHz Rigol scope reads a risetime of 2 ns on CPLD pin 49, but the 
waveform looks so noisy and odd (see below), maybe I would be better off just 
squaring up the output sine.  ...maybe if pin 49 was disconnected from the sine 
output filter, it would be more square (?)

https://picasaweb.google.com/109928236040342205185/FE5680A#5685304143859526258

-John Beale

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Re: [time-nuts] FE-5680A internal signal waveforms (60, 30, 10 MHz)

2011-12-12 Thread Bob Camp
Hi

If you are getting 11 V p-p, I'd bet you don't have the 10 MHz output
terminated in 50 ohms.

Bob

-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On
Behalf Of beale
Sent: Monday, December 12, 2011 1:29 PM
To: time-nuts@febo.com
Subject: [time-nuts] FE-5680A internal signal waveforms (60, 30, 10 MHz)

I have two of the FE-5680A (FEI P/N 217400-30352-1) Rb references, and I'm
looking at the signals on digital side of the PCB inside, in particular the
Xilinx CPLD, that is the XC9572XL in a 64-pin package.  Here is a photo with
the signals marked:
https://picasaweb.google.com/109928236040342205185/FE5680A#56853041347181331
38

pin 64 has a nice looking 60.00 MHz sine wave, I gather this is the input
signal to the CPLD.
pin 22 has a 30 MHz square wave, although it has some ripples (see scope
trace in same Picasa album)
pin 49 has a 10 MHz square wave but with a very odd shape. 

Pin 49 is the signal which is LC filtered (?) to become the 10 MHz sine wave
out on the internal J8 mini-connector, and the external DB9.  The signal is
about 3.3 Vpp, but becomes an 11 Vpp sine wave at the far side of a blue
part (inductor?) marked 2R2J.


The 10 MHz sine out on my unit has some noticeable amplitude noise, at least
a few %. Since I'm only using the signal as a digital clock, I prefer a
square wave, assuming the fast edge will give me lower jitter. A 200 MHz
Rigol scope reads a risetime of 2 ns on CPLD pin 49, but the waveform looks
so noisy and odd (see below), maybe I would be better off just squaring up
the output sine.  ...maybe if pin 49 was disconnected from the sine output
filter, it would be more square (?)

https://picasaweb.google.com/109928236040342205185/FE5680A#56853041438595262
58

-John Beale

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