Sounds like an interest project, Do you have any performance plots?
It would be interesting to see how it compares with the TPLL2 which uses a
$5.00 USB sound card to greatly improve the performance of the old all
analog $10 TPLL.
Using mostly junk box parts, and a 3e-13 selected HP10811 reference Osc, the
TPLL2 can do fast, high resolution Frequency and ADEV plots that closely
match the best testers and can provide taus plots starting as fast as 0.1ms
with a noise floor as low as 1e-14/sec. (limited by the reference Osc).
Using John's TimeLab software, live, real time ADEV plots showing tau data
from 1ms to 1 sec can be plotted for an Osc in as little as 10 seconds with
one key press (and a couple of Enters).
This can be useful for quick Osc testing because using a fast, low noise
tester, the tau of many high end oscillators is pretty flat between 0.1 sec
and 1 sec taus.
Also possible is 1e-12 freq measurements in about 100 ms, with data logging
fast enough at up to 10k/sps, and resolution high enough at 10fs, to measure
the effects of line noise and it's harmonics on the oscillator's frequency.
The TPLL2.0 provides good short term sub picoseconds resolution. For longer
runs the TPLL2 can be combined with a single or dual TBolt Tic to provide
long term resolution as low as 0.1 ns(1e-10/sec), which is good enough to
measure and compare Cs from day to day.
ws
*************
Ulrich, DF6JB posted:
I have just finished the work on a pcb
... snip ...
The board features an AD654 voltage to frequency converter which
is connected to the PLL's loop voltage and delivers pulses to an
ATMEGA32 counter input. That would make it possible to
use the board as an correct implementation of the tight pll
method as discussed here
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