[time-nuts] Re: DIY Low offset Phase Noise Analyzer

[Richard (Rick) Karlquist via time-nuts]

Another great post from Bob (as usual).  Bob's advice
is exactly correct.  Unfortunately, the
HP 11848 phase noise test set (part of the HP 3048
PN measurement system) is poorly designed, and does
not break out the low gain non clipped signal.
I modified mine to bring out this signal and it
was MUCH easier to use.  Follow Bob's advice if
you are DIYing.

Rick N6RK

On 7/4/2022 9:12 AM, Bob kb8tq via time-nuts wrote:

Hi

If you are running a high gain op-amp to buffer things into a
sound card *and* using the same op-amp output to drive the
EFC, then you will have problems.

Simple answer is to use a couple of op amps.

Buffer the mixer with something low noise. Get the output of the
mixer up to the point it almost saturates the op amp. Just how
much gain that is depends a lot on your parts and power supplies.
Running +/- 18V supplies into this op amp is no at all unusual.

Since this output is linear, you have the full range of the beat note
present. Nothing has been lost (yet).

One path off this device goes to the high gain stage to the sound
card. If the beat note is present, you will have clipping there.

The other path goes to whatever you do to run the EFC. There are
*many* approaches that could be used. One of many is a variable
gain / variable roll off amp to “set” the PLL corner. That is followed
by a simple summing amp to tune out the DC offset on the EFC.




Bob


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[time-nuts] Re: Silicom PCIe timestamping network cards

[Poul-Henning Kamp via time-nuts]

Bob kb8tq writes:

> Could be. They also mention a 25 MHz clock on the card. That could
> get you to a 125 MHz time base with a 8 ns resolution. Again, without
> a deep dive into what they did - who knows.

That is the clock-supply to the 82599 chip, but there is a boatload
of PLL'ery going on such an ethernet chip.

I can't remember the details, but I /think/ a 10GB ethernet runs
as two independent simplex lines.

If so, that 25MHz will only go to the TX side, the RX side will
run at whatever frequency the other end supplies.

Unless the other end is a PTP-aware switch which does clock slaving
from the upstream port and ...

To be honest the entire PTP and White Rabbit thing has gone ...

ehh ...

time-nuttery :-)


-- 
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[time-nuts] Re: Silicom PCIe timestamping network cards

[Bob kb8tq via time-nuts]

Hi

> On Jul 4, 2022, at 10:04 AM, Poul-Henning Kamp via time-nuts 
>  wrote:
> 
> 
> Poul-Henning Kamp via time-nuts writes:
> 
>> The timestamping counter gets its clock from the ethernet line
>> signals, and the counting frequency therefore depends on the ethernet
>> speed:
>> 
>>  100 Mb/s1.5625 MHz
>>  1 Gb/s  15.625 MHz
>>  10 Gb/s 156.25 MHz
>> 
>> (The 8ns timestamping mentioned must be something outside the 82599)
> 
> I should probably expand on this to prevent misunderstandings:
> 
> The 82599 chip will timestamp with 6.4ns resolution, and since both
> the frequency and the timestamp edge is derived from the ethernet
> signal when you time packets, there is no noise process involved,
> and you do get your full 6.4ns worth.
> 
> I understand the "8ns" number in the datasheet for the card to refer
> to the PPS input and assume the extra 1.5ns to be noise in the
> analog domain outside the i82599 chip.

Could be. They also mention a 25 MHz clock on the card. That could
get you to a 125 MHz time base with a 8 ns resolution. Again, without
a deep dive into what they did … who knows.

Bob

> 
> -- 
> Poul-Henning Kamp   | UNIX since Zilog Zeus 3.20
> p...@freebsd.org | TCP/IP since RFC 956
> FreeBSD committer   | BSD since 4.3-tahoe
> Never attribute to malice what can adequately be explained by incompetence.
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[time-nuts] Re: Silicom PCIe timestamping network cards

[Poul-Henning Kamp via time-nuts]

Poul-Henning Kamp via time-nuts writes:

> The timestamping counter gets its clock from the ethernet line
> signals, and the counting frequency therefore depends on the ethernet
> speed:
>
>   100 Mb/s1.5625 MHz
>   1 Gb/s  15.625 MHz
>   10 Gb/s 156.25 MHz
>
> (The 8ns timestamping mentioned must be something outside the 82599)

I should probably expand on this to prevent misunderstandings:

The 82599 chip will timestamp with 6.4ns resolution, and since both
the frequency and the timestamp edge is derived from the ethernet
signal when you time packets, there is no noise process involved,
and you do get your full 6.4ns worth.

I understand the "8ns" number in the datasheet for the card to refer
to the PPS input and assume the extra 1.5ns to be noise in the
analog domain outside the i82599 chip.

-- 
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p...@freebsd.org | TCP/IP since RFC 956
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[time-nuts] Re: Silicom PCIe timestamping network cards

[Poul-Henning Kamp via time-nuts]

John Miller via time-nuts writes:

> I'm curious if anyone here knows much about these silicom timestamping 
> network interfaces?

I used the i82599 ethernet chip ten years ago, to measure time in
the first Adaptive Optics Real-Time Computer prototype we built for
ESO's ELT telescope.

I have revision 2.73 of the datasheet (930 pages), but that is
probably publically available theses days in a newer revision.

The timestamping counter gets its clock from the ethernet line
signals, and the counting frequency therefore depends on the ethernet
speed:

100 Mb/s1.5625 MHz
1 Gb/s  15.625 MHz
10 Gb/s 156.25 MHz

(The 8ns timestamping mentioned must be something outside the 82599)

The basic idea is that you can measure the line frequency with the
PPS and timestamp PTP ethernet packets TX and RX relative to the
PPS.

The card is quite picky about which packets it will timestamp, in
particular some of the message bytes must look "enough" like a PTP
packet to be timestamped.  I figured it out eventually, and Intel
promised to update the data-sheet.

I have not tried to use the 1PPS signal input, it was not available
on the cards we used back then and we only needed relative packet
timestamps.

I am not sure what it would take to produce a 10G ethernet signal
from a "house standard", it may not be trivial.

So if you want to build a really good PTP server, yes, go for it,
but it is not much use for more advanced time-nuttery.

-- 
Poul-Henning Kamp   | UNIX since Zilog Zeus 3.20
p...@freebsd.org | TCP/IP since RFC 956
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[time-nuts] Re: Silicom PCIe timestamping network cards

[Bob kb8tq via time-nuts]

Hi

I think the key parameter is the 8 ns resolution on the time stamp. 
That may or may not be adequate for this or that application. 

Without doing a deep dive on the part, it’s not real clear how they
deal with the accuracy of the onboard timebase. It’s rated at 0.01 ppm
with no real details. Obviously if it is free running and there is no
practical calibration approach …. that will add to the error as well.
One would *hope* they thought about this ….you never know...

Bob

> On Jul 4, 2022, at 8:05 AM, John Miller via time-nuts 
>  wrote:
> 
> Hey all,
> I'm curious if anyone here knows much about these silicom timestamping 
> network interfaces? They pop up fairly often for sale, usually for not that 
> much. They have SMA in/out for a PPS signal in addition to the network 
> interfaces. I've found datasheets like this (linked below), but no manuals or 
> software. Has anyone used one of these in a lab before? I'm very tempted.
> 
> https://www.silicom-usa.com/wp-content/uploads/2016/08/PE310G2TSI9P-10G-Precision-Time-Stamping-Server-Adapter.pdf
>  
> 
> 
> Thanks,
> John
> KC1QLN
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[time-nuts] Re: DIY Low offset Phase Noise Analyzer

[Bob kb8tq via time-nuts]

Hi

If you are running a high gain op-amp to buffer things into a
sound card *and* using the same op-amp output to drive the
EFC, then you will have problems. 

Simple answer is to use a couple of op amps.

Buffer the mixer with something low noise. Get the output of the
mixer up to the point it almost saturates the op amp. Just how 
much gain that is depends a lot on your parts and power supplies.
Running +/- 18V supplies into this op amp is no at all unusual.

Since this output is linear, you have the full range of the beat note
present. Nothing has been lost (yet). 

One path off this device goes to the high gain stage to the sound
card. If the beat note is present, you will have clipping there. 

The other path goes to whatever you do to run the EFC. There are
*many* approaches that could be used. One of many is a variable
gain / variable roll off amp to “set” the PLL corner. That is followed
by a simple summing amp to tune out the DC offset on the EFC.

One thing to note is that once you get past the fancy amp in the 
first stage, the noise properties of the other amps are much less
important ( assuming the supplies are fairly high ). This makes the
rest of the circuit pretty cheap to build.

Bob

> On Jul 4, 2022, at 6:02 AM, Erik Kaashoek via time-nuts 
>  wrote:
> 
> Hi David,
> Let me explain the DIY "measurement instrument"
> DOCXO into LO port of a mixer, DUT into RF, IF port with low pass filter to 
> both steer the Vtune of the DOCXO and into an opamp to amplify 1-100kHz into 
> PC audio input. On PC audio spectrum analyzer.
> So yes, the limiting factor is the measurement instrument, probably the opamp
> Further improvements of the setup has reduced the noise level at 10kHz offset 
> to -145dBc/Hz so the phase noise of the DOCXO plus the AR60 is at least 
> -145dBc/Hz at 10kHz offset. If the DOXCO is, as the spec states, -150dBc/Hz 
> at 10kHz offset that the AR60 can not be above -145dBc/Hz at 10kHz.
> 
> On 4-7-2022 12:01, David C. Partridge via time-nuts wrote:
>> Are you sure the PN floor of the measurement instrument isn't the limiting 
>> factor?
>> 
>> David
>> 
>> -Original Message-
>> From: Erik Kaashoek via time-nuts 
>> Sent: 04 July 2022 10:14
>> To: time nuts ; Erik Kaashoek 
>> Cc: Erik Kaashoek 
>> Subject: [time-nuts] DIY Low offset Phase Noise Analyzer
>> 
>> :
>> 
>> At 10kHz offset the Phase Noise of the DOCXO should be -150dBm but
>> unfortunately either the noise of the ultra low noise opamps or the
>> Phase Noise of the AR60 is almost 20dB higher.
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[time-nuts] Silicom PCIe timestamping network cards

[John Miller via time-nuts]

Hey all,
I'm curious if anyone here knows much about these silicom timestamping network 
interfaces? They pop up fairly often for sale, usually for not that much. They 
have SMA in/out for a PPS signal in addition to the network interfaces. I've 
found datasheets like this (linked below), but no manuals or software. Has 
anyone used one of these in a lab before? I'm very tempted.

https://www.silicom-usa.com/wp-content/uploads/2016/08/PE310G2TSI9P-10G-Precision-Time-Stamping-Server-Adapter.pdf
 


Thanks,
John
KC1QLN
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[time-nuts] Re: DIY Low offset Phase Noise Analyzer

[Erik Kaashoek via time-nuts]

Hi David,
Let me explain the DIY "measurement instrument"
DOCXO into LO port of a mixer, DUT into RF, IF port with low pass filter 
to both steer the Vtune of the DOCXO and into an opamp to amplify 
1-100kHz into PC audio input. On PC audio spectrum analyzer.
So yes, the limiting factor is the measurement instrument, probably the 
opamp
Further improvements of the setup has reduced the noise level at 10kHz 
offset to -145dBc/Hz so the phase noise of the DOCXO plus the AR60 is at 
least -145dBc/Hz at 10kHz offset. If the DOXCO is, as the spec states, 
-150dBc/Hz at 10kHz offset that the AR60 can not be above -145dBc/Hz at 
10kHz.


On 4-7-2022 12:01, David C. Partridge via time-nuts wrote:

Are you sure the PN floor of the measurement instrument isn't the limiting 
factor?

David

-Original Message-
From: Erik Kaashoek via time-nuts 
Sent: 04 July 2022 10:14
To: time nuts ; Erik Kaashoek 
Cc: Erik Kaashoek 
Subject: [time-nuts] DIY Low offset Phase Noise Analyzer

:

At 10kHz offset the Phase Noise of the DOCXO should be -150dBm but
unfortunately either the noise of the ultra low noise opamps or the
Phase Noise of the AR60 is almost 20dB higher.
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[time-nuts] Re: DIY Low offset Phase Noise Analyzer (Erik Kaashoek)

[Erik Kaashoek via time-nuts]

Mike,
The phase detector is an ADE-1 mixer, the IF output of the mixer goes 
into a loop filter that has a corner frequency of about 0.2Hz to enable 
Phase noise measurements down to 1Hz offset


Thanks for the excellent references, a lot to study.

Yes, one can do very advanced cross correlation things but I am doing 
this for a hobby and just needed something to check if the phase noise 
of some oscillators was good enough and could be build in a couple of 
hours using point to point wiring and a perforated board so I tried the 
least complex Phase Noise analyzer I could think of.


Erik.
On 4-7-2022 15:49, Mike Monett via time-nuts wrote:

Thank you for your detailed description. I wonder what kind of phase
detector you are using. I have never heard of one that required 0.01Hz
phase offset to lock. Even the simplest Phase-Frequency Detector (PFD)
would do orders of magnitude better. Here are some papers:

1. Motorola App. Note AN-535
Phase-Locked Loop Design Fundamentals
- the original mother lode on phase-frequency detectors
- does not discuss deadband
- I corrected this problem in my patent US3810234A
https://www.nxp.com/files-static/rf_if/doc/app_note/AN535.pdf

2. HCT4046A phase-locked loop (PLL)
Appendix B on Page 42: Loop Parameters and Equations
Appendix C on Page 45: Basic Program for VCO Frequency Calculations
https://www.ti.com/lit/an/scha003b/scha003b.pdf

3. Motorola MCK12140 Phase-Frequency Detector description
https://pdf.dzsc.com/MCH/MCH12140.pdf

4. I prefer the filter network shown at the bottom of
Table 2 on Page 4: Integrator Lead/lag network
https://www.minicircuits.com/app/VCO15-10.pdf

5. You mentioned the difficulty in getting a low enough noise floor
to measure the noise floor of the DOCXO. Rubiola has a nice paper on
cross-correlation techniques that can easily add 20 dB to your measurement
range:
https://arxiv.org/pdf/1003.0113.pdf

He shows some circuits in Figure 14 on Page 25: Basics schemes for the
measurement of phase noise.

Hope this helps.
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[time-nuts] DIY Low offset Phase Noise Analyzer (Erik Kaashoek)

[Mike Monett via time-nuts]

Typo: 0.01Hz phase offset
S/B:  0.01Hz frequency offset
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[time-nuts] DIY Low offset Phase Noise Analyzer (Erik Kaashoek)

[Mike Monett via time-nuts]

Thank you for your detailed description. I wonder what kind of phase
detector you are using. I have never heard of one that required 0.01Hz
phase offset to lock. Even the simplest Phase-Frequency Detector (PFD)
would do orders of magnitude better. Here are some papers:

1. Motorola App. Note AN-535
Phase-Locked Loop Design Fundamentals
- the original mother lode on phase-frequency detectors
- does not discuss deadband 
- I corrected this problem in my patent US3810234A
https://www.nxp.com/files-static/rf_if/doc/app_note/AN535.pdf

2. HCT4046A phase-locked loop (PLL) 
Appendix B on Page 42: Loop Parameters and Equations
Appendix C on Page 45: Basic Program for VCO Frequency Calculations
https://www.ti.com/lit/an/scha003b/scha003b.pdf

3. Motorola MCK12140 Phase-Frequency Detector description
https://pdf.dzsc.com/MCH/MCH12140.pdf

4. I prefer the filter network shown at the bottom of
Table 2 on Page 4: Integrator Lead/lag network
https://www.minicircuits.com/app/VCO15-10.pdf

5. You mentioned the difficulty in getting a low enough noise floor
to measure the noise floor of the DOCXO. Rubiola has a nice paper on 
cross-correlation techniques that can easily add 20 dB to your measurement
range:
https://arxiv.org/pdf/1003.0113.pdf

He shows some circuits in Figure 14 on Page 25: Basics schemes for the
measurement of phase noise.

Hope this helps.
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[time-nuts] Re: DIY Low offset Phase Noise Analyzer

[David C. Partridge via time-nuts]

Are you sure the PN floor of the measurement instrument isn't the limiting 
factor?

David

-Original Message-
From: Erik Kaashoek via time-nuts  
Sent: 04 July 2022 10:14
To: time nuts ; Erik Kaashoek 
Cc: Erik Kaashoek 
Subject: [time-nuts] DIY Low offset Phase Noise Analyzer

:

At 10kHz offset the Phase Noise of the DOCXO should be -150dBm but 
unfortunately either the noise of the ultra low noise opamps or the 
Phase Noise of the AR60 is almost 20dB higher.
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