Re: [Tinycc-devel] [PATCH 1/3] arm-asm: Implement branch to label

[Michael Matz]

Hello,

On Tue, 5 Jan 2021, Danny Milosavljevic wrote:


Some tests which cannot be automatically generated:

1.

__asm__(".a:\n\t"
   "mov r0, #1\n\t"
   "bne .a");

2.

__asm__("mov r0, #1\n\t"
   "bne L0\n\t"
   "L0:\n\t");

3.

__asm__("mov r1, #2\n\t"
   ".L0:\n\t"
   "mov r0, #1\n\t"
   "bne .L0");

So maybe we should have a directory with manual assembly tests, probably 
at least one for arm and one for x86.


What do you think?


Don't overcomplicate :)  Make it one file and add it as tests/asm-arm.c 
(or .s or .S).



Ciao,
Michael.

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Re: [Tinycc-devel] [PATCH 1/3] arm-asm: Implement branch to label

[Danny Milosavljevic]

Some tests which cannot be automatically generated:

1.

__asm__(".a:\n\t"
"mov r0, #1\n\t"
"bne .a");

2.

__asm__("mov r0, #1\n\t"
"bne L0\n\t"
"L0:\n\t");

3.

__asm__("mov r1, #2\n\t"
".L0:\n\t"
"mov r0, #1\n\t"
"bne .L0");

So maybe we should have a directory with manual assembly tests, probably at
least one for arm and one for x86.

What do you think?


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[Tinycc-devel] [PATCH 1/3] arm-asm: Implement branch to label

[Danny Milosavljevic]

---
 arm-asm.c | 34 +++---
 1 file changed, 19 insertions(+), 15 deletions(-)

diff --git a/arm-asm.c b/arm-asm.c
index fc92898..27f396b 100644
--- a/arm-asm.c
+++ b/arm-asm.c
@@ -1058,9 +1058,9 @@ static uint32_t encbranchoffset(int pos, int addr, int 
fail)
 {
   addr-=pos+8;
   addr/=4;
-  if(addr>=0x100 || addr<-0x100) { // FIXME: Is that correct?
+  if(addr>=0x7f || addr<-0x80) {
 if(fail)
-  tcc_error("function bigger than 32MB");
+  tcc_error("branch offset is too far");
 return 0;
   }
   return /*not 0x0A00|*/(addr&0xff);
@@ -1070,26 +1070,30 @@ static void asm_branch_opcode(TCCState *s1, int token)
 {
 int jmp_disp = 0;
 Operand op;
-parse_operand(s1, );
-if (op.type == OP_IM32 || op.type == OP_IM8 || op.type == OP_IM8N) {
-jmp_disp = encbranchoffset(ind, op.e.v, 0);
-if (jmp_disp < -0x80 || jmp_disp > 0x7f) {
-tcc_error("branch is too far");
+ExprValue e;
+ElfSym *esym;
+
+switch (ARM_INSTRUCTION_GROUP(token)) {
+case TOK_ASM_beq:
+case TOK_ASM_bleq:
+asm_expr(s1, );
+esym = elfsym(e.sym);
+if (!esym || esym->st_shndx != cur_text_section->sh_num) {
+tcc_error("invalid branch target");
 return;
 }
+jmp_disp = encbranchoffset(ind, e.v + esym->st_value, 1);
+break;
+default:
+parse_operand(s1, );
+break;
 }
 switch (ARM_INSTRUCTION_GROUP(token)) {
 case TOK_ASM_beq:
-if (op.type == OP_IM32 || op.type == OP_IM8 || op.type == OP_IM8N)
-asm_emit_opcode(token, (0xa << 24) | (jmp_disp & 0xff));
-else
-expect("branch target");
+asm_emit_opcode(token, (0xa << 24) | (jmp_disp & 0xff));
 break;
 case TOK_ASM_bleq:
-if (op.type == OP_IM32 || op.type == OP_IM8 || op.type == OP_IM8N)
-asm_emit_opcode(token, (0xb << 24) | (jmp_disp & 0xff));
-else
-expect("branch target");
+asm_emit_opcode(token, (0xb << 24) | (jmp_disp & 0xff));
 break;
 case TOK_ASM_bxeq:
 if (op.type != OP_REG32)

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