Re: [U-Boot] [U-Boot-v2][PATCH] imx27: nandboot with 2k pages
Hi Frederic,
The patches look good in general, but unfortunately you mailer turned
tabs into spaces and wrapped long lines, so the patches do not apply.
Can you send them again please?
one comment inline.
Thanks
Sascha
On Thu, Dec 11, 2008 at 02:14:41PM +0100, frederic Rodo wrote:
Signed-off-by:Frederic Rodo fred.r...@gmail.com
---
drivers/nand/nand_imx.c | 94
+--
include/asm-arm/arch-imx/imx-nand.h |2 +-
2 files changed, 79 insertions(+), 17 deletions(-)
diff --git a/drivers/nand/nand_imx.c b/drivers/nand/nand_imx.c
index f7f50b0..3bf67de 100644
--- a/drivers/nand/nand_imx.c
+++ b/drivers/nand/nand_imx.c
@@ -1090,26 +1090,74 @@ static struct driver_d imx_nand_driver = {
static void __nand_boot_init nfc_addr(struct imx_nand_host *host, u32 offs)
{
-send_addr(host, offs 0xff);
-send_addr(host, (offs 9) 0xff);
-send_addr(host, (offs 17) 0xff);
-send_addr(host, (offs 25) 0xff);
+if (!host-pagesize_2k) {
Can you turn this into positive logic?
+send_addr(host, offs 0xff);
+send_addr(host, (offs 9) 0xff);
+send_addr(host, (offs 17) 0xff);
+send_addr(host, (offs 25) 0xff);
+} else {
+/* imx27 Nand flash controller can only read full 2k page */
+send_addr(host, 0);
+send_addr(host, 0);
+send_addr(host, (offs 11) 0xff);
+send_addr(host, (offs 19) 0xff);
+/* FIXME: add another send_addr for nandflash 1Gbit
+ * if (read electronic signature byte 5 1 Gbit)
+ *send_addr(host, (offs 28) 0xff);
+ */
+
+/* send read start command */
+send_cmd(host, NAND_CMD_READSTART);
+}
}
-static int __nand_boot_init block_is_bad(struct imx_nand_host *host,
u32 offs)
+static int __nand_boot_init block_is_bad(struct imx_nand_host *host,
u32 offs,
+ u32 pagesize)
{
-send_cmd(host, NAND_CMD_READOOB);
-nfc_addr(host, offs);
-send_read_page(host, 0, 1);
-
-return (readw(host-regs + SPARE_AREA0) 0xff) == 0xff ? 0 : 1;
+if (!host-pagesize_2k) {
dito
+send_cmd(host, NAND_CMD_READOOB);
+nfc_addr(host, offs);
+send_read_page(host, 0, 1);
+if ((readw(host-regs + SPARE_AREA0) 0xff) != 0xff)
+return 1;
+} else {
+/* The AdvancedToolKit Mark the two first page of each block */
+/* check first page */
+send_cmd(host, NAND_CMD_READ0);
+nfc_addr(host, offs);
+send_read_page(host, 0, 1);
+send_read_page(host, 1, 1);
+send_read_page(host, 2, 1);
+send_read_page(host, 3, 1);
+
+if (readw(host-regs + NFC_ECC_STATUS_RESULT) 0xa)
+return 1;
+
+if ((readw(host-regs + SPARE_AREA0 + 4) 0xFF00) != 0xFF00)
+return 1;
+
+/* check second page */
+send_cmd(host, NAND_CMD_READ0);
+nfc_addr(host, offs + pagesize);
+send_read_page(host, 0, 1);
+send_read_page(host, 1, 1);
+send_read_page(host, 2, 1);
+send_read_page(host, 3, 1);
+
+if (readw(host-regs + NFC_ECC_STATUS_RESULT) 0xa)
+return 1;
+
+if ((readw(host-regs + SPARE_AREA0 + 4) 0xFF00) != 0xFF00)
+return 1;
+
+}
+return 0;
}
-void __nand_boot_init imx_nand_load_image(void *dest, int size, int
pagesize,
-int blocksize)
+void __nand_boot_init imx_nand_load_image(void *dest, int size, int
blocksize)
{
struct imx_nand_host host;
-u32 tmp, page, block;
+u32 tmp, page, block, pagesize;
PCCR1 |= PCCR1_NFC_BAUDEN;
@@ -1117,6 +1165,10 @@ void __nand_boot_init imx_nand_load_image(void
*dest, int size, int pagesize,
case GPCR_BOOT_8BIT_NAND_2k:
case GPCR_BOOT_16BIT_NAND_2k:
host.pagesize_2k = 1;
+pagesize = 2048;
+break;
+default:
+pagesize = 512;
}
host.regs = (void __iomem *)IMX_NFC_BASE;
@@ -1134,14 +1186,19 @@ void __nand_boot_init imx_nand_load_image(void
*dest, int size, int pagesize,
/* Unlock Block Command for given address range */
writew(0x4, host.regs + NFC_WRPROT);
+/* clear all operation */
+writew(0x8000, host.regs + NFC_CONFIG1);
+
+/* enable ECC, disable spare only and interrupt */
tmp = readw(host.regs + NFC_CONFIG1);
-tmp |= NFC_ECC_EN;
+tmp |= NFC_ECC_EN | NFC_INT_MSK;
+tmp = ~ NFC_SP_EN;
writew(tmp, host.regs + NFC_CONFIG1);
block = page = 0;
while (1) {
-if (!block_is_bad(host, block * blocksize)) {
+if (!block_is_bad(host, block * blocksize, pagesize)) {
page = 0;
while (page * pagesize blocksize) {
debug(page: %d block: %d dest: %p src
@@ -1154,8 +1211,13 @@ void __nand_boot_init imx_nand_load_image(void
*dest,
[U-Boot] [RFC USB PATCH] USB ehci fix and test on ixp4xx hardware
EHCI fix code and ixp4xx test.
USB ehci configuration parameter:
#define CONFIG_CMD_USB 1
#define CONFIG_USB_STORAGE 1
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_IXP4XX 1
#define CONFIG_EHCI_IS_TDI 1
#define CONFIG_EHCI_DESC_BIG_ENDIAN 1
#define CONFIG_EHCI_MMIO_BIG_ENDIAN 1
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
#define CONFIG_LEGACY_USB_INIT_SEQ 1
2 USB Device(s) found
scanning bus for storage devices... 0 Storage Device(s) found
= usb tree
Device Tree:
1 Hub (1.5MBit/s, 0mA)
| u-boot EHCI Host Controller
|
|+-2 Mass Storage (12MBit/s, 100mA)
Sony Storage Media 0C07040930296
=
Signed-off-by: Michael Trimarchi trimarchimich...@yahoo.it
---
drivers/usb/usb_ehci.h | 49 ++
drivers/usb/usb_ehci_core.c | 122 ++
2 files changed, 102 insertions(+), 69 deletions(-)
diff --git a/drivers/usb/usb_ehci.h b/drivers/usb/usb_ehci.h
index 90b137a..9e8e7b2 100644
--- a/drivers/usb/usb_ehci.h
+++ b/drivers/usb/usb_ehci.h
@@ -1,5 +1,6 @@
/*-
* Copyright (c) 2007-2008, Juniper Networks, Inc.
+ * Copyright (c) 2008, Michael Trimarchi trimarchimich...@yahoo.it
* All rights reserved.
*
* This program is free software; you can redistribute it and/or
@@ -21,6 +22,10 @@
#ifndef USB_EHCI_H
#define USB_EHCI_H
+#if !defined(CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS)
+#error USB EHCI define MAX_ROOT_PORTS
+#endif
+
/* (shifted) direction/type/recipient from the USB 2.0 spec, table 9.2 */
#define DeviceRequest \
((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE) 8)
@@ -45,10 +50,12 @@ struct ehci_hccr {
#define HC_LENGTH(p) (((p) 0) 0x00ff)
#define HC_VERSION(p) (((p) 16) 0x)
uint32_t cr_hcsparams;
+#define HCS_PPC(p) ((p) (1 4))
+#define HCS_INDICATOR(p)((p) (1 16)) /* Port indicators */
#define HCS_N_PORTS(p) (((p) 0) 0xf)
uint32_t cr_hccparams;
uint8_t cr_hcsp_portrt[8];
-};
+} __attribute__ ((packed));
struct ehci_hcor {
uint32_t or_usbcmd;
@@ -71,9 +78,9 @@ struct ehci_hcor {
uint32_t _reserved_[9];
uint32_t or_configflag;
#define FLAG_CF(1 0)/* true: we'll support high
speed */
- uint32_t or_portsc[2];
+ uint32_t or_portsc[CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS];
uint32_t or_systune;
-};
+} __attribute__ ((packed));
#define USBMODE0x68/* USB Device mode */
#define USBMODE_SDIS (1 3)/* Stream disable */
@@ -123,26 +130,24 @@ struct usb_linux_config_descriptor {
#define cpu_to_hc32(x) cpu_to_le32((x))
#endif
-#define EHCI_PS_WKOC_E 0x0040 /* RW wake on over current */
-#define EHCI_PS_WKDSCNNT_E 0x0020 /* RW wake on disconnect */
-#define EHCI_PS_WKCNNT_E 0x0010 /* RW wake on connect */
-#define EHCI_PS_PTC0x000f /* RW port test control */
-#define EHCI_PS_PIC0xc000 /* RW port indicator control */
-#define EHCI_PS_PO 0x2000 /* RW port owner */
-#define EHCI_PS_PP 0x1000 /* RW,RO port power */
-#define EHCI_PS_LS 0x0c00 /* RO line status */
-#define EHCI_PS_PR 0x0100 /* RW port reset */
-#define EHCI_PS_SUSP 0x0080 /* RW suspend */
-#define EHCI_PS_FPR0x0040 /* RW force port resume */
-#define EHCI_PS_OCC0x0020 /* RWC over current change */
-#define EHCI_PS_OCA0x0010 /* RO over current active */
-#define EHCI_PS_PEC0x0008 /* RWC port enable change */
-#define EHCI_PS_PE 0x0004 /* RW port enable */
-#define EHCI_PS_CSC0x0002 /* RWC connect status change */
-#define EHCI_PS_CS 0x0001 /* RO connect status */
+#define EHCI_PS_WKOC_E (1 22) /* RW wake on over current */
+#define EHCI_PS_WKDSCNNT_E (1 21) /* RW wake on disconnect */
+#define EHCI_PS_WKCNNT_E (1 20) /* RW wake on connect */
+#define EHCI_PS_PO (1 13) /* RW port owner */
+#define EHCI_PS_PP (1 12) /* RW,RO port power */
+#define EHCI_PS_LS (3 10) /* RO line status */
+#define EHCI_PS_PR (1 8)/* RW port reset */
+#define EHCI_PS_SUSP (1 7)/* RW suspend */
+#define EHCI_PS_FPR(1 6)/* RW force port resume */
+#define EHCI_PS_OCC(1 5)/* RWC over current change */
+#define EHCI_PS_OCA(1 4)/* RO over current active */
+#define EHCI_PS_PEC(1 3)/* RWC port enable change */
+#define EHCI_PS_PE (1 2)/* RW port enable */
+#define EHCI_PS_CSC(1 1)/* RWC connect status change */
+#define EHCI_PS_CS (1
Re: [U-Boot] [RFC USB PATCH] USB ehci fix and test on ixp4xx hardware
On 11:00 Fri 12 Dec , Michael Trimarchi wrote:
EHCI fix code and ixp4xx test.
USB ehci configuration parameter:
#define CONFIG_CMD_USB 1
#define CONFIG_USB_STORAGE 1
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_IXP4XX 1
#define CONFIG_EHCI_IS_TDI 1
#define CONFIG_EHCI_DESC_BIG_ENDIAN 1
#define CONFIG_EHCI_MMIO_BIG_ENDIAN 1
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
#define CONFIG_LEGACY_USB_INIT_SEQ 1
2 USB Device(s) found
scanning bus for storage devices... 0 Storage Device(s) found
= usb tree
Device Tree:
1 Hub (1.5MBit/s, 0mA)
| u-boot EHCI Host Controller
|
|+-2 Mass Storage (12MBit/s, 100mA)
Sony Storage Media 0C07040930296
=
Signed-off-by: Michael Trimarchi trimarchimich...@yahoo.it
---
drivers/usb/usb_ehci.h | 49 ++
drivers/usb/usb_ehci_core.c | 122 ++
2 files changed, 102 insertions(+), 69 deletions(-)
diff --git a/drivers/usb/usb_ehci.h b/drivers/usb/usb_ehci.h
index 90b137a..9e8e7b2 100644
--- a/drivers/usb/usb_ehci.h
+++ b/drivers/usb/usb_ehci.h
@@ -1,5 +1,6 @@
/*-
* Copyright (c) 2007-2008, Juniper Networks, Inc.
+ * Copyright (c) 2008, Michael Trimarchi trimarchimich...@yahoo.it
please remove you do not do enough modification to claim the copytight
* All rights reserved.
*
* This program is free software; you can redistribute it and/or
@@ -21,6 +22,10 @@
#ifndef USB_EHCI_H
#define USB_EHCI_H
+#if !defined(CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS)
+#error USB EHCI define MAX_ROOT_PORTS
+#endif
I'll prefer this
#if !defined(CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS)
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
#endif
other wise you must update everyone
+
/* (shifted) direction/type/recipient from the USB 2.0 spec, table 9.2 */
#define DeviceRequest \
((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE) 8)
@@ -45,10 +50,12 @@ struct ehci_hccr {
#define HC_LENGTH(p) (((p) 0) 0x00ff)
#define HC_VERSION(p)(((p) 16) 0x)
uint32_t cr_hcsparams;
+#define HCS_PPC(p) ((p) (1 4))
+#define HCS_INDICATOR(p)((p) (1 16)) /* Port indicators */
whitespace please fix
#define HCS_N_PORTS(p) (((p) 0) 0xf)
uint32_t cr_hccparams;
uint8_t cr_hcsp_portrt[8];
-};
+} __attribute__ ((packed));
struct ehci_hcor {
uint32_t or_usbcmd;
@@ -71,9 +78,9 @@ struct ehci_hcor {
uint32_t _reserved_[9];
uint32_t or_configflag;
#define FLAG_CF (1 0)/* true: we'll support high
speed */
- uint32_t or_portsc[2];
+ uint32_t or_portsc[CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS];
uint32_t or_systune;
-};
+} __attribute__ ((packed));
#define USBMODE 0x68/* USB Device mode */
#define USBMODE_SDIS (1 3)/* Stream disable */
@@ -123,26 +130,24 @@ struct usb_linux_config_descriptor {
#define cpu_to_hc32(x) cpu_to_le32((x))
#endif
-#define EHCI_PS_WKOC_E 0x0040 /* RW wake on over
current */
-#define EHCI_PS_WKDSCNNT_E 0x0020 /* RW wake on disconnect */
-#define EHCI_PS_WKCNNT_E 0x0010 /* RW wake on connect */
-#define EHCI_PS_PTC 0x000f /* RW port test control */
-#define EHCI_PS_PIC 0xc000 /* RW port indicator control */
-#define EHCI_PS_PO 0x2000 /* RW port owner */
-#define EHCI_PS_PP 0x1000 /* RW,RO port power */
-#define EHCI_PS_LS 0x0c00 /* RO line status */
-#define EHCI_PS_PR 0x0100 /* RW port reset */
-#define EHCI_PS_SUSP 0x0080 /* RW suspend */
-#define EHCI_PS_FPR 0x0040 /* RW force port resume */
-#define EHCI_PS_OCC 0x0020 /* RWC over current change */
-#define EHCI_PS_OCA 0x0010 /* RO over current active */
-#define EHCI_PS_PEC 0x0008 /* RWC port enable change */
-#define EHCI_PS_PE 0x0004 /* RW port enable */
-#define EHCI_PS_CSC 0x0002 /* RWC connect status change */
-#define EHCI_PS_CS 0x0001 /* RO connect status */
+#define EHCI_PS_WKOC_E (1 22) /* RW wake on over
current */
+#define EHCI_PS_WKDSCNNT_E (1 21) /* RW wake on disconnect */
+#define EHCI_PS_WKCNNT_E (1 20) /* RW wake on connect */
+#define EHCI_PS_PO (1 13) /* RW port owner */
+#define EHCI_PS_PP (1 12) /* RW,RO port power */
+#define EHCI_PS_LS (3 10) /* RO line status */
+#define EHCI_PS_PR (1 8)/* RW port reset */
+#define EHCI_PS_SUSP (1 7)/* RW suspend */
+#define EHCI_PS_FPR (1 6)/* RW force port resume
Re: [U-Boot] [RFC USB PATCH] USB ehci fix and test on ixp4xx hardware
On Friday 12 December 2008, Jean-Christophe PLAGNIOL-VILLARD wrote: On 11:00 Fri 12 Dec , Michael Trimarchi wrote: snip diff --git a/drivers/usb/usb_ehci.h b/drivers/usb/usb_ehci.h index 90b137a..9e8e7b2 100644 --- a/drivers/usb/usb_ehci.h +++ b/drivers/usb/usb_ehci.h @@ -1,5 +1,6 @@ /*- * Copyright (c) 2007-2008, Juniper Networks, Inc. + * Copyright (c) 2008, Michael Trimarchi trimarchimich...@yahoo.it please remove you do not do enough modification to claim the copytight Jean-Christophe, did you follow Michael's EHCI patches from the last days? He did quite a lot of work in this driver (e.g. big endian support etc). Definitely enough for adding his Copyright here from my point of view. Best regards, Stefan = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC USB PATCH] USB ehci fix and test on ixp4xx?hardware
On 11:39 Fri 12 Dec , Stefan Roese wrote: On Friday 12 December 2008, Jean-Christophe PLAGNIOL-VILLARD wrote: On 11:00 Fri 12 Dec , Michael Trimarchi wrote: snip diff --git a/drivers/usb/usb_ehci.h b/drivers/usb/usb_ehci.h index 90b137a..9e8e7b2 100644 --- a/drivers/usb/usb_ehci.h +++ b/drivers/usb/usb_ehci.h @@ -1,5 +1,6 @@ /*- * Copyright (c) 2007-2008, Juniper Networks, Inc. + * Copyright (c) 2008, Michael Trimarchi trimarchimich...@yahoo.it please remove you do not do enough modification to claim the copytight Jean-Christophe, did you follow Michael's EHCI patches from the last days? He not too much sorry I've seen after his e-mail I've miss the Author due different e-amil name Michael somtimes and full namy otherwise did quite a lot of work in this driver (e.g. big endian support etc). Definitely enough for adding his Copyright here from my point of view. sure Best Regards, J. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC USB PATCH] USB ehci fix and test on ixp4xx hardware
Hi,
Jean-Christophe PLAGNIOL-VILLARD wrote:
On 11:00 Fri 12 Dec , Michael Trimarchi wrote:
EHCI fix code and ixp4xx test.
USB ehci configuration parameter:
#define CONFIG_CMD_USB 1
#define CONFIG_USB_STORAGE 1
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_IXP4XX 1
#define CONFIG_EHCI_IS_TDI 1
#define CONFIG_EHCI_DESC_BIG_ENDIAN 1
#define CONFIG_EHCI_MMIO_BIG_ENDIAN 1
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
#define CONFIG_LEGACY_USB_INIT_SEQ 1
2 USB Device(s) found
scanning bus for storage devices... 0 Storage Device(s) found
= usb tree
Device Tree:
1 Hub (1.5MBit/s, 0mA)
| u-boot EHCI Host Controller
|
|+-2 Mass Storage (12MBit/s, 100mA)
Sony Storage Media 0C07040930296
=
Signed-off-by: Michael Trimarchi trimarchimich...@yahoo.it
---
drivers/usb/usb_ehci.h | 49 ++
drivers/usb/usb_ehci_core.c | 122
++
2 files changed, 102 insertions(+), 69 deletions(-)
diff --git a/drivers/usb/usb_ehci.h b/drivers/usb/usb_ehci.h
index 90b137a..9e8e7b2 100644
--- a/drivers/usb/usb_ehci.h
+++ b/drivers/usb/usb_ehci.h
@@ -1,5 +1,6 @@
/*-
* Copyright (c) 2007-2008, Juniper Networks, Inc.
+ * Copyright (c) 2008, Michael Trimarchi trimarchimich...@yahoo.it
please remove you do not do enough modification to claim the copytight
Ok, I do few changes before, but if you think that they aren't a lot,
I'll remove it.
* All rights reserved.
*
* This program is free software; you can redistribute it and/or
@@ -21,6 +22,10 @@
#ifndef USB_EHCI_H
#define USB_EHCI_H
+#if !defined(CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS)
+#error USB EHCI define MAX_ROOT_PORTS
+#endif
I'll prefer this
#if !defined(CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS)
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS2
#endif
other wise you must update everyone
ok
+
/* (shifted) direction/type/recipient from the USB 2.0 spec, table 9.2 */
#define DeviceRequest \
((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE) 8)
@@ -45,10 +50,12 @@ struct ehci_hccr {
#define HC_LENGTH(p)(((p) 0) 0x00ff)
#define HC_VERSION(p) (((p) 16) 0x)
uint32_t cr_hcsparams;
+#define HCS_PPC(p) ((p) (1 4))
+#define HCS_INDICATOR(p)((p) (1 16)) /* Port indicators */
whitespace please fix
ok
#define HCS_N_PORTS(p) (((p) 0) 0xf)
uint32_t cr_hccparams;
uint8_t cr_hcsp_portrt[8];
-};
+} __attribute__ ((packed));
struct ehci_hcor {
uint32_t or_usbcmd;
@@ -71,9 +78,9 @@ struct ehci_hcor {
uint32_t _reserved_[9];
uint32_t or_configflag;
#define FLAG_CF (1 0)/* true: we'll support high
speed */
-uint32_t or_portsc[2];
+uint32_t or_portsc[CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS];
uint32_t or_systune;
-};
+} __attribute__ ((packed));
#define USBMODE 0x68/* USB Device mode */
#define USBMODE_SDIS(1 3)/* Stream disable */
@@ -123,26 +130,24 @@ struct usb_linux_config_descriptor {
#define cpu_to_hc32(x) cpu_to_le32((x))
#endif
-#define EHCI_PS_WKOC_E 0x0040 /* RW wake on over
current */
-#define EHCI_PS_WKDSCNNT_E 0x0020 /* RW wake on disconnect */
-#define EHCI_PS_WKCNNT_E0x0010 /* RW wake on connect */
-#define EHCI_PS_PTC 0x000f /* RW port test control */
-#define EHCI_PS_PIC 0xc000 /* RW port indicator control */
-#define EHCI_PS_PO 0x2000 /* RW port owner */
-#define EHCI_PS_PP 0x1000 /* RW,RO port power */
-#define EHCI_PS_LS 0x0c00 /* RO line status */
-#define EHCI_PS_PR 0x0100 /* RW port reset */
-#define EHCI_PS_SUSP0x0080 /* RW suspend */
-#define EHCI_PS_FPR 0x0040 /* RW force port resume */
-#define EHCI_PS_OCC 0x0020 /* RWC over current change */
-#define EHCI_PS_OCA 0x0010 /* RO over current active */
-#define EHCI_PS_PEC 0x0008 /* RWC port enable change */
-#define EHCI_PS_PE 0x0004 /* RW port enable */
-#define EHCI_PS_CSC 0x0002 /* RWC connect status change */
-#define EHCI_PS_CS 0x0001 /* RO connect status */
+#define EHCI_PS_WKOC_E (1 22) /* RW wake on over
current */
+#define EHCI_PS_WKDSCNNT_E (1 21) /* RW wake on disconnect */
+#define EHCI_PS_WKCNNT_E(1 20) /* RW wake on connect */
+#define EHCI_PS_PO (1 13) /* RW port owner */
+#define EHCI_PS_PP (1 12) /* RW,RO port power */
+#define EHCI_PS_LS (3 10) /* RO line status */
+#define EHCI_PS_PR (1 8)
[U-Boot] [RFC USB PATCH V2] USB ehci fix and test on ixp4xx hardware
EHCI fix code and ixp4xx test.
USB ehci configuration parameter:
#define CONFIG_CMD_USB 1
#define CONFIG_USB_STORAGE 1
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_IXP4XX 1
#define CONFIG_EHCI_IS_TDI 1
#define CONFIG_EHCI_DESC_BIG_ENDIAN 1
#define CONFIG_EHCI_MMIO_BIG_ENDIAN 1
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
#define CONFIG_LEGACY_USB_INIT_SEQ 1
2 USB Device(s) found
scanning bus for storage devices... 0 Storage Device(s) found
= usb tree
Device Tree:
1 Hub (1.5MBit/s, 0mA)
| u-boot EHCI Host Controller
|
|+-2 Mass Storage (12MBit/s, 100mA)
Sony Storage Media 0C07040930296
=
Signed-off-by: Michael Trimarchi trimarchimich...@yahoo.it
---
drivers/usb/usb_ehci.h | 51 ++
drivers/usb/usb_ehci_core.c | 127 ++-
2 files changed, 106 insertions(+), 72 deletions(-)
diff --git a/drivers/usb/usb_ehci.h b/drivers/usb/usb_ehci.h
index 90b137a..b72498b 100644
--- a/drivers/usb/usb_ehci.h
+++ b/drivers/usb/usb_ehci.h
@@ -1,5 +1,6 @@
/*-
* Copyright (c) 2007-2008, Juniper Networks, Inc.
+ * Copyright (c) 2008, Michael Trimarchi trimarchimich...@yahoo.it
* All rights reserved.
*
* This program is free software; you can redistribute it and/or
@@ -21,6 +22,10 @@
#ifndef USB_EHCI_H
#define USB_EHCI_H
+#if !defined(CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS)
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
+#endif
+
/* (shifted) direction/type/recipient from the USB 2.0 spec, table 9.2 */
#define DeviceRequest \
((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE) 8)
@@ -45,10 +50,12 @@ struct ehci_hccr {
#define HC_LENGTH(p) (((p) 0) 0x00ff)
#define HC_VERSION(p) (((p) 16) 0x)
uint32_t cr_hcsparams;
+#define HCS_PPC(p) ((p) (1 4))
+#define HCS_INDICATOR(p) ((p) (1 16)) /* Port indicators */
#define HCS_N_PORTS(p) (((p) 0) 0xf)
uint32_t cr_hccparams;
uint8_t cr_hcsp_portrt[8];
-};
+} __attribute__ ((packed));
struct ehci_hcor {
uint32_t or_usbcmd;
@@ -71,9 +78,9 @@ struct ehci_hcor {
uint32_t _reserved_[9];
uint32_t or_configflag;
#define FLAG_CF(1 0)/* true: we'll support high
speed */
- uint32_t or_portsc[2];
+ uint32_t or_portsc[CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS];
uint32_t or_systune;
-};
+} __attribute__ ((packed));
#define USBMODE0x68/* USB Device mode */
#define USBMODE_SDIS (1 3)/* Stream disable */
@@ -123,26 +130,24 @@ struct usb_linux_config_descriptor {
#define cpu_to_hc32(x) cpu_to_le32((x))
#endif
-#define EHCI_PS_WKOC_E 0x0040 /* RW wake on over current */
-#define EHCI_PS_WKDSCNNT_E 0x0020 /* RW wake on disconnect */
-#define EHCI_PS_WKCNNT_E 0x0010 /* RW wake on connect */
-#define EHCI_PS_PTC0x000f /* RW port test control */
-#define EHCI_PS_PIC0xc000 /* RW port indicator control */
-#define EHCI_PS_PO 0x2000 /* RW port owner */
-#define EHCI_PS_PP 0x1000 /* RW,RO port power */
-#define EHCI_PS_LS 0x0c00 /* RO line status */
-#define EHCI_PS_PR 0x0100 /* RW port reset */
-#define EHCI_PS_SUSP 0x0080 /* RW suspend */
-#define EHCI_PS_FPR0x0040 /* RW force port resume */
-#define EHCI_PS_OCC0x0020 /* RWC over current change */
-#define EHCI_PS_OCA0x0010 /* RO over current active */
-#define EHCI_PS_PEC0x0008 /* RWC port enable change */
-#define EHCI_PS_PE 0x0004 /* RW port enable */
-#define EHCI_PS_CSC0x0002 /* RWC connect status change */
-#define EHCI_PS_CS 0x0001 /* RO connect status */
+#define EHCI_PS_WKOC_E (1 22) /* RW wake on over current */
+#define EHCI_PS_WKDSCNNT_E (1 21) /* RW wake on disconnect */
+#define EHCI_PS_WKCNNT_E (1 20) /* RW wake on connect */
+#define EHCI_PS_PO (1 13) /* RW port owner */
+#define EHCI_PS_PP (1 12) /* RW,RO port power */
+#define EHCI_PS_LS (3 10) /* RO line status */
+#define EHCI_PS_PR (1 8)/* RW port reset */
+#define EHCI_PS_SUSP (1 7)/* RW suspend */
+#define EHCI_PS_FPR(1 6)/* RW force port resume */
+#define EHCI_PS_OCC(1 5)/* RWC over current change */
+#define EHCI_PS_OCA(1 4)/* RO over current active */
+#define EHCI_PS_PEC(1 3)/* RWC port enable change */
+#define EHCI_PS_PE (1 2)/* RW port enable */
+#define EHCI_PS_CSC(1 1)/* RWC connect status change */
+#define EHCI_PS_CS (1 0)
[U-Boot] EHCI last patch
Hi all, In the last ehci patch I add myself in the author of the code. I'm not sure if it possible. I change the codes and test it but I don't know if the change are sufficient. Regards Michael ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] problem doing rebase in fresh git.denx.de/u-boot.git clone
Dear Wolfgang, On Thu, 11 Dec 2008 21:54:13 +0100, Wolfgang Denk w...@denx.de wrote: In message op.ul0bvrx72ro...@tomo.bln.innominate.local you wrote: What exactly do you expect this command to do? You showed us a sequence of two commands: git-clone followed by git-rebase, and complain that it doesn't wor as expected. You are missing something - either, you miss to describe some additional steps you did between these two commands (in which case we have no chance to comment at all), or you miss how git works. Sorry if I failed to give a clear explanation, I'll try again. 1) Lets say this is a simplified part of the commit log after I cloned the repo and created my branch with git checkout -b bisect v2008.10 tag_v1.3.3 commitA commitB commitC tag_v2008.10 2) then I commit my own patches at the top with git am 0001-myPatch1.patch 0002-myPatch2.patch tag_v1.3.3 commitA commitB commitC tag_v2008.10 myPatch1 myPatch2 3) then I try to git rebase -i v1.3.3 to reorder the commits in my branch in the following way (which failed): tag_v1.3.3 commitA myPatch1 commitB myPatch2 commitC tag_v2008.10 4) After that I wanted to do a git bisect between tag_v1.3.3 and tag_v2008.10 to find the commit when my port stops working. If you have a patchset against v1.3.3, my approach would be to create a branch, for example like this: git-checkout -b my-test-branch v1.3.3 then apply the patches, commit these, and then (with my-test-branch checked out), you could try a git-rebase -i master. I see, this would move my patches from after tag_v1.3.3 up to HEAD, but what I tried to accomplish was to distribute them back in the timeline to make bisect work at each point between v1.3.3 and v2008.10. Lets say there is the commit commit 0e8d158664a913392cb01fb11a948d83f72e105e Author: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com Date: Wed Sep 10 22:48:06 2008 +0200 rename CFG_ENV macros to CONFIG_ENV Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com and I have a patch rename_CFG_ENV_to_CONFIG_ENV_myBoard.patch, so I would like to put it directly after above commit, so u-boot compiles before and after these two patches during the bisect process. But I already managed to do it using git merge. Thanks for your help and sorry for the confusion :) Best Regards -- Peter Vollmer Software Engineer Innominate Security Technologies AG protecting industrial networks Albert-Einstein-Str. 14 D-12489 Berlin www.innominate.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] part_efi: Fix partition size calculation due to inclusive ending LBA.
From b24eaf52ade5e5f1e94243f727d4c0f6d0fccdf5 Mon Sep 17 00:00:00 2001 From: Richard Retanubun richardretanu...@ruggedcom.com Date: Fri, 12 Dec 2008 10:23:45 -0500 Subject: [PATCH] The ending LBA is inclusive. Hence, the partition size should be ((ending-LBA + 1) - starting-LBA) to get the proper partition size. This is confirmed against the results from the parted tool. (e.g. use parted /dev/sda -s unit S print) and observe the size. Signed-off-by: Richard Retanubun richardretanu...@ruggedcom.com --- Hi Wolfgang, Apologies for the 'custodianship' assumption audacity :) Let me know if there is a more proper 'channel' for this and I'll stop bugging you. disk/part_efi.c |4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/disk/part_efi.c b/disk/part_efi.c index cc188ee..d8a8111 100644 --- a/disk/part_efi.c +++ b/disk/part_efi.c @@ -163,7 +163,9 @@ int get_partition_info_efi(block_dev_desc_t * dev_desc, int part, /* The ulong casting limits the maximum disk size to 2 TB */ info-start = (ulong) le64_to_int((*pgpt_pte)[part - 1].starting_lba); - info-size = (ulong) le64_to_int((*pgpt_pte)[part - 1].ending_lba) - info-start; + /* The ending LBA is inclusive, to calculate size, add 1 to it */ + info-size = ((ulong)le64_to_int((*pgpt_pte)[part - 1].ending_lba) + 1) +- info-start; info-blksz = GPT_BLOCK_SIZE; sprintf((char *)info-name, %s%d\n, GPT_ENTRY_NAME, part); -- 1.5.6.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] CFI: flash_write_cfiword() slow
Hi Wolfgang, Wolfgang Denk schrieb: Dear Jens Gehrlein, In message 490edd63.1010...@tqs.de you wrote: find_sector() loops through the sector table from the last sector to the current sector. And the more sectors the device has, the slower the algorithm becomes. And this process for every sector to be programmed. And yes, there are still devices around without (standard) write buffer, e.g. the Samsung K8P2815UQB. A classic (and trivial to implement) approach is not to start searching at the end, but at the last used sector (assuming search driection and direction of growth are identical). Okay. Because I never have seen, that a flash has been written backwards, as a prerequisite I have to change the loop from counting down to counting up. Any objections? This way, you will typically find the match either immediately or with a single step. Maybe you want to give that a try... I'm currently trying :-) Had some other projects in the meantime. Kind regards, Jens ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] dts to dtb generation
Hello, all. I need to get my device-tree blob done, in order to pass it along with the image I've created (bootm command). I'm kind of new on the dtb concept and I'm not sure if I'm doing it right. Have read some stuff about it, though. What I got is that I have to generate a .dtb out of this source file (lite5200b.dts). But I can't get my dtc to work. I've downloaded the latest version (http://jdl.com/software/dtc-latest.tgz) and done the make command, but it points some errors during building. Check the snippet: ... BISON dtc-parser.tab.c DEP dtc-parser.tab.c LEX dtc-lexer.lex.c make: flex: Command not found DEP checks.c DEP srcpos.c DEP treesource.c DEP livetree.c DEP data.c DEP fstree.c DEP flattree.c DEP dtc.c LEX dtc-lexer.lex.c make: flex: Command not found CHK version_gen.h UPD version_gen.h DEP dtc.c LEX dtc-lexer.lex.c make: flex: Command not found CHK version_gen.h CC dtc.o ... And after the 'make install' command it reports the same 'flex: Command not found': LEX dtc-lexer.lex.c make: flex: Command not found CHK version_gen.h I've visited the http://www.embeddedlinuxprimer.com/dtc for the howto steps. Well, I guess it didn't complete the install, the console bashes the dtc as 'not found'. I'm aware there must be some small detail I must be missing in order to get it right, but I'd really appreciate a pointer here. Thanks for the attention. Marco Antônio Possamai Universidade Federal de Santa Catarina P.S: I'm also aware this is possibly not the right mailing list to ask about device-tree compilers... but I haven't found one specific for it. Sorry for the inconvenience. -- Be Yourself @ mail.com! Choose From 200+ Email Addresses Get a Free Account at www.mail.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] dts to dtb generation
Marco Antônio Possamai wrote: Hello, all. I need to get my device-tree blob done, in order to pass it along with the image I've created (bootm command). I'm kind of new on the dtb concept and I'm not sure if I'm doing it right. Have read some stuff about it, though. What I got is that I have to generate a .dtb out of this source file (lite5200b.dts). But I can't get my dtc to work. I've downloaded the latest version (http://jdl.com/software/dtc-latest.tgz) and done the make command, but it points some errors during building. Check the snippet: Good. BISON dtc-parser.tab.c DEP dtc-parser.tab.c LEX dtc-lexer.lex.c make: flex: Command not found Bad. You are done at this point. [snip] I'm aware there must be some small detail I must be missing in order to get it right, but I'd really appreciate a pointer here. Thanks for the attention. Marco Antônio Possamai Hi Marco, You are missing the flex package, and thus the flex command, on your system. Flex is a lexical parser (classic name lex). You didn't say what your host's distribution is. If it is debian, you need to install the flex package. RH/SuSE may name their package differently (probably not). http://packages.debian.org/search?keywords=flexsearchon=namessuite=allsection=all Best regards, gvb ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] dts to dtb generation
Hi Marco, BISON dtc-parser.tab.c DEP dtc-parser.tab.c LEX dtc-lexer.lex.c make: flex: Command not found Actually, I do not know, how an error message could be more clear than that. Obviously your Linux installation is missing the GNU lexical scanner generator flex. It should be trivial to install that package for the distro that you use. Best wishes Detlev -- Every time history repeats itself the price goes up. -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] FSL DDR @ 83xx
Andre Schwarz wrote: I don't believe anyone is currently working on getting the new ddr code to be used w/83xx. Feel free to submit patches that does this and we will review them as they are posted. - k After spending few hours it seems to work basically. This is what I've done : - add mpc8xxx(ddr/libddr.a to top level Makefile for 83xx - created mpc83xx/ddr-gen2.c and ported to meet ddr83xx_t - created board specific ddr.c for SPD accessor and basic setup. - created board specific ddr2_spd_eeprom_t (soldered memory) The board config got these #defines : #define CONFIG_FSL_DDR2 #define CONFIG_DDR_SPD #define CONFIG_NUM_DDR_CONTROLLERS 1 - this should go into mpc83xx header #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL1 Since spd_sdram.o is always build (mpc83xx/Makefile) and the code is also activated by CONFIG_SPD_EEPROM we should find a reasonable way to switch between old and new DDR code by some kind of #define. Is this the way to go ? Yes, it is. You will also need a per-board set of functions to answer the configuration issues in a way similar to the rest of the 85xx and 86xx boards. You will have to carefully juggle the presence of the new and old simultaneously (via CONFIG_FSL_DDR2, likely) until all the 83xx boards are supported under the new mechanism. jdl ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] FSL DDR @ 83xx
Andre Schwarz wrote: I don't believe anyone is currently working on getting the new ddr code to be used w/83xx. Feel free to submit patches that does this and we will review them as they are posted. - k After spending few hours it seems to work basically. This is what I've done : - add mpc8xxx(ddr/libddr.a to top level Makefile for 83xx - created mpc83xx/ddr-gen2.c and ported to meet ddr83xx_t - created board specific ddr.c for SPD accessor and basic setup. - created board specific ddr2_spd_eeprom_t (soldered memory) The board config got these #defines : #define CONFIG_FSL_DDR2 #define CONFIG_DDR_SPD #define CONFIG_NUM_DDR_CONTROLLERS 1 - this should go into mpc83xx header #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL1 Since spd_sdram.o is always build (mpc83xx/Makefile) and the code is also activated by CONFIG_SPD_EEPROM we should find a reasonable way to switch between old and new DDR code by some kind of #define. Is this the way to go ? Yes, it is. You will also need a per-board set of functions to answer the configuration issues in a way similar to the rest of the 85xx and 86xx boards. You will have to carefully juggle the presence of the new and old simultaneously (via CONFIG_FSL_DDR2, likely) until all the 83xx boards are supported under the new mechanism. jdl ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] FSL DDR @ 83xx
Andre Schwarz wrote:
mpc83xx/spd_sdram needs some fixes to work with latest chips :
1.
max_data_rate seems to be mishandled. Since it's twice the physical
clock we need much higher vaues for calculating optimum caslat ... or
use max_bus_clock instead. bus_clock seems to be reasonable since the
SPD timing values refer to clock and/or clock cycle time.
if (max_data_rate = 390 max_data_rate 460) { /* it is DDR 400 */
This is the top-level if - DDR-333 gives max_data_rate = 666 and
goes into
else if (max_data_rate = 323) { /* it is DDR 333 */
Additionally the caslat reduction code should use = and = for the
evaluation of clk_cycle2 and clk_cycle3. Otherwise it will only work for
a specific memory with SPD contents.
To make it short :
DDR-II-333 will be configured with caslat = 5 @ 133MHz Controller speed
- It would work fine with caslat = 3.
2.
Actually 3 bank adress bits are quite usual. This SPD values are not yet
evaluated.
3.
Termination schemes (150/75/50 Ohm) and driver characteristics are not
handled at all.
Most boards would need this or may only run stable with the most
conservative timings.
Does it make sense to fix these things or is the new DDR code the way
to go ?
Ultimately, one way or another, at the end of the day, when all
is said and done, the old way will be removed and the new way
will prevail. You know.
So, yeah, all of these per board configurations will have to
be supplied in a new file like each of the 85xx and 86xx boards
have done.
HTH,
jdl
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Re: [U-Boot] problem doing rebase in fresh git.denx.de/u-boot.git clone
Dear Peter Vollmer, In message op.ul1xayil2ro...@tomo.bln.innominate.local you wrote: 1) Lets say this is a simplified part of the commit log after I cloned the repo and created my branch with git checkout -b bisect v2008.10 But that's wrong. You said, you patches were based on v1.3.3 - then you must branch off v1.3.3: git-checkout -b your_branch v1.3.3 tag_v1.3.3 commitA commitB commitC tag_v2008.10 Will give: tag_v1.3.3 x-- your_branch---+ commitA commitB commitC tag_v2008.10 2) then I commit my own patches at the top with git am 0001-myPatch1.patch 0002-myPatch2.patch tag_v1.3.3 commitA commitB commitC tag_v2008.10 myPatch1 myPatch2 That makes no sense, if your patches are based on 1.3.3 - most probably, they will not even apply correctly on top of v2008.10; what you need is this: tag_v1.3.3 x-- your_branch---+ commitA myPatch1 commitB myPatch2 commitC tag_v2008.10 3) then I try to git rebase -i v1.3.3 to reorder the commits in my branch in the following way (which failed): That's wrong again. Here you need to do a git rebase -i master, which will move the point where you branched off the master branch (marked in the pictures above with 'x') to the top of tree commit; if successful, the result will then look like this: tag_v1.3.3 commitA myPatch1 commitB myPatch2 commitC tag_v2008.10 tag_v1.3.3 commitA commitB commitC tag_v2008.10 x-- your_branch---+ myPatch1' myPatch2' 4) After that I wanted to do a git bisect between tag_v1.3.3 and tag_v2008.10 to find the commit when my port stops working. Using bisect makes absolutely no sense to me in this context. I see, this would move my patches from after tag_v1.3.3 up to HEAD, but what I tried to accomplish was to distribute them back in the timeline to make bisect work at each point between v1.3.3 and v2008.10. You cannot go backward. You could only start your own branch, and then git-cherry-pick one patch after the other from the master branch, and after each step clean up / add fixes as needed. Then you can git-rebase -i your branch to consolidate patches. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de The human mind ordinarily operates at only ten percent of its capacity. The rest is overhead for the operating system. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] FPGA programming driver architecture
On Fri, 12 Dec 2008 15:00:47 -0500 Hugo Villeneuve h...@hugovil.com wrote: Hi, I have written some code to program a FPGA in Linux... Sorry, wrong mailing list :) Hugo V. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] mpc83xx: Size optimization of start.S
Currently there are in excess of 100 bytes located at the beginning of the image built by start.S that are not being utilized. This patch moves a few functions into this part of the image. This will create a greater number of *available* bytes that can be used by board specific code in NAND builds and will decrease the size of the assembled code in other builds. Signed-off-by: Ron Madrid ron_mad...@sbcglobal.net --- cpu/mpc83xx/start.S | 77 ++- 1 files changed, 39 insertions(+), 38 deletions(-) diff --git a/cpu/mpc83xx/start.S b/cpu/mpc83xx/start.S index cd566b2..b040e3b 100644 --- a/cpu/mpc83xx/start.S +++ b/cpu/mpc83xx/start.S @@ -108,6 +108,45 @@ version_string: .ascii (, __DATE__, - , __TIME__, ) .ascii , CONFIG_IDENT_STRING, \0 + .align 2 + + .globl enable_addr_trans +enable_addr_trans: + /* enable address translation */ + mfmsr r5 + ori r5, r5, (MSR_IR | MSR_DR) + mtmsr r5 + isync + blr + + .globl disable_addr_trans +disable_addr_trans: + /* disable address translation */ + mflrr4 + mfmsr r3 + andi. r0, r3, (MSR_IR | MSR_DR) + beqlr + andcr3, r3, r0 + mtspr SRR0, r4 + mtspr SRR1, r3 + rfi + + .globl get_pvr +get_pvr: + mfspr r3, PVR + blr + + .globl ppcDWstore +ppcDWstore: + lfd 1, 0(r4) + stfd1, 0(r3) + blr + + .globl ppcDWload +ppcDWload: + lfd 1, 0(r3) + stfd1, 0(r4) + blr #ifndef CONFIG_DEFAULT_IMMR #error CONFIG_DEFAULT_IMMR must be defined @@ -697,27 +736,6 @@ setup_bats: blr - .globl enable_addr_trans -enable_addr_trans: - /* enable address translation */ - mfmsr r5 - ori r5, r5, (MSR_IR | MSR_DR) - mtmsr r5 - isync - blr - - .globl disable_addr_trans -disable_addr_trans: - /* disable address translation */ - mflrr4 - mfmsr r3 - andi. r0, r3, (MSR_IR | MSR_DR) - beqlr - andcr3, r3, r0 - mtspr SRR0, r4 - mtspr SRR1, r3 - rfi - /* Cache functions. * * Note: requires that all cache bits in @@ -795,23 +813,6 @@ flush_dcache: b 1b 2: blr - .globl get_pvr -get_pvr: - mfspr r3, PVR - blr - - .globl ppcDWstore -ppcDWstore: - lfd 1, 0(r4) - stfd1, 0(r3) - blr - - .globl ppcDWload -ppcDWload: - lfd 1, 0(r3) - stfd1, 0(r4) - blr - /*---*/ /* -- 1.5.5.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] FPGA programming driver architecture
Dear Hugo Villeneuve, In message 20081212150047.e3dbbbef.h...@hugovil.com you wrote: I have written some code to program a FPGA in Linux, for two different types of boards: one uses a serial interface (SPI) and the second a parallel interface. I have been able to sucessfully program both boards. I'm now trying to clean my code and make it more generic, as well as better in line with the Linux driver model. I would also like to include it in the mainline kernel if there is interest. Your lines are way too long, and discussing Linux kernel code is off topic here. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de When all else fails, read the instructions. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [ubi] Please pull git://www.denx.de/git/u-boot-ubi.git
Dear Stefan Roese, In message 200812091009.47977...@denx.de you wrote: The following changes since commit 13d36ec849785453953d00220b2c7dc66644a3c2: Wolfgang Denk (1): Merge branch 'master' of git://git.denx.de/u-boot-at91 are available in the git repository at: git://www.denx.de/git/u-boot-ubi.git master Stefan Roese (3): MTD: Fix problem based on non-working relocation (list head mtd_partitions) UBI: Enable re-initializing of the ubi part command UBI: Fix size parsing in ubi create common/cmd_ubi.c| 13 - drivers/mtd/mtdpart.c | 10 +- drivers/mtd/ubi/build.c |1 + include/ubi_uboot.h |1 + 4 files changed, 23 insertions(+), 2 deletions(-) Aplied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Common sense and a sense of humor are the same thing, moving at different speeds. A sense of humor is just common sense, dancing. - Clive James ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [ubi] Please pull git://www.denx.de/git/u-boot-ubi.git
Dear Stefan Roese, In message 200812101307.41102...@denx.de you wrote: Hi Wolfgang, this is an updated pull-request for the UBI repository. I added the latest 2 small patches. The following changes since commit 13d36ec849785453953d00220b2c7dc66644a3c2: Wolfgang Denk (1): Merge branch 'master' of git://git.denx.de/u-boot-at91 are available in the git repository at: git://www.denx.de/git/u-boot-ubi.git master Stefan Roese (5): MTD: Fix problem based on non-working relocation (list head mtd_partitions) UBI: Enable re-initializing of the ubi part command UBI: Fix size parsing in ubi create UBI: Return -ENOMEM upon failing malloc UBI: Set ubi_dev.type back to DEV_TYPE_NONE upon failing initialization common/cmd_ubi.c| 14 +- drivers/mtd/mtdpart.c | 10 +- drivers/mtd/ubi/build.c |6 -- include/ubi_uboot.h |1 + 4 files changed, 27 insertions(+), 4 deletions(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Unix is like a toll road on which you have to stop every 50 feet to pay another nickel. But hey! You only feel 5 cents poorer each time. - Larry Wall in 1992aug13.192357.15...@netlabs.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request: u-boot-video
Dear Anatolij Gustschin, In message 493eac54.9040...@denx.de you wrote: The following changes since commit 13d36ec849785453953d00220b2c7dc66644a3c2: Wolfgang Denk (1): Merge branch 'master' of git://git.denx.de/u-boot-at91 are available in the git repository at: git://git.denx.de/u-boot-video.git master Anatolij Gustschin (1): video: fix FADS823 and RRvision compiling issues cpu/mpc8xx/video.c |2 -- 1 files changed, 0 insertions(+), 2 deletions(-) Done, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de It is impractical for the standard to attempt to constrain the behavior of code that does not obey the constraints of the standard. - Doug Gwyn ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request: u-boot-sh
Dear Nobuhiro Iwamatsu, In message 20081210232023.5dd0283d.iwama...@nigauri.org you wrote: are available in the git repository at: git://git.denx.de/u-boot-sh.git master Jean-Christophe PLAGNIOL-VILLARD (3): sh: fix rsk7203 and MigoR out of tree build sh: r2dplus/lowlevel_init: coding style fix sh: r2dplus fix register access Nobuhiro Iwamatsu (6): sh: Update SuperH serial driver sh: Update ms7722se board config sh: Migo-R: Update BSC value sh: Update sh timer function sh: Changed value of CACHE_OC_NUM_ENTRIES and CACHE_OC_WAY_SHIFT sh: Update sh2/sh2a timer Makefile |4 +- board/renesas/MigoR/lowlevel_init.S | 32 +- board/renesas/r2dplus/lowlevel_init.S | 44 +++--- cpu/sh2/Makefile |2 +- cpu/sh3/Makefile |2 +- cpu/sh3/time.c| 103 - cpu/sh4/Makefile |2 +- cpu/sh4/time.c| 98 --- drivers/pci/pci_sh7751.c |4 +- drivers/serial/serial_sh.c|2 +- include/asm-sh/cpu_sh4.h |7 ++ include/configs/ms7722se.h|3 + lib_sh/Makefile |6 ++- lib_sh/time.c | 83 +-- cpu/sh2/time.c = lib_sh/time_sh2.c | 16 -- 15 files changed, 138 insertions(+), 270 deletions(-) delete mode 100644 cpu/sh3/time.c delete mode 100644 cpu/sh4/time.c rename cpu/sh2/time.c = lib_sh/time_sh2.c (91%) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Without freedom of choice there is no creativity. -- Kirk, The return of the Archons, stardate 3157.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [GIT PULL] MIPS updates
Dear Shinya Kuribayashi, In message 493fda82.7000...@ruby.dti.ne.jp you wrote: The following changes since commit 2145188bea2df8f2b47a87ec3071b55027e8d0ae: Ben Warren (1): Fix compile error in building MBX860T. are available in the git repository at: git://git.denx.de/u-boot-mips.git master Stefan Roese (4): MIPS: Add onenand_init() to board.c and move nand_init() MIPS: Add board_early_init_f() to init_sequence MIPS: Add CONFIG_SKIP_LOWLEVEL_INIT MIPS: Flush data cache upon relocation cpu/mips/start.S | 32 +--- lib_mips/board.c | 25 - 2 files changed, 45 insertions(+), 12 deletions(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Perfection is reached, not when there is no longer anything to add, but when there is no longer anything to take away. - Antoine de Saint-Exupery ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [ppc4xx] Please pull git://www.denx.de/git/u-boot-ppc4xx.git
Dear Stefan Roese, In message 200812101723.27445...@denx.de you wrote: The following changes since commit 2145188bea2df8f2b47a87ec3071b55027e8d0ae: Ben Warren (1): Fix compile error in building MBX860T. are available in the git repository at: git://www.denx.de/git/u-boot-ppc4xx.git master Matthias Fuchs (3): ppc4xx: Update TEXT_BASE for CPCI405 boards ppc4xx: Fix Ethernet PHY LED configuration on PMC440 boards ppc4xx: Disable EEPROM write access on PMC440 boards Stefan Roese (1): ppc4xx: Remove some features from ALPR to fit into 256k again Makefile|5 + board/esd/cpci405/config.mk |6 +- board/esd/pmc440/pmc440.c | 24 +++- include/configs/CPCI405.h |6 +++--- include/configs/alpr.h |5 + 5 files changed, 25 insertions(+), 21 deletions(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de The glory of creation is in its infinite diversity. And in the way our differences combine to create meaning and beauty. -- Dr. Miranda Jones and Spock, Is There in Truth No Beauty?, stardate 5630.8 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] reducing u-boot.bin size
Hello, I am trying to reduce the size of the u-boot.bin file so that it fits into a 256KB promjet. I disabled all the drivers that I didn't need and have just kept the NOR driver but the binary size is still 512KB, it seems to be a hard number coded in somewhere. I would have thought this was the size of the .data section set somewhere in the linker script but it does not appear to be so. Does anyone know where the image size can be altered from? Thanks, Fahd Abidi Sr. Field Application Engineer Ultimate Solutions, Inc. Your Single Source for Professional Development Tools and Embedded Solutions Ph: 978-455-3383 x255 Fx: 978-926-3091 Email: fab...@ultsol.com Visit: http://www.ultsol.com http://www.ultsol.com/ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] FPGA programming driver architecture
On Sat, 13 Dec 2008 00:10:26 +0100 Wolfgang Denk w...@denx.de wrote: Dear Hugo Villeneuve, In message 20081212150047.e3dbbbef.h...@hugovil.com you wrote: I have written some code to program a FPGA in Linux, for two different types of boards: one uses a serial interface (SPI) and the second a parallel interface. I have been able to sucessfully program both boards. I'm now trying to clean my code and make it more generic, as well as better in line with the Linux driver model. I would also like to include it in the mainline kernel if there is interest. Your lines are way too long, and discussing Linux kernel code is off topic here. You probably have missed the email I sent 30 seconds after having sent the first one stating it was the wrong list. Please read your emails carefully next time. Hugo V. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
