[U-Boot] Please pull u-boot-coldfire/master
The following changes since commit c4976807cbbabd281f45466ac5e47e5639bcc9cb: Wolfgang Denk (1): Coding style cleanup, update CHANGELOG. are available in the git repository at: git://git.denx.de/u-boot-coldfire.git master Wolfgang Denk (1): Prepare v2010.06-rc1 Wolfgang Wegner (3): add missing PCS3 for MCF5445x add CONFIG_SYS_FEC_NO_SHARED_PHY for MCF5445x add CONFIG_SYS_FEC_FULL_MII for MCF5445x Makefile |4 ++-- arch/m68k/cpu/mcf5445x/cpu_init.c | 31 +-- arch/m68k/include/asm/m5445x.h|1 + 3 files changed, 32 insertions(+), 4 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] No network in Linux on Olimex SAM9_L9260 (Atmel AT91SAM9260EK)
Hi, I'm using an Olimex SAM9_L9260 based board here, which currently uses an U-Boot 1.2 delivered by Olimex. Sadly this U-Boot version always marks it's enviroment area as bad block on each write (probably it is patched by Olimex to work with an old Atmel Sam-Ba version, that has the same error and is a different story). So I've decided to compile a new U-Boot. My Toolchain is Codesourcery 2010q1 on a 32 bit Slackware Linux and I've used U-Boot 2010.03 sources. The board runs a 2.6.24-rt kernel with patch for Olimex support. As the Olimex board is heavily based on the Atmel AT91SAM9260EK board I've decided to build U-Boot for this one. I only had to tweak the machine type so that Linux can be started. On Linux bootup I've noticed that the board is not able to get an IP via DHCP with the new bootloader. On my research for the problem I've found out that U-Boot won't detect any PHY. Google search returned that I have to modify board/atmel/at91sam9260ek/at91sam9260ek.c for the PHY on the Olimex board: from rc = macb_eth_initialize(0, (void *)AT91SAM9260_BASE_EMAC, 0x00); to rc = macb_eth_initialize(0, (void *)AT91SAM9260_BASE_EMAC, 0x01); After that U-Boot detects a macb but still no DHCP answer in Linux. I've tried the old 1.2 bootloader again and DHCP works fine. So my questions for now are: 1. Does U-Boot have to detect the PHY and initialize it or is it just needed for network bootup? 2. After endless compile sessions (I never compiled u-boot before) I'm completely out of any idea what I can try now to get network in Linux working. Any suggestions? :-) It would be really great to receive some help because this board has already driven me mad because of the Atmel Sam-Ba flas tool bugs I've mentioned before. ;-) Thanks in advance. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] No network in Linux on Olimex SAM9_L9260 (Atmel AT91SAM9260EK)
Hi, Le 28/05/2010 10:29, Thorsten Mühlfelder a écrit : 2. After endless compile sessions (I never compiled u-boot before) I'm completely out of any idea what I can try now to get network in Linux working. Any suggestions? :-) are you sure the PHY is wired the same way as on the eval board ? It can be either MII or RMII which makes a big difference. Eric ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] No network in Linux on Olimex SAM9_L9260 (Atmel AT91SAM9260EK)
Hi Thorsten, 2010/5/28 Thorsten Mühlfelder muehlfel...@enertex.de: So I've decided to compile a new U-Boot. My Toolchain is Codesourcery 2010q1 on a 32 bit Slackware Linux and I've used U-Boot 2010.03 sources. The board runs a 2.6.24-rt kernel with patch for Olimex support. As the Olimex board is heavily based on the Atmel AT91SAM9260EK board I've decided to build U-Boot for this one. I only had to tweak the machine type so that Linux can be started. I've done the same on earlier occasions, although I can't remember if it worked or not. However, in my latest project, I've used U-Boot 2009.08, together with a selected sets of the patches from Olimex. http://www.olimex.com/dev/soft/arm/SAM9/u-boot-olimex-patches-20090717.tgz It shouldn't be too hard to apply them to a later U-Boot-version, although minor changes might be needed. In such a way, I've no problems at all using the PHY from U-Boot. On Linux bootup I've noticed that the board is not able to get an IP via DHCP with the new bootloader. On my research for the problem I've found out that U-Boot won't detect any PHY. No problems here either. (And I've been running most kernels between 2.6.27 and 2.6.32 on the board). If you don't go for the Olimex patches, take Eric's advise and check the MII and RMII settings. Regards, Anders -- Anders Darander EPO guidelines 1978: If the contribution to the known art resides solely in a computer program then the subject matter is not patentable in whatever manner it may be presented in the claims. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] No network in Linux on Olimex SAM9_L926 0 ( Atmel AT91SAM9260EK )
Am Friday 28 May 2010 10:45:39 schrieb Eric Bénard: Hi, Le 28/05/2010 10:29, Thorsten Mühlfelder a écrit : 2. After endless compile sessions (I never compiled u-boot before) I'm completely out of any idea what I can try now to get network in Linux working. Any suggestions? :-) are you sure the PHY is wired the same way as on the eval board ? It can be either MII or RMII which makes a big difference. Eric Thank you very much, you made my day!! :-) I've checked the include/configs/at91sam9260ek.h file for ethernet settings. There was #define CONFIG_RMII 1 set. I've changed the section to: /* Ethernet */ #define CONFIG_MACB 1 #undef CONFIG_RMII #define CONFIG_NET_MULTI1 #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_RESET_PHY_R 1 And now it works! Yesterday I've wasted my whole day on this issue but today evening I'll have a beer on you ;-) Cheers! ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [Nios2-dev] [PATCH] nios2: use gc sections to reduce image size
On 28/05/2010 05:08, Thomas Chou wrote: Follow the discussion of Charles Manning and Mike Frysinger. Using gc_sections helps reduce image size. Configuring for nios2-generic board... Before, textdata bss dec hex filename 1239793724 22892 150595 24c43 /tmp/u-boot/u-boot After, textdata bss dec hex filename 1159833800 22732 142515 22cb3 /tmp/u-boot/u-boot Signed-off-by: Thomas Chou tho...@wytron.com.tw --- arch/nios2/config.mk |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/arch/nios2/config.mk b/arch/nios2/config.mk index 793cc43..aba96b3 100644 --- a/arch/nios2/config.mk +++ b/arch/nios2/config.mk @@ -31,2 +31,5 @@ PLATFORM_CPPFLAGS += -DCONFIG_NIOS2 -D__NIOS2__ LDSCRIPT ?= $(SRCTREE)/$(CPUDIR)/u-boot.lds + +LDFLAGS += --gc-sections +PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections Hi Thomas, Will that stop it working with the gcc3-based nios2 nommu toolchain? The version of 'ld' in that toolchain doesn't support the --gc-sections option. -- -=( Ian Abbott @ MEV Ltd.E-mail: abbo...@mev.co.uk )=- -=( Tel: +44 (0)161 477 1898 FAX: +44 (0)161 718 3587 )=- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] No network in Linux on Olimex SAM9_L9260 (Atmel AT91SAM9260EK)
Am Friday 28 May 2010 11:05:58 schrieben Sie: Hi Thorsten, 2010/5/28 Thorsten Mühlfelder muehlfel...@enertex.de: So I've decided to compile a new U-Boot. My Toolchain is Codesourcery 2010q1 on a 32 bit Slackware Linux and I've used U-Boot 2010.03 sources. The board runs a 2.6.24-rt kernel with patch for Olimex support. As the Olimex board is heavily based on the Atmel AT91SAM9260EK board I've decided to build U-Boot for this one. I only had to tweak the machine type so that Linux can be started. I've done the same on earlier occasions, although I can't remember if it worked or not. However, in my latest project, I've used U-Boot 2009.08, together with a selected sets of the patches from Olimex. http://www.olimex.com/dev/soft/arm/SAM9/u-boot-olimex-patches-20090717.tgz It shouldn't be too hard to apply them to a later U-Boot-version, although minor changes might be needed. Hey, I've found these patches, too. But I had problems compiling a patched U-Boot, even if I tried older U-Boot versions and older toolchain versions. I could fix some compiler errors, but not all of them. But I should have taken a closer look to the patch set, because... If you don't go for the Olimex patches, take Eric's advise and check the MII and RMII settings. It's clearly stated in the patch, that I had to #undef CONFIG_RMII but I just did not see it. Probably it was to late in the evening yesterday :-D Regards, Anders Regards Thorsten ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] s5pc1xx: Add support for Samsung Goni board
This patch adds support for the Samsung Goni board (S5PC110 SoC) Signed-off-by: Minkyu Kang mk7.k...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com --- MAINTAINERS|1 + MAKEALL|1 + Makefile |3 + board/samsung/goni/Makefile| 54 board/samsung/goni/config.mk | 16 + board/samsung/goni/goni.c | 60 board/samsung/goni/lowlevel_init.S | 585 board/samsung/goni/mem_setup.S | 265 board/samsung/goni/onenand.c | 36 +++ include/configs/s5p_goni.h | 241 +++ 10 files changed, 1262 insertions(+), 0 deletions(-) create mode 100644 board/samsung/goni/Makefile create mode 100644 board/samsung/goni/config.mk create mode 100644 board/samsung/goni/goni.c create mode 100644 board/samsung/goni/lowlevel_init.S create mode 100644 board/samsung/goni/mem_setup.S create mode 100644 board/samsung/goni/onenand.c create mode 100644 include/configs/s5p_goni.h diff --git a/MAINTAINERS b/MAINTAINERS index 7f688c3..d00756f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -628,6 +628,7 @@ Simon Kagstrom simon.kagst...@netinsight.net Minkyu Kang mk7.k...@samsung.com SMDKC100ARM CORTEX-A8 (S5PC100 SoC) + s5p_goniARM CORTEX-A8 (S5PC110 SoC) Nishant Kamat nska...@ti.com diff --git a/MAKEALL b/MAKEALL index 326bde0..f1eefb6 100755 --- a/MAKEALL +++ b/MAKEALL @@ -649,6 +649,7 @@ LIST_ARM_CORTEX_A8=\ omap3_zoom1 \ omap3_zoom2 \ smdkc100\ + s5p_goni\ # diff --git a/Makefile b/Makefile index e49def3..ef37b99 100644 --- a/Makefile +++ b/Makefile @@ -3179,6 +3179,9 @@ omap3_zoom2_config : unconfig smdkc100_config: unconfig @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 smdkc100 samsung s5pc1xx +s5p_goni_config: unconfig + @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 goni samsung s5pc1xx + # ## XScale Systems # diff --git a/board/samsung/goni/Makefile b/board/samsung/goni/Makefile new file mode 100644 index 000..9b4c886 --- /dev/null +++ b/board/samsung/goni/Makefile @@ -0,0 +1,54 @@ +# +# (C) Copyright 2000, 2001, 2002 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de. +# +# (C) Copyright 2008 +# Guennadi Liakhovetki, DENX Software Engineering, l...@denx.de +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).a + +COBJS-y:= goni.o onenand.o +SOBJS := lowlevel_init.o + +SRCS:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB):$(obj).depend $(SOBJS) $(OBJS) + $(AR) $(ARFLAGS) $@ $(SOBJS) $(OBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/board/samsung/goni/config.mk b/board/samsung/goni/config.mk new file mode 100644 index 000..2da9ca1 --- /dev/null +++ b/board/samsung/goni/config.mk @@ -0,0 +1,16 @@ +# +# Copyright (C) 2008 # Samsung Elecgtronics +# Kyungmin Park kyungmin.p...@samsung.com +# + +# On S5PC100 we use the 128 MiB OneDRAM bank at +# +# 0x3000 to 0x3500 (80MiB) +# 0x3800 to 0x4000 (128MiB) +# +# On S5PC110 we use the 128 MiB OneDRAM bank at +# +# 0x3000 to 0x3500 (80MiB) +# 0x4000 to 0x5000 (256MiB) +# +TEXT_BASE = 0x3480 diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c new file mode 100644 index 000..0defb7b --- /dev/null +++ b/board/samsung/goni/goni.c @@ -0,0 +1,60 @@ +/* + * Copyright (C) 2008-2009 Samsung Electronics + *
Re: [U-Boot] [PATCH] 85xx/p2020ds: Use is_serdes_configured() to determine of PCIe enabled
On May 27, 2010, at 4:38 PM, Timur Tabi wrote:
On Fri, May 21, 2010 at 4:17 AM, Kumar Gala ga...@kernel.crashing.org wrote:
if (pcie_configured !(devdisr MPC85xx_DEVDISR_PCIE2)) {
+ set_next_law(CONFIG_SYS_PCIE2_MEM_PHYS, LAW_SIZE_512M,
+ LAW_TRGT_IF_PCIE_2);
+ set_next_law(CONFIG_SYS_PCIE2_IO_PHYS, LAW_SIZE_64K,
+ LAW_TRGT_IF_PCIE_2);
SET_STD_PCIE_INFO(pci_info[num], 2);
How about this instead:
SET_STD_PCIE_INFO(pci_info[num], 2);
+ set_next_law(pci_info[num].mem_phys,
+ law_size_bits(pci_info[num].mem_size),
+ LAW_TRGT_IF_PCIE_2);
+ set_next_law(pci_info[num].io_phys,
+ law_size_bits(pci_info[num].io_size),
+ LAW_TRGT_IF_PCIE_2);
that's fine. We could fold the law setup into fsl_pci_init_port()
* tweak SET_STD_PCIE_INFO to track LAW_TRGT_IF_PCIE_n
* add something like the following to fsl_pci_init_port():
struct law_entry law;
law = find_law(pci_info-mem_phys);
if (law.index == -1) {
law.index = set_next_law(pci_info-mem_phys,
law_size_bits(pci_info-mem_size),
pci_info-law_trgt_id);
}
/* duplicate for IO */
- k
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Re: [U-Boot] [PATCH 0/4 v2] Makefile: rework / cleanup
Wolfgang Denk wrote: In message 4bff1e99.8020...@wytron.com.tw you wrote: But old nios-32 arch is broken and will be removed soon. Shall I perform the removal based on current head or after these patches applied? I don't really care - the chages are simple enough. I see your patch - if this is OK with Scott I think we could / should even include this in the upcoming 2006.06 release. Scott, what do you think? Let's do it asap. Thomas, if you can rebase this to the nios next branch, I'll pull it in and submit a pull request this afternoon that will include the other pending patches. Thanks, --Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Help neede on MPC8315 I2C Interface
Hi all, i am working on MPC8315 based board and i am able to port the U-Boot with (VERSION = 2009, PATCHLEVEL = 11, SUBLEVEL = 1). In my board one Temperature sensor chip is connected and i am not able to access the chip from u-Boot. The processor is getting initialized during power-up using I2C EEPROM but once powered up U-Boot is giving time out error when ever i am trying to access the EEPROM and temperature sensor. when i probe the clock signal it is coming only when the processor is getting initialized from the EEPROM. i have disabled the the PCI interface in U-boot since in my board no PCI devices are there. U-Boot 2009.11.1 (May 28 2010 - 15:19:41) MPC83XX Reset Status: Software Hard, External/Internal Soft, External/Internal Hard CPU: e300c3, MPC8315E, Rev: 1.2 at 266.667 MHz, CSB: 133.333 MHz Board: MPC8315CTI Rev A i2c_wait: timed out i2c_wait: timed out I2C VAL = 0 I2C: Requested speed:1, i2c_clk:13334 FDR:0x3c, div:20480, ga:0x4, gb:0x7, a:10, b:2048, speed:6510 Tr = 15225 ns FDR:0x3a, div:14336, ga:0x6, gb:0x6, a:14, b:1024, speed:9300 Tr = 7545 ns divider:1, est_div:14336, DFSR:6 FDR:0x3a, speed:9300 ready DRAM: 64 MB FLASH: 64 MB Requested speed:1, i2c_clk:13334 FDR:0x3c, div:20480, ga:0x4, gb:0x7, a:10, b:2048, speed:6510 Tr = 15225 ns FDR:0x3a, div:14336, ga:0x6, gb:0x6, a:14, b:1024, speed:9300 Tr = 7545 ns divider:1, est_div:14336, DFSR:6 FDR:0x3a, speed:9300 In: serial Out: serial Err: serial i2c_wait: timed out DTT: 1 FAILED INIT Net: eTSEC0, eTSEC1 please help me to find out why there is no activity in MPC8315 I2C interface once U-Boot got loaded. Thanks, Vaasu. TV ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/4 v2] Makefile: rework / cleanup
Scott McNutt wrote: Wolfgang Denk wrote: In message 4bff1e99.8020...@wytron.com.tw you wrote: But old nios-32 arch is broken and will be removed soon. Shall I perform the removal based on current head or after these patches applied? I don't really care - the chages are simple enough. I see your patch - if this is OK with Scott I think we could / should even include this in the upcoming 2006.06 release. Scott, what do you think? Let's do it asap. Thomas, if you can rebase this to the nios next branch, I'll pull it in and submit a pull request this afternoon that will include the other pending patches. Thanks, --Scott Hi Scott, Great! Please pull the branch which is rebased to nios next. git://sopc.et.ntust.edu.tw/git/u-boot.git rm_nios32_v2 Cheers, Thomas ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] 85xx/p2020ds: Use is_serdes_configured() to determine of PCIe enabled
Kumar Gala wrote:
* tweak SET_STD_PCIE_INFO to track LAW_TRGT_IF_PCIE_n
* add something like the following to fsl_pci_init_port():
struct law_entry law;
law = find_law(pci_info-mem_phys);
if (law.index == -1) {
law.index = set_next_law(pci_info-mem_phys,
law_size_bits(pci_info-mem_size),
pci_info-law_trgt_id);
}
/* duplicate for IO */
Ok, I'll add it to my list for the PCI revamp.
--
Timur Tabi
Linux kernel developer at Freescale
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Re: [U-Boot] [PATCH 0/4 v2] Makefile: rework / cleanup
Wolfgang Denk wrote: Dear Thomas Chou, In message 4bff1e99.8020...@wytron.com.tw you wrote: Build and tested nios2 on boards. Thanks. Could you please send a formal Tested-by: ? Dear Wolfgang, I would suggest that we can remove the nios2-generic rule from the Makefile altogether. Then add this to boards.cfg. nios2-generic nios2 nios2 nios2-generic altera Instances of nios2-generic can be added to boards.cfg in the same way. Your solution is cleaner. I have tested this update, too. Tested-by: Thomas Chou tho...@wytron.com.tw ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [Nios] Pull Request
Dear Wolfgang, The following changes since commit 01f03bda5b22e5aeae5f02fd537da97a41485c73: Wolfgang Denk (1): Prepare v2010.06-rc1 are available in the git repository at: git://git.denx.de/u-boot-nios.git next Thomas Chou (8): nios2: add gpio support misc: add gpio based status led driver nios2: add gpio support to nios2-generic board spi: add altera spi controller support nios2: fix r15 issue for gcc4 nios2: fix div64 issue for gcc4 nios2: allow STANDALONE_LOAD_ADDR overriding nios: remove nios-32 arch MAINTAINERS | 16 - MAKEALL | 17 +- Makefile | 62 --- README| 15 +- arch/nios/config.mk | 29 -- arch/nios/cpu/Makefile| 48 --- arch/nios/cpu/asmi.c | 695 - arch/nios/cpu/config.mk | 24 -- arch/nios/cpu/cpu.c | 78 arch/nios/cpu/interrupts.c| 196 - arch/nios/cpu/serial.c| 135 --- arch/nios/cpu/spi.c | 195 - arch/nios/cpu/start.S | 238 --- arch/nios/cpu/traps.S | 582 --- arch/nios/include/asm/bitops.h| 38 -- arch/nios/include/asm/byteorder.h | 30 -- arch/nios/include/asm/cache.h |1 - arch/nios/include/asm/config.h| 27 -- arch/nios/include/asm/global_data.h | 54 --- arch/nios/include/asm/io.h| 141 --- arch/nios/include/asm/posix_types.h | 63 --- arch/nios/include/asm/processor.h |1 - arch/nios/include/asm/psr.h | 28 -- arch/nios/include/asm/ptrace.h| 36 -- arch/nios/include/asm/status_led.h| 132 --- arch/nios/include/asm/string.h| 25 -- arch/nios/include/asm/system.h|4 - arch/nios/include/asm/types.h | 60 --- arch/nios/include/asm/u-boot.h| 48 --- arch/nios/lib/Makefile| 50 --- arch/nios/lib/board.c | 168 arch/nios/lib/bootm.c | 34 -- arch/nios/lib/cache.c | 32 -- arch/nios/lib/divmod.c| 101 - arch/nios/lib/math.h | 16 - arch/nios/lib/mult.c | 56 --- arch/nios/lib/time.c | 38 -- arch/nios2/config.mk |4 +- arch/nios2/cpu/start.S|7 - arch/nios2/include/asm/global_data.h |2 +- arch/nios2/include/asm/gpio.h | 52 +++ arch/nios2/lib/Makefile |3 +- arch/nios2/lib/divmod.c | 101 - arch/nios2/lib/libgcc.c | 592 arch/nios2/lib/longlong.h | 263 + arch/nios2/lib/math.h | 16 - arch/nios2/lib/mult.c | 56 --- board/altera/dk1c20/Makefile | 51 --- board/altera/dk1c20/config.mk | 29 -- board/altera/dk1c20/dk1c20.c | 93 - board/altera/dk1c20/flash.c | 62 --- board/altera/dk1c20/misc.c| 33 -- board/altera/dk1c20/u-boot.lds| 70 board/altera/dk1c20/vectors.S | 123 -- board/altera/dk1s10/Makefile | 51 --- board/altera/dk1s10/config.mk | 29 -- board/altera/dk1s10/dk1s10.c | 72 board/altera/dk1s10/flash.c | 62 --- board/altera/dk1s10/misc.c| 33 -- board/altera/dk1s10/u-boot.lds| 70 board/altera/dk1s10/vectors.S | 139 --- board/altera/nios2-generic/Makefile |1 + board/altera/nios2-generic/gpio.c | 55 +++ board/ssv/adnpesc1/Makefile | 51 --- board/ssv/adnpesc1/adnpesc1.c | 103 - board/ssv/adnpesc1/config.mk | 29 -- board/ssv/adnpesc1/flash.c| 66 --- board/ssv/adnpesc1/misc.c | 40 -- board/ssv/adnpesc1/u-boot.lds | 70 board/ssv/adnpesc1/vectors.S | 138 --- board/ssv/common/cmd_sled.c | 162 board/ssv/common/flash.c | 207 -- board/ssv/common/post.c | 44 -- board/ssv/common/wd_pio.c | 160 common/cmd_bdinfo.c | 19 - common/cmd_bootm.c|2 - common/image.c|1 - config.mk |8 - doc/README.adnpesc1 | 235 --- doc/README.adnpesc1_base32| 469 -- doc/README.dk1c20 | 153 doc/README.dk1c20_std32 | 366 - doc/README.dk1s10 | 131 --
Re: [U-Boot] [PATCH v2] ARM1136: Fix cache_flush() error and correct cpu_init_crit() comments
Ping,
On Thu, May 13, 2010 at 11:41:13AM +0200, Dirk Behme wrote:
On 11.05.2010 16:15, gda...@mvista.com wrote:
From: George G. Davisgda...@mvista.com
The ARM1136 cache_flush() function uses the mcr p15, 0, rn, c7, c7, 0
instruction which means Invalidate Both Caches when in fact the intent
is to clean and invalidate all caches. So add an mcr p15, 0, %0, c7,
c10, 0 instruction to Clean Entire Data Cache prior to the Invalidate
Both Caches instruction to insure that memory is consistent with any
dirty cache lines.
Also fix a couple of flush v* comments in ARM1136 cpu_init_crit() so
that they correctly describe the actual ARM1136 CP15 C7 Cache Operations
used.
Signed-off-by: George G. Davisgda...@mvista.com
Acked-by: Dirk Behme dirk.be...@googlemail.com
Is this OK now or does it need more work? Perhaps I should CC the
u-boot/u-boot-arm.git fork maintainer?
TIA!
--
Regards,
George
Thanks
Dirk
---
arch/arm/cpu/arm1136/cpu.c |1 +
arch/arm/cpu/arm1136/start.S |4 ++--
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/arm1136/cpu.c b/arch/arm/cpu/arm1136/cpu.c
index ade7f46..2b91631 100644
--- a/arch/arm/cpu/arm1136/cpu.c
+++ b/arch/arm/cpu/arm1136/cpu.c
@@ -71,6 +71,7 @@ static void cache_flush(void)
{
unsigned long i = 0;
+asm (mcr p15, 0, %0, c7, c10, 0: :r (i)); /* clean entire data
cache */
asm (mcr p15, 0, %0, c7, c7, 0: :r (i)); /* invalidate both caches
and flush btb */
asm (mcr p15, 0, %0, c7, c10, 4: :r (i)); /* mem barrier to sync
things */
}
diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index 957f438..922d01c 100644
--- a/arch/arm/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
@@ -226,8 +226,8 @@ cpu_init_crit:
* flush v4 I/D caches
*/
mov r0, #0
-mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
-mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
+mcr p15, 0, r0, c7, c7, 0 /* Invalidate I+D+BTB caches */
+mcr p15, 0, r0, c8, c7, 0 /* Invalidate Unified TLB */
/*
* disable MMU stuff and caches
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[U-Boot] Trying to redirect console in Gumstix Overo
I would like to change the console from UART3 to UART2 on a Gumstix Overo platform. Here is what I have done thus far, which doesn't work (as explained below): Made the following tweaks in include/configs/omap3_overo.h: a. Changed the console definitions to be: #define CONFIG_CONS_INDEX 2 #define CONFIG_SYS_NS16550_COM2 OMAP34XX_UART2 #define CONFIG_SERIAL2 2 b. Changed the console line in CONFIG_EXTRA_ENV_SETTINGS to be: console=ttyS1,115200n8\0 This isn't quite working. When I initially boot the Overo, I get the following brief output (on ttyS2, not ttyS1), but then the computer doesn't boot further: Texas Instruments X-Loader 1.4.3 (Feb 16 2010 - 10:36:47) Reading boot sector Loading u-boot.bin from mmc What else do I need to change? Is there some default environment or NAND settings or anything else I need to change or get rid of before this will work? I am running of an SD card. Any insight is very appreciated! John John P. Wilson Engineer Erigo Technologies LLC 64 Main St./P.O. Box 899 Enfield, NH 03748 P: 603.632.4156 C: 603.252.2087 F: 603.676.0162 www.erigo.com http://exchweb/bin/redir.asp?URL=http://www.erigo.com Notice: This email (including attachments) is covered by the Electronic Communications Privacy Act, 18 U.S.C. §§ 2510-2521, is confidential and may be legally privileged. If you are not the intended recipient, you are hereby notified that any retention dissemination, distribution, or copying of this communication is strictly prohibited. Please reply to the sender that you have received the message in error, and then delete it. Thank you. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 00/19] SPEAr : Network support for spear platforms and SPEAr1300
Dear Wolfgang,
This patch-set as been pending for a long time and it seems Tom is also away
from mails. A few patches have already been Acked by respective device owners
Please let me know how do I get this patch-set included in 2006.06 release
Thanks in advance
Vipin
On Fri, May 14, 2010 at 8:26 AM, Vipin KUMAR vipin.ku...@st.com wrote:
Dear Tom,
I am still waiting for Ack/feedback if any on this patchset v3
All feedbacks provided by you on patchset v2 have been incorporated
Regards
Vipin
On 5/9/2010 7:46 PM, Vipin Kumar wrote:
Hello Tom,
Please consider this patch-set for mainline submission.
Please let me know if there are any changes to be made
in code or if the patches are good to go into mainline
Thanks Regards
Vipin
On Thu, May 6, 2010 at 4:48 PM, Vipin KUMAR vipin.ku...@st.com wrote:
Hello Tom,
The following patch-set contains all the accepted feedbacks on patch-set
v2.
Please consider this for submission into mainline
Below changes are introduced other than the recieved review comments
1. Introduced a CONFIG_DW_SEARCH_PHY definition, which if defined searches
the ethernet phy address. Searching was always enabled in earlier patch
2. Introduced a new function dw_write_hwaddr in ethernet driver and
registered it as a callback via dev-write_hwaddr. This is a new feature
recently implemented by Ben.
Thanks in advance
Regards
Vipin
Vipin Kumar (19):
u-boot.img file not created when srctree and objtree are different
change_bit routine defined
SPEAr : SMI erase and write timeouts increased
SPEAr : Placing ethaddr write and read within CONFIG_CMD_NET
SPEAr : Reducing the max RAM size to 128MB
SPEAr : Basic arch related support added for SPEAr SoCs
SPEAr : Network driver support added
SPEAr : Network support configured for spear SoCs
SPEAr : macb driver support added for spear310 and spear320
SPEAr : FSMC driver support added
SPEAr : Configuring FSMC driver for NAND interface
SPEAr : i2c driver moved completely into drivers/i2c
SPEAr : smi driver moved completely into drivers/mtd
SPEAr : USB Device Controller driver support added
SPEAr : Supporting various configurations for spear3xx and spear6xx
boards
SPEAr : Basic spear1300 architecture support added
SPEAr : spear1300 SoC support added
SPEAr : Removing extraneous code
SPEAr : USB device controller bugfixes
MAINTAINERS | 1 +
MAKEALL | 1 +
Makefile | 30 +-
arch/arm/cpu/arm926ejs/spear/Makefile | 3 +-
arch/arm/cpu/arm926ejs/spear/cpu.c | 78 +++
arch/arm/cpu/arm_cortexa8/spear13xx/Makefile | 52 ++
arch/arm/cpu/arm_cortexa8/spear13xx/cache.S | 114 +
arch/arm/cpu/arm_cortexa8/spear13xx/cpu.c | 96
.../arm_cortexa8/spear13xx/reset.c} | 52 +--
arch/arm/cpu/arm_cortexa8/spear13xx/timer.c | 138 +
.../arm/include/asm/arch-spear/clk.h | 26 +-
arch/arm/include/asm/arch-spear/hardware.h | 16 +-
arch/arm/include/asm/arch-spear/spr_misc.h | 5 +
.../arm/include/asm/arch-spear13xx/hardware.h | 33 +-
arch/arm/include/asm/arch-spear13xx/spr_gpt.h | 85
arch/arm/include/asm/arch-spear13xx/spr_misc.h | 317
.../arm/include/asm/arch-spear13xx/sys_proto.h | 29 +-
arch/arm/include/asm/bitops.h | 11 +-
board/spear/common/Makefile | 10 +-
board/spear/common/spr_misc.c | 28 +-
board/spear/spear1300/Makefile | 51 ++
board/spear/spear1300/config.mk | 28 +
board/spear/spear1300/spear1300.c | 88
.../spear/spear1300/spr_lowlevel_init.S | 35 +-
board/spear/spear300/config.mk | 11 -
board/spear/spear300/spear300.c | 15 +-
board/spear/spear310/config.mk | 11 -
board/spear/spear310/spear310.c | 36 ++-
board/spear/spear320/config.mk | 11 -
board/spear/spear320/spear320.c | 23 +-
board/spear/spear600/config.mk | 11 -
board/spear/spear600/spear600.c | 15 +-
doc/README.designware_eth | 25 +
doc/README.spear | 46 ++-
drivers/i2c/Makefile | 2 +-
drivers/i2c/{spr_i2c.c = designware_i2c.c} | 4 +-
.../spr_i2c.h = drivers/i2c/designware_i2c.h | 6 +-
drivers/mtd/Makefile | 2 +-
drivers/mtd/nand/Makefile | 2 +-
drivers/mtd/nand/fsmc_nand.c | 366 ++
drivers/mtd/nand/spr_nand.c
[U-Boot] structure usage for peripheral registers
hi, The u-boot source has been following a strict rule to use structures to define peripheral registers for some time now I was wondering if there really is an advantage over the macro definitions which is being used in Linux until today or this is just a coding guideline to maintain consistency in the code Thanks and Regards Vipin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] structure usage for peripheral registers
Dear Vipin Kumar, In message aanlktilwwiy7k1zh5opyukiiy9updrthgfpgivehg...@mail.gmail.com you wrote: The u-boot source has been following a strict rule to use structures to define peripheral registers for some time now I was wondering if there really is an advantage over the macro definitions which is being used in Linux until today or this is just a coding guideline to maintain consistency in the code The advantage is that the compiler can perform strict type checking (assuming a proper set of accessor functions is available); using base address + offset notation you will not get any compile time warnings when trying to access - say - a 16 bit wide register in 32 bit mode, etc. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de In the beginning there was nothing. And the Lord said Let There Be Light! And still there was nothing, but at least now you could see it. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request: nand flash
Dear Scott Wood, In message 20100526230027.ga4...@schlenkerla.am.freescale.net you wrote: The following changes since commit 01f03bda5b22e5aeae5f02fd537da97a41485c73: Wolfgang Denk (1): Prepare v2010.06-rc1 are available in the git repository at: git://git.denx.de/u-boot-nand-flash.git master Andrew Caldwell (1): Blackfin: nand: drain the write buffer before returning drivers/mtd/nand/bfin_nand.c |7 ++- 1 files changed, 6 insertions(+), 1 deletions(-) Done, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Dear Lord: I just want *one* one-armed manager so I never have to hear On the other hand, again. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request: u-boot-usb
Dear Remy Bohmer, In message aanlktikjsg1i0eak6klbzku3rzb66b70l_dtbohqm...@mail.gmail.com you wrote: The following changes since commit 01f03bda5b22e5aeae5f02fd537da97a41485c73: Wolfgang Denk (1): Prepare v2010.06-rc1 are available in the git repository at: git://git.denx.de/u-boot-usb.git master Sergei Shtylyov (1): USB: fix create_pipe() include/usb.h |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Wagner's music is better than it sounds. - Mark Twain ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Please pull u-boot-coldfire/master
Dear TsiChung Liew, In message 1275031378.23263.1.ca...@yvaine you wrote: The following changes since commit c4976807cbbabd281f45466ac5e47e5639bcc9cb: Wolfgang Denk (1): Coding style cleanup, update CHANGELOG. are available in the git repository at: git://git.denx.de/u-boot-coldfire.git master Wolfgang Denk (1): Prepare v2010.06-rc1 Wolfgang Wegner (3): add missing PCS3 for MCF5445x add CONFIG_SYS_FEC_NO_SHARED_PHY for MCF5445x add CONFIG_SYS_FEC_FULL_MII for MCF5445x Makefile |4 ++-- arch/m68k/cpu/mcf5445x/cpu_init.c | 31 +-- arch/m68k/include/asm/m5445x.h|1 + 3 files changed, 32 insertions(+), 4 deletions(-) Done, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de The only perfect science is hind-sight. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] changes to U-boot and GPL
We are getting confused when reading the GPL and interpreting how it applies to our situation. We are adding features (not changing existing ones) to U-boot particular to our in-house developed system which we sell as a product to our customers. These changes involve adding a menu command for common tasks particular to our product and adding an in-house developed protocol for transferring files over a proprietary bus. We do not see these changes as being useful to the general U-boot community. We do have some concerns about security and opening our product (which is safety-critical) for malicious hacking by exposing the modifications. This modified U-boot will be deployed on our products. It will not make sense to use on any other platforms. Our question is: Do we need to submit our changes to the U-boot maintainers for inclusion in the mainline distribution code ? We understand the philosophy of GPL to give our customers the source code so they have the ability to inspect, modify and outsource And customization without being dependent on us. In that light we have no problem in either providing our customers with the full source code upon their request OR simply load the full source code in the file system of the box it is shipped with. So if a customer wants the code, they can load it of the box they bought from us. Any suggestions ? Thank you Any files attached to this e-mail will have been checked with virus detection software prior to transmission but you should carry out your own virus check before opening any attachment. Safetran Systems Corp does not accept liability for any damage or loss which may be caused by software viruses. The contents of this e-mail and any attachments are the property of Safetran Systems Corp and are intended for the confidential use by the named recipient only. They may be legally privileged and should not be communicated to, or relied upon, by any other person without written consent. If you are not the addressee, please notify us immediately at the following address: Safetran Systems Corporation, 2400 Nelson Miller Parkway, Louisville, Kentucky 40223. Safetran Systems Corp is a subsidiary of Invensys Plc. Registered office: Portland House, Bressenden Place, London, SW1E 5BF. UK Registered in England and Wales No. 1641421. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] PATCHES for Sa1100 platforms
Greetings, I got an flashboard for my HP Jornada 700 which havent gone into production yet. Are there any rules on what might be accepted upstreams? Currently my board is one of 3 and its not 100% sure that any others will be made. So it might end up being the only board done. I also plan on adding video drivers for epson s1d13xxxfb which this platform and others require. Best wishes Kristoffer Ericson ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [Nios] Pull Request
Dear Scott McNutt, In message 4bffdcaf.7020...@psyent.com you wrote: Dear Wolfgang, The following changes since commit 01f03bda5b22e5aeae5f02fd537da97a41485c73: Wolfgang Denk (1): Prepare v2010.06-rc1 are available in the git repository at: git://git.denx.de/u-boot-nios.git next Thomas Chou (8): nios2: add gpio support misc: add gpio based status led driver nios2: add gpio support to nios2-generic board spi: add altera spi controller support nios2: fix r15 issue for gcc4 nios2: fix div64 issue for gcc4 nios2: allow STANDALONE_LOAD_ADDR overriding nios: remove nios-32 arch Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de I'd rather be led to hell than managed to heaven. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] PATCHES for Sa1100 platforms
Dear Kristoffer Ericson, In message 20100528183348.gb2...@boggieman you wrote: I got an flashboard for my HP Jornada 700 which havent gone into production yet. Are there any rules on what might be accepted upstreams? Currently my board is one of 3 and its not 100% sure that any others will be made. So it might end up being the only board done. The rules are simple: if it is useful to someone, and does not have negative impact on others, and follows the rules (coding style etc.), then there is no reason to reject it. I also plan on adding video drivers for epson s1d13xxxfb which this platform and others require. You are welcome. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Of course there's no reason for it, it's just our policy. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] fsl: add LAW target to fsl_pci_info structure
Add the LAW target (enum law_trgt_if) to the fsl_pci_info structure, so that
we can capture the LAW target for a given PCI or PCIE controller. Also update
the SET_STD_PCI_INFO and SET_STD_PCIE_INFO macros to assign the
LAW_TRGT_IF_PCI[E]_x macro to the LAW target field of the structure.
This will allow future PCI[E] code to configure the LAW target automatically,
rather than requiring each board to it for each PCI controller separately.
Signed-off-by: Timur Tabi ti...@freescale.com
---
Tested via MAKEALL.
If this patch is accepted, I'll use it for the P1022DS board support that I'm
working on.
arch/powerpc/include/asm/fsl_pci.h | 19 +++
1 files changed, 11 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/include/asm/fsl_pci.h
b/arch/powerpc/include/asm/fsl_pci.h
index db61e7e..bb87543 100644
--- a/arch/powerpc/include/asm/fsl_pci.h
+++ b/arch/powerpc/include/asm/fsl_pci.h
@@ -162,14 +162,15 @@ typedef struct ccsr_pci {
} ccsr_fsl_pci_t;
struct fsl_pci_info {
- unsigned long regs;
- pci_addr_t mem_bus;
- phys_size_t mem_phys;
- pci_size_t mem_size;
- pci_addr_t io_bus;
- phys_size_t io_phys;
- pci_size_t io_size;
- int pci_num;
+ unsigned long regs;
+ pci_addr_t mem_bus;
+ phys_size_t mem_phys;
+ pci_size_t mem_size;
+ pci_addr_t io_bus;
+ phys_size_t io_phys;
+ pci_size_t io_size;
+ enum law_trgt_if law;
+ int pci_num;
};
int fsl_pci_init_port(struct fsl_pci_info *pci_info,
@@ -184,6 +185,7 @@ int fsl_pci_init_port(struct fsl_pci_info *pci_info,
x.io_bus = CONFIG_SYS_PCI##num##_IO_BUS; \
x.io_phys = CONFIG_SYS_PCI##num##_IO_PHYS; \
x.io_size = CONFIG_SYS_PCI##num##_IO_SIZE; \
+ x.law = LAW_TRGT_IF_PCI_##num; \
x.pci_num = num; \
}
@@ -196,6 +198,7 @@ int fsl_pci_init_port(struct fsl_pci_info *pci_info,
x.io_bus = CONFIG_SYS_PCIE##num##_IO_BUS; \
x.io_phys = CONFIG_SYS_PCIE##num##_IO_PHYS; \
x.io_size = CONFIG_SYS_PCIE##num##_IO_SIZE; \
+ x.law = LAW_TRGT_IF_PCIE_##num; \
x.pci_num = num; \
}
--
1.6.5
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Re: [U-Boot] [PATCH] fsl: add LAW target to fsl_pci_info structure
On May 28, 2010, at 3:05 PM, Timur Tabi wrote: Add the LAW target (enum law_trgt_if) to the fsl_pci_info structure, so that we can capture the LAW target for a given PCI or PCIE controller. Also update the SET_STD_PCI_INFO and SET_STD_PCIE_INFO macros to assign the LAW_TRGT_IF_PCI[E]_x macro to the LAW target field of the structure. This will allow future PCI[E] code to configure the LAW target automatically, rather than requiring each board to it for each PCI controller separately. Signed-off-by: Timur Tabi ti...@freescale.com --- Tested via MAKEALL. If this patch is accepted, I'll use it for the P1022DS board support that I'm working on. arch/powerpc/include/asm/fsl_pci.h | 19 +++ 1 files changed, 11 insertions(+), 8 deletions(-) Ack. Will wait til there is code that uses fsl_pci_info.law until this is applied. - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] fsl: add LAW target to fsl_pci_info structure
struct fsl_pci_info {
- unsigned long regs;
- pci_addr_t mem_bus;
- phys_size_t mem_phys;
- pci_size_t mem_size;
- pci_addr_t io_bus;
- phys_size_t io_phys;
- pci_size_t io_size;
- int pci_num;
+ unsigned long regs;
+ pci_addr_t mem_bus;
+ phys_size_t mem_phys;
+ pci_size_t mem_size;
+ pci_addr_t io_bus;
+ phys_size_t io_phys;
+ pci_size_t io_size;
+ enum law_trgt_if law;
+ int pci_num;
};
My pref is to leave the tabs.
- k
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Re: [U-Boot] [PATCH] fsl: add LAW target to fsl_pci_info structure
Kumar Gala wrote: My pref is to leave the tabs. The 'law' field would be misaligned. I would need to insert lots of tabs. unsigned long regs; pci_addr_t mem_bus; phys_size_t mem_phys; pci_size_t mem_size; pci_addr_t io_bus; phys_size_t io_phys; pci_size_t io_size; enum law_target_if law; int pci_num; ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] changes to U-boot and GPL
On Friday 28 May 2010 13:50:57 Mangelschots, Jef wrote: We are getting confused when reading the GPL and interpreting how it applies to our situation. then you should hire a lawyer to interpret it for you. legal advice cannot be obtained from mailing lists such as this. the only thing you can get is random people's opinions. so here is mine ;p. Do we need to submit our changes to the U-boot maintainers for inclusion in the mainline distribution code ? this is never a requirement of the GPL for any project out there We understand the philosophy of GPL to give our customers the source code so they have the ability to inspect, modify and outsource And customization without being dependent on us. In that light we have no problem in either providing our customers with the full source code upon their request OR simply load the full source code in the file system of the box it is shipped with. So if a customer wants the code, they can load it of the box they bought from us. and those customers are free to take that source code and release it onto the internet. so your original concerns seem kind of moot. -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] fsl: add LAW target to fsl_pci_info structure
Kumar Gala wrote: Will wait til there is code that uses fsl_pci_info.law until this is applied. Can you push your ics307 patch to your repository? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 00/19] SPEAr : Network support for spear platforms and SPEAr1300
Vipin, On 5/28/2010 9:52 AM, Vipin Kumar wrote: Dear Wolfgang, This patch-set as been pending for a long time and it seems Tom is also away from mails. A few patches have already been Acked by respective device owners Please let me know how do I get this patch-set included in 2006.06 release Thanks in advance Vipin Irrespective of the overall state, you haven't addressed the concerns from this e-mail: http://lists.denx.de/pipermail/u-boot/2010-May/071357.html regards, Ben ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] changes to U-boot and GPL
Dear Mangelschots, Jef, In message 226bc4afa29fc24789dfd00dff3084c250d3690...@safemail.safetran.railad.com you wrote: We are getting confused when reading the GPL and interpreting how it applies to our situation. You may want to read A Practical Guide to GPL Compliance, see http://www.softwarefreedom.org/resources/2008/compliance-guide.html We are adding features (not changing existing ones) to U-boot particular to our in-house developed system which we sell as a product to our customers. These changes involve adding a menu command for common tasks particular to our product and adding an in-house developed protocol for transferring files over a proprietary bus. We do not see these changes as being useful to the general U-boot community. We do have some concerns about security and opening our What makes you think they would not be useful? Others might get inspired by your menu system and adjust / extend it for their purposes. U-Boot's origin is from a port to some board thatis of no use to you - and still you benefit from a lot of code you can re-use. product (which is safety-critical) for malicious hacking by exposing the modifications. Security by obscurity has never worked, and never will work. Eventually a peer review from the experts in the community might even help to improve the security of your system (and I mean the real one, not the one you think you have). But this is your decision, of course. This modified U-boot will be deployed on our products. It will not make sense to use on any other platforms. This is your opinion. Other people my think differently. Our question is: Do we need to submit our changes to the U-boot maintainers for inclusion in the mainline distribution code ? As Mike already pointed out: no. We understand the philosophy of GPL to give our customers the source code so they have the ability to inspect, modify and outsource And customization without being dependent on us. In that light we have no problem in either providing our customers with the full source code upon their request OR simply load the full source code in the file system of the box it is shipped with. So if a customer wants the code, they can load it of the box they bought from us. Out-of-tree ports have two distinct properties: 1) they are obsolete from day 1 after their release (and often long before that), and 2) they are a never ending maintenance effort. In our experience the most efficient way to optimize product quality while minimizing long-term maintenance efforts is to push all changes into mainline as soon as possible. You get free code reviews from the best experts in the field, the community is maintaining your code for you, and there is free help for you and your customers from the community. See what's happening with all the out-of-tree ports - people come here asking for help for really ancient versions, and we cannot help even if we want because we don't know the code... It's your choice. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Technology is dominated by those who manage what they do not under- stand. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [Nios2-dev] [PATCH] nios2: use gc sections to reduce image size
Ian Abbott wrote: On 28/05/2010 05:08, Thomas Chou wrote: Follow the discussion of Charles Manning and Mike Frysinger. Using gc_sections helps reduce image size. Hi Thomas, Will that stop it working with the gcc3-based nios2 nommu toolchain? The version of 'ld' in that toolchain doesn't support the --gc-sections option. Hi Ian, I have tested with the gcc3-based nios2 nommu toolchain and gc-sections works. The error that we met when building busybox might be caused by the elf2flt process. There is no such problem generating elf. Best regards, Thomas ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3 v8] mmc: add generic mmc spi driver
Hi Andy, Would you please review these patches? 05/03 [PATCH 1/3] lib: add crc7 from Linux 05/19 [PATCH 3/3 v8] mmc: add generic mmc spi driver Best regards, Thomas ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 02/10] drivers/usb/host/ohci-hcd: undef readl/writel before redefining
This avoids a build warning that you see if anyone in the header chain has included io.h (which is coming shortly) Signed-off-by: Becky Bruce bec...@kernel.crashing.org --- drivers/usb/host/ohci-hcd.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c index b03a600..d7e5bd5 100644 --- a/drivers/usb/host/ohci-hcd.c +++ b/drivers/usb/host/ohci-hcd.c @@ -86,6 +86,8 @@ /* * e.g. PCI controllers need this */ +#undef readl +#undef writel #ifdef CONFIG_SYS_OHCI_SWAP_REG_ACCESS # define readl(a) __swap_32(*((volatile u32 *)(a))) # define writel(a, b) (*((volatile u32 *)(b)) = __swap_32((volatile u32)a)) -- 1.6.0.6 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 07/10] fsl_law.c: Add print_laws() for FSL_CORENET platforms.
Add printing of LAWBARH/LAWBARL for FSL_CORENET platforms.
Signed-off-by: Becky Bruce bec...@kernel.crashing.org
---
drivers/misc/fsl_law.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/misc/fsl_law.c b/drivers/misc/fsl_law.c
index 968..628bd59 100644
--- a/drivers/misc/fsl_law.c
+++ b/drivers/misc/fsl_law.c
@@ -193,7 +193,13 @@ void print_laws(void)
printf(\nLocal Access Window Configuration\n);
for (i = 0; i FSL_HW_NUM_LAWS; i++) {
lawar = in_be32(LAWAR_ADDR(i));
+#ifdef CONFIG_FSL_CORENET
+ printf(LAWBARH%02d: 0x%08x LAWBARL%02d: 0x%08x,
+ i, in_be32(LAWBARH_ADDR(i)),
+ i, in_be32(LAWBARL_ADDR(i)));
+#else
printf(LAWBAR%02d: 0x%08x, i, in_be32(LAWBAR_ADDR(i)));
+#endif
printf( LAWAR0x%02d: 0x%08x\n, i, lawar);
printf(\t(EN: %d TGT: 0x%02x SIZE: ,
(lawar LAW_EN) ? 1 : 0, (lawar 20) 0xff);
--
1.6.0.6
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[U-Boot] [PATCH 10/10] MAKEALL: Add missing powerpc 36-bit targets
We were missing 8641HPCN_36BIT and MPC8536DS_36BIT. Signed-off-by: Becky Bruce bec...@kernel.crashing.org --- MAKEALL |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/MAKEALL b/MAKEALL index 2527352..a82c93c 100755 --- a/MAKEALL +++ b/MAKEALL @@ -393,6 +393,7 @@ LIST_85xx= \ MPC8536DS_NAND \ MPC8536DS_SDCARD\ MPC8536DS_SPIFLASH \ + MPC8536DS_36BIT \ MPC8540ADS \ MPC8540EVAL \ MPC8541CDS \ @@ -453,6 +454,7 @@ LIST_85xx= \ LIST_86xx=\ MPC8610HPCD \ + MPC8641HPCN_36BIT \ MPC8641HPCN \ sbc8641d\ XPEDITE5170 \ -- 1.6.0.6 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 01/10] powerpc: Update configs to properly set FSL_ELBC
Some parts that have an Enhanced Local Bus Controller weren't setting CONFIG_FSL_ELBC. Fix this so we can use this define properly going forward (currently it's only used if PHYS_64BIT is set, which meant not all platforms needed to have it set correctly). Signed-off-by: Becky Bruce bec...@kernel.crashing.org --- include/configs/MPC8313ERDB.h |1 + include/configs/MPC8315ERDB.h |1 + include/configs/MPC837XEMDS.h |1 + include/configs/SIMPC8313.h |1 + include/configs/XPEDITE5370.h |1 + 5 files changed, 5 insertions(+), 0 deletions(-) diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 94695fc..7858e1f 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -36,6 +36,7 @@ #define CONFIG_MPC8313ERDB 1 #define CONFIG_PCI +#define CONFIG_FSL_ELBC 1 #define CONFIG_MISC_INIT_R diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h index 6972fe8..f1b110b 100644 --- a/include/configs/MPC8315ERDB.h +++ b/include/configs/MPC8315ERDB.h @@ -197,6 +197,7 @@ #define CONFIG_SYS_LCRR_DBYP LCRR_DBYP #define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_2 #define CONFIG_SYS_LBC_LBCR0x0004 +#define CONFIG_FSL_ELBC1 /* * FLASH on the Local Bus diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index b30d0e3..9092755 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -223,6 +223,7 @@ #define CONFIG_SYS_LCRR_DBYP LCRR_DBYP #define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_8 #define CONFIG_SYS_LBC_LBCR0x +#define CONFIG_FSL_ELBC1 /* * FLASH on the Local Bus diff --git a/include/configs/SIMPC8313.h b/include/configs/SIMPC8313.h index 9104f1a..7a6def4 100644 --- a/include/configs/SIMPC8313.h +++ b/include/configs/SIMPC8313.h @@ -37,6 +37,7 @@ #define CONFIG_MPC8313 1 #define CONFIG_PCI +#define CONFIG_FSL_ELBC1 #define CONFIG_MISC_INIT_R diff --git a/include/configs/XPEDITE5370.h b/include/configs/XPEDITE5370.h index 7fd3668..20a6753 100644 --- a/include/configs/XPEDITE5370.h +++ b/include/configs/XPEDITE5370.h @@ -47,6 +47,7 @@ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ #define CONFIG_FSL_LAW 1 /* Use common FSL init code */ +#define CONFIG_FSL_ELBC1 /* * Multicore config -- 1.6.0.6 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 04/10] mpc85xx: tlb.c cleanups
Extract the operation to read a tlb into a function - we will need
this later to print out the tlbs, and there's no point in duplicating
the code. Create a TSIZE_TO_BYTES macro to deal with the conversion
from the MAS field to an actual size instead of duplicating this in code.
There are a few misc other minor cleanups.
Signed-off-by: Becky Bruce bec...@kernel.crashing.org
---
arch/powerpc/cpu/mpc85xx/tlb.c | 50 +++
arch/powerpc/include/asm/mmu.h |1 +
2 files changed, 25 insertions(+), 26 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/tlb.c b/arch/powerpc/cpu/mpc85xx/tlb.c
index b3037ac..eebb6ae 100644
--- a/arch/powerpc/cpu/mpc85xx/tlb.c
+++ b/arch/powerpc/cpu/mpc85xx/tlb.c
@@ -55,6 +55,24 @@ void init_tlbs(void)
return ;
}
+void read_tlbcam_entry(int idx, u32 *valid, u32 *tsize, unsigned long *epn,
+ phys_addr_t *rpn)
+{
+ u32 _mas1;
+
+ mtspr(MAS0, FSL_BOOKE_MAS0(1, idx, 0));
+ asm volatile(tlbre;isync);
+ _mas1 = mfspr(MAS1);
+
+ *valid = (_mas1 MAS1_VALID);
+ *tsize = (_mas1 8) 0xf;
+ *epn = mfspr(MAS2) MAS2_EPN;
+ *rpn = mfspr(MAS3) MAS3_RPN;
+#ifdef CONFIG_ENABLE_36BIT_PHYS
+ *rpn |= ((u64)mfspr(MAS7)) 32;
+#endif
+}
+
#ifndef CONFIG_NAND_SPL
static inline void use_tlb_cam(u8 idx)
{
@@ -82,15 +100,9 @@ void init_used_tlb_cams(void)
/* walk all the entries */
for (i = 0; i num_cam; i++) {
- u32 _mas1;
-
mtspr(MAS0, FSL_BOOKE_MAS0(1, i, 0));
-
asm volatile(tlbre;isync);
- _mas1 = mfspr(MAS1);
-
- /* if the entry isn't valid skip it */
- if ((_mas1 MAS1_VALID))
+ if (mfspr(MAS1) MAS1_VALID)
use_tlb_cam(i);
}
}
@@ -134,7 +146,7 @@ void set_tlb(u8 tlb, u32 epn, u64 rpn,
#ifdef CONFIG_ADDR_MAP
if ((tlb == 1) (gd-flags GD_FLG_RELOC))
- addrmap_set_entry(epn, rpn, (1UL ((tsize * 2) + 10)), esel);
+ addrmap_set_entry(epn, rpn, TSIZE_TO_BYTES(tsize), esel);
#endif
}
@@ -201,26 +213,12 @@ void init_addr_map(void)
/* walk all the entries */
for (i = 0; i num_cam; i++) {
unsigned long epn;
- u32 tsize, _mas1;
+ u32 tsize, valid;
phys_addr_t rpn;
- mtspr(MAS0, FSL_BOOKE_MAS0(1, i, 0));
-
- asm volatile(tlbre;isync);
- _mas1 = mfspr(MAS1);
-
- /* if the entry isn't valid skip it */
- if (!(_mas1 MAS1_VALID))
- continue;
-
- tsize = (_mas1 8) 0xf;
- epn = mfspr(MAS2) MAS2_EPN;
- rpn = mfspr(MAS3) MAS3_RPN;
-#ifdef CONFIG_ENABLE_36BIT_PHYS
- rpn |= ((phys_addr_t)mfspr(MAS7)) 32;
-#endif
-
- addrmap_set_entry(epn, rpn, (1UL ((tsize * 2) + 10)), i);
+ read_tlbcam_entry(i, valid, tsize, epn, rpn);
+ if (valid MAS1_VALID)
+ addrmap_set_entry(epn, rpn, TSIZE_TO_BYTES(tsize), i);
}
return ;
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index 5166507..d4c7b75 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -402,6 +402,7 @@ extern void print_bats(void);
#define MAS1_TID(x)((x 16) 0x3FFF)
#define MAS1_TS0x1000
#define MAS1_TSIZE(x) ((x 8) 0x0F00)
+#define TSIZE_TO_BYTES(x) ((phys_addr_t)(1UL ((tsize * 2) + 10)))
#define MAS2_EPN 0xF000
#define MAS2_X00x0040
--
1.6.0.6
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[U-Boot] [PATCH 06/10] drivers/misc/fsl_law.c: Rearrange code to avoid duplication
The current code redefines functions based on FSL_CORENET_ vs not -
create macros/inlines instead that hide the differences.
Signed-off-by: Becky Bruce bec...@kernel.crashing.org
---
arch/powerpc/include/asm/fsl_law.h |1 +
drivers/misc/fsl_law.c | 125 ++--
2 files changed, 49 insertions(+), 77 deletions(-)
diff --git a/arch/powerpc/include/asm/fsl_law.h
b/arch/powerpc/include/asm/fsl_law.h
index 34c56a2..12ba1a6 100644
--- a/arch/powerpc/include/asm/fsl_law.h
+++ b/arch/powerpc/include/asm/fsl_law.h
@@ -47,6 +47,7 @@ enum law_size {
};
#define law_size_bits(sz) (__ilog2_u64(sz) - 1)
+#define lawar_size(x) (1ULL ((x 0x3f) + 1))
#ifdef CONFIG_FSL_CORENET
enum law_trgt_if {
diff --git a/drivers/misc/fsl_law.c b/drivers/misc/fsl_law.c
index 8255175..968 100644
--- a/drivers/misc/fsl_law.c
+++ b/drivers/misc/fsl_law.c
@@ -50,86 +50,61 @@ DECLARE_GLOBAL_DATA_PTR;
#endif
#ifdef CONFIG_FSL_CORENET
-void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
-{
- volatile ccsr_local_t *ccm = (void *)(CONFIG_SYS_FSL_CORENET_CCM_ADDR);
-
- gd-used_laws |= (1 idx);
-
- out_be32(ccm-law[idx].lawar, 0);
- out_be32(ccm-law[idx].lawbarh, ((u64)addr 32));
- out_be32(ccm-law[idx].lawbarl, addr 0x);
- out_be32(ccm-law[idx].lawar, LAW_EN | ((u32)id 20) | (u32)sz);
+#define LAW_BASE (CONFIG_SYS_FSL_CORENET_CCM_ADDR)
+#define LAWAR_ADDR(x) (((ccsr_local_t *)LAW_BASE)-law[x].lawar)
+#define LAWBARH_ADDR(x) (((ccsr_local_t *)LAW_BASE)-law[x].lawbarh)
+#define LAWBARL_ADDR(x) (((ccsr_local_t *)LAW_BASE)-law[x].lawbarl)
+#define LAWBAR_SHIFT 0
+#else
+#define LAW_BASE (CONFIG_SYS_IMMR + 0xc08)
+#define LAWAR_ADDR(x) ((u32 *)LAW_BASE + 8 * x + 2)
+#define LAWBAR_ADDR(x) ((u32 *)LAW_BASE + 8 * x)
+#define LAWBAR_SHIFT 12
+#endif
- /* Read back so that we sync the writes */
- in_be32(ccm-law[idx].lawar);
-}
-void disable_law(u8 idx)
+static inline phys_addr_t get_law_base_addr(int idx)
{
- volatile ccsr_local_t *ccm = (void *)(CONFIG_SYS_FSL_CORENET_CCM_ADDR);
-
- gd-used_laws = ~(1 idx);
-
- out_be32(ccm-law[idx].lawar, 0);
- out_be32(ccm-law[idx].lawbarh, 0);
- out_be32(ccm-law[idx].lawbarl, 0);
-
- /* Read back so that we sync the writes */
- in_be32(ccm-law[idx].lawar);
-
- return;
+#ifdef CONFIG_FSL_CORENET
+ return (phys_addr_t)
+ ((u64)in_be32(LAWBARH_ADDR(idx)) 32) |
+ in_be32(LAWBARL_ADDR(idx));
+#else
+ return (phys_addr_t)in_be32(LAWBAR_ADDR(idx)) LAWBAR_SHIFT;
+#endif
}
-#ifndef CONFIG_NAND_SPL
-static int get_law_entry(u8 i, struct law_entry *e)
+static inline void set_law_base_addr(int idx, phys_addr_t addr)
{
- volatile ccsr_local_t *ccm = (void *)(CONFIG_SYS_FSL_CORENET_CCM_ADDR);
- u32 lawar;
-
- lawar = in_be32(ccm-law[i].lawar);
-
- if (!(lawar LAW_EN))
- return 0;
-
- e-addr = ((u64)in_be32(ccm-law[i].lawbarh) 32) |
- in_be32(ccm-law[i].lawbarl);
- e-size = lawar 0x3f;
- e-trgt_id = (lawar 20) 0xff;
-
- return 1;
-}
-#endif
+#ifdef CONFIG_FSL_CORENET
+ out_be32(LAWBARL_ADDR(idx), addr 0x);
+ out_be32(LAWBARH_ADDR(idx), (u64)addr 32);
#else
+ out_be32(LAWBAR_ADDR(idx), addr LAWBAR_SHIFT);
+#endif
+}
+
void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
{
- volatile u32 *base = (volatile u32 *)(CONFIG_SYS_IMMR + 0xc08);
- volatile u32 *lawbar = base + 8 * idx;
- volatile u32 *lawar = base + 8 * idx + 2;
-
gd-used_laws |= (1 idx);
- out_be32(lawar, 0);
- out_be32(lawbar, addr 12);
- out_be32(lawar, LAW_EN | ((u32)id 20) | (u32)sz);
+ out_be32(LAWAR_ADDR(idx), 0);
+ set_law_base_addr(idx, addr);
+ out_be32(LAWAR_ADDR(idx), LAW_EN | ((u32)id 20) | (u32)sz);
/* Read back so that we sync the writes */
- in_be32(lawar);
+ in_be32(LAWAR_ADDR(idx));
}
void disable_law(u8 idx)
{
- volatile u32 *base = (volatile u32 *)(CONFIG_SYS_IMMR + 0xc08);
- volatile u32 *lawbar = base + 8 * idx;
- volatile u32 *lawar = base + 8 * idx + 2;
-
gd-used_laws = ~(1 idx);
- out_be32(lawar, 0);
- out_be32(lawbar, 0);
+ out_be32(LAWAR_ADDR(idx), 0);
+ set_law_base_addr(idx, 0);
/* Read back so that we sync the writes */
- in_be32(lawar);
+ in_be32(LAWAR_ADDR(idx));
return;
}
@@ -137,24 +112,20 @@ void disable_law(u8 idx)
#ifndef CONFIG_NAND_SPL
static int get_law_entry(u8 i, struct law_entry *e)
{
- volatile u32 *base = (volatile u32 *)(CONFIG_SYS_IMMR + 0xc08);
- volatile u32 *lawbar = base + 8 * i;
- volatile u32 *lawar = base + 8 * i + 2;
- u32 temp;
+ u32 lawar;
- temp = in_be32(lawar);
+ lawar = in_be32(LAWAR_ADDR(i));
[U-Boot] [PATCH 08/10] mpc85xx: Add reginfo command
The new command dumps the TLBCAM, the LAWs, and the BR/OR regs.
Add CONFIG_CMD_REGINFO to the config for all MPC85xx parts.
Signed-off-by: Becky Bruce bec...@kernel.crashing.org
---
arch/powerpc/cpu/mpc85xx/cpu.c | 13 +
common/cmd_reginfo.c |5 +
include/configs/MPC8536DS.h|1 +
include/configs/MPC8540EVAL.h |1 +
include/configs/MPC8541CDS.h |1 +
include/configs/MPC8544DS.h|1 +
include/configs/MPC8548CDS.h |1 +
include/configs/MPC8555CDS.h |1 +
include/configs/MPC8560ADS.h |1 +
include/configs/MPC8568MDS.h |1 +
include/configs/MPC8569MDS.h |1 +
include/configs/MPC8572DS.h|1 +
include/configs/P1_P2_RDB.h|1 +
include/configs/P2020DS.h |1 +
include/configs/PM854.h|1 +
include/configs/PM856.h|1 +
include/configs/SBC8540.h |1 +
include/configs/TQM85xx.h |1 +
include/configs/XPEDITE5200.h |1 +
include/configs/XPEDITE5370.h |1 +
include/configs/sbc8548.h |1 +
include/configs/sbc8560.h |1 +
include/configs/socrates.h |1 +
include/configs/stxgp3.h |1 +
include/configs/stxssa.h |1 +
25 files changed, 41 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index 4160b60..7ab4a2a 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -32,6 +32,8 @@
#include fsl_esdhc.h
#include asm/cache.h
#include asm/io.h
+#include asm/mmu.h
+#include asm/fsl_law.h
DECLARE_GLOBAL_DATA_PTR;
@@ -322,3 +324,14 @@ int cpu_mmc_init(bd_t *bis)
return 0;
#endif
}
+
+/*
+ * Print out the state of various machine registers.
+ * Currently prints out LAWs, BR0/OR0, and TLBs
+ */
+void mpc85xx_reginfo(void)
+{
+ print_tlbcam();
+ print_laws();
+ print_lbc_regs();
+}
diff --git a/common/cmd_reginfo.c b/common/cmd_reginfo.c
index 89fd9ec..0fbe0b2 100644
--- a/common/cmd_reginfo.c
+++ b/common/cmd_reginfo.c
@@ -33,6 +33,8 @@ extern void ppc4xx_reginfo(void);
#include mpc5xxx.h
#elif defined (CONFIG_MPC86xx)
extern void mpc86xx_reginfo(void);
+#elif defined(CONFIG_MPC85xx)
+extern void mpc85xx_reginfo(void);
#endif
int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
@@ -183,6 +185,9 @@ int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char
*argv[])
#elif defined(CONFIG_MPC86xx)
mpc86xx_reginfo();
+#elif defined(CONFIG_MPC85xx)
+ mpc85xx_reginfo();
+
#elif defined(CONFIG_BLACKFIN)
puts(\nSystem Configuration registers\n);
diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index da4313a..9c46d3e 100644
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -669,6 +669,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
#define CONFIG_CMD_ELF
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_SETEXPR
+#define CONFIG_CMD_REGINFO
#if defined(CONFIG_PCI)
#define CONFIG_CMD_PCI
diff --git a/include/configs/MPC8540EVAL.h b/include/configs/MPC8540EVAL.h
index 95ea275..7daf934 100644
--- a/include/configs/MPC8540EVAL.h
+++ b/include/configs/MPC8540EVAL.h
@@ -294,6 +294,7 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_I2C
+#define CONFIG_CMD_REGINFO
#if defined(CONFIG_PCI)
#define CONFIG_CMD_PCI
diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h
index e945da2..ae4fba8 100644
--- a/include/configs/MPC8541CDS.h
+++ b/include/configs/MPC8541CDS.h
@@ -403,6 +403,7 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_CMD_ELF
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_SETEXPR
+#define CONFIG_CMD_REGINFO
#if defined(CONFIG_PCI)
#define CONFIG_CMD_PCI
diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index 799d946..faba353 100644
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -420,6 +420,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_CMD_ELF
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_SETEXPR
+#define CONFIG_CMD_REGINFO
#if defined(CONFIG_PCI)
#define CONFIG_CMD_PCI
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index 3eb0049..fdd3597 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -462,6 +462,7 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_CMD_ELF
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_SETEXPR
+#define CONFIG_CMD_REGINFO
#if defined(CONFIG_PCI)
#define CONFIG_CMD_PCI
diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h
index 07a8e61..5011e5a 100644
--- a/include/configs/MPC8555CDS.h
+++ b/include/configs/MPC8555CDS.h
@@ -401,6 +401,7 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_CMD_ELF
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_SETEXPR
+#define CONFIG_CMD_REGINFO
#if defined(CONFIG_PCI)
#define CONFIG_CMD_PCI
diff --git
[U-Boot] [PATCH 0/10] PPC LBC/TLB cleanups; reginfo command for 85xx
This somewhat random patch series got its start when I was asked to create a reginfo command for 85xx by one of the internal teams here at FSL to dump the BR/ORs, LAWs, and the TLBCAM entries. As I started doing that, I began to notice that there was a lot of duplicated and inconsistent code for manipulating the TLBs and LBC registers, which, in some cases, would have caused me to have to write extra code to make reginfo useful on multiple platforms. So I decided to clean this up. The bulk of these patches are just merges of duplicated code and renames of things to get to a consistent naming scheme. These really need to be picked up by a single maintainer, as there's a definite dependency chain here; I'll let Kumar and Wolfgang decide who wants it. Wolfgang, my makefile changes are going to conflict with your top-level makefile changes that are posted on the list but not yet in the tree - you should be able to just incorporate my changes, or you can poke me when yours are in the tree and I can deal with it. Diffstat below. Cheers, Becky MAKEALL|2 + Makefile |1 + arch/powerpc/cpu/mpc83xx/cpu.c | 66 arch/powerpc/cpu/mpc83xx/cpu_init.c| 53 ++ arch/powerpc/cpu/mpc83xx/nand_init.c |4 +- arch/powerpc/cpu/mpc83xx/speed.c |2 +- arch/powerpc/cpu/mpc85xx/cpu.c | 78 +++--- arch/powerpc/cpu/mpc85xx/cpu_init.c| 58 +-- arch/powerpc/cpu/mpc85xx/cpu_init_nand.c |6 +- arch/powerpc/cpu/mpc85xx/speed.c |5 +- arch/powerpc/cpu/mpc85xx/tlb.c | 70 - arch/powerpc/cpu/mpc86xx/cpu.c | 15 +--- arch/powerpc/cpu/mpc86xx/cpu_init.c| 55 +-- arch/powerpc/cpu/mpc86xx/speed.c |5 +- arch/powerpc/cpu/mpc8xxx/Makefile |3 + arch/powerpc/cpu/mpc8xxx/fsl_lbc.c | 135 arch/powerpc/include/asm/config.h |3 + arch/powerpc/include/asm/fsl_law.h |1 + arch/powerpc/include/asm/fsl_lbc.h | 112 arch/powerpc/include/asm/immap_83xx.h | 13 ++- arch/powerpc/include/asm/immap_85xx.h | 46 + arch/powerpc/include/asm/immap_86xx.h | 49 + arch/powerpc/include/asm/mmu.h |2 + board/atum8548/atum8548.c |2 +- board/esd/vme8349/vme8349.c|2 +- board/freescale/mpc8313erdb/sdram.c|2 +- board/freescale/mpc8349emds/mpc8349emds.c |2 +- board/freescale/mpc8349itx/mpc8349itx.c|7 +- board/freescale/mpc8360emds/mpc8360emds.c |6 +- board/freescale/mpc8360erdk/nand.c |6 +- board/freescale/mpc8540ads/mpc8540ads.c|8 +- board/freescale/mpc8541cds/mpc8541cds.c| 13 +-- board/freescale/mpc8544ds/mpc8544ds.c |2 +- board/freescale/mpc8548cds/mpc8548cds.c| 13 +-- board/freescale/mpc8555cds/mpc8555cds.c| 12 +-- board/freescale/mpc8560ads/mpc8560ads.c|8 +- board/freescale/mpc8568mds/mpc8568mds.c| 11 +-- board/freescale/mpc8569mds/mpc8569mds.c|2 +- board/mpc8540eval/mpc8540eval.c|6 +- board/pm854/pm854.c|2 +- board/pm856/pm856.c|2 +- board/sbc8349/sbc8349.c|2 +- board/sbc8548/sbc8548.c| 20 +--- board/sbc8560/sbc8560.c|6 +- board/sheldon/simpc8313/sdram.c|2 +- board/sheldon/simpc8313/simpc8313.c|2 +- board/socrates/socrates.c | 31 +++--- board/tqc/tqm834x/tqm834x.c|8 +- board/tqc/tqm85xx/nand.c | 12 +- board/tqc/tqm85xx/tqm85xx.c| 35 +++--- board/xes/xpedite5170/xpedite5170.c| 10 +- board/xes/xpedite5200/xpedite5200.c| 11 +- board/xes/xpedite5370/xpedite5370.c|9 +- common/cmd_reginfo.c |5 + drivers/misc/fsl_law.c | 131 ++-- drivers/mtd/nand/fsl_elbc_nand.c | 18 ++-- drivers/usb/host/ohci-hcd.c|2 + include/configs/MPC8313ERDB.h |1 + include/configs/MPC8315ERDB.h |1 + include/configs/MPC837XEMDS.h |1 + include/configs/MPC8536DS.h|1 + include/configs/MPC8540EVAL.h |1 + include/configs/MPC8541CDS.h |1 + include/configs/MPC8544DS.h|1 + include/configs/MPC8548CDS.h |1 +
[U-Boot] [PATCH 05/10] mpc85xx: Add print_tlbcam() function
This dumps out the contents of TLB1 on 85xx-based systems.
Signed-off-by: Becky Bruce bec...@kernel.crashing.org
---
arch/powerpc/cpu/mpc85xx/tlb.c | 20
arch/powerpc/include/asm/mmu.h |1 +
2 files changed, 21 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/tlb.c b/arch/powerpc/cpu/mpc85xx/tlb.c
index eebb6ae..f2833a5 100644
--- a/arch/powerpc/cpu/mpc85xx/tlb.c
+++ b/arch/powerpc/cpu/mpc85xx/tlb.c
@@ -74,6 +74,26 @@ void read_tlbcam_entry(int idx, u32 *valid, u32 *tsize,
unsigned long *epn,
}
#ifndef CONFIG_NAND_SPL
+void print_tlbcam(void)
+{
+ int i;
+ unsigned int num_cam = mfspr(SPRN_TLB1CFG) 0xfff;
+
+ /* walk all the entries */
+ printf(TLBCAM entries\n);
+ for (i = 0; i num_cam; i++) {
+ unsigned long epn;
+ u32 tsize, valid;
+ phys_addr_t rpn;
+
+ read_tlbcam_entry(i, valid, tsize, epn, rpn);
+ printf(entry %02d: V: %d EPN 0x%08x RPN 0x%08llx size:,
+ i, (valid == 0) ? 0 : 1, (unsigned int)epn,
+ (unsigned long long)rpn);
+ print_size(TSIZE_TO_BYTES(tsize), \n);
+ }
+}
+
static inline void use_tlb_cam(u8 idx)
{
int i = idx / 32;
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index d4c7b75..c01c85f 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -486,6 +486,7 @@ extern void init_tlbs(void);
extern int find_tlb_idx(void *addr, u8 tlbsel);
extern void init_used_tlb_cams(void);
extern int find_free_tlbcam(void);
+extern void print_tlbcam(void);
extern unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg);
--
1.6.0.6
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[U-Boot] [PATCH 09/10] powerpc 83xx/85xx: Merge lbc upmconfig code
Each platform had its own version of the upmconfig, despite the
init process being identical. Now that we have a spot for common
lbc code, create a common upmconfig() there.
Signed-off-by: Becky Bruce bec...@kernel.crashing.org
---
arch/powerpc/cpu/mpc83xx/cpu.c | 66
arch/powerpc/cpu/mpc85xx/cpu.c | 61 -
arch/powerpc/cpu/mpc8xxx/fsl_lbc.c | 51 +++
arch/powerpc/include/asm/fsl_lbc.h |3 ++
4 files changed, 54 insertions(+), 127 deletions(-)
diff --git a/arch/powerpc/cpu/mpc83xx/cpu.c b/arch/powerpc/cpu/mpc83xx/cpu.c
index 24193ce..d37fc80 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu.c
@@ -125,72 +125,6 @@ int checkcpu(void)
return 0;
}
-
-/*
- * Program a UPM with the code supplied in the table.
- *
- * The 'dummy' variable is used to increment the MAD. 'dummy' is
- * supposed to be a pointer to the memory of the device being
- * programmed by the UPM. The data in the MDR is written into
- * memory and the MAD is incremented every time there's a write
- * to 'dummy'. Unfortunately, the current prototype for this
- * function doesn't allow for passing the address of this
- * device, and changing the prototype will break a number lots
- * of other code, so we need to use a round-about way of finding
- * the value for 'dummy'.
- *
- * The value can be extracted from the base address bits of the
- * Base Register (BR) associated with the specific UPM. To find
- * that BR, we need to scan all 8 BRs until we find the one that
- * has its MSEL bits matching the UPM we want. Once we know the
- * right BR, we can extract the base address bits from it.
- *
- * The MxMR and the BR and OR of the chosen bank should all be
- * configured before calling this function.
- *
- * Parameters:
- * upm: 0=UPMA, 1=UPMB, 2=UPMC
- * table: Pointer to an array of values to program
- * size: Number of elements in the array. Must be 64 or less.
- */
-void upmconfig (uint upm, uint *table, uint size)
-{
- volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
- volatile fsl_lbc_t *lbc = immap-im_lbc;
- volatile uchar *dummy = NULL;
- const u32 msel = (upm + 4) BR_MSEL_SHIFT;/* What the MSEL field
in BRn should be */
- volatile u32 *mxmr = lbc-mamr + upm; /* ptr to mamr, mbmr, or mcmr */
- uint i;
-
- /* Find the address for the dummy write transaction */
- for (i = 0; i 8; i++) {
- if ((get_lbc_br(i) BR_MSEL) == msel) {
- dummy = (uchar *) (get_lbc_br(i) BR_BA);
- break;
- }
- }
-
- if (!dummy) {
- printf(Error: %s() could not find matching BR\n,
__FUNCTION__);
- hang();
- }
-
- /* Set the OP field in the MxMR to write and the MAD field to 00
*/
- *mxmr = (*mxmr 0xCFC0) | 0x1000;
-
- for (i = 0; i size; i++) {
- lbc-mdr = table[i];
- __asm__ __volatile__ (sync);
- *dummy = 0; /* Write the value to memory and increment MAD
*/
- __asm__ __volatile__ (sync);
- while(((*mxmr 0x3f) != ((i + 1) 0x3f)));
- }
-
- /* Set the OP field in the MxMR to normal and the MAD field to 00
*/
- *mxmr = 0xCFC0;
-}
-
-
int
do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index 7ab4a2a..987eae4 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -252,67 +252,6 @@ reset_85xx_watchdog(void)
#endif /* CONFIG_WATCHDOG */
/*
- * Configures a UPM. The function requires the respective MxMR to be set
- * before calling this function. size is the number or entries, not a sizeof.
- */
-void upmconfig (uint upm, uint * table, uint size)
-{
- int i, mdr, mad, old_mad = 0;
- volatile u32 *mxmr;
- volatile fsl_lbc_t *lbc = LBC_BASE_ADDR;
- volatile u8* dummy = NULL;
- int upmmask;
-
- switch (upm) {
- case UPMA:
- mxmr = lbc-mamr;
- upmmask = BR_MS_UPMA;
- break;
- case UPMB:
- mxmr = lbc-mbmr;
- upmmask = BR_MS_UPMB;
- break;
- case UPMC:
- mxmr = lbc-mcmr;
- upmmask = BR_MS_UPMC;
- break;
- default:
- printf(%s: Bad UPM index %d to configure\n, __FUNCTION__,
upm);
- hang();
- }
-
- /* Find the address for the dummy write transaction */
- for (i = 0; i 8; i++) {
- if ((get_lbc_br(i) (BR_V | BR_MSEL)) == (BR_V | upmmask)) {
- dummy = (volatile u8 *)(get_lbc_br(i) BR_BA);
- break;
- }
- }
-
- if (i == 8) {
- printf(Error: %s() could not find
Re: [U-Boot] [Nios2-dev] [PATCH] nios2: use gc sections to reduce image size
Ian Abbott wrote: On 28/05/2010 05:08, Thomas Chou wrote: Follow the discussion of Charles Manning and Mike Frysinger. Using gc_sections helps reduce image size. Hi Thomas, Will that stop it working with the gcc3-based nios2 nommu toolchain? The version of 'ld' in that toolchain doesn't support the --gc-sections option. I have tested with the gcc3-based nios2 nommu toolchain and gc-sections works. Same here -- no problems. --Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] mpc83xx: SICRL #defines
Kim, This is defined this way: #define SICRL_USBDR 0x0C00 However in order to actually set these pins to the USB_DR functionality the setting should be 0x0800. So it appears that these (#define SICRL_*) are all masks. Each field seems to be two bits and therefore 4 possible settings. So, should they all be used as masks, should this be changed, or should we create new '#define's for the different functionalities? I need to make a change to my config file and I thought I'd get your opinion before I submitted a patch; I can make any suggested changes with my change at the same time. Thanks, Ron ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 03/10] 83xx/85xx/86xx: LBC register cleanup
On Fri, May 28, 2010 at 4:45 PM, Becky Bruce bec...@kernel.crashing.org wrote:
void upmconfig (uint upm, uint *table, uint size)
{
volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
- volatile fsl_lbus_t *lbus = immap-lbus;
+ volatile fsl_lbc_t *lbc = immap-im_lbc;
Since you're using I/O accessors, does this still need to be volatile?
--
Timur Tabi
Linux kernel developer at Freescale
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Re: [U-Boot] mpc83xx: SICRL #defines
On Fri, 28 May 2010 16:44:21 -0700 Ron Madrid ron_mad...@sbcglobal.net wrote: Kim, This is defined this way: #define SICRL_USBDR 0x0C00 However in order to actually set these pins to the USB_DR functionality the setting should be 0x0800. So it appears that these (#define SICRL_*) are all masks. Each field seems to be two bits and therefore 4 possible settings. So, should they all be used as masks, should this be changed, or should we create new '#define's for the different functionalities? I need to make a change to my config file and I thought I'd get your opinion before I submitted a patch; I can make any suggested changes with my change at the same time. It looks like the pin functions wouldn't be able to be efficiently named in a uniform fashion - I'd be ok with just introducing the four new defines SICRL_USBDR_00, SICRL_USBDR_01, and so on. Kim ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
